1 /******************************************************************************
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/sched.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
41 #include "iwl-eeprom.h"
45 #include "iwl-helpers.h"
46 #include "iwl-calib.h"
48 #include "iwl-agn-led.h"
50 static int iwl4965_send_tx_power(struct iwl_priv
*priv
);
51 static int iwl4965_hw_get_temperature(struct iwl_priv
*priv
);
53 /* Highest firmware API version supported */
54 #define IWL4965_UCODE_API_MAX 2
56 /* Lowest firmware API version supported */
57 #define IWL4965_UCODE_API_MIN 2
59 #define IWL4965_FW_PRE "iwlwifi-4965-"
60 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
61 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
64 /* module parameters */
65 static struct iwl_mod_params iwl4965_mod_params
= {
68 /* the rest are 0 by default */
71 /* check contents of special bootstrap uCode SRAM */
72 static int iwl4965_verify_bsm(struct iwl_priv
*priv
)
74 __le32
*image
= priv
->ucode_boot
.v_addr
;
75 u32 len
= priv
->ucode_boot
.len
;
79 IWL_DEBUG_INFO(priv
, "Begin verify bsm\n");
81 /* verify BSM SRAM contents */
82 val
= iwl_read_prph(priv
, BSM_WR_DWCOUNT_REG
);
83 for (reg
= BSM_SRAM_LOWER_BOUND
;
84 reg
< BSM_SRAM_LOWER_BOUND
+ len
;
85 reg
+= sizeof(u32
), image
++) {
86 val
= iwl_read_prph(priv
, reg
);
87 if (val
!= le32_to_cpu(*image
)) {
88 IWL_ERR(priv
, "BSM uCode verification failed at "
89 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
91 reg
- BSM_SRAM_LOWER_BOUND
, len
,
92 val
, le32_to_cpu(*image
));
97 IWL_DEBUG_INFO(priv
, "BSM bootstrap uCode image OK\n");
103 * iwl4965_load_bsm - Load bootstrap instructions
107 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
108 * in special SRAM that does not power down during RFKILL. When powering back
109 * up after power-saving sleeps (or during initial uCode load), the BSM loads
110 * the bootstrap program into the on-board processor, and starts it.
112 * The bootstrap program loads (via DMA) instructions and data for a new
113 * program from host DRAM locations indicated by the host driver in the
114 * BSM_DRAM_* registers. Once the new program is loaded, it starts
117 * When initializing the NIC, the host driver points the BSM to the
118 * "initialize" uCode image. This uCode sets up some internal data, then
119 * notifies host via "initialize alive" that it is complete.
121 * The host then replaces the BSM_DRAM_* pointer values to point to the
122 * normal runtime uCode instructions and a backup uCode data cache buffer
123 * (filled initially with starting data values for the on-board processor),
124 * then triggers the "initialize" uCode to load and launch the runtime uCode,
125 * which begins normal operation.
127 * When doing a power-save shutdown, runtime uCode saves data SRAM into
128 * the backup data cache in DRAM before SRAM is powered down.
130 * When powering back up, the BSM loads the bootstrap program. This reloads
131 * the runtime uCode instructions and the backup data cache into SRAM,
132 * and re-launches the runtime uCode from where it left off.
134 static int iwl4965_load_bsm(struct iwl_priv
*priv
)
136 __le32
*image
= priv
->ucode_boot
.v_addr
;
137 u32 len
= priv
->ucode_boot
.len
;
147 IWL_DEBUG_INFO(priv
, "Begin load bsm\n");
149 priv
->ucode_type
= UCODE_RT
;
151 /* make sure bootstrap program is no larger than BSM's SRAM size */
152 if (len
> IWL49_MAX_BSM_SIZE
)
155 /* Tell bootstrap uCode where to find the "Initialize" uCode
156 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
157 * NOTE: iwl_init_alive_start() will replace these values,
158 * after the "initialize" uCode has run, to point to
159 * runtime/protocol instructions and backup data cache.
161 pinst
= priv
->ucode_init
.p_addr
>> 4;
162 pdata
= priv
->ucode_init_data
.p_addr
>> 4;
163 inst_len
= priv
->ucode_init
.len
;
164 data_len
= priv
->ucode_init_data
.len
;
166 iwl_write_prph(priv
, BSM_DRAM_INST_PTR_REG
, pinst
);
167 iwl_write_prph(priv
, BSM_DRAM_DATA_PTR_REG
, pdata
);
168 iwl_write_prph(priv
, BSM_DRAM_INST_BYTECOUNT_REG
, inst_len
);
169 iwl_write_prph(priv
, BSM_DRAM_DATA_BYTECOUNT_REG
, data_len
);
171 /* Fill BSM memory with bootstrap instructions */
172 for (reg_offset
= BSM_SRAM_LOWER_BOUND
;
173 reg_offset
< BSM_SRAM_LOWER_BOUND
+ len
;
174 reg_offset
+= sizeof(u32
), image
++)
175 _iwl_write_prph(priv
, reg_offset
, le32_to_cpu(*image
));
177 ret
= iwl4965_verify_bsm(priv
);
181 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
182 iwl_write_prph(priv
, BSM_WR_MEM_SRC_REG
, 0x0);
183 iwl_write_prph(priv
, BSM_WR_MEM_DST_REG
, IWL49_RTC_INST_LOWER_BOUND
);
184 iwl_write_prph(priv
, BSM_WR_DWCOUNT_REG
, len
/ sizeof(u32
));
186 /* Load bootstrap code into instruction SRAM now,
187 * to prepare to load "initialize" uCode */
188 iwl_write_prph(priv
, BSM_WR_CTRL_REG
, BSM_WR_CTRL_REG_BIT_START
);
190 /* Wait for load of bootstrap uCode to finish */
191 for (i
= 0; i
< 100; i
++) {
192 done
= iwl_read_prph(priv
, BSM_WR_CTRL_REG
);
193 if (!(done
& BSM_WR_CTRL_REG_BIT_START
))
198 IWL_DEBUG_INFO(priv
, "BSM write complete, poll %d iterations\n", i
);
200 IWL_ERR(priv
, "BSM write did not complete!\n");
204 /* Enable future boot loads whenever power management unit triggers it
205 * (e.g. when powering back up after power-save shutdown) */
206 iwl_write_prph(priv
, BSM_WR_CTRL_REG
, BSM_WR_CTRL_REG_BIT_START_EN
);
213 * iwl4965_set_ucode_ptrs - Set uCode address location
215 * Tell initialization uCode where to find runtime uCode.
217 * BSM registers initially contain pointers to initialization uCode.
218 * We need to replace them to load runtime uCode inst and data,
219 * and to save runtime data when powering down.
221 static int iwl4965_set_ucode_ptrs(struct iwl_priv
*priv
)
227 /* bits 35:4 for 4965 */
228 pinst
= priv
->ucode_code
.p_addr
>> 4;
229 pdata
= priv
->ucode_data_backup
.p_addr
>> 4;
231 /* Tell bootstrap uCode where to find image to load */
232 iwl_write_prph(priv
, BSM_DRAM_INST_PTR_REG
, pinst
);
233 iwl_write_prph(priv
, BSM_DRAM_DATA_PTR_REG
, pdata
);
234 iwl_write_prph(priv
, BSM_DRAM_DATA_BYTECOUNT_REG
,
235 priv
->ucode_data
.len
);
237 /* Inst byte count must be last to set up, bit 31 signals uCode
238 * that all new ptr/size info is in place */
239 iwl_write_prph(priv
, BSM_DRAM_INST_BYTECOUNT_REG
,
240 priv
->ucode_code
.len
| BSM_DRAM_INST_LOAD
);
241 IWL_DEBUG_INFO(priv
, "Runtime uCode pointers are set.\n");
247 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
249 * Called after REPLY_ALIVE notification received from "initialize" uCode.
251 * The 4965 "initialize" ALIVE reply contains calibration data for:
252 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
253 * (3945 does not contain this data).
255 * Tell "initialize" uCode to go ahead and load the runtime uCode.
257 static void iwl4965_init_alive_start(struct iwl_priv
*priv
)
259 /* Check alive response for "valid" sign from uCode */
260 if (priv
->card_alive_init
.is_valid
!= UCODE_VALID_OK
) {
261 /* We had an error bringing up the hardware, so take it
262 * all the way back down so we can try again */
263 IWL_DEBUG_INFO(priv
, "Initialize Alive failed.\n");
267 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
268 * This is a paranoid check, because we would not have gotten the
269 * "initialize" alive if code weren't properly loaded. */
270 if (iwl_verify_ucode(priv
)) {
271 /* Runtime instruction load was bad;
272 * take it all the way back down so we can try again */
273 IWL_DEBUG_INFO(priv
, "Bad \"initialize\" uCode load.\n");
277 /* Calculate temperature */
278 priv
->temperature
= iwl4965_hw_get_temperature(priv
);
280 /* Send pointers to protocol/runtime uCode image ... init code will
281 * load and launch runtime uCode, which will send us another "Alive"
283 IWL_DEBUG_INFO(priv
, "Initialization Alive received.\n");
284 if (iwl4965_set_ucode_ptrs(priv
)) {
285 /* Runtime instruction load won't happen;
286 * take it all the way back down so we can try again */
287 IWL_DEBUG_INFO(priv
, "Couldn't set up uCode pointers.\n");
293 queue_work(priv
->workqueue
, &priv
->restart
);
296 static bool is_ht40_channel(__le32 rxon_flags
)
298 int chan_mod
= le32_to_cpu(rxon_flags
& RXON_FLG_CHANNEL_MODE_MSK
)
299 >> RXON_FLG_CHANNEL_MODE_POS
;
300 return ((chan_mod
== CHANNEL_MODE_PURE_40
) ||
301 (chan_mod
== CHANNEL_MODE_MIXED
));
307 static u16
iwl4965_eeprom_calib_version(struct iwl_priv
*priv
)
309 return iwl_eeprom_query16(priv
, EEPROM_4965_CALIB_VERSION_OFFSET
);
313 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
314 * must be called under priv->lock and mac access
316 static void iwl4965_txq_set_sched(struct iwl_priv
*priv
, u32 mask
)
318 iwl_write_prph(priv
, IWL49_SCD_TXFACT
, mask
);
321 static void iwl4965_nic_config(struct iwl_priv
*priv
)
326 spin_lock_irqsave(&priv
->lock
, flags
);
328 radio_cfg
= iwl_eeprom_query16(priv
, EEPROM_RADIO_CONFIG
);
330 /* write radio config values to register */
331 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg
) == EEPROM_4965_RF_CFG_TYPE_MAX
)
332 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
333 EEPROM_RF_CFG_TYPE_MSK(radio_cfg
) |
334 EEPROM_RF_CFG_STEP_MSK(radio_cfg
) |
335 EEPROM_RF_CFG_DASH_MSK(radio_cfg
));
337 /* set CSR_HW_CONFIG_REG for uCode use */
338 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
339 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI
|
340 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI
);
342 priv
->calib_info
= (struct iwl_eeprom_calib_info
*)
343 iwl_eeprom_query_addr(priv
, EEPROM_4965_CALIB_TXPOWER_OFFSET
);
345 spin_unlock_irqrestore(&priv
->lock
, flags
);
348 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
349 * Called after every association, but this runs only once!
350 * ... once chain noise is calibrated the first time, it's good forever. */
351 static void iwl4965_chain_noise_reset(struct iwl_priv
*priv
)
353 struct iwl_chain_noise_data
*data
= &(priv
->chain_noise_data
);
355 if ((data
->state
== IWL_CHAIN_NOISE_ALIVE
) && iwl_is_associated(priv
)) {
356 struct iwl_calib_diff_gain_cmd cmd
;
358 memset(&cmd
, 0, sizeof(cmd
));
359 cmd
.hdr
.op_code
= IWL_PHY_CALIBRATE_DIFF_GAIN_CMD
;
363 if (iwl_send_cmd_pdu(priv
, REPLY_PHY_CALIBRATION_CMD
,
366 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
367 data
->state
= IWL_CHAIN_NOISE_ACCUMULATE
;
368 IWL_DEBUG_CALIB(priv
, "Run chain_noise_calibrate\n");
372 static void iwl4965_gain_computation(struct iwl_priv
*priv
,
374 u16 min_average_noise_antenna_i
,
375 u32 min_average_noise
,
379 struct iwl_chain_noise_data
*data
= &priv
->chain_noise_data
;
381 data
->delta_gain_code
[min_average_noise_antenna_i
] = 0;
383 for (i
= default_chain
; i
< NUM_RX_CHAINS
; i
++) {
386 if (!(data
->disconn_array
[i
]) &&
387 (data
->delta_gain_code
[i
] ==
388 CHAIN_NOISE_DELTA_GAIN_INIT_VAL
)) {
389 delta_g
= average_noise
[i
] - min_average_noise
;
390 data
->delta_gain_code
[i
] = (u8
)((delta_g
* 10) / 15);
391 data
->delta_gain_code
[i
] =
392 min(data
->delta_gain_code
[i
],
393 (u8
) CHAIN_NOISE_MAX_DELTA_GAIN_CODE
);
395 data
->delta_gain_code
[i
] =
396 (data
->delta_gain_code
[i
] | (1 << 2));
398 data
->delta_gain_code
[i
] = 0;
401 IWL_DEBUG_CALIB(priv
, "delta_gain_codes: a %d b %d c %d\n",
402 data
->delta_gain_code
[0],
403 data
->delta_gain_code
[1],
404 data
->delta_gain_code
[2]);
406 /* Differential gain gets sent to uCode only once */
407 if (!data
->radio_write
) {
408 struct iwl_calib_diff_gain_cmd cmd
;
409 data
->radio_write
= 1;
411 memset(&cmd
, 0, sizeof(cmd
));
412 cmd
.hdr
.op_code
= IWL_PHY_CALIBRATE_DIFF_GAIN_CMD
;
413 cmd
.diff_gain_a
= data
->delta_gain_code
[0];
414 cmd
.diff_gain_b
= data
->delta_gain_code
[1];
415 cmd
.diff_gain_c
= data
->delta_gain_code
[2];
416 ret
= iwl_send_cmd_pdu(priv
, REPLY_PHY_CALIBRATION_CMD
,
419 IWL_DEBUG_CALIB(priv
, "fail sending cmd "
420 "REPLY_PHY_CALIBRATION_CMD \n");
422 /* TODO we might want recalculate
423 * rx_chain in rxon cmd */
425 /* Mark so we run this algo only once! */
426 data
->state
= IWL_CHAIN_NOISE_CALIBRATED
;
428 data
->chain_noise_a
= 0;
429 data
->chain_noise_b
= 0;
430 data
->chain_noise_c
= 0;
431 data
->chain_signal_a
= 0;
432 data
->chain_signal_b
= 0;
433 data
->chain_signal_c
= 0;
434 data
->beacon_count
= 0;
437 static void iwl4965_bg_txpower_work(struct work_struct
*work
)
439 struct iwl_priv
*priv
= container_of(work
, struct iwl_priv
,
442 /* If a scan happened to start before we got here
443 * then just return; the statistics notification will
444 * kick off another scheduled work to compensate for
445 * any temperature delta we missed here. */
446 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
) ||
447 test_bit(STATUS_SCANNING
, &priv
->status
))
450 mutex_lock(&priv
->mutex
);
452 /* Regardless of if we are associated, we must reconfigure the
453 * TX power since frames can be sent on non-radar channels while
455 iwl4965_send_tx_power(priv
);
457 /* Update last_temperature to keep is_calib_needed from running
458 * when it isn't needed... */
459 priv
->last_temperature
= priv
->temperature
;
461 mutex_unlock(&priv
->mutex
);
465 * Acquire priv->lock before calling this function !
467 static void iwl4965_set_wr_ptrs(struct iwl_priv
*priv
, int txq_id
, u32 index
)
469 iwl_write_direct32(priv
, HBUS_TARG_WRPTR
,
470 (index
& 0xff) | (txq_id
<< 8));
471 iwl_write_prph(priv
, IWL49_SCD_QUEUE_RDPTR(txq_id
), index
);
475 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
476 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
477 * @scd_retry: (1) Indicates queue will be used in aggregation mode
479 * NOTE: Acquire priv->lock before calling this function !
481 static void iwl4965_tx_queue_set_status(struct iwl_priv
*priv
,
482 struct iwl_tx_queue
*txq
,
483 int tx_fifo_id
, int scd_retry
)
485 int txq_id
= txq
->q
.id
;
487 /* Find out whether to activate Tx queue */
488 int active
= test_bit(txq_id
, &priv
->txq_ctx_active_msk
) ? 1 : 0;
490 /* Set up and activate */
491 iwl_write_prph(priv
, IWL49_SCD_QUEUE_STATUS_BITS(txq_id
),
492 (active
<< IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE
) |
493 (tx_fifo_id
<< IWL49_SCD_QUEUE_STTS_REG_POS_TXF
) |
494 (scd_retry
<< IWL49_SCD_QUEUE_STTS_REG_POS_WSL
) |
495 (scd_retry
<< IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK
) |
496 IWL49_SCD_QUEUE_STTS_REG_MSK
);
498 txq
->sched_retry
= scd_retry
;
500 IWL_DEBUG_INFO(priv
, "%s %s Queue %d on AC %d\n",
501 active
? "Activate" : "Deactivate",
502 scd_retry
? "BA" : "AC", txq_id
, tx_fifo_id
);
505 static const u16 default_queue_to_tx_fifo
[] = {
515 static int iwl4965_alive_notify(struct iwl_priv
*priv
)
522 spin_lock_irqsave(&priv
->lock
, flags
);
524 /* Clear 4965's internal Tx Scheduler data base */
525 priv
->scd_base_addr
= iwl_read_prph(priv
, IWL49_SCD_SRAM_BASE_ADDR
);
526 a
= priv
->scd_base_addr
+ IWL49_SCD_CONTEXT_DATA_OFFSET
;
527 for (; a
< priv
->scd_base_addr
+ IWL49_SCD_TX_STTS_BITMAP_OFFSET
; a
+= 4)
528 iwl_write_targ_mem(priv
, a
, 0);
529 for (; a
< priv
->scd_base_addr
+ IWL49_SCD_TRANSLATE_TBL_OFFSET
; a
+= 4)
530 iwl_write_targ_mem(priv
, a
, 0);
531 for (; a
< priv
->scd_base_addr
+
532 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv
->hw_params
.max_txq_num
); a
+= 4)
533 iwl_write_targ_mem(priv
, a
, 0);
535 /* Tel 4965 where to find Tx byte count tables */
536 iwl_write_prph(priv
, IWL49_SCD_DRAM_BASE_ADDR
,
537 priv
->scd_bc_tbls
.dma
>> 10);
539 /* Enable DMA channel */
540 for (chan
= 0; chan
< FH49_TCSR_CHNL_NUM
; chan
++)
541 iwl_write_direct32(priv
, FH_TCSR_CHNL_TX_CONFIG_REG(chan
),
542 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE
|
543 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE
);
545 /* Update FH chicken bits */
546 reg_val
= iwl_read_direct32(priv
, FH_TX_CHICKEN_BITS_REG
);
547 iwl_write_direct32(priv
, FH_TX_CHICKEN_BITS_REG
,
548 reg_val
| FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN
);
550 /* Disable chain mode for all queues */
551 iwl_write_prph(priv
, IWL49_SCD_QUEUECHAIN_SEL
, 0);
553 /* Initialize each Tx queue (including the command queue) */
554 for (i
= 0; i
< priv
->hw_params
.max_txq_num
; i
++) {
556 /* TFD circular buffer read/write indexes */
557 iwl_write_prph(priv
, IWL49_SCD_QUEUE_RDPTR(i
), 0);
558 iwl_write_direct32(priv
, HBUS_TARG_WRPTR
, 0 | (i
<< 8));
560 /* Max Tx Window size for Scheduler-ACK mode */
561 iwl_write_targ_mem(priv
, priv
->scd_base_addr
+
562 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i
),
564 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS
) &
565 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK
);
568 iwl_write_targ_mem(priv
, priv
->scd_base_addr
+
569 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i
) +
572 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS
) &
573 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK
);
576 iwl_write_prph(priv
, IWL49_SCD_INTERRUPT_MASK
,
577 (1 << priv
->hw_params
.max_txq_num
) - 1);
579 /* Activate all Tx DMA/FIFO channels */
580 priv
->cfg
->ops
->lib
->txq_set_sched(priv
, IWL_MASK(0, 6));
582 iwl4965_set_wr_ptrs(priv
, IWL_CMD_QUEUE_NUM
, 0);
584 /* Map each Tx/cmd queue to its corresponding fifo */
585 for (i
= 0; i
< ARRAY_SIZE(default_queue_to_tx_fifo
); i
++) {
586 int ac
= default_queue_to_tx_fifo
[i
];
587 iwl_txq_ctx_activate(priv
, i
);
588 iwl4965_tx_queue_set_status(priv
, &priv
->txq
[i
], ac
, 0);
591 spin_unlock_irqrestore(&priv
->lock
, flags
);
596 static struct iwl_sensitivity_ranges iwl4965_sensitivity
= {
598 .max_nrg_cck
= 0, /* not used, set to 0 */
600 .auto_corr_min_ofdm
= 85,
601 .auto_corr_min_ofdm_mrc
= 170,
602 .auto_corr_min_ofdm_x1
= 105,
603 .auto_corr_min_ofdm_mrc_x1
= 220,
605 .auto_corr_max_ofdm
= 120,
606 .auto_corr_max_ofdm_mrc
= 210,
607 .auto_corr_max_ofdm_x1
= 140,
608 .auto_corr_max_ofdm_mrc_x1
= 270,
610 .auto_corr_min_cck
= 125,
611 .auto_corr_max_cck
= 200,
612 .auto_corr_min_cck_mrc
= 200,
613 .auto_corr_max_cck_mrc
= 400,
618 .barker_corr_th_min
= 190,
619 .barker_corr_th_min_mrc
= 390,
623 static void iwl4965_set_ct_threshold(struct iwl_priv
*priv
)
626 priv
->hw_params
.ct_kill_threshold
=
627 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY
);
631 * iwl4965_hw_set_hw_params
633 * Called when initializing driver
635 static int iwl4965_hw_set_hw_params(struct iwl_priv
*priv
)
637 if (priv
->cfg
->mod_params
->num_of_queues
>= IWL_MIN_NUM_QUEUES
&&
638 priv
->cfg
->mod_params
->num_of_queues
<= IWL49_NUM_QUEUES
)
639 priv
->cfg
->num_of_queues
=
640 priv
->cfg
->mod_params
->num_of_queues
;
642 priv
->hw_params
.max_txq_num
= priv
->cfg
->num_of_queues
;
643 priv
->hw_params
.dma_chnl_num
= FH49_TCSR_CHNL_NUM
;
644 priv
->hw_params
.scd_bc_tbls_size
=
645 priv
->cfg
->num_of_queues
*
646 sizeof(struct iwl4965_scd_bc_tbl
);
647 priv
->hw_params
.tfd_size
= sizeof(struct iwl_tfd
);
648 priv
->hw_params
.max_stations
= IWL4965_STATION_COUNT
;
649 priv
->hw_params
.bcast_sta_id
= IWL4965_BROADCAST_ID
;
650 priv
->hw_params
.max_data_size
= IWL49_RTC_DATA_SIZE
;
651 priv
->hw_params
.max_inst_size
= IWL49_RTC_INST_SIZE
;
652 priv
->hw_params
.max_bsm_size
= BSM_SRAM_SIZE
;
653 priv
->hw_params
.ht40_channel
= BIT(IEEE80211_BAND_5GHZ
);
655 priv
->hw_params
.rx_wrt_ptr_reg
= FH_RSCSR_CHNL0_WPTR
;
657 priv
->hw_params
.tx_chains_num
= num_of_ant(priv
->cfg
->valid_tx_ant
);
658 priv
->hw_params
.rx_chains_num
= num_of_ant(priv
->cfg
->valid_rx_ant
);
659 priv
->hw_params
.valid_tx_ant
= priv
->cfg
->valid_tx_ant
;
660 priv
->hw_params
.valid_rx_ant
= priv
->cfg
->valid_rx_ant
;
661 if (priv
->cfg
->ops
->lib
->temp_ops
.set_ct_kill
)
662 priv
->cfg
->ops
->lib
->temp_ops
.set_ct_kill(priv
);
664 priv
->hw_params
.sens
= &iwl4965_sensitivity
;
669 static s32
iwl4965_math_div_round(s32 num
, s32 denom
, s32
*res
)
682 *res
= ((num
* 2 + denom
) / (denom
* 2)) * sign
;
688 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
690 * Determines power supply voltage compensation for txpower calculations.
691 * Returns number of 1/2-dB steps to subtract from gain table index,
692 * to compensate for difference between power supply voltage during
693 * factory measurements, vs. current power supply voltage.
695 * Voltage indication is higher for lower voltage.
696 * Lower voltage requires more gain (lower gain table index).
698 static s32
iwl4965_get_voltage_compensation(s32 eeprom_voltage
,
703 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE
== eeprom_voltage
) ||
704 (TX_POWER_IWL_ILLEGAL_VOLTAGE
== current_voltage
))
707 iwl4965_math_div_round(current_voltage
- eeprom_voltage
,
708 TX_POWER_IWL_VOLTAGE_CODES_PER_03V
, &comp
);
710 if (current_voltage
> eeprom_voltage
)
712 if ((comp
< -2) || (comp
> 2))
718 static s32
iwl4965_get_tx_atten_grp(u16 channel
)
720 if (channel
>= CALIB_IWL_TX_ATTEN_GR5_FCH
&&
721 channel
<= CALIB_IWL_TX_ATTEN_GR5_LCH
)
722 return CALIB_CH_GROUP_5
;
724 if (channel
>= CALIB_IWL_TX_ATTEN_GR1_FCH
&&
725 channel
<= CALIB_IWL_TX_ATTEN_GR1_LCH
)
726 return CALIB_CH_GROUP_1
;
728 if (channel
>= CALIB_IWL_TX_ATTEN_GR2_FCH
&&
729 channel
<= CALIB_IWL_TX_ATTEN_GR2_LCH
)
730 return CALIB_CH_GROUP_2
;
732 if (channel
>= CALIB_IWL_TX_ATTEN_GR3_FCH
&&
733 channel
<= CALIB_IWL_TX_ATTEN_GR3_LCH
)
734 return CALIB_CH_GROUP_3
;
736 if (channel
>= CALIB_IWL_TX_ATTEN_GR4_FCH
&&
737 channel
<= CALIB_IWL_TX_ATTEN_GR4_LCH
)
738 return CALIB_CH_GROUP_4
;
743 static u32
iwl4965_get_sub_band(const struct iwl_priv
*priv
, u32 channel
)
747 for (b
= 0; b
< EEPROM_TX_POWER_BANDS
; b
++) {
748 if (priv
->calib_info
->band_info
[b
].ch_from
== 0)
751 if ((channel
>= priv
->calib_info
->band_info
[b
].ch_from
)
752 && (channel
<= priv
->calib_info
->band_info
[b
].ch_to
))
759 static s32
iwl4965_interpolate_value(s32 x
, s32 x1
, s32 y1
, s32 x2
, s32 y2
)
766 iwl4965_math_div_round((x2
- x
) * (y1
- y2
), (x2
- x1
), &val
);
772 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
774 * Interpolates factory measurements from the two sample channels within a
775 * sub-band, to apply to channel of interest. Interpolation is proportional to
776 * differences in channel frequencies, which is proportional to differences
779 static int iwl4965_interpolate_chan(struct iwl_priv
*priv
, u32 channel
,
780 struct iwl_eeprom_calib_ch_info
*chan_info
)
785 const struct iwl_eeprom_calib_measure
*m1
;
786 const struct iwl_eeprom_calib_measure
*m2
;
787 struct iwl_eeprom_calib_measure
*omeas
;
791 s
= iwl4965_get_sub_band(priv
, channel
);
792 if (s
>= EEPROM_TX_POWER_BANDS
) {
793 IWL_ERR(priv
, "Tx Power can not find channel %d\n", channel
);
797 ch_i1
= priv
->calib_info
->band_info
[s
].ch1
.ch_num
;
798 ch_i2
= priv
->calib_info
->band_info
[s
].ch2
.ch_num
;
799 chan_info
->ch_num
= (u8
) channel
;
801 IWL_DEBUG_TXPOWER(priv
, "channel %d subband %d factory cal ch %d & %d\n",
802 channel
, s
, ch_i1
, ch_i2
);
804 for (c
= 0; c
< EEPROM_TX_POWER_TX_CHAINS
; c
++) {
805 for (m
= 0; m
< EEPROM_TX_POWER_MEASUREMENTS
; m
++) {
806 m1
= &(priv
->calib_info
->band_info
[s
].ch1
.
808 m2
= &(priv
->calib_info
->band_info
[s
].ch2
.
810 omeas
= &(chan_info
->measurements
[c
][m
]);
813 (u8
) iwl4965_interpolate_value(channel
, ch_i1
,
818 (u8
) iwl4965_interpolate_value(channel
, ch_i1
,
822 (u8
) iwl4965_interpolate_value(channel
, ch_i1
,
827 (s8
) iwl4965_interpolate_value(channel
, ch_i1
,
831 IWL_DEBUG_TXPOWER(priv
,
832 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c
, m
,
833 m1
->actual_pow
, m2
->actual_pow
, omeas
->actual_pow
);
834 IWL_DEBUG_TXPOWER(priv
,
835 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c
, m
,
836 m1
->gain_idx
, m2
->gain_idx
, omeas
->gain_idx
);
837 IWL_DEBUG_TXPOWER(priv
,
838 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c
, m
,
839 m1
->pa_det
, m2
->pa_det
, omeas
->pa_det
);
840 IWL_DEBUG_TXPOWER(priv
,
841 "chain %d meas %d T1=%d T2=%d T=%d\n", c
, m
,
842 m1
->temperature
, m2
->temperature
,
850 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
851 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
852 static s32 back_off_table
[] = {
853 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
854 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
855 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
856 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
860 /* Thermal compensation values for txpower for various frequency ranges ...
861 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
862 static struct iwl4965_txpower_comp_entry
{
863 s32 degrees_per_05db_a
;
864 s32 degrees_per_05db_a_denom
;
865 } tx_power_cmp_tble
[CALIB_CH_GROUP_MAX
] = {
866 {9, 2}, /* group 0 5.2, ch 34-43 */
867 {4, 1}, /* group 1 5.2, ch 44-70 */
868 {4, 1}, /* group 2 5.2, ch 71-124 */
869 {4, 1}, /* group 3 5.2, ch 125-200 */
870 {3, 1} /* group 4 2.4, ch all */
873 static s32
get_min_power_index(s32 rate_power_index
, u32 band
)
876 if ((rate_power_index
& 7) <= 4)
877 return MIN_TX_GAIN_INDEX_52GHZ_EXT
;
879 return MIN_TX_GAIN_INDEX
;
887 static const struct gain_entry gain_table
[2][108] = {
888 /* 5.2GHz power gain index table */
890 {123, 0x3F}, /* highest txpower */
999 /* 2.4GHz power gain index table */
1001 {110, 0x3f}, /* highest txpower */
1112 static int iwl4965_fill_txpower_tbl(struct iwl_priv
*priv
, u8 band
, u16 channel
,
1113 u8 is_ht40
, u8 ctrl_chan_high
,
1114 struct iwl4965_tx_power_db
*tx_power_tbl
)
1116 u8 saturation_power
;
1118 s32 user_target_power
;
1122 s32 current_regulatory
;
1123 s32 txatten_grp
= CALIB_CH_GROUP_MAX
;
1126 const struct iwl_channel_info
*ch_info
= NULL
;
1127 struct iwl_eeprom_calib_ch_info ch_eeprom_info
;
1128 const struct iwl_eeprom_calib_measure
*measurement
;
1131 s32 voltage_compensation
;
1132 s32 degrees_per_05db_num
;
1133 s32 degrees_per_05db_denom
;
1135 s32 temperature_comp
[2];
1136 s32 factory_gain_index
[2];
1137 s32 factory_actual_pwr
[2];
1140 /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1141 * are used for indexing into txpower table) */
1142 user_target_power
= 2 * priv
->tx_power_user_lmt
;
1144 /* Get current (RXON) channel, band, width */
1145 IWL_DEBUG_TXPOWER(priv
, "chan %d band %d is_ht40 %d\n", channel
, band
,
1148 ch_info
= iwl_get_channel_info(priv
, priv
->band
, channel
);
1150 if (!is_channel_valid(ch_info
))
1153 /* get txatten group, used to select 1) thermal txpower adjustment
1154 * and 2) mimo txpower balance between Tx chains. */
1155 txatten_grp
= iwl4965_get_tx_atten_grp(channel
);
1156 if (txatten_grp
< 0) {
1157 IWL_ERR(priv
, "Can't find txatten group for channel %d.\n",
1162 IWL_DEBUG_TXPOWER(priv
, "channel %d belongs to txatten group %d\n",
1163 channel
, txatten_grp
);
1172 /* hardware txpower limits ...
1173 * saturation (clipping distortion) txpowers are in half-dBm */
1175 saturation_power
= priv
->calib_info
->saturation_power24
;
1177 saturation_power
= priv
->calib_info
->saturation_power52
;
1179 if (saturation_power
< IWL_TX_POWER_SATURATION_MIN
||
1180 saturation_power
> IWL_TX_POWER_SATURATION_MAX
) {
1182 saturation_power
= IWL_TX_POWER_DEFAULT_SATURATION_24
;
1184 saturation_power
= IWL_TX_POWER_DEFAULT_SATURATION_52
;
1187 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1188 * max_power_avg values are in dBm, convert * 2 */
1190 reg_limit
= ch_info
->ht40_max_power_avg
* 2;
1192 reg_limit
= ch_info
->max_power_avg
* 2;
1194 if ((reg_limit
< IWL_TX_POWER_REGULATORY_MIN
) ||
1195 (reg_limit
> IWL_TX_POWER_REGULATORY_MAX
)) {
1197 reg_limit
= IWL_TX_POWER_DEFAULT_REGULATORY_24
;
1199 reg_limit
= IWL_TX_POWER_DEFAULT_REGULATORY_52
;
1202 /* Interpolate txpower calibration values for this channel,
1203 * based on factory calibration tests on spaced channels. */
1204 iwl4965_interpolate_chan(priv
, channel
, &ch_eeprom_info
);
1206 /* calculate tx gain adjustment based on power supply voltage */
1207 voltage
= priv
->calib_info
->voltage
;
1208 init_voltage
= (s32
)le32_to_cpu(priv
->card_alive_init
.voltage
);
1209 voltage_compensation
=
1210 iwl4965_get_voltage_compensation(voltage
, init_voltage
);
1212 IWL_DEBUG_TXPOWER(priv
, "curr volt %d eeprom volt %d volt comp %d\n",
1214 voltage
, voltage_compensation
);
1216 /* get current temperature (Celsius) */
1217 current_temp
= max(priv
->temperature
, IWL_TX_POWER_TEMPERATURE_MIN
);
1218 current_temp
= min(priv
->temperature
, IWL_TX_POWER_TEMPERATURE_MAX
);
1219 current_temp
= KELVIN_TO_CELSIUS(current_temp
);
1221 /* select thermal txpower adjustment params, based on channel group
1222 * (same frequency group used for mimo txatten adjustment) */
1223 degrees_per_05db_num
=
1224 tx_power_cmp_tble
[txatten_grp
].degrees_per_05db_a
;
1225 degrees_per_05db_denom
=
1226 tx_power_cmp_tble
[txatten_grp
].degrees_per_05db_a_denom
;
1228 /* get per-chain txpower values from factory measurements */
1229 for (c
= 0; c
< 2; c
++) {
1230 measurement
= &ch_eeprom_info
.measurements
[c
][1];
1232 /* txgain adjustment (in half-dB steps) based on difference
1233 * between factory and current temperature */
1234 factory_temp
= measurement
->temperature
;
1235 iwl4965_math_div_round((current_temp
- factory_temp
) *
1236 degrees_per_05db_denom
,
1237 degrees_per_05db_num
,
1238 &temperature_comp
[c
]);
1240 factory_gain_index
[c
] = measurement
->gain_idx
;
1241 factory_actual_pwr
[c
] = measurement
->actual_pow
;
1243 IWL_DEBUG_TXPOWER(priv
, "chain = %d\n", c
);
1244 IWL_DEBUG_TXPOWER(priv
, "fctry tmp %d, "
1245 "curr tmp %d, comp %d steps\n",
1246 factory_temp
, current_temp
,
1247 temperature_comp
[c
]);
1249 IWL_DEBUG_TXPOWER(priv
, "fctry idx %d, fctry pwr %d\n",
1250 factory_gain_index
[c
],
1251 factory_actual_pwr
[c
]);
1254 /* for each of 33 bit-rates (including 1 for CCK) */
1255 for (i
= 0; i
< POWER_TABLE_NUM_ENTRIES
; i
++) {
1257 union iwl4965_tx_power_dual_stream tx_power
;
1259 /* for mimo, reduce each chain's txpower by half
1260 * (3dB, 6 steps), so total output power is regulatory
1263 current_regulatory
= reg_limit
-
1264 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION
;
1267 current_regulatory
= reg_limit
;
1271 /* find txpower limit, either hardware or regulatory */
1272 power_limit
= saturation_power
- back_off_table
[i
];
1273 if (power_limit
> current_regulatory
)
1274 power_limit
= current_regulatory
;
1276 /* reduce user's txpower request if necessary
1277 * for this rate on this channel */
1278 target_power
= user_target_power
;
1279 if (target_power
> power_limit
)
1280 target_power
= power_limit
;
1282 IWL_DEBUG_TXPOWER(priv
, "rate %d sat %d reg %d usr %d tgt %d\n",
1283 i
, saturation_power
- back_off_table
[i
],
1284 current_regulatory
, user_target_power
,
1287 /* for each of 2 Tx chains (radio transmitters) */
1288 for (c
= 0; c
< 2; c
++) {
1293 (s32
)le32_to_cpu(priv
->card_alive_init
.
1294 tx_atten
[txatten_grp
][c
]);
1298 /* calculate index; higher index means lower txpower */
1299 power_index
= (u8
) (factory_gain_index
[c
] -
1301 factory_actual_pwr
[c
]) -
1302 temperature_comp
[c
] -
1303 voltage_compensation
+
1306 /* IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1309 if (power_index
< get_min_power_index(i
, band
))
1310 power_index
= get_min_power_index(i
, band
);
1312 /* adjust 5 GHz index to support negative indexes */
1316 /* CCK, rate 32, reduce txpower for CCK */
1317 if (i
== POWER_TABLE_CCK_ENTRY
)
1319 IWL_TX_POWER_CCK_COMPENSATION_C_STEP
;
1321 /* stay within the table! */
1322 if (power_index
> 107) {
1323 IWL_WARN(priv
, "txpower index %d > 107\n",
1327 if (power_index
< 0) {
1328 IWL_WARN(priv
, "txpower index %d < 0\n",
1333 /* fill txpower command for this rate/chain */
1334 tx_power
.s
.radio_tx_gain
[c
] =
1335 gain_table
[band
][power_index
].radio
;
1336 tx_power
.s
.dsp_predis_atten
[c
] =
1337 gain_table
[band
][power_index
].dsp
;
1339 IWL_DEBUG_TXPOWER(priv
, "chain %d mimo %d index %d "
1340 "gain 0x%02x dsp %d\n",
1341 c
, atten_value
, power_index
,
1342 tx_power
.s
.radio_tx_gain
[c
],
1343 tx_power
.s
.dsp_predis_atten
[c
]);
1344 } /* for each chain */
1346 tx_power_tbl
->power_tbl
[i
].dw
= cpu_to_le32(tx_power
.dw
);
1348 } /* for each rate */
1354 * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1356 * Uses the active RXON for channel, band, and characteristics (ht40, high)
1357 * The power limit is taken from priv->tx_power_user_lmt.
1359 static int iwl4965_send_tx_power(struct iwl_priv
*priv
)
1361 struct iwl4965_txpowertable_cmd cmd
= { 0 };
1364 bool is_ht40
= false;
1365 u8 ctrl_chan_high
= 0;
1367 if (test_bit(STATUS_SCANNING
, &priv
->status
)) {
1368 /* If this gets hit a lot, switch it to a BUG() and catch
1369 * the stack trace to find out who is calling this during
1371 IWL_WARN(priv
, "TX Power requested while scanning!\n");
1375 band
= priv
->band
== IEEE80211_BAND_2GHZ
;
1377 is_ht40
= is_ht40_channel(priv
->active_rxon
.flags
);
1380 (priv
->active_rxon
.flags
& RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
))
1384 cmd
.channel
= priv
->active_rxon
.channel
;
1386 ret
= iwl4965_fill_txpower_tbl(priv
, band
,
1387 le16_to_cpu(priv
->active_rxon
.channel
),
1388 is_ht40
, ctrl_chan_high
, &cmd
.tx_power
);
1392 ret
= iwl_send_cmd_pdu(priv
, REPLY_TX_PWR_TABLE_CMD
, sizeof(cmd
), &cmd
);
1398 static int iwl4965_send_rxon_assoc(struct iwl_priv
*priv
)
1401 struct iwl4965_rxon_assoc_cmd rxon_assoc
;
1402 const struct iwl_rxon_cmd
*rxon1
= &priv
->staging_rxon
;
1403 const struct iwl_rxon_cmd
*rxon2
= &priv
->active_rxon
;
1405 if ((rxon1
->flags
== rxon2
->flags
) &&
1406 (rxon1
->filter_flags
== rxon2
->filter_flags
) &&
1407 (rxon1
->cck_basic_rates
== rxon2
->cck_basic_rates
) &&
1408 (rxon1
->ofdm_ht_single_stream_basic_rates
==
1409 rxon2
->ofdm_ht_single_stream_basic_rates
) &&
1410 (rxon1
->ofdm_ht_dual_stream_basic_rates
==
1411 rxon2
->ofdm_ht_dual_stream_basic_rates
) &&
1412 (rxon1
->rx_chain
== rxon2
->rx_chain
) &&
1413 (rxon1
->ofdm_basic_rates
== rxon2
->ofdm_basic_rates
)) {
1414 IWL_DEBUG_INFO(priv
, "Using current RXON_ASSOC. Not resending.\n");
1418 rxon_assoc
.flags
= priv
->staging_rxon
.flags
;
1419 rxon_assoc
.filter_flags
= priv
->staging_rxon
.filter_flags
;
1420 rxon_assoc
.ofdm_basic_rates
= priv
->staging_rxon
.ofdm_basic_rates
;
1421 rxon_assoc
.cck_basic_rates
= priv
->staging_rxon
.cck_basic_rates
;
1422 rxon_assoc
.reserved
= 0;
1423 rxon_assoc
.ofdm_ht_single_stream_basic_rates
=
1424 priv
->staging_rxon
.ofdm_ht_single_stream_basic_rates
;
1425 rxon_assoc
.ofdm_ht_dual_stream_basic_rates
=
1426 priv
->staging_rxon
.ofdm_ht_dual_stream_basic_rates
;
1427 rxon_assoc
.rx_chain_select_flags
= priv
->staging_rxon
.rx_chain
;
1429 ret
= iwl_send_cmd_pdu_async(priv
, REPLY_RXON_ASSOC
,
1430 sizeof(rxon_assoc
), &rxon_assoc
, NULL
);
1437 static int iwl4965_hw_channel_switch(struct iwl_priv
*priv
, u16 channel
)
1441 bool is_ht40
= false;
1442 u8 ctrl_chan_high
= 0;
1443 struct iwl4965_channel_switch_cmd cmd
;
1444 const struct iwl_channel_info
*ch_info
;
1446 band
= priv
->band
== IEEE80211_BAND_2GHZ
;
1448 ch_info
= iwl_get_channel_info(priv
, priv
->band
, channel
);
1450 is_ht40
= is_ht40_channel(priv
->staging_rxon
.flags
);
1453 (priv
->staging_rxon
.flags
& RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
))
1457 cmd
.expect_beacon
= 0;
1458 cmd
.channel
= cpu_to_le16(channel
);
1459 cmd
.rxon_flags
= priv
->staging_rxon
.flags
;
1460 cmd
.rxon_filter_flags
= priv
->staging_rxon
.filter_flags
;
1461 cmd
.switch_time
= cpu_to_le32(priv
->ucode_beacon_time
);
1463 cmd
.expect_beacon
= is_channel_radar(ch_info
);
1465 IWL_ERR(priv
, "invalid channel switch from %u to %u\n",
1466 priv
->active_rxon
.channel
, channel
);
1470 rc
= iwl4965_fill_txpower_tbl(priv
, band
, channel
, is_ht40
,
1471 ctrl_chan_high
, &cmd
.tx_power
);
1473 IWL_DEBUG_11H(priv
, "error:%d fill txpower_tbl\n", rc
);
1477 priv
->switch_rxon
.channel
= cpu_to_le16(channel
);
1478 priv
->switch_rxon
.switch_in_progress
= true;
1480 return iwl_send_cmd_pdu(priv
, REPLY_CHANNEL_SWITCH
, sizeof(cmd
), &cmd
);
1484 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1486 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv
*priv
,
1487 struct iwl_tx_queue
*txq
,
1490 struct iwl4965_scd_bc_tbl
*scd_bc_tbl
= priv
->scd_bc_tbls
.addr
;
1491 int txq_id
= txq
->q
.id
;
1492 int write_ptr
= txq
->q
.write_ptr
;
1493 int len
= byte_cnt
+ IWL_TX_CRC_SIZE
+ IWL_TX_DELIMITER_SIZE
;
1496 WARN_ON(len
> 0xFFF || write_ptr
>= TFD_QUEUE_SIZE_MAX
);
1498 bc_ent
= cpu_to_le16(len
& 0xFFF);
1499 /* Set up byte count within first 256 entries */
1500 scd_bc_tbl
[txq_id
].tfd_offset
[write_ptr
] = bc_ent
;
1502 /* If within first 64 entries, duplicate at end */
1503 if (write_ptr
< TFD_QUEUE_SIZE_BC_DUP
)
1505 tfd_offset
[TFD_QUEUE_SIZE_MAX
+ write_ptr
] = bc_ent
;
1509 * sign_extend - Sign extend a value using specified bit as sign-bit
1511 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1512 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1514 * @param oper value to sign extend
1515 * @param index 0 based bit index (0<=index<32) to sign bit
1517 static s32
sign_extend(u32 oper
, int index
)
1519 u8 shift
= 31 - index
;
1521 return (s32
)(oper
<< shift
) >> shift
;
1525 * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1526 * @statistics: Provides the temperature reading from the uCode
1528 * A return of <0 indicates bogus data in the statistics
1530 static int iwl4965_hw_get_temperature(struct iwl_priv
*priv
)
1537 if (test_bit(STATUS_TEMPERATURE
, &priv
->status
) &&
1538 (priv
->statistics
.flag
& STATISTICS_REPLY_FLG_HT40_MODE_MSK
)) {
1539 IWL_DEBUG_TEMP(priv
, "Running HT40 temperature calibration\n");
1540 R1
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r1
[1]);
1541 R2
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r2
[1]);
1542 R3
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r3
[1]);
1543 R4
= le32_to_cpu(priv
->card_alive_init
.therm_r4
[1]);
1545 IWL_DEBUG_TEMP(priv
, "Running temperature calibration\n");
1546 R1
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r1
[0]);
1547 R2
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r2
[0]);
1548 R3
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r3
[0]);
1549 R4
= le32_to_cpu(priv
->card_alive_init
.therm_r4
[0]);
1553 * Temperature is only 23 bits, so sign extend out to 32.
1555 * NOTE If we haven't received a statistics notification yet
1556 * with an updated temperature, use R4 provided to us in the
1557 * "initialize" ALIVE response.
1559 if (!test_bit(STATUS_TEMPERATURE
, &priv
->status
))
1560 vt
= sign_extend(R4
, 23);
1563 le32_to_cpu(priv
->statistics
.general
.temperature
), 23);
1565 IWL_DEBUG_TEMP(priv
, "Calib values R[1-3]: %d %d %d R4: %d\n", R1
, R2
, R3
, vt
);
1568 IWL_ERR(priv
, "Calibration conflict R1 == R3\n");
1572 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1573 * Add offset to center the adjustment around 0 degrees Centigrade. */
1574 temperature
= TEMPERATURE_CALIB_A_VAL
* (vt
- R2
);
1575 temperature
/= (R3
- R1
);
1576 temperature
= (temperature
* 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET
;
1578 IWL_DEBUG_TEMP(priv
, "Calibrated temperature: %dK, %dC\n",
1579 temperature
, KELVIN_TO_CELSIUS(temperature
));
1584 /* Adjust Txpower only if temperature variance is greater than threshold. */
1585 #define IWL_TEMPERATURE_THRESHOLD 3
1588 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1590 * If the temperature changed has changed sufficiently, then a recalibration
1593 * Assumes caller will replace priv->last_temperature once calibration
1596 static int iwl4965_is_temp_calib_needed(struct iwl_priv
*priv
)
1600 if (!test_bit(STATUS_STATISTICS
, &priv
->status
)) {
1601 IWL_DEBUG_TEMP(priv
, "Temperature not updated -- no statistics.\n");
1605 temp_diff
= priv
->temperature
- priv
->last_temperature
;
1607 /* get absolute value */
1608 if (temp_diff
< 0) {
1609 IWL_DEBUG_POWER(priv
, "Getting cooler, delta %d, \n", temp_diff
);
1610 temp_diff
= -temp_diff
;
1611 } else if (temp_diff
== 0)
1612 IWL_DEBUG_POWER(priv
, "Same temp, \n");
1614 IWL_DEBUG_POWER(priv
, "Getting warmer, delta %d, \n", temp_diff
);
1616 if (temp_diff
< IWL_TEMPERATURE_THRESHOLD
) {
1617 IWL_DEBUG_POWER(priv
, "Thermal txpower calib not needed\n");
1621 IWL_DEBUG_POWER(priv
, "Thermal txpower calib needed\n");
1626 static void iwl4965_temperature_calib(struct iwl_priv
*priv
)
1630 temp
= iwl4965_hw_get_temperature(priv
);
1634 if (priv
->temperature
!= temp
) {
1635 if (priv
->temperature
)
1636 IWL_DEBUG_TEMP(priv
, "Temperature changed "
1637 "from %dC to %dC\n",
1638 KELVIN_TO_CELSIUS(priv
->temperature
),
1639 KELVIN_TO_CELSIUS(temp
));
1641 IWL_DEBUG_TEMP(priv
, "Temperature "
1642 "initialized to %dC\n",
1643 KELVIN_TO_CELSIUS(temp
));
1646 priv
->temperature
= temp
;
1647 iwl_tt_handler(priv
);
1648 set_bit(STATUS_TEMPERATURE
, &priv
->status
);
1650 if (!priv
->disable_tx_power_cal
&&
1651 unlikely(!test_bit(STATUS_SCANNING
, &priv
->status
)) &&
1652 iwl4965_is_temp_calib_needed(priv
))
1653 queue_work(priv
->workqueue
, &priv
->txpower_work
);
1657 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1659 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv
*priv
,
1662 /* Simply stop the queue, but don't change any configuration;
1663 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1664 iwl_write_prph(priv
,
1665 IWL49_SCD_QUEUE_STATUS_BITS(txq_id
),
1666 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE
)|
1667 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN
));
1671 * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1672 * priv->lock must be held by the caller
1674 static int iwl4965_txq_agg_disable(struct iwl_priv
*priv
, u16 txq_id
,
1675 u16 ssn_idx
, u8 tx_fifo
)
1677 if ((IWL49_FIRST_AMPDU_QUEUE
> txq_id
) ||
1678 (IWL49_FIRST_AMPDU_QUEUE
+ priv
->cfg
->num_of_ampdu_queues
1681 "queue number out of range: %d, must be %d to %d\n",
1682 txq_id
, IWL49_FIRST_AMPDU_QUEUE
,
1683 IWL49_FIRST_AMPDU_QUEUE
+
1684 priv
->cfg
->num_of_ampdu_queues
- 1);
1688 iwl4965_tx_queue_stop_scheduler(priv
, txq_id
);
1690 iwl_clear_bits_prph(priv
, IWL49_SCD_QUEUECHAIN_SEL
, (1 << txq_id
));
1692 priv
->txq
[txq_id
].q
.read_ptr
= (ssn_idx
& 0xff);
1693 priv
->txq
[txq_id
].q
.write_ptr
= (ssn_idx
& 0xff);
1694 /* supposes that ssn_idx is valid (!= 0xFFF) */
1695 iwl4965_set_wr_ptrs(priv
, txq_id
, ssn_idx
);
1697 iwl_clear_bits_prph(priv
, IWL49_SCD_INTERRUPT_MASK
, (1 << txq_id
));
1698 iwl_txq_ctx_deactivate(priv
, txq_id
);
1699 iwl4965_tx_queue_set_status(priv
, &priv
->txq
[txq_id
], tx_fifo
, 0);
1705 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1707 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv
*priv
, u16 ra_tid
,
1714 scd_q2ratid
= ra_tid
& IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK
;
1716 tbl_dw_addr
= priv
->scd_base_addr
+
1717 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id
);
1719 tbl_dw
= iwl_read_targ_mem(priv
, tbl_dw_addr
);
1722 tbl_dw
= (scd_q2ratid
<< 16) | (tbl_dw
& 0x0000FFFF);
1724 tbl_dw
= scd_q2ratid
| (tbl_dw
& 0xFFFF0000);
1726 iwl_write_targ_mem(priv
, tbl_dw_addr
, tbl_dw
);
1733 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1735 * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1736 * i.e. it must be one of the higher queues used for aggregation
1738 static int iwl4965_txq_agg_enable(struct iwl_priv
*priv
, int txq_id
,
1739 int tx_fifo
, int sta_id
, int tid
, u16 ssn_idx
)
1741 unsigned long flags
;
1744 if ((IWL49_FIRST_AMPDU_QUEUE
> txq_id
) ||
1745 (IWL49_FIRST_AMPDU_QUEUE
+ priv
->cfg
->num_of_ampdu_queues
1748 "queue number out of range: %d, must be %d to %d\n",
1749 txq_id
, IWL49_FIRST_AMPDU_QUEUE
,
1750 IWL49_FIRST_AMPDU_QUEUE
+
1751 priv
->cfg
->num_of_ampdu_queues
- 1);
1755 ra_tid
= BUILD_RAxTID(sta_id
, tid
);
1757 /* Modify device's station table to Tx this TID */
1758 iwl_sta_tx_modify_enable_tid(priv
, sta_id
, tid
);
1760 spin_lock_irqsave(&priv
->lock
, flags
);
1762 /* Stop this Tx queue before configuring it */
1763 iwl4965_tx_queue_stop_scheduler(priv
, txq_id
);
1765 /* Map receiver-address / traffic-ID to this queue */
1766 iwl4965_tx_queue_set_q2ratid(priv
, ra_tid
, txq_id
);
1768 /* Set this queue as a chain-building queue */
1769 iwl_set_bits_prph(priv
, IWL49_SCD_QUEUECHAIN_SEL
, (1 << txq_id
));
1771 /* Place first TFD at index corresponding to start sequence number.
1772 * Assumes that ssn_idx is valid (!= 0xFFF) */
1773 priv
->txq
[txq_id
].q
.read_ptr
= (ssn_idx
& 0xff);
1774 priv
->txq
[txq_id
].q
.write_ptr
= (ssn_idx
& 0xff);
1775 iwl4965_set_wr_ptrs(priv
, txq_id
, ssn_idx
);
1777 /* Set up Tx window size and frame limit for this queue */
1778 iwl_write_targ_mem(priv
,
1779 priv
->scd_base_addr
+ IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id
),
1780 (SCD_WIN_SIZE
<< IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS
) &
1781 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK
);
1783 iwl_write_targ_mem(priv
, priv
->scd_base_addr
+
1784 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id
) + sizeof(u32
),
1785 (SCD_FRAME_LIMIT
<< IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS
)
1786 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK
);
1788 iwl_set_bits_prph(priv
, IWL49_SCD_INTERRUPT_MASK
, (1 << txq_id
));
1790 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1791 iwl4965_tx_queue_set_status(priv
, &priv
->txq
[txq_id
], tx_fifo
, 1);
1793 spin_unlock_irqrestore(&priv
->lock
, flags
);
1799 static u16
iwl4965_get_hcmd_size(u8 cmd_id
, u16 len
)
1803 return (u16
) sizeof(struct iwl4965_rxon_cmd
);
1809 static u16
iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd
*cmd
, u8
*data
)
1811 struct iwl4965_addsta_cmd
*addsta
= (struct iwl4965_addsta_cmd
*)data
;
1812 addsta
->mode
= cmd
->mode
;
1813 memcpy(&addsta
->sta
, &cmd
->sta
, sizeof(struct sta_id_modify
));
1814 memcpy(&addsta
->key
, &cmd
->key
, sizeof(struct iwl4965_keyinfo
));
1815 addsta
->station_flags
= cmd
->station_flags
;
1816 addsta
->station_flags_msk
= cmd
->station_flags_msk
;
1817 addsta
->tid_disable_tx
= cmd
->tid_disable_tx
;
1818 addsta
->add_immediate_ba_tid
= cmd
->add_immediate_ba_tid
;
1819 addsta
->remove_immediate_ba_tid
= cmd
->remove_immediate_ba_tid
;
1820 addsta
->add_immediate_ba_ssn
= cmd
->add_immediate_ba_ssn
;
1821 addsta
->reserved1
= cpu_to_le16(0);
1822 addsta
->reserved2
= cpu_to_le32(0);
1824 return (u16
)sizeof(struct iwl4965_addsta_cmd
);
1827 static inline u32
iwl4965_get_scd_ssn(struct iwl4965_tx_resp
*tx_resp
)
1829 return le32_to_cpup(&tx_resp
->u
.status
+ tx_resp
->frame_count
) & MAX_SN
;
1833 * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1835 static int iwl4965_tx_status_reply_tx(struct iwl_priv
*priv
,
1836 struct iwl_ht_agg
*agg
,
1837 struct iwl4965_tx_resp
*tx_resp
,
1838 int txq_id
, u16 start_idx
)
1841 struct agg_tx_status
*frame_status
= tx_resp
->u
.agg_status
;
1842 struct ieee80211_tx_info
*info
= NULL
;
1843 struct ieee80211_hdr
*hdr
= NULL
;
1844 u32 rate_n_flags
= le32_to_cpu(tx_resp
->rate_n_flags
);
1847 if (agg
->wait_for_ba
)
1848 IWL_DEBUG_TX_REPLY(priv
, "got tx response w/o block-ack\n");
1850 agg
->frame_count
= tx_resp
->frame_count
;
1851 agg
->start_idx
= start_idx
;
1852 agg
->rate_n_flags
= rate_n_flags
;
1855 /* num frames attempted by Tx command */
1856 if (agg
->frame_count
== 1) {
1857 /* Only one frame was attempted; no block-ack will arrive */
1858 status
= le16_to_cpu(frame_status
[0].status
);
1861 /* FIXME: code repetition */
1862 IWL_DEBUG_TX_REPLY(priv
, "FrameCnt = %d, StartIdx=%d idx=%d\n",
1863 agg
->frame_count
, agg
->start_idx
, idx
);
1865 info
= IEEE80211_SKB_CB(priv
->txq
[txq_id
].txb
[idx
].skb
[0]);
1866 info
->status
.rates
[0].count
= tx_resp
->failure_frame
+ 1;
1867 info
->flags
&= ~IEEE80211_TX_CTL_AMPDU
;
1868 info
->flags
|= iwl_is_tx_success(status
) ?
1869 IEEE80211_TX_STAT_ACK
: 0;
1870 iwl_hwrate_to_tx_control(priv
, rate_n_flags
, info
);
1871 /* FIXME: code repetition end */
1873 IWL_DEBUG_TX_REPLY(priv
, "1 Frame 0x%x failure :%d\n",
1874 status
& 0xff, tx_resp
->failure_frame
);
1875 IWL_DEBUG_TX_REPLY(priv
, "Rate Info rate_n_flags=%x\n", rate_n_flags
);
1877 agg
->wait_for_ba
= 0;
1879 /* Two or more frames were attempted; expect block-ack */
1881 int start
= agg
->start_idx
;
1883 /* Construct bit-map of pending frames within Tx window */
1884 for (i
= 0; i
< agg
->frame_count
; i
++) {
1886 status
= le16_to_cpu(frame_status
[i
].status
);
1887 seq
= le16_to_cpu(frame_status
[i
].sequence
);
1888 idx
= SEQ_TO_INDEX(seq
);
1889 txq_id
= SEQ_TO_QUEUE(seq
);
1891 if (status
& (AGG_TX_STATE_FEW_BYTES_MSK
|
1892 AGG_TX_STATE_ABORT_MSK
))
1895 IWL_DEBUG_TX_REPLY(priv
, "FrameCnt = %d, txq_id=%d idx=%d\n",
1896 agg
->frame_count
, txq_id
, idx
);
1898 hdr
= iwl_tx_queue_get_hdr(priv
, txq_id
, idx
);
1901 "BUG_ON idx doesn't point to valid skb"
1902 " idx=%d, txq_id=%d\n", idx
, txq_id
);
1906 sc
= le16_to_cpu(hdr
->seq_ctrl
);
1907 if (idx
!= (SEQ_TO_SN(sc
) & 0xff)) {
1909 "BUG_ON idx doesn't match seq control"
1910 " idx=%d, seq_idx=%d, seq=%d\n",
1911 idx
, SEQ_TO_SN(sc
), hdr
->seq_ctrl
);
1915 IWL_DEBUG_TX_REPLY(priv
, "AGG Frame i=%d idx %d seq=%d\n",
1916 i
, idx
, SEQ_TO_SN(sc
));
1920 sh
= (start
- idx
) + 0xff;
1921 bitmap
= bitmap
<< sh
;
1924 } else if (sh
< -64)
1925 sh
= 0xff - (start
- idx
);
1929 bitmap
= bitmap
<< sh
;
1932 bitmap
|= 1ULL << sh
;
1933 IWL_DEBUG_TX_REPLY(priv
, "start=%d bitmap=0x%llx\n",
1934 start
, (unsigned long long)bitmap
);
1937 agg
->bitmap
= bitmap
;
1938 agg
->start_idx
= start
;
1939 IWL_DEBUG_TX_REPLY(priv
, "Frames %d start_idx=%d bitmap=0x%llx\n",
1940 agg
->frame_count
, agg
->start_idx
,
1941 (unsigned long long)agg
->bitmap
);
1944 agg
->wait_for_ba
= 1;
1950 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
1952 static void iwl4965_rx_reply_tx(struct iwl_priv
*priv
,
1953 struct iwl_rx_mem_buffer
*rxb
)
1955 struct iwl_rx_packet
*pkt
= rxb_addr(rxb
);
1956 u16 sequence
= le16_to_cpu(pkt
->hdr
.sequence
);
1957 int txq_id
= SEQ_TO_QUEUE(sequence
);
1958 int index
= SEQ_TO_INDEX(sequence
);
1959 struct iwl_tx_queue
*txq
= &priv
->txq
[txq_id
];
1960 struct ieee80211_hdr
*hdr
;
1961 struct ieee80211_tx_info
*info
;
1962 struct iwl4965_tx_resp
*tx_resp
= (void *)&pkt
->u
.raw
[0];
1963 u32 status
= le32_to_cpu(tx_resp
->u
.status
);
1964 int tid
= MAX_TID_COUNT
;
1969 if ((index
>= txq
->q
.n_bd
) || (iwl_queue_used(&txq
->q
, index
) == 0)) {
1970 IWL_ERR(priv
, "Read index for DMA queue txq_id (%d) index %d "
1971 "is out of range [0-%d] %d %d\n", txq_id
,
1972 index
, txq
->q
.n_bd
, txq
->q
.write_ptr
,
1977 info
= IEEE80211_SKB_CB(txq
->txb
[txq
->q
.read_ptr
].skb
[0]);
1978 memset(&info
->status
, 0, sizeof(info
->status
));
1980 hdr
= iwl_tx_queue_get_hdr(priv
, txq_id
, index
);
1981 if (ieee80211_is_data_qos(hdr
->frame_control
)) {
1982 qc
= ieee80211_get_qos_ctl(hdr
);
1986 sta_id
= iwl_get_ra_sta_id(priv
, hdr
);
1987 if (txq
->sched_retry
&& unlikely(sta_id
== IWL_INVALID_STATION
)) {
1988 IWL_ERR(priv
, "Station not known\n");
1992 if (txq
->sched_retry
) {
1993 const u32 scd_ssn
= iwl4965_get_scd_ssn(tx_resp
);
1994 struct iwl_ht_agg
*agg
= NULL
;
1998 agg
= &priv
->stations
[sta_id
].tid
[tid
].agg
;
2000 iwl4965_tx_status_reply_tx(priv
, agg
, tx_resp
, txq_id
, index
);
2002 /* check if BAR is needed */
2003 if ((tx_resp
->frame_count
== 1) && !iwl_is_tx_success(status
))
2004 info
->flags
|= IEEE80211_TX_STAT_AMPDU_NO_BACK
;
2006 if (txq
->q
.read_ptr
!= (scd_ssn
& 0xff)) {
2007 index
= iwl_queue_dec_wrap(scd_ssn
& 0xff, txq
->q
.n_bd
);
2008 IWL_DEBUG_TX_REPLY(priv
, "Retry scheduler reclaim scd_ssn "
2009 "%d index %d\n", scd_ssn
, index
);
2010 freed
= iwl_tx_queue_reclaim(priv
, txq_id
, index
);
2011 priv
->stations
[sta_id
].tid
[tid
].tfds_in_queue
-= freed
;
2013 if (priv
->mac80211_registered
&&
2014 (iwl_queue_space(&txq
->q
) > txq
->q
.low_mark
) &&
2015 (agg
->state
!= IWL_EMPTYING_HW_QUEUE_DELBA
)) {
2016 if (agg
->state
== IWL_AGG_OFF
)
2017 iwl_wake_queue(priv
, txq_id
);
2019 iwl_wake_queue(priv
, txq
->swq_id
);
2023 info
->status
.rates
[0].count
= tx_resp
->failure_frame
+ 1;
2024 info
->flags
|= iwl_is_tx_success(status
) ?
2025 IEEE80211_TX_STAT_ACK
: 0;
2026 iwl_hwrate_to_tx_control(priv
,
2027 le32_to_cpu(tx_resp
->rate_n_flags
),
2030 IWL_DEBUG_TX_REPLY(priv
, "TXQ %d status %s (0x%08x) "
2031 "rate_n_flags 0x%x retries %d\n",
2033 iwl_get_tx_fail_reason(status
), status
,
2034 le32_to_cpu(tx_resp
->rate_n_flags
),
2035 tx_resp
->failure_frame
);
2037 freed
= iwl_tx_queue_reclaim(priv
, txq_id
, index
);
2038 if (qc
&& likely(sta_id
!= IWL_INVALID_STATION
))
2039 priv
->stations
[sta_id
].tid
[tid
].tfds_in_queue
-= freed
;
2041 if (priv
->mac80211_registered
&&
2042 (iwl_queue_space(&txq
->q
) > txq
->q
.low_mark
))
2043 iwl_wake_queue(priv
, txq_id
);
2046 if (qc
&& likely(sta_id
!= IWL_INVALID_STATION
))
2047 iwl_txq_check_empty(priv
, sta_id
, tid
, txq_id
);
2049 if (iwl_check_bits(status
, TX_ABORT_REQUIRED_MSK
))
2050 IWL_ERR(priv
, "TODO: Implement Tx ABORT REQUIRED!!!\n");
2053 static int iwl4965_calc_rssi(struct iwl_priv
*priv
,
2054 struct iwl_rx_phy_res
*rx_resp
)
2056 /* data from PHY/DSP regarding signal strength, etc.,
2057 * contents are always there, not configurable by host. */
2058 struct iwl4965_rx_non_cfg_phy
*ncphy
=
2059 (struct iwl4965_rx_non_cfg_phy
*)rx_resp
->non_cfg_phy_buf
;
2060 u32 agc
= (le16_to_cpu(ncphy
->agc_info
) & IWL49_AGC_DB_MASK
)
2061 >> IWL49_AGC_DB_POS
;
2063 u32 valid_antennae
=
2064 (le16_to_cpu(rx_resp
->phy_flags
) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK
)
2065 >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET
;
2069 /* Find max rssi among 3 possible receivers.
2070 * These values are measured by the digital signal processor (DSP).
2071 * They should stay fairly constant even as the signal strength varies,
2072 * if the radio's automatic gain control (AGC) is working right.
2073 * AGC value (see below) will provide the "interesting" info. */
2074 for (i
= 0; i
< 3; i
++)
2075 if (valid_antennae
& (1 << i
))
2076 max_rssi
= max(ncphy
->rssi_info
[i
<< 1], max_rssi
);
2078 IWL_DEBUG_STATS(priv
, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2079 ncphy
->rssi_info
[0], ncphy
->rssi_info
[2], ncphy
->rssi_info
[4],
2082 /* dBm = max_rssi dB - agc dB - constant.
2083 * Higher AGC (higher radio gain) means lower signal. */
2084 return max_rssi
- agc
- IWL49_RSSI_OFFSET
;
2088 /* Set up 4965-specific Rx frame reply handlers */
2089 static void iwl4965_rx_handler_setup(struct iwl_priv
*priv
)
2091 /* Legacy Rx frames */
2092 priv
->rx_handlers
[REPLY_RX
] = iwl_rx_reply_rx
;
2094 priv
->rx_handlers
[REPLY_TX
] = iwl4965_rx_reply_tx
;
2097 static void iwl4965_setup_deferred_work(struct iwl_priv
*priv
)
2099 INIT_WORK(&priv
->txpower_work
, iwl4965_bg_txpower_work
);
2102 static void iwl4965_cancel_deferred_work(struct iwl_priv
*priv
)
2104 cancel_work_sync(&priv
->txpower_work
);
2107 #define IWL4965_UCODE_GET(item) \
2108 static u32 iwl4965_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2111 return le32_to_cpu(ucode->u.v1.item); \
2114 static u32
iwl4965_ucode_get_header_size(u32 api_ver
)
2116 return UCODE_HEADER_SIZE(1);
2118 static u32
iwl4965_ucode_get_build(const struct iwl_ucode_header
*ucode
,
2123 static u8
*iwl4965_ucode_get_data(const struct iwl_ucode_header
*ucode
,
2126 return (u8
*) ucode
->u
.v1
.data
;
2129 IWL4965_UCODE_GET(inst_size
);
2130 IWL4965_UCODE_GET(data_size
);
2131 IWL4965_UCODE_GET(init_size
);
2132 IWL4965_UCODE_GET(init_data_size
);
2133 IWL4965_UCODE_GET(boot_size
);
2135 static struct iwl_hcmd_ops iwl4965_hcmd
= {
2136 .rxon_assoc
= iwl4965_send_rxon_assoc
,
2137 .commit_rxon
= iwl_commit_rxon
,
2138 .set_rxon_chain
= iwl_set_rxon_chain
,
2141 static struct iwl_ucode_ops iwl4965_ucode
= {
2142 .get_header_size
= iwl4965_ucode_get_header_size
,
2143 .get_build
= iwl4965_ucode_get_build
,
2144 .get_inst_size
= iwl4965_ucode_get_inst_size
,
2145 .get_data_size
= iwl4965_ucode_get_data_size
,
2146 .get_init_size
= iwl4965_ucode_get_init_size
,
2147 .get_init_data_size
= iwl4965_ucode_get_init_data_size
,
2148 .get_boot_size
= iwl4965_ucode_get_boot_size
,
2149 .get_data
= iwl4965_ucode_get_data
,
2151 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils
= {
2152 .get_hcmd_size
= iwl4965_get_hcmd_size
,
2153 .build_addsta_hcmd
= iwl4965_build_addsta_hcmd
,
2154 .chain_noise_reset
= iwl4965_chain_noise_reset
,
2155 .gain_computation
= iwl4965_gain_computation
,
2156 .rts_tx_cmd_flag
= iwlcore_rts_tx_cmd_flag
,
2157 .calc_rssi
= iwl4965_calc_rssi
,
2160 static struct iwl_lib_ops iwl4965_lib
= {
2161 .set_hw_params
= iwl4965_hw_set_hw_params
,
2162 .txq_update_byte_cnt_tbl
= iwl4965_txq_update_byte_cnt_tbl
,
2163 .txq_set_sched
= iwl4965_txq_set_sched
,
2164 .txq_agg_enable
= iwl4965_txq_agg_enable
,
2165 .txq_agg_disable
= iwl4965_txq_agg_disable
,
2166 .txq_attach_buf_to_tfd
= iwl_hw_txq_attach_buf_to_tfd
,
2167 .txq_free_tfd
= iwl_hw_txq_free_tfd
,
2168 .txq_init
= iwl_hw_tx_queue_init
,
2169 .rx_handler_setup
= iwl4965_rx_handler_setup
,
2170 .setup_deferred_work
= iwl4965_setup_deferred_work
,
2171 .cancel_deferred_work
= iwl4965_cancel_deferred_work
,
2172 .is_valid_rtc_data_addr
= iwl4965_hw_valid_rtc_data_addr
,
2173 .alive_notify
= iwl4965_alive_notify
,
2174 .init_alive_start
= iwl4965_init_alive_start
,
2175 .load_ucode
= iwl4965_load_bsm
,
2176 .dump_nic_event_log
= iwl_dump_nic_event_log
,
2177 .dump_nic_error_log
= iwl_dump_nic_error_log
,
2178 .set_channel_switch
= iwl4965_hw_channel_switch
,
2180 .init
= iwl_apm_init
,
2181 .stop
= iwl_apm_stop
,
2182 .config
= iwl4965_nic_config
,
2183 .set_pwr_src
= iwl_set_pwr_src
,
2186 .regulatory_bands
= {
2187 EEPROM_REGULATORY_BAND_1_CHANNELS
,
2188 EEPROM_REGULATORY_BAND_2_CHANNELS
,
2189 EEPROM_REGULATORY_BAND_3_CHANNELS
,
2190 EEPROM_REGULATORY_BAND_4_CHANNELS
,
2191 EEPROM_REGULATORY_BAND_5_CHANNELS
,
2192 EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS
,
2193 EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
2195 .verify_signature
= iwlcore_eeprom_verify_signature
,
2196 .acquire_semaphore
= iwlcore_eeprom_acquire_semaphore
,
2197 .release_semaphore
= iwlcore_eeprom_release_semaphore
,
2198 .calib_version
= iwl4965_eeprom_calib_version
,
2199 .query_addr
= iwlcore_eeprom_query_addr
,
2201 .send_tx_power
= iwl4965_send_tx_power
,
2202 .update_chain_flags
= iwl_update_chain_flags
,
2203 .post_associate
= iwl_post_associate
,
2204 .config_ap
= iwl_config_ap
,
2205 .isr
= iwl_isr_legacy
,
2207 .temperature
= iwl4965_temperature_calib
,
2208 .set_ct_kill
= iwl4965_set_ct_threshold
,
2212 static struct iwl_ops iwl4965_ops
= {
2213 .ucode
= &iwl4965_ucode
,
2214 .lib
= &iwl4965_lib
,
2215 .hcmd
= &iwl4965_hcmd
,
2216 .utils
= &iwl4965_hcmd_utils
,
2217 .led
= &iwlagn_led_ops
,
2220 struct iwl_cfg iwl4965_agn_cfg
= {
2222 .fw_name_pre
= IWL4965_FW_PRE
,
2223 .ucode_api_max
= IWL4965_UCODE_API_MAX
,
2224 .ucode_api_min
= IWL4965_UCODE_API_MIN
,
2225 .sku
= IWL_SKU_A
|IWL_SKU_G
|IWL_SKU_N
,
2226 .eeprom_size
= IWL4965_EEPROM_IMG_SIZE
,
2227 .eeprom_ver
= EEPROM_4965_EEPROM_VERSION
,
2228 .eeprom_calib_ver
= EEPROM_4965_TX_POWER_VERSION
,
2229 .ops
= &iwl4965_ops
,
2230 .num_of_queues
= IWL49_NUM_QUEUES
,
2231 .num_of_ampdu_queues
= IWL49_NUM_AMPDU_QUEUES
,
2232 .mod_params
= &iwl4965_mod_params
,
2233 .valid_tx_ant
= ANT_AB
,
2234 .valid_rx_ant
= ANT_ABC
,
2238 .use_isr_legacy
= true,
2239 .ht_greenfield_support
= false,
2240 .broken_powersave
= true,
2241 .led_compensation
= 61,
2242 .chain_noise_num_beacons
= IWL4965_CAL_NUM_BEACONS
,
2245 /* Module firmware */
2246 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX
));
2248 module_param_named(antenna
, iwl4965_mod_params
.antenna
, int, S_IRUGO
);
2249 MODULE_PARM_DESC(antenna
, "select antenna (1=Main, 2=Aux, default 0 [both])");
2250 module_param_named(swcrypto
, iwl4965_mod_params
.sw_crypto
, int, S_IRUGO
);
2251 MODULE_PARM_DESC(swcrypto
, "using crypto in software (default 0 [hardware])");
2253 disable_hw_scan
, iwl4965_mod_params
.disable_hw_scan
, int, S_IRUGO
);
2254 MODULE_PARM_DESC(disable_hw_scan
, "disable hardware scanning (default 0)");
2256 module_param_named(queues_num
, iwl4965_mod_params
.num_of_queues
, int, S_IRUGO
);
2257 MODULE_PARM_DESC(queues_num
, "number of hw queues.");
2259 module_param_named(11n_disable
, iwl4965_mod_params
.disable_11n
, int, S_IRUGO
);
2260 MODULE_PARM_DESC(11n_disable
, "disable 11n functionality");
2261 module_param_named(amsdu_size_8K
, iwl4965_mod_params
.amsdu_size_8K
,
2263 MODULE_PARM_DESC(amsdu_size_8K
, "enable 8K amsdu size");
2265 module_param_named(fw_restart4965
, iwl4965_mod_params
.restart_fw
, int, S_IRUGO
);
2266 MODULE_PARM_DESC(fw_restart4965
, "restart firmware in case of error");