drivers/cpuidle/cpuidle-calxeda.c

   1 /*
   2  * Copyright 2012 Calxeda, Inc.
   3  *
   4  * Based on arch/arm/plat-mxc/cpuidle.c: #v3.7
   5  * Copyright 2012 Freescale Semiconductor, Inc.
   6  * Copyright 2012 Linaro Ltd.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms and conditions of the GNU General Public License,
  10  * version 2, as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program.  If not, see <http://www.gnu.org/licenses/>.
  19  *
  20  * Maintainer: Rob Herring <rob.herring@calxeda.com>
  21  */
  22
  23 #include <linux/cpuidle.h>
  24 #include <linux/init.h>
  25 #include <linux/io.h>
  26 #include <linux/of.h>
  27 #include <linux/time.h>
  28 #include <linux/delay.h>
  29 #include <linux/suspend.h>
  30 #include <asm/cpuidle.h>
  31 #include <asm/proc-fns.h>
  32 #include <asm/smp_scu.h>
  33 #include <asm/suspend.h>
  34 #include <asm/cacheflush.h>
  35 #include <asm/cp15.h>
  36
  37 extern void highbank_set_cpu_jump(int cpu, void *jump_addr);
  38 extern void *scu_base_addr;
  39
  40 static inline unsigned int get_auxcr(void)
  41 {
  42         unsigned int val;
  43         asm("mrc p15, 0, %0, c1, c0, 1  @ get AUXCR" : "=r" (val) : : "cc");
  44         return val;
  45 }
  46
  47 static inline void set_auxcr(unsigned int val)
  48 {
  49         asm volatile("mcr p15, 0, %0, c1, c0, 1 @ set AUXCR"
  50           : : "r" (val) : "cc");
  51         isb();
  52 }
  53
  54 static noinline void calxeda_idle_restore(void)
  55 {
  56         set_cr(get_cr() | CR_C);
  57         set_auxcr(get_auxcr() | 0x40);
  58         scu_power_mode(scu_base_addr, SCU_PM_NORMAL);
  59 }
  60
  61 static int calxeda_idle_finish(unsigned long val)
  62 {
  63         /* Already flushed cache, but do it again as the outer cache functions
  64          * dirty the cache with spinlocks */
  65         flush_cache_all();
  66
  67         set_auxcr(get_auxcr() & ~0x40);
  68         set_cr(get_cr() & ~CR_C);
  69
  70         scu_power_mode(scu_base_addr, SCU_PM_DORMANT);
  71
  72         cpu_do_idle();
  73
  74         /* Restore things if we didn't enter power-gating */
  75         calxeda_idle_restore();
  76         return 1;
  77 }
  78
  79 static int calxeda_pwrdown_idle(struct cpuidle_device *dev,
  80                                 struct cpuidle_driver *drv,
  81                                 int index)
  82 {
  83         highbank_set_cpu_jump(smp_processor_id(), cpu_resume);
  84         cpu_suspend(0, calxeda_idle_finish);
  85         return index;
  86 }
  87
  88 static struct cpuidle_driver calxeda_idle_driver = {
  89         .name = "calxeda_idle",
  90         .states = {
  91                 ARM_CPUIDLE_WFI_STATE,
  92                 {
  93                         .name = "PG",
  94                         .desc = "Power Gate",
  95                         .flags = CPUIDLE_FLAG_TIME_VALID,
  96                         .exit_latency = 30,
  97                         .power_usage = 50,
  98                         .target_residency = 200,
  99                         .enter = calxeda_pwrdown_idle,
 100                 },
 101         },
 102         .state_count = 2,
 103 };
 104
 105 static int __init calxeda_cpuidle_init(void)
 106 {
 107         if (!of_machine_is_compatible("calxeda,highbank"))
 108                 return -ENODEV;
 109
 110         return cpuidle_register(&calxeda_idle_driver, NULL);
 111 }
 112 module_init(calxeda_cpuidle_init);