2 * Procfs interface for the PCI bus.
4 * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
7 #include <linux/init.h>
9 #include <linux/slab.h>
10 #include <linux/module.h>
11 #include <linux/proc_fs.h>
12 #include <linux/seq_file.h>
13 #include <linux/capability.h>
14 #include <asm/uaccess.h>
15 #include <asm/byteorder.h>
18 static int proc_initialized
; /* = 0 */
21 proc_bus_pci_lseek(struct file
*file
, loff_t off
, int whence
)
24 struct inode
*inode
= file_inode(file
);
26 mutex_lock(&inode
->i_mutex
);
32 new = file
->f_pos
+ off
;
35 new = inode
->i_size
+ off
;
38 if (new < 0 || new > inode
->i_size
)
42 mutex_unlock(&inode
->i_mutex
);
47 proc_bus_pci_read(struct file
*file
, char __user
*buf
, size_t nbytes
, loff_t
*ppos
)
49 struct pci_dev
*dev
= PDE_DATA(file_inode(file
));
50 unsigned int pos
= *ppos
;
51 unsigned int cnt
, size
;
54 * Normal users can read only the standardized portion of the
55 * configuration space as several chips lock up when trying to read
56 * undefined locations (think of Intel PIIX4 as a typical example).
59 if (capable(CAP_SYS_ADMIN
))
61 else if (dev
->hdr_type
== PCI_HEADER_TYPE_CARDBUS
)
70 if (pos
+ nbytes
> size
)
74 if (!access_ok(VERIFY_WRITE
, buf
, cnt
))
77 pci_config_pm_runtime_get(dev
);
79 if ((pos
& 1) && cnt
) {
81 pci_user_read_config_byte(dev
, pos
, &val
);
88 if ((pos
& 3) && cnt
> 2) {
90 pci_user_read_config_word(dev
, pos
, &val
);
91 __put_user(cpu_to_le16(val
), (__le16 __user
*) buf
);
99 pci_user_read_config_dword(dev
, pos
, &val
);
100 __put_user(cpu_to_le32(val
), (__le32 __user
*) buf
);
108 pci_user_read_config_word(dev
, pos
, &val
);
109 __put_user(cpu_to_le16(val
), (__le16 __user
*) buf
);
117 pci_user_read_config_byte(dev
, pos
, &val
);
118 __put_user(val
, buf
);
124 pci_config_pm_runtime_put(dev
);
131 proc_bus_pci_write(struct file
*file
, const char __user
*buf
, size_t nbytes
, loff_t
*ppos
)
133 struct inode
*ino
= file_inode(file
);
134 struct pci_dev
*dev
= PDE_DATA(ino
);
136 int size
= dev
->cfg_size
;
143 if (pos
+ nbytes
> size
)
147 if (!access_ok(VERIFY_READ
, buf
, cnt
))
150 pci_config_pm_runtime_get(dev
);
152 if ((pos
& 1) && cnt
) {
154 __get_user(val
, buf
);
155 pci_user_write_config_byte(dev
, pos
, val
);
161 if ((pos
& 3) && cnt
> 2) {
163 __get_user(val
, (__le16 __user
*) buf
);
164 pci_user_write_config_word(dev
, pos
, le16_to_cpu(val
));
172 __get_user(val
, (__le32 __user
*) buf
);
173 pci_user_write_config_dword(dev
, pos
, le32_to_cpu(val
));
181 __get_user(val
, (__le16 __user
*) buf
);
182 pci_user_write_config_word(dev
, pos
, le16_to_cpu(val
));
190 __get_user(val
, buf
);
191 pci_user_write_config_byte(dev
, pos
, val
);
197 pci_config_pm_runtime_put(dev
);
200 i_size_write(ino
, dev
->cfg_size
);
204 struct pci_filp_private
{
205 enum pci_mmap_state mmap_state
;
209 static long proc_bus_pci_ioctl(struct file
*file
, unsigned int cmd
,
212 struct pci_dev
*dev
= PDE_DATA(file_inode(file
));
214 struct pci_filp_private
*fpriv
= file
->private_data
;
215 #endif /* HAVE_PCI_MMAP */
219 case PCIIOC_CONTROLLER
:
220 ret
= pci_domain_nr(dev
->bus
);
224 case PCIIOC_MMAP_IS_IO
:
225 fpriv
->mmap_state
= pci_mmap_io
;
228 case PCIIOC_MMAP_IS_MEM
:
229 fpriv
->mmap_state
= pci_mmap_mem
;
232 case PCIIOC_WRITE_COMBINE
:
234 fpriv
->write_combine
= 1;
236 fpriv
->write_combine
= 0;
239 #endif /* HAVE_PCI_MMAP */
250 static int proc_bus_pci_mmap(struct file
*file
, struct vm_area_struct
*vma
)
252 struct pci_dev
*dev
= PDE_DATA(file_inode(file
));
253 struct pci_filp_private
*fpriv
= file
->private_data
;
256 if (!capable(CAP_SYS_RAWIO
))
259 /* Make sure the caller is mapping a real resource for this device */
260 for (i
= 0; i
< PCI_ROM_RESOURCE
; i
++) {
261 if (pci_mmap_fits(dev
, i
, vma
, PCI_MMAP_PROCFS
))
265 if (i
>= PCI_ROM_RESOURCE
)
268 ret
= pci_mmap_page_range(dev
, vma
,
270 fpriv
->write_combine
);
277 static int proc_bus_pci_open(struct inode
*inode
, struct file
*file
)
279 struct pci_filp_private
*fpriv
= kmalloc(sizeof(*fpriv
), GFP_KERNEL
);
284 fpriv
->mmap_state
= pci_mmap_io
;
285 fpriv
->write_combine
= 0;
287 file
->private_data
= fpriv
;
292 static int proc_bus_pci_release(struct inode
*inode
, struct file
*file
)
294 kfree(file
->private_data
);
295 file
->private_data
= NULL
;
299 #endif /* HAVE_PCI_MMAP */
301 static const struct file_operations proc_bus_pci_operations
= {
302 .owner
= THIS_MODULE
,
303 .llseek
= proc_bus_pci_lseek
,
304 .read
= proc_bus_pci_read
,
305 .write
= proc_bus_pci_write
,
306 .unlocked_ioctl
= proc_bus_pci_ioctl
,
307 .compat_ioctl
= proc_bus_pci_ioctl
,
309 .open
= proc_bus_pci_open
,
310 .release
= proc_bus_pci_release
,
311 .mmap
= proc_bus_pci_mmap
,
312 #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
313 .get_unmapped_area
= get_pci_unmapped_area
,
314 #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
315 #endif /* HAVE_PCI_MMAP */
319 static void *pci_seq_start(struct seq_file
*m
, loff_t
*pos
)
321 struct pci_dev
*dev
= NULL
;
324 for_each_pci_dev(dev
) {
331 static void *pci_seq_next(struct seq_file
*m
, void *v
, loff_t
*pos
)
333 struct pci_dev
*dev
= v
;
336 dev
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev
);
340 static void pci_seq_stop(struct seq_file
*m
, void *v
)
343 struct pci_dev
*dev
= v
;
348 static int show_device(struct seq_file
*m
, void *v
)
350 const struct pci_dev
*dev
= v
;
351 const struct pci_driver
*drv
;
357 drv
= pci_dev_driver(dev
);
358 seq_printf(m
, "%02x%02x\t%04x%04x\t%x",
365 /* only print standard and ROM resources to preserve compatibility */
366 for (i
= 0; i
<= PCI_ROM_RESOURCE
; i
++) {
367 resource_size_t start
, end
;
368 pci_resource_to_user(dev
, i
, &dev
->resource
[i
], &start
, &end
);
369 seq_printf(m
, "\t%16llx",
370 (unsigned long long)(start
|
371 (dev
->resource
[i
].flags
& PCI_REGION_FLAG_MASK
)));
373 for (i
= 0; i
<= PCI_ROM_RESOURCE
; i
++) {
374 resource_size_t start
, end
;
375 pci_resource_to_user(dev
, i
, &dev
->resource
[i
], &start
, &end
);
376 seq_printf(m
, "\t%16llx",
377 dev
->resource
[i
].start
< dev
->resource
[i
].end
?
378 (unsigned long long)(end
- start
) + 1 : 0);
382 seq_printf(m
, "%s", drv
->name
);
387 static const struct seq_operations proc_bus_pci_devices_op
= {
388 .start
= pci_seq_start
,
389 .next
= pci_seq_next
,
390 .stop
= pci_seq_stop
,
394 static struct proc_dir_entry
*proc_bus_pci_dir
;
396 int pci_proc_attach_device(struct pci_dev
*dev
)
398 struct pci_bus
*bus
= dev
->bus
;
399 struct proc_dir_entry
*e
;
402 if (!proc_initialized
)
406 if (pci_proc_domain(bus
)) {
407 sprintf(name
, "%04x:%02x", pci_domain_nr(bus
),
410 sprintf(name
, "%02x", bus
->number
);
412 bus
->procdir
= proc_mkdir(name
, proc_bus_pci_dir
);
417 sprintf(name
, "%02x.%x", PCI_SLOT(dev
->devfn
), PCI_FUNC(dev
->devfn
));
418 e
= proc_create_data(name
, S_IFREG
| S_IRUGO
| S_IWUSR
, bus
->procdir
,
419 &proc_bus_pci_operations
, dev
);
422 proc_set_size(e
, dev
->cfg_size
);
428 int pci_proc_detach_device(struct pci_dev
*dev
)
430 struct proc_dir_entry
*e
;
432 if ((e
= dev
->procent
)) {
433 remove_proc_entry(e
->name
, dev
->bus
->procdir
);
439 int pci_proc_detach_bus(struct pci_bus
* bus
)
441 struct proc_dir_entry
*de
= bus
->procdir
;
443 remove_proc_entry(de
->name
, proc_bus_pci_dir
);
447 static int proc_bus_pci_dev_open(struct inode
*inode
, struct file
*file
)
449 return seq_open(file
, &proc_bus_pci_devices_op
);
451 static const struct file_operations proc_bus_pci_dev_operations
= {
452 .owner
= THIS_MODULE
,
453 .open
= proc_bus_pci_dev_open
,
456 .release
= seq_release
,
459 static int __init
pci_proc_init(void)
461 struct pci_dev
*dev
= NULL
;
462 proc_bus_pci_dir
= proc_mkdir("bus/pci", NULL
);
463 proc_create("devices", 0, proc_bus_pci_dir
,
464 &proc_bus_pci_dev_operations
);
465 proc_initialized
= 1;
466 for_each_pci_dev(dev
)
467 pci_proc_attach_device(dev
);
472 device_initcall(pci_proc_init
);