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Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[linux-2.6.git] / drivers / net / wireless / p54common.c
blob63f9badf3f523a77eb513f1293da991f35008903
1
2 /*
3 * Common code for mac80211 Prism54 drivers
4 *
5 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
7 *
8 * Based on the islsm (softmac prism54) driver, which is:
9 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16 #include <linux/init.h>
17 #include <linux/firmware.h>
18 #include <linux/etherdevice.h>
19
20 #include <net/mac80211.h>
21
22 #include "p54.h"
23 #include "p54common.h"
24
25 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
26 MODULE_DESCRIPTION("Softmac Prism54 common code");
27 MODULE_LICENSE("GPL");
28 MODULE_ALIAS("prism54common");
29
30 static struct ieee80211_rate p54_rates[] = {
31 { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
32 { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
33 { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
34 { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
35 { .bitrate = 60, .hw_value = 4, },
36 { .bitrate = 90, .hw_value = 5, },
37 { .bitrate = 120, .hw_value = 6, },
38 { .bitrate = 180, .hw_value = 7, },
39 { .bitrate = 240, .hw_value = 8, },
40 { .bitrate = 360, .hw_value = 9, },
41 { .bitrate = 480, .hw_value = 10, },
42 { .bitrate = 540, .hw_value = 11, },
43 };
44
45 static struct ieee80211_channel p54_channels[] = {
46 { .center_freq = 2412, .hw_value = 1, },
47 { .center_freq = 2417, .hw_value = 2, },
48 { .center_freq = 2422, .hw_value = 3, },
49 { .center_freq = 2427, .hw_value = 4, },
50 { .center_freq = 2432, .hw_value = 5, },
51 { .center_freq = 2437, .hw_value = 6, },
52 { .center_freq = 2442, .hw_value = 7, },
53 { .center_freq = 2447, .hw_value = 8, },
54 { .center_freq = 2452, .hw_value = 9, },
55 { .center_freq = 2457, .hw_value = 10, },
56 { .center_freq = 2462, .hw_value = 11, },
57 { .center_freq = 2467, .hw_value = 12, },
58 { .center_freq = 2472, .hw_value = 13, },
59 { .center_freq = 2484, .hw_value = 14, },
60 };
61
62 static struct ieee80211_supported_band band_2GHz = {
63 .channels = p54_channels,
64 .n_channels = ARRAY_SIZE(p54_channels),
65 .bitrates = p54_rates,
66 .n_bitrates = ARRAY_SIZE(p54_rates),
67 };
68
69
70 void p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
71 {
72 struct p54_common *priv = dev->priv;
73 struct bootrec_exp_if *exp_if;
74 struct bootrec *bootrec;
75 u32 *data = (u32 *)fw->data;
76 u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
77 u8 *fw_version = NULL;
78 size_t len;
79 int i;
80
81 if (priv->rx_start)
82 return;
83
84 while (data < end_data && *data)
85 data++;
86
87 while (data < end_data && !*data)
88 data++;
89
90 bootrec = (struct bootrec *) data;
91
92 while (bootrec->data <= end_data &&
93 (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
94 u32 code = le32_to_cpu(bootrec->code);
95 switch (code) {
96 case BR_CODE_COMPONENT_ID:
97 switch (be32_to_cpu(*(__be32 *)bootrec->data)) {
98 case FW_FMAC:
99 printk(KERN_INFO "p54: FreeMAC firmware\n");
100 break;
101 case FW_LM20:
102 printk(KERN_INFO "p54: LM20 firmware\n");
103 break;
104 case FW_LM86:
105 printk(KERN_INFO "p54: LM86 firmware\n");
106 break;
107 case FW_LM87:
108 printk(KERN_INFO "p54: LM87 firmware - not supported yet!\n");
109 break;
110 default:
111 printk(KERN_INFO "p54: unknown firmware\n");
112 break;
113 }
114 break;
115 case BR_CODE_COMPONENT_VERSION:
116 /* 24 bytes should be enough for all firmwares */
117 if (strnlen((unsigned char*)bootrec->data, 24) < 24)
118 fw_version = (unsigned char*)bootrec->data;
119 break;
120 case BR_CODE_DESCR:
121 priv->rx_start = le32_to_cpu(((__le32 *)bootrec->data)[1]);
122 /* FIXME add sanity checking */
123 priv->rx_end = le32_to_cpu(((__le32 *)bootrec->data)[2]) - 0x3500;
124 break;
125 case BR_CODE_EXPOSED_IF:
126 exp_if = (struct bootrec_exp_if *) bootrec->data;
127 for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
128 if (exp_if[i].if_id == cpu_to_le16(0x1a))
129 priv->fw_var = le16_to_cpu(exp_if[i].variant);
130 break;
131 case BR_CODE_DEPENDENT_IF:
132 break;
133 case BR_CODE_END_OF_BRA:
134 case LEGACY_BR_CODE_END_OF_BRA:
135 end_data = NULL;
136 break;
137 default:
138 break;
139 }
140 bootrec = (struct bootrec *)&bootrec->data[len];
141 }
142
143 if (fw_version)
144 printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
145 fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
146
147 if (priv->fw_var >= 0x300) {
148 /* Firmware supports QoS, use it! */
149 priv->tx_stats.data[0].limit = 3;
150 priv->tx_stats.data[1].limit = 4;
151 priv->tx_stats.data[2].limit = 3;
152 priv->tx_stats.data[3].limit = 1;
153 dev->queues = 4;
154 }
155 }
156 EXPORT_SYMBOL_GPL(p54_parse_firmware);
157
158 static int p54_convert_rev0_to_rev1(struct ieee80211_hw *dev,
159 struct pda_pa_curve_data *curve_data)
160 {
161 struct p54_common *priv = dev->priv;
162 struct pda_pa_curve_data_sample_rev1 *rev1;
163 struct pda_pa_curve_data_sample_rev0 *rev0;
164 size_t cd_len = sizeof(*curve_data) +
165 (curve_data->points_per_channel*sizeof(*rev1) + 2) *
166 curve_data->channels;
167 unsigned int i, j;
168 void *source, *target;
169
170 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
171 if (!priv->curve_data)
172 return -ENOMEM;
173
174 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
175 source = curve_data->data;
176 target = priv->curve_data->data;
177 for (i = 0; i < curve_data->channels; i++) {
178 __le16 *freq = source;
179 source += sizeof(__le16);
180 *((__le16 *)target) = *freq;
181 target += sizeof(__le16);
182 for (j = 0; j < curve_data->points_per_channel; j++) {
183 rev1 = target;
184 rev0 = source;
185
186 rev1->rf_power = rev0->rf_power;
187 rev1->pa_detector = rev0->pa_detector;
188 rev1->data_64qam = rev0->pcv;
189 /* "invent" the points for the other modulations */
190 #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
191 rev1->data_16qam = SUB(rev0->pcv, 12);
192 rev1->data_qpsk = SUB(rev1->data_16qam, 12);
193 rev1->data_bpsk = SUB(rev1->data_qpsk, 12);
194 rev1->data_barker= SUB(rev1->data_bpsk, 14);
195 #undef SUB
196 target += sizeof(*rev1);
197 source += sizeof(*rev0);
198 }
199 }
200
201 return 0;
202 }
203
204 int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
205 {
206 struct p54_common *priv = dev->priv;
207 struct eeprom_pda_wrap *wrap = NULL;
208 struct pda_entry *entry;
209 unsigned int data_len, entry_len;
210 void *tmp;
211 int err;
212 u8 *end = (u8 *)eeprom + len;
213
214 wrap = (struct eeprom_pda_wrap *) eeprom;
215 entry = (void *)wrap->data + le16_to_cpu(wrap->len);
216
217 /* verify that at least the entry length/code fits */
218 while ((u8 *)entry <= end - sizeof(*entry)) {
219 entry_len = le16_to_cpu(entry->len);
220 data_len = ((entry_len - 1) << 1);
221
222 /* abort if entry exceeds whole structure */
223 if ((u8 *)entry + sizeof(*entry) + data_len > end)
224 break;
225
226 switch (le16_to_cpu(entry->code)) {
227 case PDR_MAC_ADDRESS:
228 SET_IEEE80211_PERM_ADDR(dev, entry->data);
229 break;
230 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
231 if (data_len < 2) {
232 err = -EINVAL;
233 goto err;
234 }
235
236 if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
237 err = -EINVAL;
238 goto err;
239 }
240
241 priv->output_limit = kmalloc(entry->data[1] *
242 sizeof(*priv->output_limit), GFP_KERNEL);
243
244 if (!priv->output_limit) {
245 err = -ENOMEM;
246 goto err;
247 }
248
249 memcpy(priv->output_limit, &entry->data[2],
250 entry->data[1]*sizeof(*priv->output_limit));
251 priv->output_limit_len = entry->data[1];
252 break;
253 case PDR_PRISM_PA_CAL_CURVE_DATA:
254 if (data_len < sizeof(struct pda_pa_curve_data)) {
255 err = -EINVAL;
256 goto err;
257 }
258
259 if (((struct pda_pa_curve_data *)entry->data)->cal_method_rev) {
260 priv->curve_data = kmalloc(data_len, GFP_KERNEL);
261 if (!priv->curve_data) {
262 err = -ENOMEM;
263 goto err;
264 }
265
266 memcpy(priv->curve_data, entry->data, data_len);
267 } else {
268 err = p54_convert_rev0_to_rev1(dev, (struct pda_pa_curve_data *)entry->data);
269 if (err)
270 goto err;
271 }
272
273 break;
274 case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
275 priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
276 if (!priv->iq_autocal) {
277 err = -ENOMEM;
278 goto err;
279 }
280
281 memcpy(priv->iq_autocal, entry->data, data_len);
282 priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
283 break;
284 case PDR_INTERFACE_LIST:
285 tmp = entry->data;
286 while ((u8 *)tmp < entry->data + data_len) {
287 struct bootrec_exp_if *exp_if = tmp;
288 if (le16_to_cpu(exp_if->if_id) == 0xF)
289 priv->rxhw = exp_if->variant & cpu_to_le16(0x07);
290 tmp += sizeof(struct bootrec_exp_if);
291 }
292 break;
293 case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
294 priv->version = *(u8 *)(entry->data + 1);
295 break;
296 case PDR_END:
297 /* make it overrun */
298 entry_len = len;
299 break;
300 default:
301 printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
302 le16_to_cpu(entry->code));
303 break;
304 }
305
306 entry = (void *)entry + (entry_len + 1)*2;
307 }
308
309 if (!priv->iq_autocal || !priv->output_limit || !priv->curve_data) {
310 printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
311 err = -EINVAL;
312 goto err;
313 }
314
315 return 0;
316
317 err:
318 if (priv->iq_autocal) {
319 kfree(priv->iq_autocal);
320 priv->iq_autocal = NULL;
321 }
322
323 if (priv->output_limit) {
324 kfree(priv->output_limit);
325 priv->output_limit = NULL;
326 }
327
328 if (priv->curve_data) {
329 kfree(priv->curve_data);
330 priv->curve_data = NULL;
331 }
332
333 printk(KERN_ERR "p54: eeprom parse failed!\n");
334 return err;
335 }
336 EXPORT_SYMBOL_GPL(p54_parse_eeprom);
337
338 void p54_fill_eeprom_readback(struct p54_control_hdr *hdr)
339 {
340 struct p54_eeprom_lm86 *eeprom_hdr;
341
342 hdr->magic1 = cpu_to_le16(0x8000);
343 hdr->len = cpu_to_le16(sizeof(*eeprom_hdr) + 0x2000);
344 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
345 hdr->retry1 = hdr->retry2 = 0;
346 eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
347 eeprom_hdr->offset = 0x0;
348 eeprom_hdr->len = cpu_to_le16(0x2000);
349 }
350 EXPORT_SYMBOL_GPL(p54_fill_eeprom_readback);
351
352 static void p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
353 {
354 struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
355 struct ieee80211_rx_status rx_status = {0};
356 u16 freq = le16_to_cpu(hdr->freq);
357
358 rx_status.ssi = hdr->rssi;
359 /* XX correct? */
360 rx_status.rate_idx = hdr->rate & 0xf;
361 rx_status.freq = freq;
362 rx_status.band = IEEE80211_BAND_2GHZ;
363 rx_status.antenna = hdr->antenna;
364 rx_status.mactime = le64_to_cpu(hdr->timestamp);
365 rx_status.flag |= RX_FLAG_TSFT;
366
367 skb_pull(skb, sizeof(*hdr));
368 skb_trim(skb, le16_to_cpu(hdr->len));
369
370 ieee80211_rx_irqsafe(dev, skb, &rx_status);
371 }
372
373 static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
374 {
375 struct p54_common *priv = dev->priv;
376 int i;
377
378 /* ieee80211_start_queues is great if all queues are really empty.
379 * But, what if some are full? */
380
381 for (i = 0; i < dev->queues; i++)
382 if (priv->tx_stats.data[i].len < priv->tx_stats.data[i].limit)
383 ieee80211_wake_queue(dev, i);
384 }
385
386 static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
387 {
388 struct p54_common *priv = dev->priv;
389 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
390 struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
391 struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
392 u32 addr = le32_to_cpu(hdr->req_id) - 0x70;
393 struct memrecord *range = NULL;
394 u32 freed = 0;
395 u32 last_addr = priv->rx_start;
396
397 while (entry != (struct sk_buff *)&priv->tx_queue) {
398 range = (struct memrecord *)&entry->cb;
399 if (range->start_addr == addr) {
400 struct ieee80211_tx_status status;
401 struct p54_control_hdr *entry_hdr;
402 struct p54_tx_control_allocdata *entry_data;
403 int pad = 0;
404
405 if (entry->next != (struct sk_buff *)&priv->tx_queue)
406 freed = ((struct memrecord *)&entry->next->cb)->start_addr - last_addr;
407 else
408 freed = priv->rx_end - last_addr;
409
410 last_addr = range->end_addr;
411 __skb_unlink(entry, &priv->tx_queue);
412 if (!range->control) {
413 kfree_skb(entry);
414 break;
415 }
416 memset(&status, 0, sizeof(status));
417 memcpy(&status.control, range->control,
418 sizeof(status.control));
419 kfree(range->control);
420 priv->tx_stats.data[status.control.queue].len--;
421
422 entry_hdr = (struct p54_control_hdr *) entry->data;
423 entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
424 if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
425 pad = entry_data->align[0];
426
427 if (!(status.control.flags & IEEE80211_TXCTL_NO_ACK)) {
428 if (!(payload->status & 0x01))
429 status.flags |= IEEE80211_TX_STATUS_ACK;
430 else
431 status.excessive_retries = 1;
432 }
433 status.retry_count = payload->retries - 1;
434 status.ack_signal = le16_to_cpu(payload->ack_rssi);
435 skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
436 ieee80211_tx_status_irqsafe(dev, entry, &status);
437 break;
438 } else
439 last_addr = range->end_addr;
440 entry = entry->next;
441 }
442
443 if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
444 sizeof(struct p54_control_hdr))
445 p54_wake_free_queues(dev);
446 }
447
448 static void p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
449 {
450 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
451
452 switch (le16_to_cpu(hdr->type)) {
453 case P54_CONTROL_TYPE_TXDONE:
454 p54_rx_frame_sent(dev, skb);
455 break;
456 case P54_CONTROL_TYPE_BBP:
457 break;
458 default:
459 printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
460 wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
461 break;
462 }
463 }
464
465 /* returns zero if skb can be reused */
466 int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
467 {
468 u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
469 switch (type) {
470 case 0x00:
471 case 0x01:
472 p54_rx_data(dev, skb);
473 return -1;
474 case 0x4d:
475 /* TODO: do something better... but then again, I've never seen this happen */
476 printk(KERN_ERR "%s: Received fault. Probably need to restart hardware now..\n",
477 wiphy_name(dev->wiphy));
478 break;
479 case 0x80:
480 p54_rx_control(dev, skb);
481 break;
482 default:
483 printk(KERN_ERR "%s: unknown frame RXed (0x%02x)\n",
484 wiphy_name(dev->wiphy), type);
485 break;
486 }
487 return 0;
488 }
489 EXPORT_SYMBOL_GPL(p54_rx);
490
491 /*
492 * So, the firmware is somewhat stupid and doesn't know what places in its
493 * memory incoming data should go to. By poking around in the firmware, we
494 * can find some unused memory to upload our packets to. However, data that we
495 * want the card to TX needs to stay intact until the card has told us that
496 * it is done with it. This function finds empty places we can upload to and
497 * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
498 * allocated areas.
499 */
500 static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
501 struct p54_control_hdr *data, u32 len,
502 struct ieee80211_tx_control *control)
503 {
504 struct p54_common *priv = dev->priv;
505 struct sk_buff *entry = priv->tx_queue.next;
506 struct sk_buff *target_skb = NULL;
507 struct memrecord *range;
508 u32 last_addr = priv->rx_start;
509 u32 largest_hole = 0;
510 u32 target_addr = priv->rx_start;
511 unsigned long flags;
512 unsigned int left;
513 len = (len + 0x170 + 3) & ~0x3; /* 0x70 headroom, 0x100 tailroom */
514
515 spin_lock_irqsave(&priv->tx_queue.lock, flags);
516 left = skb_queue_len(&priv->tx_queue);
517 while (left--) {
518 u32 hole_size;
519 range = (struct memrecord *)&entry->cb;
520 hole_size = range->start_addr - last_addr;
521 if (!target_skb && hole_size >= len) {
522 target_skb = entry->prev;
523 hole_size -= len;
524 target_addr = last_addr;
525 }
526 largest_hole = max(largest_hole, hole_size);
527 last_addr = range->end_addr;
528 entry = entry->next;
529 }
530 if (!target_skb && priv->rx_end - last_addr >= len) {
531 target_skb = priv->tx_queue.prev;
532 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
533 if (!skb_queue_empty(&priv->tx_queue)) {
534 range = (struct memrecord *)&target_skb->cb;
535 target_addr = range->end_addr;
536 }
537 } else
538 largest_hole = max(largest_hole, priv->rx_end - last_addr);
539
540 if (skb) {
541 range = (struct memrecord *)&skb->cb;
542 range->start_addr = target_addr;
543 range->end_addr = target_addr + len;
544 range->control = control;
545 __skb_queue_after(&priv->tx_queue, target_skb, skb);
546 if (largest_hole < IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
547 sizeof(struct p54_control_hdr))
548 ieee80211_stop_queues(dev);
549 }
550 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
551
552 data->req_id = cpu_to_le32(target_addr + 0x70);
553 }
554
555 static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
556 struct ieee80211_tx_control *control)
557 {
558 struct ieee80211_tx_queue_stats_data *current_queue;
559 struct p54_common *priv = dev->priv;
560 struct p54_control_hdr *hdr;
561 struct p54_tx_control_allocdata *txhdr;
562 struct ieee80211_tx_control *control_copy;
563 size_t padding, len;
564 u8 rate;
565
566 current_queue = &priv->tx_stats.data[control->queue];
567 if (unlikely(current_queue->len > current_queue->limit))
568 return NETDEV_TX_BUSY;
569 current_queue->len++;
570 current_queue->count++;
571 if (current_queue->len == current_queue->limit)
572 ieee80211_stop_queue(dev, control->queue);
573
574 padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
575 len = skb->len;
576
577 control_copy = kmalloc(sizeof(*control), GFP_ATOMIC);
578 if (control_copy)
579 memcpy(control_copy, control, sizeof(*control));
580
581 txhdr = (struct p54_tx_control_allocdata *)
582 skb_push(skb, sizeof(*txhdr) + padding);
583 hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
584
585 if (padding)
586 hdr->magic1 = cpu_to_le16(0x4010);
587 else
588 hdr->magic1 = cpu_to_le16(0x0010);
589 hdr->len = cpu_to_le16(len);
590 hdr->type = (control->flags & IEEE80211_TXCTL_NO_ACK) ? 0 : cpu_to_le16(1);
591 hdr->retry1 = hdr->retry2 = control->retry_limit;
592 p54_assign_address(dev, skb, hdr, skb->len, control_copy);
593
594 memset(txhdr->wep_key, 0x0, 16);
595 txhdr->padding = 0;
596 txhdr->padding2 = 0;
597
598 /* TODO: add support for alternate retry TX rates */
599 rate = control->tx_rate->hw_value;
600 if (control->flags & IEEE80211_TXCTL_SHORT_PREAMBLE)
601 rate |= 0x10;
602 if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
603 rate |= 0x40;
604 else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
605 rate |= 0x20;
606 memset(txhdr->rateset, rate, 8);
607 txhdr->wep_key_present = 0;
608 txhdr->wep_key_len = 0;
609 txhdr->frame_type = cpu_to_le32(control->queue + 4);
610 txhdr->magic4 = 0;
611 txhdr->antenna = (control->antenna_sel_tx == 0) ?
612 2 : control->antenna_sel_tx - 1;
613 txhdr->output_power = 0x7f; // HW Maximum
614 txhdr->magic5 = (control->flags & IEEE80211_TXCTL_NO_ACK) ?
615 0 : ((rate > 0x3) ? cpu_to_le32(0x33) : cpu_to_le32(0x23));
616 if (padding)
617 txhdr->align[0] = padding;
618
619 priv->tx(dev, hdr, skb->len, 0);
620 return 0;
621 }
622
623 static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
624 const u8 *dst, const u8 *src, u8 antenna,
625 u32 magic3, u32 magic8, u32 magic9)
626 {
627 struct p54_common *priv = dev->priv;
628 struct p54_control_hdr *hdr;
629 struct p54_tx_control_filter *filter;
630
631 hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
632 priv->tx_hdr_len, GFP_ATOMIC);
633 if (!hdr)
634 return -ENOMEM;
635
636 hdr = (void *)hdr + priv->tx_hdr_len;
637
638 filter = (struct p54_tx_control_filter *) hdr->data;
639 hdr->magic1 = cpu_to_le16(0x8001);
640 hdr->len = cpu_to_le16(sizeof(*filter));
641 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*filter), NULL);
642 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
643
644 filter->filter_type = cpu_to_le16(filter_type);
645 memcpy(filter->dst, dst, ETH_ALEN);
646 if (!src)
647 memset(filter->src, ~0, ETH_ALEN);
648 else
649 memcpy(filter->src, src, ETH_ALEN);
650 filter->antenna = antenna;
651 filter->magic3 = cpu_to_le32(magic3);
652 filter->rx_addr = cpu_to_le32(priv->rx_end);
653 filter->max_rx = cpu_to_le16(0x0620); /* FIXME: for usb ver 1.. maybe */
654 filter->rxhw = priv->rxhw;
655 filter->magic8 = cpu_to_le16(magic8);
656 filter->magic9 = cpu_to_le16(magic9);
657
658 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*filter), 1);
659 return 0;
660 }
661
662 static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
663 {
664 struct p54_common *priv = dev->priv;
665 struct p54_control_hdr *hdr;
666 struct p54_tx_control_channel *chan;
667 unsigned int i;
668 size_t payload_len = sizeof(*chan) + sizeof(u32)*2 +
669 sizeof(*chan->curve_data) *
670 priv->curve_data->points_per_channel;
671 void *entry;
672
673 hdr = kzalloc(sizeof(*hdr) + payload_len +
674 priv->tx_hdr_len, GFP_KERNEL);
675 if (!hdr)
676 return -ENOMEM;
677
678 hdr = (void *)hdr + priv->tx_hdr_len;
679
680 chan = (struct p54_tx_control_channel *) hdr->data;
681
682 hdr->magic1 = cpu_to_le16(0x8001);
683 hdr->len = cpu_to_le16(sizeof(*chan));
684 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
685 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + payload_len, NULL);
686
687 chan->magic1 = cpu_to_le16(0x1);
688 chan->magic2 = cpu_to_le16(0x0);
689
690 for (i = 0; i < priv->iq_autocal_len; i++) {
691 if (priv->iq_autocal[i].freq != freq)
692 continue;
693
694 memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
695 sizeof(*priv->iq_autocal));
696 break;
697 }
698 if (i == priv->iq_autocal_len)
699 goto err;
700
701 for (i = 0; i < priv->output_limit_len; i++) {
702 if (priv->output_limit[i].freq != freq)
703 continue;
704
705 chan->val_barker = 0x38;
706 chan->val_bpsk = priv->output_limit[i].val_bpsk;
707 chan->val_qpsk = priv->output_limit[i].val_qpsk;
708 chan->val_16qam = priv->output_limit[i].val_16qam;
709 chan->val_64qam = priv->output_limit[i].val_64qam;
710 break;
711 }
712 if (i == priv->output_limit_len)
713 goto err;
714
715 chan->pa_points_per_curve = priv->curve_data->points_per_channel;
716
717 entry = priv->curve_data->data;
718 for (i = 0; i < priv->curve_data->channels; i++) {
719 if (*((__le16 *)entry) != freq) {
720 entry += sizeof(__le16);
721 entry += sizeof(struct pda_pa_curve_data_sample_rev1) *
722 chan->pa_points_per_curve;
723 continue;
724 }
725
726 entry += sizeof(__le16);
727 memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
728 chan->pa_points_per_curve);
729 break;
730 }
731
732 memcpy(hdr->data + payload_len - 4, &chan->val_bpsk, 4);
733
734 priv->tx(dev, hdr, sizeof(*hdr) + payload_len, 1);
735 return 0;
736
737 err:
738 printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
739 kfree(hdr);
740 return -EINVAL;
741 }
742
743 static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
744 {
745 struct p54_common *priv = dev->priv;
746 struct p54_control_hdr *hdr;
747 struct p54_tx_control_led *led;
748
749 hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
750 priv->tx_hdr_len, GFP_KERNEL);
751 if (!hdr)
752 return -ENOMEM;
753
754 hdr = (void *)hdr + priv->tx_hdr_len;
755 hdr->magic1 = cpu_to_le16(0x8001);
756 hdr->len = cpu_to_le16(sizeof(*led));
757 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
758 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led), NULL);
759
760 led = (struct p54_tx_control_led *) hdr->data;
761 led->mode = cpu_to_le16(mode);
762 led->led_permanent = cpu_to_le16(link);
763 led->led_temporary = cpu_to_le16(act);
764 led->duration = cpu_to_le16(1000);
765
766 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
767
768 return 0;
769 }
770
771 #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
772 do { \
773 queue.aifs = cpu_to_le16(ai_fs); \
774 queue.cwmin = cpu_to_le16(cw_min); \
775 queue.cwmax = cpu_to_le16(cw_max); \
776 queue.txop = cpu_to_le16(_txop); \
777 } while(0)
778
779 static void p54_init_vdcf(struct ieee80211_hw *dev)
780 {
781 struct p54_common *priv = dev->priv;
782 struct p54_control_hdr *hdr;
783 struct p54_tx_control_vdcf *vdcf;
784
785 /* all USB V1 adapters need a extra headroom */
786 hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
787 hdr->magic1 = cpu_to_le16(0x8001);
788 hdr->len = cpu_to_le16(sizeof(*vdcf));
789 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
790 hdr->req_id = cpu_to_le32(priv->rx_start);
791
792 vdcf = (struct p54_tx_control_vdcf *) hdr->data;
793
794 P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 47);
795 P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 94);
796 P54_SET_QUEUE(vdcf->queue[2], 0x0003, 0x000f, 0x03ff, 0);
797 P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0);
798 }
799
800 static void p54_set_vdcf(struct ieee80211_hw *dev)
801 {
802 struct p54_common *priv = dev->priv;
803 struct p54_control_hdr *hdr;
804 struct p54_tx_control_vdcf *vdcf;
805
806 hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
807
808 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf), NULL);
809
810 vdcf = (struct p54_tx_control_vdcf *) hdr->data;
811
812 if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
813 vdcf->slottime = 9;
814 vdcf->magic1 = 0x00;
815 vdcf->magic2 = 0x10;
816 } else {
817 vdcf->slottime = 20;
818 vdcf->magic1 = 0x0a;
819 vdcf->magic2 = 0x06;
820 }
821
822 /* (see prism54/isl_oid.h for further details) */
823 vdcf->frameburst = cpu_to_le16(0);
824
825 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
826 }
827
828 static int p54_start(struct ieee80211_hw *dev)
829 {
830 struct p54_common *priv = dev->priv;
831 int err;
832
833 err = priv->open(dev);
834 if (!err)
835 priv->mode = IEEE80211_IF_TYPE_MNTR;
836
837 return err;
838 }
839
840 static void p54_stop(struct ieee80211_hw *dev)
841 {
842 struct p54_common *priv = dev->priv;
843 struct sk_buff *skb;
844 while ((skb = skb_dequeue(&priv->tx_queue))) {
845 struct memrecord *range = (struct memrecord *)&skb->cb;
846 if (range->control)
847 kfree(range->control);
848 kfree_skb(skb);
849 }
850 priv->stop(dev);
851 priv->mode = IEEE80211_IF_TYPE_INVALID;
852 }
853
854 static int p54_add_interface(struct ieee80211_hw *dev,
855 struct ieee80211_if_init_conf *conf)
856 {
857 struct p54_common *priv = dev->priv;
858
859 if (priv->mode != IEEE80211_IF_TYPE_MNTR)
860 return -EOPNOTSUPP;
861
862 switch (conf->type) {
863 case IEEE80211_IF_TYPE_STA:
864 priv->mode = conf->type;
865 break;
866 default:
867 return -EOPNOTSUPP;
868 }
869
870 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
871
872 p54_set_filter(dev, 0, priv->mac_addr, NULL, 0, 1, 0, 0xF642);
873 p54_set_filter(dev, 0, priv->mac_addr, NULL, 1, 0, 0, 0xF642);
874
875 switch (conf->type) {
876 case IEEE80211_IF_TYPE_STA:
877 p54_set_filter(dev, 1, priv->mac_addr, NULL, 0, 0x15F, 0x1F4, 0);
878 break;
879 default:
880 BUG(); /* impossible */
881 break;
882 }
883
884 p54_set_leds(dev, 1, 0, 0);
885
886 return 0;
887 }
888
889 static void p54_remove_interface(struct ieee80211_hw *dev,
890 struct ieee80211_if_init_conf *conf)
891 {
892 struct p54_common *priv = dev->priv;
893 priv->mode = IEEE80211_IF_TYPE_MNTR;
894 memset(priv->mac_addr, 0, ETH_ALEN);
895 p54_set_filter(dev, 0, priv->mac_addr, NULL, 2, 0, 0, 0);
896 }
897
898 static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
899 {
900 int ret;
901
902 ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
903 p54_set_vdcf(dev);
904 return ret;
905 }
906
907 static int p54_config_interface(struct ieee80211_hw *dev,
908 struct ieee80211_vif *vif,
909 struct ieee80211_if_conf *conf)
910 {
911 struct p54_common *priv = dev->priv;
912
913 p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 0, 1, 0, 0xF642);
914 p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 2, 0, 0, 0);
915 p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
916 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
917 return 0;
918 }
919
920 static void p54_configure_filter(struct ieee80211_hw *dev,
921 unsigned int changed_flags,
922 unsigned int *total_flags,
923 int mc_count, struct dev_mc_list *mclist)
924 {
925 struct p54_common *priv = dev->priv;
926
927 *total_flags &= FIF_BCN_PRBRESP_PROMISC;
928
929 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
930 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
931 p54_set_filter(dev, 0, priv->mac_addr,
932 NULL, 2, 0, 0, 0);
933 else
934 p54_set_filter(dev, 0, priv->mac_addr,
935 priv->bssid, 2, 0, 0, 0);
936 }
937 }
938
939 static int p54_conf_tx(struct ieee80211_hw *dev, int queue,
940 const struct ieee80211_tx_queue_params *params)
941 {
942 struct p54_common *priv = dev->priv;
943 struct p54_tx_control_vdcf *vdcf;
944
945 vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
946 ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
947
948 if ((params) && !((queue < 0) || (queue > 4))) {
949 P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
950 params->cw_min, params->cw_max, params->txop);
951 } else
952 return -EINVAL;
953
954 p54_set_vdcf(dev);
955
956 return 0;
957 }
958
959 static int p54_get_stats(struct ieee80211_hw *dev,
960 struct ieee80211_low_level_stats *stats)
961 {
962 /* TODO */
963 return 0;
964 }
965
966 static int p54_get_tx_stats(struct ieee80211_hw *dev,
967 struct ieee80211_tx_queue_stats *stats)
968 {
969 struct p54_common *priv = dev->priv;
970 unsigned int i;
971
972 for (i = 0; i < dev->queues; i++)
973 memcpy(&stats->data[i], &priv->tx_stats.data[i],
974 sizeof(stats->data[i]));
975
976 return 0;
977 }
978
979 static const struct ieee80211_ops p54_ops = {
980 .tx = p54_tx,
981 .start = p54_start,
982 .stop = p54_stop,
983 .add_interface = p54_add_interface,
984 .remove_interface = p54_remove_interface,
985 .config = p54_config,
986 .config_interface = p54_config_interface,
987 .configure_filter = p54_configure_filter,
988 .conf_tx = p54_conf_tx,
989 .get_stats = p54_get_stats,
990 .get_tx_stats = p54_get_tx_stats
991 };
992
993 struct ieee80211_hw *p54_init_common(size_t priv_data_len)
994 {
995 struct ieee80211_hw *dev;
996 struct p54_common *priv;
997
998 dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
999 if (!dev)
1000 return NULL;
1001
1002 priv = dev->priv;
1003 priv->mode = IEEE80211_IF_TYPE_INVALID;
1004 skb_queue_head_init(&priv->tx_queue);
1005 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
1006 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
1007 IEEE80211_HW_RX_INCLUDES_FCS;
1008 dev->channel_change_time = 1000; /* TODO: find actual value */
1009 dev->max_rssi = 127;
1010
1011 priv->tx_stats.data[0].limit = 5;
1012 dev->queues = 1;
1013
1014 dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
1015 sizeof(struct p54_tx_control_allocdata);
1016
1017 priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf) +
1018 priv->tx_hdr_len + sizeof(struct p54_control_hdr), GFP_KERNEL);
1019
1020 if (!priv->cached_vdcf) {
1021 ieee80211_free_hw(dev);
1022 return NULL;
1023 }
1024
1025 p54_init_vdcf(dev);
1026
1027 return dev;
1028 }
1029 EXPORT_SYMBOL_GPL(p54_init_common);
1030
1031 void p54_free_common(struct ieee80211_hw *dev)
1032 {
1033 struct p54_common *priv = dev->priv;
1034 kfree(priv->iq_autocal);
1035 kfree(priv->output_limit);
1036 kfree(priv->curve_data);
1037 kfree(priv->cached_vdcf);
1038 }
1039 EXPORT_SYMBOL_GPL(p54_free_common);
1040
1041 static int __init p54_init(void)
1042 {
1043 return 0;
1044 }
1045
1046 static void __exit p54_exit(void)
1047 {
1048 }
1049
1050 module_init(p54_init);
1051 module_exit(p54_exit);
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