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iwlwifi: add context pointer to station
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
blobc048c1db42fdaef96d31a6dad4de8e275479bc1d
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/wireless.h>
44 #include <linux/firmware.h>
45 #include <linux/etherdevice.h>
46 #include <linux/if_arp.h>
47
48 #include <net/ieee80211_radiotap.h>
49 #include <net/mac80211.h>
50
51 #include <asm/div64.h>
52
53 #define DRV_NAME "iwl3945"
54
55 #include "iwl-fh.h"
56 #include "iwl-3945-fh.h"
57 #include "iwl-commands.h"
58 #include "iwl-sta.h"
59 #include "iwl-3945.h"
60 #include "iwl-core.h"
61 #include "iwl-helpers.h"
62 #include "iwl-dev.h"
63 #include "iwl-spectrum.h"
64
65 /*
66 * module name, copyright, version, etc.
67 */
68
69 #define DRV_DESCRIPTION \
70 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
71
72 #ifdef CONFIG_IWLWIFI_DEBUG
73 #define VD "d"
74 #else
75 #define VD
76 #endif
77
78 /*
79 * add "s" to indicate spectrum measurement included.
80 * we add it here to be consistent with previous releases in which
81 * this was configurable.
82 */
83 #define DRV_VERSION IWLWIFI_VERSION VD "s"
84 #define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation"
85 #define DRV_AUTHOR "<ilw@linux.intel.com>"
86
87 MODULE_DESCRIPTION(DRV_DESCRIPTION);
88 MODULE_VERSION(DRV_VERSION);
89 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
90 MODULE_LICENSE("GPL");
91
92 /* module parameters */
93 struct iwl_mod_params iwl3945_mod_params = {
94 .sw_crypto = 1,
95 .restart_fw = 1,
96 /* the rest are 0 by default */
97 };
98
99 /**
100 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
101 * @priv: eeprom and antenna fields are used to determine antenna flags
102 *
103 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
104 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
105 *
106 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
107 * IWL_ANTENNA_MAIN - Force MAIN antenna
108 * IWL_ANTENNA_AUX - Force AUX antenna
109 */
110 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
111 {
112 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
113
114 switch (iwl3945_mod_params.antenna) {
115 case IWL_ANTENNA_DIVERSITY:
116 return 0;
117
118 case IWL_ANTENNA_MAIN:
119 if (eeprom->antenna_switch_type)
120 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
121 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
122
123 case IWL_ANTENNA_AUX:
124 if (eeprom->antenna_switch_type)
125 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
126 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
127 }
128
129 /* bad antenna selector value */
130 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
131 iwl3945_mod_params.antenna);
132
133 return 0; /* "diversity" is default if error */
134 }
135
136 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
137 struct ieee80211_key_conf *keyconf,
138 u8 sta_id)
139 {
140 unsigned long flags;
141 __le16 key_flags = 0;
142 int ret;
143
144 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
145 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
146
147 if (sta_id == priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id)
148 key_flags |= STA_KEY_MULTICAST_MSK;
149
150 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
151 keyconf->hw_key_idx = keyconf->keyidx;
152 key_flags &= ~STA_KEY_FLG_INVALID;
153
154 spin_lock_irqsave(&priv->sta_lock, flags);
155 priv->stations[sta_id].keyinfo.cipher = keyconf->cipher;
156 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
157 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
158 keyconf->keylen);
159
160 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
161 keyconf->keylen);
162
163 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
164 == STA_KEY_FLG_NO_ENC)
165 priv->stations[sta_id].sta.key.key_offset =
166 iwl_get_free_ucode_key_index(priv);
167 /* else, we are overriding an existing key => no need to allocated room
168 * in uCode. */
169
170 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
171 "no space for a new key");
172
173 priv->stations[sta_id].sta.key.key_flags = key_flags;
174 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
175 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
176
177 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
178
179 ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
180
181 spin_unlock_irqrestore(&priv->sta_lock, flags);
182
183 return ret;
184 }
185
186 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
187 struct ieee80211_key_conf *keyconf,
188 u8 sta_id)
189 {
190 return -EOPNOTSUPP;
191 }
192
193 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
194 struct ieee80211_key_conf *keyconf,
195 u8 sta_id)
196 {
197 return -EOPNOTSUPP;
198 }
199
200 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
201 {
202 unsigned long flags;
203 struct iwl_addsta_cmd sta_cmd;
204
205 spin_lock_irqsave(&priv->sta_lock, flags);
206 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
207 memset(&priv->stations[sta_id].sta.key, 0,
208 sizeof(struct iwl4965_keyinfo));
209 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
210 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
211 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
212 memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_addsta_cmd));
213 spin_unlock_irqrestore(&priv->sta_lock, flags);
214
215 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
216 return iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC);
217 }
218
219 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
220 struct ieee80211_key_conf *keyconf, u8 sta_id)
221 {
222 int ret = 0;
223
224 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
225
226 switch (keyconf->cipher) {
227 case WLAN_CIPHER_SUITE_CCMP:
228 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
229 break;
230 case WLAN_CIPHER_SUITE_TKIP:
231 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
232 break;
233 case WLAN_CIPHER_SUITE_WEP40:
234 case WLAN_CIPHER_SUITE_WEP104:
235 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
236 break;
237 default:
238 IWL_ERR(priv, "Unknown alg: %s alg=%x\n", __func__,
239 keyconf->cipher);
240 ret = -EINVAL;
241 }
242
243 IWL_DEBUG_WEP(priv, "Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
244 keyconf->cipher, keyconf->keylen, keyconf->keyidx,
245 sta_id, ret);
246
247 return ret;
248 }
249
250 static int iwl3945_remove_static_key(struct iwl_priv *priv)
251 {
252 int ret = -EOPNOTSUPP;
253
254 return ret;
255 }
256
257 static int iwl3945_set_static_key(struct iwl_priv *priv,
258 struct ieee80211_key_conf *key)
259 {
260 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
261 key->cipher == WLAN_CIPHER_SUITE_WEP104)
262 return -EOPNOTSUPP;
263
264 IWL_ERR(priv, "Static key invalid: cipher %x\n", key->cipher);
265 return -EINVAL;
266 }
267
268 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
269 {
270 struct list_head *element;
271
272 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
273 priv->frames_count);
274
275 while (!list_empty(&priv->free_frames)) {
276 element = priv->free_frames.next;
277 list_del(element);
278 kfree(list_entry(element, struct iwl3945_frame, list));
279 priv->frames_count--;
280 }
281
282 if (priv->frames_count) {
283 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
284 priv->frames_count);
285 priv->frames_count = 0;
286 }
287 }
288
289 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
290 {
291 struct iwl3945_frame *frame;
292 struct list_head *element;
293 if (list_empty(&priv->free_frames)) {
294 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
295 if (!frame) {
296 IWL_ERR(priv, "Could not allocate frame!\n");
297 return NULL;
298 }
299
300 priv->frames_count++;
301 return frame;
302 }
303
304 element = priv->free_frames.next;
305 list_del(element);
306 return list_entry(element, struct iwl3945_frame, list);
307 }
308
309 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
310 {
311 memset(frame, 0, sizeof(*frame));
312 list_add(&frame->list, &priv->free_frames);
313 }
314
315 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
316 struct ieee80211_hdr *hdr,
317 int left)
318 {
319
320 if (!iwl_is_associated(priv, IWL_RXON_CTX_BSS) || !priv->ibss_beacon)
321 return 0;
322
323 if (priv->ibss_beacon->len > left)
324 return 0;
325
326 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
327
328 return priv->ibss_beacon->len;
329 }
330
331 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
332 {
333 struct iwl3945_frame *frame;
334 unsigned int frame_size;
335 int rc;
336 u8 rate;
337
338 frame = iwl3945_get_free_frame(priv);
339
340 if (!frame) {
341 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
342 "command.\n");
343 return -ENOMEM;
344 }
345
346 rate = iwl_rate_get_lowest_plcp(priv);
347
348 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
349
350 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
351 &frame->u.cmd[0]);
352
353 iwl3945_free_frame(priv, frame);
354
355 return rc;
356 }
357
358 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
359 {
360 if (priv->_3945.shared_virt)
361 dma_free_coherent(&priv->pci_dev->dev,
362 sizeof(struct iwl3945_shared),
363 priv->_3945.shared_virt,
364 priv->_3945.shared_phys);
365 }
366
367 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
368 struct ieee80211_tx_info *info,
369 struct iwl_device_cmd *cmd,
370 struct sk_buff *skb_frag,
371 int sta_id)
372 {
373 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
374 struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
375
376 tx_cmd->sec_ctl = 0;
377
378 switch (keyinfo->cipher) {
379 case WLAN_CIPHER_SUITE_CCMP:
380 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
381 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
382 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
383 break;
384
385 case WLAN_CIPHER_SUITE_TKIP:
386 break;
387
388 case WLAN_CIPHER_SUITE_WEP104:
389 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
390 /* fall through */
391 case WLAN_CIPHER_SUITE_WEP40:
392 tx_cmd->sec_ctl |= TX_CMD_SEC_WEP |
393 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
394
395 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
396
397 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
398 "with key %d\n", info->control.hw_key->hw_key_idx);
399 break;
400
401 default:
402 IWL_ERR(priv, "Unknown encode cipher %x\n", keyinfo->cipher);
403 break;
404 }
405 }
406
407 /*
408 * handle build REPLY_TX command notification.
409 */
410 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
411 struct iwl_device_cmd *cmd,
412 struct ieee80211_tx_info *info,
413 struct ieee80211_hdr *hdr, u8 std_id)
414 {
415 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
416 __le32 tx_flags = tx_cmd->tx_flags;
417 __le16 fc = hdr->frame_control;
418
419 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
420 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
421 tx_flags |= TX_CMD_FLG_ACK_MSK;
422 if (ieee80211_is_mgmt(fc))
423 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
424 if (ieee80211_is_probe_resp(fc) &&
425 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
426 tx_flags |= TX_CMD_FLG_TSF_MSK;
427 } else {
428 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
429 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
430 }
431
432 tx_cmd->sta_id = std_id;
433 if (ieee80211_has_morefrags(fc))
434 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
435
436 if (ieee80211_is_data_qos(fc)) {
437 u8 *qc = ieee80211_get_qos_ctl(hdr);
438 tx_cmd->tid_tspec = qc[0] & 0xf;
439 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
440 } else {
441 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
442 }
443
444 priv->cfg->ops->utils->tx_cmd_protection(priv, info, fc, &tx_flags);
445
446 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
447 if (ieee80211_is_mgmt(fc)) {
448 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
449 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
450 else
451 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
452 } else {
453 tx_cmd->timeout.pm_frame_timeout = 0;
454 }
455
456 tx_cmd->driver_txop = 0;
457 tx_cmd->tx_flags = tx_flags;
458 tx_cmd->next_frame_len = 0;
459 }
460
461 /*
462 * start REPLY_TX command process
463 */
464 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
465 {
466 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
467 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
468 struct iwl3945_tx_cmd *tx_cmd;
469 struct iwl_tx_queue *txq = NULL;
470 struct iwl_queue *q = NULL;
471 struct iwl_device_cmd *out_cmd;
472 struct iwl_cmd_meta *out_meta;
473 dma_addr_t phys_addr;
474 dma_addr_t txcmd_phys;
475 int txq_id = skb_get_queue_mapping(skb);
476 u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
477 u8 id;
478 u8 unicast;
479 u8 sta_id;
480 u8 tid = 0;
481 __le16 fc;
482 u8 wait_write_ptr = 0;
483 unsigned long flags;
484
485 spin_lock_irqsave(&priv->lock, flags);
486 if (iwl_is_rfkill(priv)) {
487 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
488 goto drop_unlock;
489 }
490
491 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
492 IWL_ERR(priv, "ERROR: No TX rate available.\n");
493 goto drop_unlock;
494 }
495
496 unicast = !is_multicast_ether_addr(hdr->addr1);
497 id = 0;
498
499 fc = hdr->frame_control;
500
501 #ifdef CONFIG_IWLWIFI_DEBUG
502 if (ieee80211_is_auth(fc))
503 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
504 else if (ieee80211_is_assoc_req(fc))
505 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
506 else if (ieee80211_is_reassoc_req(fc))
507 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
508 #endif
509
510 spin_unlock_irqrestore(&priv->lock, flags);
511
512 hdr_len = ieee80211_hdrlen(fc);
513
514 /* Find index into station table for destination station */
515 sta_id = iwl_sta_id_or_broadcast(
516 priv, &priv->contexts[IWL_RXON_CTX_BSS],
517 info->control.sta);
518 if (sta_id == IWL_INVALID_STATION) {
519 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
520 hdr->addr1);
521 goto drop;
522 }
523
524 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
525
526 if (ieee80211_is_data_qos(fc)) {
527 u8 *qc = ieee80211_get_qos_ctl(hdr);
528 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
529 if (unlikely(tid >= MAX_TID_COUNT))
530 goto drop;
531 }
532
533 /* Descriptor for chosen Tx queue */
534 txq = &priv->txq[txq_id];
535 q = &txq->q;
536
537 if ((iwl_queue_space(q) < q->high_mark))
538 goto drop;
539
540 spin_lock_irqsave(&priv->lock, flags);
541
542 idx = get_cmd_index(q, q->write_ptr, 0);
543
544 /* Set up driver data for this TFD */
545 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
546 txq->txb[q->write_ptr].skb = skb;
547 txq->txb[q->write_ptr].ctx = &priv->contexts[IWL_RXON_CTX_BSS];
548
549 /* Init first empty entry in queue's array of Tx/cmd buffers */
550 out_cmd = txq->cmd[idx];
551 out_meta = &txq->meta[idx];
552 tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
553 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
554 memset(tx_cmd, 0, sizeof(*tx_cmd));
555
556 /*
557 * Set up the Tx-command (not MAC!) header.
558 * Store the chosen Tx queue and TFD index within the sequence field;
559 * after Tx, uCode's Tx response will return this value so driver can
560 * locate the frame within the tx queue and do post-tx processing.
561 */
562 out_cmd->hdr.cmd = REPLY_TX;
563 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
564 INDEX_TO_SEQ(q->write_ptr)));
565
566 /* Copy MAC header from skb into command buffer */
567 memcpy(tx_cmd->hdr, hdr, hdr_len);
568
569
570 if (info->control.hw_key)
571 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
572
573 /* TODO need this for burst mode later on */
574 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
575
576 /* set is_hcca to 0; it probably will never be implemented */
577 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
578
579 /* Total # bytes to be transmitted */
580 len = (u16)skb->len;
581 tx_cmd->len = cpu_to_le16(len);
582
583 iwl_dbg_log_tx_data_frame(priv, len, hdr);
584 iwl_update_stats(priv, true, fc, len);
585 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
586 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
587
588 if (!ieee80211_has_morefrags(hdr->frame_control)) {
589 txq->need_update = 1;
590 } else {
591 wait_write_ptr = 1;
592 txq->need_update = 0;
593 }
594
595 IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
596 le16_to_cpu(out_cmd->hdr.sequence));
597 IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
598 iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
599 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
600 ieee80211_hdrlen(fc));
601
602 /*
603 * Use the first empty entry in this queue's command buffer array
604 * to contain the Tx command and MAC header concatenated together
605 * (payload data will be in another buffer).
606 * Size of this varies, due to varying MAC header length.
607 * If end is not dword aligned, we'll have 2 extra bytes at the end
608 * of the MAC header (device reads on dword boundaries).
609 * We'll tell device about this padding later.
610 */
611 len = sizeof(struct iwl3945_tx_cmd) +
612 sizeof(struct iwl_cmd_header) + hdr_len;
613
614 len_org = len;
615 len = (len + 3) & ~3;
616
617 if (len_org != len)
618 len_org = 1;
619 else
620 len_org = 0;
621
622 /* Physical address of this Tx command's header (not MAC header!),
623 * within command buffer array. */
624 txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
625 len, PCI_DMA_TODEVICE);
626 /* we do not map meta data ... so we can safely access address to
627 * provide to unmap command*/
628 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
629 dma_unmap_len_set(out_meta, len, len);
630
631 /* Add buffer containing Tx command and MAC(!) header to TFD's
632 * first entry */
633 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
634 txcmd_phys, len, 1, 0);
635
636
637 /* Set up TFD's 2nd entry to point directly to remainder of skb,
638 * if any (802.11 null frames have no payload). */
639 len = skb->len - hdr_len;
640 if (len) {
641 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
642 len, PCI_DMA_TODEVICE);
643 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
644 phys_addr, len,
645 0, U32_PAD(len));
646 }
647
648
649 /* Tell device the write index *just past* this latest filled TFD */
650 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
651 iwl_txq_update_write_ptr(priv, txq);
652 spin_unlock_irqrestore(&priv->lock, flags);
653
654 if ((iwl_queue_space(q) < q->high_mark)
655 && priv->mac80211_registered) {
656 if (wait_write_ptr) {
657 spin_lock_irqsave(&priv->lock, flags);
658 txq->need_update = 1;
659 iwl_txq_update_write_ptr(priv, txq);
660 spin_unlock_irqrestore(&priv->lock, flags);
661 }
662
663 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
664 }
665
666 return 0;
667
668 drop_unlock:
669 spin_unlock_irqrestore(&priv->lock, flags);
670 drop:
671 return -1;
672 }
673
674 static int iwl3945_get_measurement(struct iwl_priv *priv,
675 struct ieee80211_measurement_params *params,
676 u8 type)
677 {
678 struct iwl_spectrum_cmd spectrum;
679 struct iwl_rx_packet *pkt;
680 struct iwl_host_cmd cmd = {
681 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
682 .data = (void *)&spectrum,
683 .flags = CMD_WANT_SKB,
684 };
685 u32 add_time = le64_to_cpu(params->start_time);
686 int rc;
687 int spectrum_resp_status;
688 int duration = le16_to_cpu(params->duration);
689 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
690
691 if (iwl_is_associated(priv, IWL_RXON_CTX_BSS))
692 add_time = iwl_usecs_to_beacons(priv,
693 le64_to_cpu(params->start_time) - priv->_3945.last_tsf,
694 le16_to_cpu(ctx->timing.beacon_interval));
695
696 memset(&spectrum, 0, sizeof(spectrum));
697
698 spectrum.channel_count = cpu_to_le16(1);
699 spectrum.flags =
700 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
701 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
702 cmd.len = sizeof(spectrum);
703 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
704
705 if (iwl_is_associated(priv, IWL_RXON_CTX_BSS))
706 spectrum.start_time =
707 iwl_add_beacon_time(priv,
708 priv->_3945.last_beacon_time, add_time,
709 le16_to_cpu(ctx->timing.beacon_interval));
710 else
711 spectrum.start_time = 0;
712
713 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
714 spectrum.channels[0].channel = params->channel;
715 spectrum.channels[0].type = type;
716 if (ctx->active.flags & RXON_FLG_BAND_24G_MSK)
717 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
718 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
719
720 rc = iwl_send_cmd_sync(priv, &cmd);
721 if (rc)
722 return rc;
723
724 pkt = (struct iwl_rx_packet *)cmd.reply_page;
725 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
726 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
727 rc = -EIO;
728 }
729
730 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
731 switch (spectrum_resp_status) {
732 case 0: /* Command will be handled */
733 if (pkt->u.spectrum.id != 0xff) {
734 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
735 pkt->u.spectrum.id);
736 priv->measurement_status &= ~MEASUREMENT_READY;
737 }
738 priv->measurement_status |= MEASUREMENT_ACTIVE;
739 rc = 0;
740 break;
741
742 case 1: /* Command will not be handled */
743 rc = -EAGAIN;
744 break;
745 }
746
747 iwl_free_pages(priv, cmd.reply_page);
748
749 return rc;
750 }
751
752 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
753 struct iwl_rx_mem_buffer *rxb)
754 {
755 struct iwl_rx_packet *pkt = rxb_addr(rxb);
756 struct iwl_alive_resp *palive;
757 struct delayed_work *pwork;
758
759 palive = &pkt->u.alive_frame;
760
761 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
762 "0x%01X 0x%01X\n",
763 palive->is_valid, palive->ver_type,
764 palive->ver_subtype);
765
766 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
767 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
768 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
769 sizeof(struct iwl_alive_resp));
770 pwork = &priv->init_alive_start;
771 } else {
772 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
773 memcpy(&priv->card_alive, &pkt->u.alive_frame,
774 sizeof(struct iwl_alive_resp));
775 pwork = &priv->alive_start;
776 iwl3945_disable_events(priv);
777 }
778
779 /* We delay the ALIVE response by 5ms to
780 * give the HW RF Kill time to activate... */
781 if (palive->is_valid == UCODE_VALID_OK)
782 queue_delayed_work(priv->workqueue, pwork,
783 msecs_to_jiffies(5));
784 else
785 IWL_WARN(priv, "uCode did not respond OK.\n");
786 }
787
788 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
789 struct iwl_rx_mem_buffer *rxb)
790 {
791 #ifdef CONFIG_IWLWIFI_DEBUG
792 struct iwl_rx_packet *pkt = rxb_addr(rxb);
793 #endif
794
795 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
796 }
797
798 static void iwl3945_bg_beacon_update(struct work_struct *work)
799 {
800 struct iwl_priv *priv =
801 container_of(work, struct iwl_priv, beacon_update);
802 struct sk_buff *beacon;
803
804 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
805 beacon = ieee80211_beacon_get(priv->hw,
806 priv->contexts[IWL_RXON_CTX_BSS].vif);
807
808 if (!beacon) {
809 IWL_ERR(priv, "update beacon failed\n");
810 return;
811 }
812
813 mutex_lock(&priv->mutex);
814 /* new beacon skb is allocated every time; dispose previous.*/
815 if (priv->ibss_beacon)
816 dev_kfree_skb(priv->ibss_beacon);
817
818 priv->ibss_beacon = beacon;
819 mutex_unlock(&priv->mutex);
820
821 iwl3945_send_beacon_cmd(priv);
822 }
823
824 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
825 struct iwl_rx_mem_buffer *rxb)
826 {
827 struct iwl_rx_packet *pkt = rxb_addr(rxb);
828 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
829 #ifdef CONFIG_IWLWIFI_DEBUG
830 u8 rate = beacon->beacon_notify_hdr.rate;
831
832 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
833 "tsf %d %d rate %d\n",
834 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
835 beacon->beacon_notify_hdr.failure_frame,
836 le32_to_cpu(beacon->ibss_mgr_status),
837 le32_to_cpu(beacon->high_tsf),
838 le32_to_cpu(beacon->low_tsf), rate);
839 #endif
840
841 priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
842
843 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
844 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
845 queue_work(priv->workqueue, &priv->beacon_update);
846 }
847
848 /* Handle notification from uCode that card's power state is changing
849 * due to software, hardware, or critical temperature RFKILL */
850 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
851 struct iwl_rx_mem_buffer *rxb)
852 {
853 struct iwl_rx_packet *pkt = rxb_addr(rxb);
854 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
855 unsigned long status = priv->status;
856
857 IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
858 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
859 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
860
861 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
862 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
863
864 if (flags & HW_CARD_DISABLED)
865 set_bit(STATUS_RF_KILL_HW, &priv->status);
866 else
867 clear_bit(STATUS_RF_KILL_HW, &priv->status);
868
869
870 iwl_scan_cancel(priv);
871
872 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
873 test_bit(STATUS_RF_KILL_HW, &priv->status)))
874 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
875 test_bit(STATUS_RF_KILL_HW, &priv->status));
876 else
877 wake_up_interruptible(&priv->wait_command_queue);
878 }
879
880 /**
881 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
882 *
883 * Setup the RX handlers for each of the reply types sent from the uCode
884 * to the host.
885 *
886 * This function chains into the hardware specific files for them to setup
887 * any hardware specific handlers as well.
888 */
889 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
890 {
891 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
892 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
893 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
894 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
895 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
896 iwl_rx_spectrum_measure_notif;
897 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
898 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
899 iwl_rx_pm_debug_statistics_notif;
900 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
901
902 /*
903 * The same handler is used for both the REPLY to a discrete
904 * statistics request from the host as well as for the periodic
905 * statistics notifications (after received beacons) from the uCode.
906 */
907 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_reply_statistics;
908 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
909
910 iwl_setup_rx_scan_handlers(priv);
911 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
912
913 /* Set up hardware specific Rx handlers */
914 iwl3945_hw_rx_handler_setup(priv);
915 }
916
917 /************************** RX-FUNCTIONS ****************************/
918 /*
919 * Rx theory of operation
920 *
921 * The host allocates 32 DMA target addresses and passes the host address
922 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
923 * 0 to 31
924 *
925 * Rx Queue Indexes
926 * The host/firmware share two index registers for managing the Rx buffers.
927 *
928 * The READ index maps to the first position that the firmware may be writing
929 * to -- the driver can read up to (but not including) this position and get
930 * good data.
931 * The READ index is managed by the firmware once the card is enabled.
932 *
933 * The WRITE index maps to the last position the driver has read from -- the
934 * position preceding WRITE is the last slot the firmware can place a packet.
935 *
936 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
937 * WRITE = READ.
938 *
939 * During initialization, the host sets up the READ queue position to the first
940 * INDEX position, and WRITE to the last (READ - 1 wrapped)
941 *
942 * When the firmware places a packet in a buffer, it will advance the READ index
943 * and fire the RX interrupt. The driver can then query the READ index and
944 * process as many packets as possible, moving the WRITE index forward as it
945 * resets the Rx queue buffers with new memory.
946 *
947 * The management in the driver is as follows:
948 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
949 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
950 * to replenish the iwl->rxq->rx_free.
951 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
952 * iwl->rxq is replenished and the READ INDEX is updated (updating the
953 * 'processed' and 'read' driver indexes as well)
954 * + A received packet is processed and handed to the kernel network stack,
955 * detached from the iwl->rxq. The driver 'processed' index is updated.
956 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
957 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
958 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
959 * were enough free buffers and RX_STALLED is set it is cleared.
960 *
961 *
962 * Driver sequence:
963 *
964 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
965 * iwl3945_rx_queue_restock
966 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
967 * queue, updates firmware pointers, and updates
968 * the WRITE index. If insufficient rx_free buffers
969 * are available, schedules iwl3945_rx_replenish
970 *
971 * -- enable interrupts --
972 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
973 * READ INDEX, detaching the SKB from the pool.
974 * Moves the packet buffer from queue to rx_used.
975 * Calls iwl3945_rx_queue_restock to refill any empty
976 * slots.
977 * ...
978 *
979 */
980
981 /**
982 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
983 */
984 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
985 dma_addr_t dma_addr)
986 {
987 return cpu_to_le32((u32)dma_addr);
988 }
989
990 /**
991 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
992 *
993 * If there are slots in the RX queue that need to be restocked,
994 * and we have free pre-allocated buffers, fill the ranks as much
995 * as we can, pulling from rx_free.
996 *
997 * This moves the 'write' index forward to catch up with 'processed', and
998 * also updates the memory address in the firmware to reference the new
999 * target buffer.
1000 */
1001 static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
1002 {
1003 struct iwl_rx_queue *rxq = &priv->rxq;
1004 struct list_head *element;
1005 struct iwl_rx_mem_buffer *rxb;
1006 unsigned long flags;
1007 int write;
1008
1009 spin_lock_irqsave(&rxq->lock, flags);
1010 write = rxq->write & ~0x7;
1011 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
1012 /* Get next free Rx buffer, remove from free list */
1013 element = rxq->rx_free.next;
1014 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1015 list_del(element);
1016
1017 /* Point to Rx buffer via next RBD in circular buffer */
1018 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
1019 rxq->queue[rxq->write] = rxb;
1020 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1021 rxq->free_count--;
1022 }
1023 spin_unlock_irqrestore(&rxq->lock, flags);
1024 /* If the pre-allocated buffer pool is dropping low, schedule to
1025 * refill it */
1026 if (rxq->free_count <= RX_LOW_WATERMARK)
1027 queue_work(priv->workqueue, &priv->rx_replenish);
1028
1029
1030 /* If we've added more space for the firmware to place data, tell it.
1031 * Increment device's write pointer in multiples of 8. */
1032 if ((rxq->write_actual != (rxq->write & ~0x7))
1033 || (abs(rxq->write - rxq->read) > 7)) {
1034 spin_lock_irqsave(&rxq->lock, flags);
1035 rxq->need_update = 1;
1036 spin_unlock_irqrestore(&rxq->lock, flags);
1037 iwl_rx_queue_update_write_ptr(priv, rxq);
1038 }
1039 }
1040
1041 /**
1042 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1043 *
1044 * When moving to rx_free an SKB is allocated for the slot.
1045 *
1046 * Also restock the Rx queue via iwl3945_rx_queue_restock.
1047 * This is called as a scheduled work item (except for during initialization)
1048 */
1049 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1050 {
1051 struct iwl_rx_queue *rxq = &priv->rxq;
1052 struct list_head *element;
1053 struct iwl_rx_mem_buffer *rxb;
1054 struct page *page;
1055 unsigned long flags;
1056 gfp_t gfp_mask = priority;
1057
1058 while (1) {
1059 spin_lock_irqsave(&rxq->lock, flags);
1060
1061 if (list_empty(&rxq->rx_used)) {
1062 spin_unlock_irqrestore(&rxq->lock, flags);
1063 return;
1064 }
1065 spin_unlock_irqrestore(&rxq->lock, flags);
1066
1067 if (rxq->free_count > RX_LOW_WATERMARK)
1068 gfp_mask |= __GFP_NOWARN;
1069
1070 if (priv->hw_params.rx_page_order > 0)
1071 gfp_mask |= __GFP_COMP;
1072
1073 /* Alloc a new receive buffer */
1074 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
1075 if (!page) {
1076 if (net_ratelimit())
1077 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
1078 if ((rxq->free_count <= RX_LOW_WATERMARK) &&
1079 net_ratelimit())
1080 IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
1081 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
1082 rxq->free_count);
1083 /* We don't reschedule replenish work here -- we will
1084 * call the restock method and if it still needs
1085 * more buffers it will schedule replenish */
1086 break;
1087 }
1088
1089 spin_lock_irqsave(&rxq->lock, flags);
1090 if (list_empty(&rxq->rx_used)) {
1091 spin_unlock_irqrestore(&rxq->lock, flags);
1092 __free_pages(page, priv->hw_params.rx_page_order);
1093 return;
1094 }
1095 element = rxq->rx_used.next;
1096 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1097 list_del(element);
1098 spin_unlock_irqrestore(&rxq->lock, flags);
1099
1100 rxb->page = page;
1101 /* Get physical address of RB/SKB */
1102 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
1103 PAGE_SIZE << priv->hw_params.rx_page_order,
1104 PCI_DMA_FROMDEVICE);
1105
1106 spin_lock_irqsave(&rxq->lock, flags);
1107
1108 list_add_tail(&rxb->list, &rxq->rx_free);
1109 rxq->free_count++;
1110 priv->alloc_rxb_page++;
1111
1112 spin_unlock_irqrestore(&rxq->lock, flags);
1113 }
1114 }
1115
1116 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1117 {
1118 unsigned long flags;
1119 int i;
1120 spin_lock_irqsave(&rxq->lock, flags);
1121 INIT_LIST_HEAD(&rxq->rx_free);
1122 INIT_LIST_HEAD(&rxq->rx_used);
1123 /* Fill the rx_used queue with _all_ of the Rx buffers */
1124 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1125 /* In the reset function, these buffers may have been allocated
1126 * to an SKB, so we need to unmap and free potential storage */
1127 if (rxq->pool[i].page != NULL) {
1128 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1129 PAGE_SIZE << priv->hw_params.rx_page_order,
1130 PCI_DMA_FROMDEVICE);
1131 __iwl_free_pages(priv, rxq->pool[i].page);
1132 rxq->pool[i].page = NULL;
1133 }
1134 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1135 }
1136
1137 /* Set us so that we have processed and used all buffers, but have
1138 * not restocked the Rx queue with fresh buffers */
1139 rxq->read = rxq->write = 0;
1140 rxq->write_actual = 0;
1141 rxq->free_count = 0;
1142 spin_unlock_irqrestore(&rxq->lock, flags);
1143 }
1144
1145 void iwl3945_rx_replenish(void *data)
1146 {
1147 struct iwl_priv *priv = data;
1148 unsigned long flags;
1149
1150 iwl3945_rx_allocate(priv, GFP_KERNEL);
1151
1152 spin_lock_irqsave(&priv->lock, flags);
1153 iwl3945_rx_queue_restock(priv);
1154 spin_unlock_irqrestore(&priv->lock, flags);
1155 }
1156
1157 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1158 {
1159 iwl3945_rx_allocate(priv, GFP_ATOMIC);
1160
1161 iwl3945_rx_queue_restock(priv);
1162 }
1163
1164
1165 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1166 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1167 * This free routine walks the list of POOL entries and if SKB is set to
1168 * non NULL it is unmapped and freed
1169 */
1170 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1171 {
1172 int i;
1173 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1174 if (rxq->pool[i].page != NULL) {
1175 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1176 PAGE_SIZE << priv->hw_params.rx_page_order,
1177 PCI_DMA_FROMDEVICE);
1178 __iwl_free_pages(priv, rxq->pool[i].page);
1179 rxq->pool[i].page = NULL;
1180 }
1181 }
1182
1183 dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1184 rxq->bd_dma);
1185 dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
1186 rxq->rb_stts, rxq->rb_stts_dma);
1187 rxq->bd = NULL;
1188 rxq->rb_stts = NULL;
1189 }
1190
1191
1192 /* Convert linear signal-to-noise ratio into dB */
1193 static u8 ratio2dB[100] = {
1194 /* 0 1 2 3 4 5 6 7 8 9 */
1195 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1196 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1197 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1198 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1199 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1200 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1201 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1202 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1203 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1204 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1205 };
1206
1207 /* Calculates a relative dB value from a ratio of linear
1208 * (i.e. not dB) signal levels.
1209 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1210 int iwl3945_calc_db_from_ratio(int sig_ratio)
1211 {
1212 /* 1000:1 or higher just report as 60 dB */
1213 if (sig_ratio >= 1000)
1214 return 60;
1215
1216 /* 100:1 or higher, divide by 10 and use table,
1217 * add 20 dB to make up for divide by 10 */
1218 if (sig_ratio >= 100)
1219 return 20 + (int)ratio2dB[sig_ratio/10];
1220
1221 /* We shouldn't see this */
1222 if (sig_ratio < 1)
1223 return 0;
1224
1225 /* Use table for ratios 1:1 - 99:1 */
1226 return (int)ratio2dB[sig_ratio];
1227 }
1228
1229 /**
1230 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1231 *
1232 * Uses the priv->rx_handlers callback function array to invoke
1233 * the appropriate handlers, including command responses,
1234 * frame-received notifications, and other notifications.
1235 */
1236 static void iwl3945_rx_handle(struct iwl_priv *priv)
1237 {
1238 struct iwl_rx_mem_buffer *rxb;
1239 struct iwl_rx_packet *pkt;
1240 struct iwl_rx_queue *rxq = &priv->rxq;
1241 u32 r, i;
1242 int reclaim;
1243 unsigned long flags;
1244 u8 fill_rx = 0;
1245 u32 count = 8;
1246 int total_empty = 0;
1247
1248 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1249 * buffer that the driver may process (last buffer filled by ucode). */
1250 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1251 i = rxq->read;
1252
1253 /* calculate total frames need to be restock after handling RX */
1254 total_empty = r - rxq->write_actual;
1255 if (total_empty < 0)
1256 total_empty += RX_QUEUE_SIZE;
1257
1258 if (total_empty > (RX_QUEUE_SIZE / 2))
1259 fill_rx = 1;
1260 /* Rx interrupt, but nothing sent from uCode */
1261 if (i == r)
1262 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1263
1264 while (i != r) {
1265 int len;
1266
1267 rxb = rxq->queue[i];
1268
1269 /* If an RXB doesn't have a Rx queue slot associated with it,
1270 * then a bug has been introduced in the queue refilling
1271 * routines -- catch it here */
1272 BUG_ON(rxb == NULL);
1273
1274 rxq->queue[i] = NULL;
1275
1276 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1277 PAGE_SIZE << priv->hw_params.rx_page_order,
1278 PCI_DMA_FROMDEVICE);
1279 pkt = rxb_addr(rxb);
1280
1281 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1282 len += sizeof(u32); /* account for status word */
1283 trace_iwlwifi_dev_rx(priv, pkt, len);
1284
1285 /* Reclaim a command buffer only if this packet is a response
1286 * to a (driver-originated) command.
1287 * If the packet (e.g. Rx frame) originated from uCode,
1288 * there is no command buffer to reclaim.
1289 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1290 * but apparently a few don't get set; catch them here. */
1291 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1292 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1293 (pkt->hdr.cmd != REPLY_TX);
1294
1295 /* Based on type of command response or notification,
1296 * handle those that need handling via function in
1297 * rx_handlers table. See iwl3945_setup_rx_handlers() */
1298 if (priv->rx_handlers[pkt->hdr.cmd]) {
1299 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
1300 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1301 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1302 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1303 } else {
1304 /* No handling needed */
1305 IWL_DEBUG_RX(priv,
1306 "r %d i %d No handler needed for %s, 0x%02x\n",
1307 r, i, get_cmd_string(pkt->hdr.cmd),
1308 pkt->hdr.cmd);
1309 }
1310
1311 /*
1312 * XXX: After here, we should always check rxb->page
1313 * against NULL before touching it or its virtual
1314 * memory (pkt). Because some rx_handler might have
1315 * already taken or freed the pages.
1316 */
1317
1318 if (reclaim) {
1319 /* Invoke any callbacks, transfer the buffer to caller,
1320 * and fire off the (possibly) blocking iwl_send_cmd()
1321 * as we reclaim the driver command queue */
1322 if (rxb->page)
1323 iwl_tx_cmd_complete(priv, rxb);
1324 else
1325 IWL_WARN(priv, "Claim null rxb?\n");
1326 }
1327
1328 /* Reuse the page if possible. For notification packets and
1329 * SKBs that fail to Rx correctly, add them back into the
1330 * rx_free list for reuse later. */
1331 spin_lock_irqsave(&rxq->lock, flags);
1332 if (rxb->page != NULL) {
1333 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1334 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1335 PCI_DMA_FROMDEVICE);
1336 list_add_tail(&rxb->list, &rxq->rx_free);
1337 rxq->free_count++;
1338 } else
1339 list_add_tail(&rxb->list, &rxq->rx_used);
1340
1341 spin_unlock_irqrestore(&rxq->lock, flags);
1342
1343 i = (i + 1) & RX_QUEUE_MASK;
1344 /* If there are a lot of unused frames,
1345 * restock the Rx queue so ucode won't assert. */
1346 if (fill_rx) {
1347 count++;
1348 if (count >= 8) {
1349 rxq->read = i;
1350 iwl3945_rx_replenish_now(priv);
1351 count = 0;
1352 }
1353 }
1354 }
1355
1356 /* Backtrack one entry */
1357 rxq->read = i;
1358 if (fill_rx)
1359 iwl3945_rx_replenish_now(priv);
1360 else
1361 iwl3945_rx_queue_restock(priv);
1362 }
1363
1364 /* call this function to flush any scheduled tasklet */
1365 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1366 {
1367 /* wait to make sure we flush pending tasklet*/
1368 synchronize_irq(priv->pci_dev->irq);
1369 tasklet_kill(&priv->irq_tasklet);
1370 }
1371
1372 static const char *desc_lookup(int i)
1373 {
1374 switch (i) {
1375 case 1:
1376 return "FAIL";
1377 case 2:
1378 return "BAD_PARAM";
1379 case 3:
1380 return "BAD_CHECKSUM";
1381 case 4:
1382 return "NMI_INTERRUPT";
1383 case 5:
1384 return "SYSASSERT";
1385 case 6:
1386 return "FATAL_ERROR";
1387 }
1388
1389 return "UNKNOWN";
1390 }
1391
1392 #define ERROR_START_OFFSET (1 * sizeof(u32))
1393 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1394
1395 void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1396 {
1397 u32 i;
1398 u32 desc, time, count, base, data1;
1399 u32 blink1, blink2, ilink1, ilink2;
1400
1401 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1402
1403 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1404 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1405 return;
1406 }
1407
1408
1409 count = iwl_read_targ_mem(priv, base);
1410
1411 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1412 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1413 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1414 priv->status, count);
1415 }
1416
1417 IWL_ERR(priv, "Desc Time asrtPC blink2 "
1418 "ilink1 nmiPC Line\n");
1419 for (i = ERROR_START_OFFSET;
1420 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1421 i += ERROR_ELEM_SIZE) {
1422 desc = iwl_read_targ_mem(priv, base + i);
1423 time =
1424 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1425 blink1 =
1426 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1427 blink2 =
1428 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1429 ilink1 =
1430 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1431 ilink2 =
1432 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1433 data1 =
1434 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1435
1436 IWL_ERR(priv,
1437 "%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1438 desc_lookup(desc), desc, time, blink1, blink2,
1439 ilink1, ilink2, data1);
1440 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
1441 0, blink1, blink2, ilink1, ilink2);
1442 }
1443 }
1444
1445 #define EVENT_START_OFFSET (6 * sizeof(u32))
1446
1447 /**
1448 * iwl3945_print_event_log - Dump error event log to syslog
1449 *
1450 */
1451 static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1452 u32 num_events, u32 mode,
1453 int pos, char **buf, size_t bufsz)
1454 {
1455 u32 i;
1456 u32 base; /* SRAM byte address of event log header */
1457 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1458 u32 ptr; /* SRAM byte address of log data */
1459 u32 ev, time, data; /* event log data */
1460 unsigned long reg_flags;
1461
1462 if (num_events == 0)
1463 return pos;
1464
1465 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1466
1467 if (mode == 0)
1468 event_size = 2 * sizeof(u32);
1469 else
1470 event_size = 3 * sizeof(u32);
1471
1472 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1473
1474 /* Make sure device is powered up for SRAM reads */
1475 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1476 iwl_grab_nic_access(priv);
1477
1478 /* Set starting address; reads will auto-increment */
1479 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1480 rmb();
1481
1482 /* "time" is actually "data" for mode 0 (no timestamp).
1483 * place event id # at far right for easier visual parsing. */
1484 for (i = 0; i < num_events; i++) {
1485 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1486 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1487 if (mode == 0) {
1488 /* data, ev */
1489 if (bufsz) {
1490 pos += scnprintf(*buf + pos, bufsz - pos,
1491 "0x%08x:%04u\n",
1492 time, ev);
1493 } else {
1494 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1495 trace_iwlwifi_dev_ucode_event(priv, 0,
1496 time, ev);
1497 }
1498 } else {
1499 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1500 if (bufsz) {
1501 pos += scnprintf(*buf + pos, bufsz - pos,
1502 "%010u:0x%08x:%04u\n",
1503 time, data, ev);
1504 } else {
1505 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
1506 time, data, ev);
1507 trace_iwlwifi_dev_ucode_event(priv, time,
1508 data, ev);
1509 }
1510 }
1511 }
1512
1513 /* Allow device to power down */
1514 iwl_release_nic_access(priv);
1515 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1516 return pos;
1517 }
1518
1519 /**
1520 * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
1521 */
1522 static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1523 u32 num_wraps, u32 next_entry,
1524 u32 size, u32 mode,
1525 int pos, char **buf, size_t bufsz)
1526 {
1527 /*
1528 * display the newest DEFAULT_LOG_ENTRIES entries
1529 * i.e the entries just before the next ont that uCode would fill.
1530 */
1531 if (num_wraps) {
1532 if (next_entry < size) {
1533 pos = iwl3945_print_event_log(priv,
1534 capacity - (size - next_entry),
1535 size - next_entry, mode,
1536 pos, buf, bufsz);
1537 pos = iwl3945_print_event_log(priv, 0,
1538 next_entry, mode,
1539 pos, buf, bufsz);
1540 } else
1541 pos = iwl3945_print_event_log(priv, next_entry - size,
1542 size, mode,
1543 pos, buf, bufsz);
1544 } else {
1545 if (next_entry < size)
1546 pos = iwl3945_print_event_log(priv, 0,
1547 next_entry, mode,
1548 pos, buf, bufsz);
1549 else
1550 pos = iwl3945_print_event_log(priv, next_entry - size,
1551 size, mode,
1552 pos, buf, bufsz);
1553 }
1554 return pos;
1555 }
1556
1557 #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
1558
1559 int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1560 char **buf, bool display)
1561 {
1562 u32 base; /* SRAM byte address of event log header */
1563 u32 capacity; /* event log capacity in # entries */
1564 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1565 u32 num_wraps; /* # times uCode wrapped to top of log */
1566 u32 next_entry; /* index of next entry to be written by uCode */
1567 u32 size; /* # entries that we'll print */
1568 int pos = 0;
1569 size_t bufsz = 0;
1570
1571 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1572 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1573 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1574 return -EINVAL;
1575 }
1576
1577 /* event log header */
1578 capacity = iwl_read_targ_mem(priv, base);
1579 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1580 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1581 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1582
1583 if (capacity > priv->cfg->max_event_log_size) {
1584 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1585 capacity, priv->cfg->max_event_log_size);
1586 capacity = priv->cfg->max_event_log_size;
1587 }
1588
1589 if (next_entry > priv->cfg->max_event_log_size) {
1590 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1591 next_entry, priv->cfg->max_event_log_size);
1592 next_entry = priv->cfg->max_event_log_size;
1593 }
1594
1595 size = num_wraps ? capacity : next_entry;
1596
1597 /* bail out if nothing in log */
1598 if (size == 0) {
1599 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1600 return pos;
1601 }
1602
1603 #ifdef CONFIG_IWLWIFI_DEBUG
1604 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1605 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1606 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1607 #else
1608 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1609 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1610 #endif
1611
1612 IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
1613 size);
1614
1615 #ifdef CONFIG_IWLWIFI_DEBUG
1616 if (display) {
1617 if (full_log)
1618 bufsz = capacity * 48;
1619 else
1620 bufsz = size * 48;
1621 *buf = kmalloc(bufsz, GFP_KERNEL);
1622 if (!*buf)
1623 return -ENOMEM;
1624 }
1625 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1626 /* if uCode has wrapped back to top of log,
1627 * start at the oldest entry,
1628 * i.e the next one that uCode would fill.
1629 */
1630 if (num_wraps)
1631 pos = iwl3945_print_event_log(priv, next_entry,
1632 capacity - next_entry, mode,
1633 pos, buf, bufsz);
1634
1635 /* (then/else) start at top of log */
1636 pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
1637 pos, buf, bufsz);
1638 } else
1639 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1640 next_entry, size, mode,
1641 pos, buf, bufsz);
1642 #else
1643 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1644 next_entry, size, mode,
1645 pos, buf, bufsz);
1646 #endif
1647 return pos;
1648 }
1649
1650 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1651 {
1652 u32 inta, handled = 0;
1653 u32 inta_fh;
1654 unsigned long flags;
1655 #ifdef CONFIG_IWLWIFI_DEBUG
1656 u32 inta_mask;
1657 #endif
1658
1659 spin_lock_irqsave(&priv->lock, flags);
1660
1661 /* Ack/clear/reset pending uCode interrupts.
1662 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1663 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1664 inta = iwl_read32(priv, CSR_INT);
1665 iwl_write32(priv, CSR_INT, inta);
1666
1667 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1668 * Any new interrupts that happen after this, either while we're
1669 * in this tasklet, or later, will show up in next ISR/tasklet. */
1670 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1671 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1672
1673 #ifdef CONFIG_IWLWIFI_DEBUG
1674 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1675 /* just for debug */
1676 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1677 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1678 inta, inta_mask, inta_fh);
1679 }
1680 #endif
1681
1682 spin_unlock_irqrestore(&priv->lock, flags);
1683
1684 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1685 * atomic, make sure that inta covers all the interrupts that
1686 * we've discovered, even if FH interrupt came in just after
1687 * reading CSR_INT. */
1688 if (inta_fh & CSR39_FH_INT_RX_MASK)
1689 inta |= CSR_INT_BIT_FH_RX;
1690 if (inta_fh & CSR39_FH_INT_TX_MASK)
1691 inta |= CSR_INT_BIT_FH_TX;
1692
1693 /* Now service all interrupt bits discovered above. */
1694 if (inta & CSR_INT_BIT_HW_ERR) {
1695 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1696
1697 /* Tell the device to stop sending interrupts */
1698 iwl_disable_interrupts(priv);
1699
1700 priv->isr_stats.hw++;
1701 iwl_irq_handle_error(priv);
1702
1703 handled |= CSR_INT_BIT_HW_ERR;
1704
1705 return;
1706 }
1707
1708 #ifdef CONFIG_IWLWIFI_DEBUG
1709 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1710 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1711 if (inta & CSR_INT_BIT_SCD) {
1712 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1713 "the frame/frames.\n");
1714 priv->isr_stats.sch++;
1715 }
1716
1717 /* Alive notification via Rx interrupt will do the real work */
1718 if (inta & CSR_INT_BIT_ALIVE) {
1719 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1720 priv->isr_stats.alive++;
1721 }
1722 }
1723 #endif
1724 /* Safely ignore these bits for debug checks below */
1725 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1726
1727 /* Error detected by uCode */
1728 if (inta & CSR_INT_BIT_SW_ERR) {
1729 IWL_ERR(priv, "Microcode SW error detected. "
1730 "Restarting 0x%X.\n", inta);
1731 priv->isr_stats.sw++;
1732 priv->isr_stats.sw_err = inta;
1733 iwl_irq_handle_error(priv);
1734 handled |= CSR_INT_BIT_SW_ERR;
1735 }
1736
1737 /* uCode wakes up after power-down sleep */
1738 if (inta & CSR_INT_BIT_WAKEUP) {
1739 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1740 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1741 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1742 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1743 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1744 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1745 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1746 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1747
1748 priv->isr_stats.wakeup++;
1749 handled |= CSR_INT_BIT_WAKEUP;
1750 }
1751
1752 /* All uCode command responses, including Tx command responses,
1753 * Rx "responses" (frame-received notification), and other
1754 * notifications from uCode come through here*/
1755 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1756 iwl3945_rx_handle(priv);
1757 priv->isr_stats.rx++;
1758 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1759 }
1760
1761 if (inta & CSR_INT_BIT_FH_TX) {
1762 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1763 priv->isr_stats.tx++;
1764
1765 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1766 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1767 (FH39_SRVC_CHNL), 0x0);
1768 handled |= CSR_INT_BIT_FH_TX;
1769 }
1770
1771 if (inta & ~handled) {
1772 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1773 priv->isr_stats.unhandled++;
1774 }
1775
1776 if (inta & ~priv->inta_mask) {
1777 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1778 inta & ~priv->inta_mask);
1779 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1780 }
1781
1782 /* Re-enable all interrupts */
1783 /* only Re-enable if disabled by irq */
1784 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1785 iwl_enable_interrupts(priv);
1786
1787 #ifdef CONFIG_IWLWIFI_DEBUG
1788 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1789 inta = iwl_read32(priv, CSR_INT);
1790 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1791 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1792 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1793 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1794 }
1795 #endif
1796 }
1797
1798 static int iwl3945_get_single_channel_for_scan(struct iwl_priv *priv,
1799 struct ieee80211_vif *vif,
1800 enum ieee80211_band band,
1801 struct iwl3945_scan_channel *scan_ch)
1802 {
1803 const struct ieee80211_supported_band *sband;
1804 u16 passive_dwell = 0;
1805 u16 active_dwell = 0;
1806 int added = 0;
1807 u8 channel = 0;
1808
1809 sband = iwl_get_hw_mode(priv, band);
1810 if (!sband) {
1811 IWL_ERR(priv, "invalid band\n");
1812 return added;
1813 }
1814
1815 active_dwell = iwl_get_active_dwell_time(priv, band, 0);
1816 passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
1817
1818 if (passive_dwell <= active_dwell)
1819 passive_dwell = active_dwell + 1;
1820
1821
1822 channel = iwl_get_single_channel_number(priv, band);
1823
1824 if (channel) {
1825 scan_ch->channel = channel;
1826 scan_ch->type = 0; /* passive */
1827 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1828 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1829 /* Set txpower levels to defaults */
1830 scan_ch->tpc.dsp_atten = 110;
1831 if (band == IEEE80211_BAND_5GHZ)
1832 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1833 else
1834 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1835 added++;
1836 } else
1837 IWL_ERR(priv, "no valid channel found\n");
1838 return added;
1839 }
1840
1841 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1842 enum ieee80211_band band,
1843 u8 is_active, u8 n_probes,
1844 struct iwl3945_scan_channel *scan_ch,
1845 struct ieee80211_vif *vif)
1846 {
1847 struct ieee80211_channel *chan;
1848 const struct ieee80211_supported_band *sband;
1849 const struct iwl_channel_info *ch_info;
1850 u16 passive_dwell = 0;
1851 u16 active_dwell = 0;
1852 int added, i;
1853
1854 sband = iwl_get_hw_mode(priv, band);
1855 if (!sband)
1856 return 0;
1857
1858 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1859 passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
1860
1861 if (passive_dwell <= active_dwell)
1862 passive_dwell = active_dwell + 1;
1863
1864 for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1865 chan = priv->scan_request->channels[i];
1866
1867 if (chan->band != band)
1868 continue;
1869
1870 scan_ch->channel = chan->hw_value;
1871
1872 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
1873 if (!is_channel_valid(ch_info)) {
1874 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1875 scan_ch->channel);
1876 continue;
1877 }
1878
1879 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1880 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1881 /* If passive , set up for auto-switch
1882 * and use long active_dwell time.
1883 */
1884 if (!is_active || is_channel_passive(ch_info) ||
1885 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1886 scan_ch->type = 0; /* passive */
1887 if (IWL_UCODE_API(priv->ucode_ver) == 1)
1888 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1889 } else {
1890 scan_ch->type = 1; /* active */
1891 }
1892
1893 /* Set direct probe bits. These may be used both for active
1894 * scan channels (probes gets sent right away),
1895 * or for passive channels (probes get se sent only after
1896 * hearing clear Rx packet).*/
1897 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1898 if (n_probes)
1899 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1900 } else {
1901 /* uCode v1 does not allow setting direct probe bits on
1902 * passive channel. */
1903 if ((scan_ch->type & 1) && n_probes)
1904 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1905 }
1906
1907 /* Set txpower levels to defaults */
1908 scan_ch->tpc.dsp_atten = 110;
1909 /* scan_pwr_info->tpc.dsp_atten; */
1910
1911 /*scan_pwr_info->tpc.tx_gain; */
1912 if (band == IEEE80211_BAND_5GHZ)
1913 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1914 else {
1915 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1916 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1917 * power level:
1918 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1919 */
1920 }
1921
1922 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1923 scan_ch->channel,
1924 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1925 (scan_ch->type & 1) ?
1926 active_dwell : passive_dwell);
1927
1928 scan_ch++;
1929 added++;
1930 }
1931
1932 IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
1933 return added;
1934 }
1935
1936 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1937 struct ieee80211_rate *rates)
1938 {
1939 int i;
1940
1941 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1942 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1943 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1944 rates[i].hw_value_short = i;
1945 rates[i].flags = 0;
1946 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1947 /*
1948 * If CCK != 1M then set short preamble rate flag.
1949 */
1950 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1951 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1952 }
1953 }
1954 }
1955
1956 /******************************************************************************
1957 *
1958 * uCode download functions
1959 *
1960 ******************************************************************************/
1961
1962 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1963 {
1964 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1965 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1966 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1967 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1968 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1969 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1970 }
1971
1972 /**
1973 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1974 * looking at all data.
1975 */
1976 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1977 {
1978 u32 val;
1979 u32 save_len = len;
1980 int rc = 0;
1981 u32 errcnt;
1982
1983 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1984
1985 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1986 IWL39_RTC_INST_LOWER_BOUND);
1987
1988 errcnt = 0;
1989 for (; len > 0; len -= sizeof(u32), image++) {
1990 /* read data comes through single port, auto-incr addr */
1991 /* NOTE: Use the debugless read so we don't flood kernel log
1992 * if IWL_DL_IO is set */
1993 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1994 if (val != le32_to_cpu(*image)) {
1995 IWL_ERR(priv, "uCode INST section is invalid at "
1996 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1997 save_len - len, val, le32_to_cpu(*image));
1998 rc = -EIO;
1999 errcnt++;
2000 if (errcnt >= 20)
2001 break;
2002 }
2003 }
2004
2005
2006 if (!errcnt)
2007 IWL_DEBUG_INFO(priv,
2008 "ucode image in INSTRUCTION memory is good\n");
2009
2010 return rc;
2011 }
2012
2013
2014 /**
2015 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
2016 * using sample data 100 bytes apart. If these sample points are good,
2017 * it's a pretty good bet that everything between them is good, too.
2018 */
2019 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2020 {
2021 u32 val;
2022 int rc = 0;
2023 u32 errcnt = 0;
2024 u32 i;
2025
2026 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2027
2028 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2029 /* read data comes through single port, auto-incr addr */
2030 /* NOTE: Use the debugless read so we don't flood kernel log
2031 * if IWL_DL_IO is set */
2032 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2033 i + IWL39_RTC_INST_LOWER_BOUND);
2034 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2035 if (val != le32_to_cpu(*image)) {
2036 #if 0 /* Enable this if you want to see details */
2037 IWL_ERR(priv, "uCode INST section is invalid at "
2038 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2039 i, val, *image);
2040 #endif
2041 rc = -EIO;
2042 errcnt++;
2043 if (errcnt >= 3)
2044 break;
2045 }
2046 }
2047
2048 return rc;
2049 }
2050
2051
2052 /**
2053 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
2054 * and verify its contents
2055 */
2056 static int iwl3945_verify_ucode(struct iwl_priv *priv)
2057 {
2058 __le32 *image;
2059 u32 len;
2060 int rc = 0;
2061
2062 /* Try bootstrap */
2063 image = (__le32 *)priv->ucode_boot.v_addr;
2064 len = priv->ucode_boot.len;
2065 rc = iwl3945_verify_inst_sparse(priv, image, len);
2066 if (rc == 0) {
2067 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2068 return 0;
2069 }
2070
2071 /* Try initialize */
2072 image = (__le32 *)priv->ucode_init.v_addr;
2073 len = priv->ucode_init.len;
2074 rc = iwl3945_verify_inst_sparse(priv, image, len);
2075 if (rc == 0) {
2076 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2077 return 0;
2078 }
2079
2080 /* Try runtime/protocol */
2081 image = (__le32 *)priv->ucode_code.v_addr;
2082 len = priv->ucode_code.len;
2083 rc = iwl3945_verify_inst_sparse(priv, image, len);
2084 if (rc == 0) {
2085 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2086 return 0;
2087 }
2088
2089 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2090
2091 /* Since nothing seems to match, show first several data entries in
2092 * instruction SRAM, so maybe visual inspection will give a clue.
2093 * Selection of bootstrap image (vs. other images) is arbitrary. */
2094 image = (__le32 *)priv->ucode_boot.v_addr;
2095 len = priv->ucode_boot.len;
2096 rc = iwl3945_verify_inst_full(priv, image, len);
2097
2098 return rc;
2099 }
2100
2101 static void iwl3945_nic_start(struct iwl_priv *priv)
2102 {
2103 /* Remove all resets to allow NIC to operate */
2104 iwl_write32(priv, CSR_RESET, 0);
2105 }
2106
2107 #define IWL3945_UCODE_GET(item) \
2108 static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode)\
2109 { \
2110 return le32_to_cpu(ucode->u.v1.item); \
2111 }
2112
2113 static u32 iwl3945_ucode_get_header_size(u32 api_ver)
2114 {
2115 return 24;
2116 }
2117
2118 static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode)
2119 {
2120 return (u8 *) ucode->u.v1.data;
2121 }
2122
2123 IWL3945_UCODE_GET(inst_size);
2124 IWL3945_UCODE_GET(data_size);
2125 IWL3945_UCODE_GET(init_size);
2126 IWL3945_UCODE_GET(init_data_size);
2127 IWL3945_UCODE_GET(boot_size);
2128
2129 /**
2130 * iwl3945_read_ucode - Read uCode images from disk file.
2131 *
2132 * Copy into buffers for card to fetch via bus-mastering
2133 */
2134 static int iwl3945_read_ucode(struct iwl_priv *priv)
2135 {
2136 const struct iwl_ucode_header *ucode;
2137 int ret = -EINVAL, index;
2138 const struct firmware *ucode_raw;
2139 /* firmware file name contains uCode/driver compatibility version */
2140 const char *name_pre = priv->cfg->fw_name_pre;
2141 const unsigned int api_max = priv->cfg->ucode_api_max;
2142 const unsigned int api_min = priv->cfg->ucode_api_min;
2143 char buf[25];
2144 u8 *src;
2145 size_t len;
2146 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2147
2148 /* Ask kernel firmware_class module to get the boot firmware off disk.
2149 * request_firmware() is synchronous, file is in memory on return. */
2150 for (index = api_max; index >= api_min; index--) {
2151 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2152 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2153 if (ret < 0) {
2154 IWL_ERR(priv, "%s firmware file req failed: %d\n",
2155 buf, ret);
2156 if (ret == -ENOENT)
2157 continue;
2158 else
2159 goto error;
2160 } else {
2161 if (index < api_max)
2162 IWL_ERR(priv, "Loaded firmware %s, "
2163 "which is deprecated. "
2164 " Please use API v%u instead.\n",
2165 buf, api_max);
2166 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2167 "(%zd bytes) from disk\n",
2168 buf, ucode_raw->size);
2169 break;
2170 }
2171 }
2172
2173 if (ret < 0)
2174 goto error;
2175
2176 /* Make sure that we got at least our header! */
2177 if (ucode_raw->size < iwl3945_ucode_get_header_size(1)) {
2178 IWL_ERR(priv, "File size way too small!\n");
2179 ret = -EINVAL;
2180 goto err_release;
2181 }
2182
2183 /* Data from ucode file: header followed by uCode images */
2184 ucode = (struct iwl_ucode_header *)ucode_raw->data;
2185
2186 priv->ucode_ver = le32_to_cpu(ucode->ver);
2187 api_ver = IWL_UCODE_API(priv->ucode_ver);
2188 inst_size = iwl3945_ucode_get_inst_size(ucode);
2189 data_size = iwl3945_ucode_get_data_size(ucode);
2190 init_size = iwl3945_ucode_get_init_size(ucode);
2191 init_data_size = iwl3945_ucode_get_init_data_size(ucode);
2192 boot_size = iwl3945_ucode_get_boot_size(ucode);
2193 src = iwl3945_ucode_get_data(ucode);
2194
2195 /* api_ver should match the api version forming part of the
2196 * firmware filename ... but we don't check for that and only rely
2197 * on the API version read from firmware header from here on forward */
2198
2199 if (api_ver < api_min || api_ver > api_max) {
2200 IWL_ERR(priv, "Driver unable to support your firmware API. "
2201 "Driver supports v%u, firmware is v%u.\n",
2202 api_max, api_ver);
2203 priv->ucode_ver = 0;
2204 ret = -EINVAL;
2205 goto err_release;
2206 }
2207 if (api_ver != api_max)
2208 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2209 "got %u. New firmware can be obtained "
2210 "from http://www.intellinuxwireless.org.\n",
2211 api_max, api_ver);
2212
2213 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2214 IWL_UCODE_MAJOR(priv->ucode_ver),
2215 IWL_UCODE_MINOR(priv->ucode_ver),
2216 IWL_UCODE_API(priv->ucode_ver),
2217 IWL_UCODE_SERIAL(priv->ucode_ver));
2218
2219 snprintf(priv->hw->wiphy->fw_version,
2220 sizeof(priv->hw->wiphy->fw_version),
2221 "%u.%u.%u.%u",
2222 IWL_UCODE_MAJOR(priv->ucode_ver),
2223 IWL_UCODE_MINOR(priv->ucode_ver),
2224 IWL_UCODE_API(priv->ucode_ver),
2225 IWL_UCODE_SERIAL(priv->ucode_ver));
2226
2227 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2228 priv->ucode_ver);
2229 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2230 inst_size);
2231 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2232 data_size);
2233 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2234 init_size);
2235 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2236 init_data_size);
2237 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2238 boot_size);
2239
2240
2241 /* Verify size of file vs. image size info in file's header */
2242 if (ucode_raw->size != iwl3945_ucode_get_header_size(api_ver) +
2243 inst_size + data_size + init_size +
2244 init_data_size + boot_size) {
2245
2246 IWL_DEBUG_INFO(priv,
2247 "uCode file size %zd does not match expected size\n",
2248 ucode_raw->size);
2249 ret = -EINVAL;
2250 goto err_release;
2251 }
2252
2253 /* Verify that uCode images will fit in card's SRAM */
2254 if (inst_size > IWL39_MAX_INST_SIZE) {
2255 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2256 inst_size);
2257 ret = -EINVAL;
2258 goto err_release;
2259 }
2260
2261 if (data_size > IWL39_MAX_DATA_SIZE) {
2262 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2263 data_size);
2264 ret = -EINVAL;
2265 goto err_release;
2266 }
2267 if (init_size > IWL39_MAX_INST_SIZE) {
2268 IWL_DEBUG_INFO(priv,
2269 "uCode init instr len %d too large to fit in\n",
2270 init_size);
2271 ret = -EINVAL;
2272 goto err_release;
2273 }
2274 if (init_data_size > IWL39_MAX_DATA_SIZE) {
2275 IWL_DEBUG_INFO(priv,
2276 "uCode init data len %d too large to fit in\n",
2277 init_data_size);
2278 ret = -EINVAL;
2279 goto err_release;
2280 }
2281 if (boot_size > IWL39_MAX_BSM_SIZE) {
2282 IWL_DEBUG_INFO(priv,
2283 "uCode boot instr len %d too large to fit in\n",
2284 boot_size);
2285 ret = -EINVAL;
2286 goto err_release;
2287 }
2288
2289 /* Allocate ucode buffers for card's bus-master loading ... */
2290
2291 /* Runtime instructions and 2 copies of data:
2292 * 1) unmodified from disk
2293 * 2) backup cache for save/restore during power-downs */
2294 priv->ucode_code.len = inst_size;
2295 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2296
2297 priv->ucode_data.len = data_size;
2298 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2299
2300 priv->ucode_data_backup.len = data_size;
2301 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2302
2303 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2304 !priv->ucode_data_backup.v_addr)
2305 goto err_pci_alloc;
2306
2307 /* Initialization instructions and data */
2308 if (init_size && init_data_size) {
2309 priv->ucode_init.len = init_size;
2310 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2311
2312 priv->ucode_init_data.len = init_data_size;
2313 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2314
2315 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2316 goto err_pci_alloc;
2317 }
2318
2319 /* Bootstrap (instructions only, no data) */
2320 if (boot_size) {
2321 priv->ucode_boot.len = boot_size;
2322 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2323
2324 if (!priv->ucode_boot.v_addr)
2325 goto err_pci_alloc;
2326 }
2327
2328 /* Copy images into buffers for card's bus-master reads ... */
2329
2330 /* Runtime instructions (first block of data in file) */
2331 len = inst_size;
2332 IWL_DEBUG_INFO(priv,
2333 "Copying (but not loading) uCode instr len %zd\n", len);
2334 memcpy(priv->ucode_code.v_addr, src, len);
2335 src += len;
2336
2337 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2338 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2339
2340 /* Runtime data (2nd block)
2341 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
2342 len = data_size;
2343 IWL_DEBUG_INFO(priv,
2344 "Copying (but not loading) uCode data len %zd\n", len);
2345 memcpy(priv->ucode_data.v_addr, src, len);
2346 memcpy(priv->ucode_data_backup.v_addr, src, len);
2347 src += len;
2348
2349 /* Initialization instructions (3rd block) */
2350 if (init_size) {
2351 len = init_size;
2352 IWL_DEBUG_INFO(priv,
2353 "Copying (but not loading) init instr len %zd\n", len);
2354 memcpy(priv->ucode_init.v_addr, src, len);
2355 src += len;
2356 }
2357
2358 /* Initialization data (4th block) */
2359 if (init_data_size) {
2360 len = init_data_size;
2361 IWL_DEBUG_INFO(priv,
2362 "Copying (but not loading) init data len %zd\n", len);
2363 memcpy(priv->ucode_init_data.v_addr, src, len);
2364 src += len;
2365 }
2366
2367 /* Bootstrap instructions (5th block) */
2368 len = boot_size;
2369 IWL_DEBUG_INFO(priv,
2370 "Copying (but not loading) boot instr len %zd\n", len);
2371 memcpy(priv->ucode_boot.v_addr, src, len);
2372
2373 /* We have our copies now, allow OS release its copies */
2374 release_firmware(ucode_raw);
2375 return 0;
2376
2377 err_pci_alloc:
2378 IWL_ERR(priv, "failed to allocate pci memory\n");
2379 ret = -ENOMEM;
2380 iwl3945_dealloc_ucode_pci(priv);
2381
2382 err_release:
2383 release_firmware(ucode_raw);
2384
2385 error:
2386 return ret;
2387 }
2388
2389
2390 /**
2391 * iwl3945_set_ucode_ptrs - Set uCode address location
2392 *
2393 * Tell initialization uCode where to find runtime uCode.
2394 *
2395 * BSM registers initially contain pointers to initialization uCode.
2396 * We need to replace them to load runtime uCode inst and data,
2397 * and to save runtime data when powering down.
2398 */
2399 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2400 {
2401 dma_addr_t pinst;
2402 dma_addr_t pdata;
2403
2404 /* bits 31:0 for 3945 */
2405 pinst = priv->ucode_code.p_addr;
2406 pdata = priv->ucode_data_backup.p_addr;
2407
2408 /* Tell bootstrap uCode where to find image to load */
2409 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2410 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2411 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2412 priv->ucode_data.len);
2413
2414 /* Inst byte count must be last to set up, bit 31 signals uCode
2415 * that all new ptr/size info is in place */
2416 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2417 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2418
2419 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2420
2421 return 0;
2422 }
2423
2424 /**
2425 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2426 *
2427 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2428 *
2429 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2430 */
2431 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2432 {
2433 /* Check alive response for "valid" sign from uCode */
2434 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2435 /* We had an error bringing up the hardware, so take it
2436 * all the way back down so we can try again */
2437 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2438 goto restart;
2439 }
2440
2441 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2442 * This is a paranoid check, because we would not have gotten the
2443 * "initialize" alive if code weren't properly loaded. */
2444 if (iwl3945_verify_ucode(priv)) {
2445 /* Runtime instruction load was bad;
2446 * take it all the way back down so we can try again */
2447 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2448 goto restart;
2449 }
2450
2451 /* Send pointers to protocol/runtime uCode image ... init code will
2452 * load and launch runtime uCode, which will send us another "Alive"
2453 * notification. */
2454 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2455 if (iwl3945_set_ucode_ptrs(priv)) {
2456 /* Runtime instruction load won't happen;
2457 * take it all the way back down so we can try again */
2458 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2459 goto restart;
2460 }
2461 return;
2462
2463 restart:
2464 queue_work(priv->workqueue, &priv->restart);
2465 }
2466
2467 /**
2468 * iwl3945_alive_start - called after REPLY_ALIVE notification received
2469 * from protocol/runtime uCode (initialization uCode's
2470 * Alive gets handled by iwl3945_init_alive_start()).
2471 */
2472 static void iwl3945_alive_start(struct iwl_priv *priv)
2473 {
2474 int thermal_spin = 0;
2475 u32 rfkill;
2476 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2477
2478 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2479
2480 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2481 /* We had an error bringing up the hardware, so take it
2482 * all the way back down so we can try again */
2483 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2484 goto restart;
2485 }
2486
2487 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2488 * This is a paranoid check, because we would not have gotten the
2489 * "runtime" alive if code weren't properly loaded. */
2490 if (iwl3945_verify_ucode(priv)) {
2491 /* Runtime instruction load was bad;
2492 * take it all the way back down so we can try again */
2493 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2494 goto restart;
2495 }
2496
2497 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2498 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2499
2500 if (rfkill & 0x1) {
2501 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2502 /* if RFKILL is not on, then wait for thermal
2503 * sensor in adapter to kick in */
2504 while (iwl3945_hw_get_temperature(priv) == 0) {
2505 thermal_spin++;
2506 udelay(10);
2507 }
2508
2509 if (thermal_spin)
2510 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2511 thermal_spin * 10);
2512 } else
2513 set_bit(STATUS_RF_KILL_HW, &priv->status);
2514
2515 /* After the ALIVE response, we can send commands to 3945 uCode */
2516 set_bit(STATUS_ALIVE, &priv->status);
2517
2518 if (priv->cfg->ops->lib->recover_from_tx_stall) {
2519 /* Enable timer to monitor the driver queues */
2520 mod_timer(&priv->monitor_recover,
2521 jiffies +
2522 msecs_to_jiffies(priv->cfg->monitor_recover_period));
2523 }
2524
2525 if (iwl_is_rfkill(priv))
2526 return;
2527
2528 ieee80211_wake_queues(priv->hw);
2529
2530 priv->active_rate = IWL_RATES_MASK;
2531
2532 iwl_power_update_mode(priv, true);
2533
2534 if (iwl_is_associated(priv, IWL_RXON_CTX_BSS)) {
2535 struct iwl3945_rxon_cmd *active_rxon =
2536 (struct iwl3945_rxon_cmd *)(&ctx->active);
2537
2538 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2539 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2540 } else {
2541 /* Initialize our rx_config data */
2542 iwl_connection_init_rx_config(priv, NULL);
2543 }
2544
2545 /* Configure Bluetooth device coexistence support */
2546 priv->cfg->ops->hcmd->send_bt_config(priv);
2547
2548 /* Configure the adapter for unassociated operation */
2549 iwlcore_commit_rxon(priv, ctx);
2550
2551 iwl3945_reg_txpower_periodic(priv);
2552
2553 iwl_leds_init(priv);
2554
2555 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2556 set_bit(STATUS_READY, &priv->status);
2557 wake_up_interruptible(&priv->wait_command_queue);
2558
2559 return;
2560
2561 restart:
2562 queue_work(priv->workqueue, &priv->restart);
2563 }
2564
2565 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2566
2567 static void __iwl3945_down(struct iwl_priv *priv)
2568 {
2569 unsigned long flags;
2570 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2571 struct ieee80211_conf *conf = NULL;
2572
2573 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2574
2575 conf = ieee80211_get_hw_conf(priv->hw);
2576
2577 if (!exit_pending)
2578 set_bit(STATUS_EXIT_PENDING, &priv->status);
2579
2580 /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2581 * to prevent rearm timer */
2582 if (priv->cfg->ops->lib->recover_from_tx_stall)
2583 del_timer_sync(&priv->monitor_recover);
2584
2585 /* Station information will now be cleared in device */
2586 iwl_clear_ucode_stations(priv, NULL);
2587 iwl_dealloc_bcast_stations(priv);
2588 iwl_clear_driver_stations(priv);
2589
2590 /* Unblock any waiting calls */
2591 wake_up_interruptible_all(&priv->wait_command_queue);
2592
2593 /* Wipe out the EXIT_PENDING status bit if we are not actually
2594 * exiting the module */
2595 if (!exit_pending)
2596 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2597
2598 /* stop and reset the on-board processor */
2599 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2600
2601 /* tell the device to stop sending interrupts */
2602 spin_lock_irqsave(&priv->lock, flags);
2603 iwl_disable_interrupts(priv);
2604 spin_unlock_irqrestore(&priv->lock, flags);
2605 iwl_synchronize_irq(priv);
2606
2607 if (priv->mac80211_registered)
2608 ieee80211_stop_queues(priv->hw);
2609
2610 /* If we have not previously called iwl3945_init() then
2611 * clear all bits but the RF Kill bits and return */
2612 if (!iwl_is_init(priv)) {
2613 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2614 STATUS_RF_KILL_HW |
2615 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2616 STATUS_GEO_CONFIGURED |
2617 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2618 STATUS_EXIT_PENDING;
2619 goto exit;
2620 }
2621
2622 /* ...otherwise clear out all the status bits but the RF Kill
2623 * bit and continue taking the NIC down. */
2624 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2625 STATUS_RF_KILL_HW |
2626 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2627 STATUS_GEO_CONFIGURED |
2628 test_bit(STATUS_FW_ERROR, &priv->status) <<
2629 STATUS_FW_ERROR |
2630 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2631 STATUS_EXIT_PENDING;
2632
2633 iwl3945_hw_txq_ctx_stop(priv);
2634 iwl3945_hw_rxq_stop(priv);
2635
2636 /* Power-down device's busmaster DMA clocks */
2637 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2638 udelay(5);
2639
2640 /* Stop the device, and put it in low power state */
2641 priv->cfg->ops->lib->apm_ops.stop(priv);
2642
2643 exit:
2644 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2645
2646 if (priv->ibss_beacon)
2647 dev_kfree_skb(priv->ibss_beacon);
2648 priv->ibss_beacon = NULL;
2649
2650 /* clear out any free frames */
2651 iwl3945_clear_free_frames(priv);
2652 }
2653
2654 static void iwl3945_down(struct iwl_priv *priv)
2655 {
2656 mutex_lock(&priv->mutex);
2657 __iwl3945_down(priv);
2658 mutex_unlock(&priv->mutex);
2659
2660 iwl3945_cancel_deferred_work(priv);
2661 }
2662
2663 #define MAX_HW_RESTARTS 5
2664
2665 static int __iwl3945_up(struct iwl_priv *priv)
2666 {
2667 int rc, i;
2668
2669 rc = iwl_alloc_bcast_station(priv, &priv->contexts[IWL_RXON_CTX_BSS],
2670 false);
2671 if (rc)
2672 return rc;
2673
2674 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2675 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2676 return -EIO;
2677 }
2678
2679 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2680 IWL_ERR(priv, "ucode not available for device bring up\n");
2681 return -EIO;
2682 }
2683
2684 /* If platform's RF_KILL switch is NOT set to KILL */
2685 if (iwl_read32(priv, CSR_GP_CNTRL) &
2686 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2687 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2688 else {
2689 set_bit(STATUS_RF_KILL_HW, &priv->status);
2690 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2691 return -ENODEV;
2692 }
2693
2694 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2695
2696 rc = iwl3945_hw_nic_init(priv);
2697 if (rc) {
2698 IWL_ERR(priv, "Unable to int nic\n");
2699 return rc;
2700 }
2701
2702 /* make sure rfkill handshake bits are cleared */
2703 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2704 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2705 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2706
2707 /* clear (again), then enable host interrupts */
2708 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2709 iwl_enable_interrupts(priv);
2710
2711 /* really make sure rfkill handshake bits are cleared */
2712 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2713 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2714
2715 /* Copy original ucode data image from disk into backup cache.
2716 * This will be used to initialize the on-board processor's
2717 * data SRAM for a clean start when the runtime program first loads. */
2718 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2719 priv->ucode_data.len);
2720
2721 /* We return success when we resume from suspend and rf_kill is on. */
2722 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2723 return 0;
2724
2725 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2726
2727 /* load bootstrap state machine,
2728 * load bootstrap program into processor's memory,
2729 * prepare to load the "initialize" uCode */
2730 rc = priv->cfg->ops->lib->load_ucode(priv);
2731
2732 if (rc) {
2733 IWL_ERR(priv,
2734 "Unable to set up bootstrap uCode: %d\n", rc);
2735 continue;
2736 }
2737
2738 /* start card; "initialize" will load runtime ucode */
2739 iwl3945_nic_start(priv);
2740
2741 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2742
2743 return 0;
2744 }
2745
2746 set_bit(STATUS_EXIT_PENDING, &priv->status);
2747 __iwl3945_down(priv);
2748 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2749
2750 /* tried to restart and config the device for as long as our
2751 * patience could withstand */
2752 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2753 return -EIO;
2754 }
2755
2756
2757 /*****************************************************************************
2758 *
2759 * Workqueue callbacks
2760 *
2761 *****************************************************************************/
2762
2763 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2764 {
2765 struct iwl_priv *priv =
2766 container_of(data, struct iwl_priv, init_alive_start.work);
2767
2768 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2769 return;
2770
2771 mutex_lock(&priv->mutex);
2772 iwl3945_init_alive_start(priv);
2773 mutex_unlock(&priv->mutex);
2774 }
2775
2776 static void iwl3945_bg_alive_start(struct work_struct *data)
2777 {
2778 struct iwl_priv *priv =
2779 container_of(data, struct iwl_priv, alive_start.work);
2780
2781 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2782 return;
2783
2784 mutex_lock(&priv->mutex);
2785 iwl3945_alive_start(priv);
2786 mutex_unlock(&priv->mutex);
2787 }
2788
2789 /*
2790 * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2791 * driver must poll CSR_GP_CNTRL_REG register for change. This register
2792 * *is* readable even when device has been SW_RESET into low power mode
2793 * (e.g. during RF KILL).
2794 */
2795 static void iwl3945_rfkill_poll(struct work_struct *data)
2796 {
2797 struct iwl_priv *priv =
2798 container_of(data, struct iwl_priv, _3945.rfkill_poll.work);
2799 bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
2800 bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
2801 & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2802
2803 if (new_rfkill != old_rfkill) {
2804 if (new_rfkill)
2805 set_bit(STATUS_RF_KILL_HW, &priv->status);
2806 else
2807 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2808
2809 wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
2810
2811 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
2812 new_rfkill ? "disable radio" : "enable radio");
2813 }
2814
2815 /* Keep this running, even if radio now enabled. This will be
2816 * cancelled in mac_start() if system decides to start again */
2817 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
2818 round_jiffies_relative(2 * HZ));
2819
2820 }
2821
2822 void iwl3945_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
2823 {
2824 struct iwl_host_cmd cmd = {
2825 .id = REPLY_SCAN_CMD,
2826 .len = sizeof(struct iwl3945_scan_cmd),
2827 .flags = CMD_SIZE_HUGE,
2828 };
2829 struct iwl3945_scan_cmd *scan;
2830 struct ieee80211_conf *conf = NULL;
2831 u8 n_probes = 0;
2832 enum ieee80211_band band;
2833 bool is_active = false;
2834
2835 conf = ieee80211_get_hw_conf(priv->hw);
2836
2837 cancel_delayed_work(&priv->scan_check);
2838
2839 if (!iwl_is_ready(priv)) {
2840 IWL_WARN(priv, "request scan called when driver not ready.\n");
2841 goto done;
2842 }
2843
2844 /* Make sure the scan wasn't canceled before this queued work
2845 * was given the chance to run... */
2846 if (!test_bit(STATUS_SCANNING, &priv->status))
2847 goto done;
2848
2849 /* This should never be called or scheduled if there is currently
2850 * a scan active in the hardware. */
2851 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
2852 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
2853 "Ignoring second request.\n");
2854 goto done;
2855 }
2856
2857 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2858 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
2859 goto done;
2860 }
2861
2862 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2863 IWL_DEBUG_HC(priv,
2864 "Scan request while abort pending. Queuing.\n");
2865 goto done;
2866 }
2867
2868 if (iwl_is_rfkill(priv)) {
2869 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
2870 goto done;
2871 }
2872
2873 if (!test_bit(STATUS_READY, &priv->status)) {
2874 IWL_DEBUG_HC(priv,
2875 "Scan request while uninitialized. Queuing.\n");
2876 goto done;
2877 }
2878
2879 if (!priv->scan_cmd) {
2880 priv->scan_cmd = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2881 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2882 if (!priv->scan_cmd) {
2883 IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n");
2884 goto done;
2885 }
2886 }
2887 scan = priv->scan_cmd;
2888 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2889
2890 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2891 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2892
2893 if (iwl_is_associated(priv, IWL_RXON_CTX_BSS)) {
2894 u16 interval = 0;
2895 u32 extra;
2896 u32 suspend_time = 100;
2897 u32 scan_suspend_time = 100;
2898 unsigned long flags;
2899
2900 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2901
2902 spin_lock_irqsave(&priv->lock, flags);
2903 if (priv->is_internal_short_scan)
2904 interval = 0;
2905 else
2906 interval = vif->bss_conf.beacon_int;
2907 spin_unlock_irqrestore(&priv->lock, flags);
2908
2909 scan->suspend_time = 0;
2910 scan->max_out_time = cpu_to_le32(200 * 1024);
2911 if (!interval)
2912 interval = suspend_time;
2913 /*
2914 * suspend time format:
2915 * 0-19: beacon interval in usec (time before exec.)
2916 * 20-23: 0
2917 * 24-31: number of beacons (suspend between channels)
2918 */
2919
2920 extra = (suspend_time / interval) << 24;
2921 scan_suspend_time = 0xFF0FFFFF &
2922 (extra | ((suspend_time % interval) * 1024));
2923
2924 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2925 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
2926 scan_suspend_time, interval);
2927 }
2928
2929 if (priv->is_internal_short_scan) {
2930 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
2931 } else if (priv->scan_request->n_ssids) {
2932 int i, p = 0;
2933 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2934 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2935 /* always does wildcard anyway */
2936 if (!priv->scan_request->ssids[i].ssid_len)
2937 continue;
2938 scan->direct_scan[p].id = WLAN_EID_SSID;
2939 scan->direct_scan[p].len =
2940 priv->scan_request->ssids[i].ssid_len;
2941 memcpy(scan->direct_scan[p].ssid,
2942 priv->scan_request->ssids[i].ssid,
2943 priv->scan_request->ssids[i].ssid_len);
2944 n_probes++;
2945 p++;
2946 }
2947 is_active = true;
2948 } else
2949 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
2950
2951 /* We don't build a direct scan probe request; the uCode will do
2952 * that based on the direct_mask added to each channel entry */
2953 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2954 scan->tx_cmd.sta_id = priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id;
2955 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2956
2957 /* flags + rate selection */
2958
2959 switch (priv->scan_band) {
2960 case IEEE80211_BAND_2GHZ:
2961 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2962 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2963 scan->good_CRC_th = 0;
2964 band = IEEE80211_BAND_2GHZ;
2965 break;
2966 case IEEE80211_BAND_5GHZ:
2967 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
2968 /*
2969 * If active scaning is requested but a certain channel
2970 * is marked passive, we can do active scanning if we
2971 * detect transmissions.
2972 */
2973 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
2974 IWL_GOOD_CRC_TH_DISABLED;
2975 band = IEEE80211_BAND_5GHZ;
2976 break;
2977 default:
2978 IWL_WARN(priv, "Invalid scan band\n");
2979 goto done;
2980 }
2981
2982 if (!priv->is_internal_short_scan) {
2983 scan->tx_cmd.len = cpu_to_le16(
2984 iwl_fill_probe_req(priv,
2985 (struct ieee80211_mgmt *)scan->data,
2986 vif->addr,
2987 priv->scan_request->ie,
2988 priv->scan_request->ie_len,
2989 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2990 } else {
2991 /* use bcast addr, will not be transmitted but must be valid */
2992 scan->tx_cmd.len = cpu_to_le16(
2993 iwl_fill_probe_req(priv,
2994 (struct ieee80211_mgmt *)scan->data,
2995 iwl_bcast_addr, NULL, 0,
2996 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2997 }
2998 /* select Rx antennas */
2999 scan->flags |= iwl3945_get_antenna_flags(priv);
3000
3001 if (priv->is_internal_short_scan) {
3002 scan->channel_count =
3003 iwl3945_get_single_channel_for_scan(priv, vif, band,
3004 (void *)&scan->data[le16_to_cpu(
3005 scan->tx_cmd.len)]);
3006 } else {
3007 scan->channel_count =
3008 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
3009 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)], vif);
3010 }
3011
3012 if (scan->channel_count == 0) {
3013 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
3014 goto done;
3015 }
3016
3017 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
3018 scan->channel_count * sizeof(struct iwl3945_scan_channel);
3019 cmd.data = scan;
3020 scan->len = cpu_to_le16(cmd.len);
3021
3022 set_bit(STATUS_SCAN_HW, &priv->status);
3023 if (iwl_send_cmd_sync(priv, &cmd))
3024 goto done;
3025
3026 queue_delayed_work(priv->workqueue, &priv->scan_check,
3027 IWL_SCAN_CHECK_WATCHDOG);
3028
3029 return;
3030
3031 done:
3032 /* can not perform scan make sure we clear scanning
3033 * bits from status so next scan request can be performed.
3034 * if we dont clear scanning status bit here all next scan
3035 * will fail
3036 */
3037 clear_bit(STATUS_SCAN_HW, &priv->status);
3038 clear_bit(STATUS_SCANNING, &priv->status);
3039
3040 /* inform mac80211 scan aborted */
3041 queue_work(priv->workqueue, &priv->scan_completed);
3042 }
3043
3044 static void iwl3945_bg_restart(struct work_struct *data)
3045 {
3046 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3047
3048 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3049 return;
3050
3051 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3052 struct iwl_rxon_context *ctx;
3053 mutex_lock(&priv->mutex);
3054 for_each_context(priv, ctx)
3055 ctx->vif = NULL;
3056 priv->is_open = 0;
3057 mutex_unlock(&priv->mutex);
3058 iwl3945_down(priv);
3059 ieee80211_restart_hw(priv->hw);
3060 } else {
3061 iwl3945_down(priv);
3062
3063 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3064 return;
3065
3066 mutex_lock(&priv->mutex);
3067 __iwl3945_up(priv);
3068 mutex_unlock(&priv->mutex);
3069 }
3070 }
3071
3072 static void iwl3945_bg_rx_replenish(struct work_struct *data)
3073 {
3074 struct iwl_priv *priv =
3075 container_of(data, struct iwl_priv, rx_replenish);
3076
3077 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3078 return;
3079
3080 mutex_lock(&priv->mutex);
3081 iwl3945_rx_replenish(priv);
3082 mutex_unlock(&priv->mutex);
3083 }
3084
3085 void iwl3945_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3086 {
3087 int rc = 0;
3088 struct ieee80211_conf *conf = NULL;
3089 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3090
3091 if (!vif || !priv->is_open)
3092 return;
3093
3094 if (vif->type == NL80211_IFTYPE_AP) {
3095 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3096 return;
3097 }
3098
3099 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3100 vif->bss_conf.aid, ctx->active.bssid_addr);
3101
3102 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3103 return;
3104
3105 iwl_scan_cancel_timeout(priv, 200);
3106
3107 conf = ieee80211_get_hw_conf(priv->hw);
3108
3109 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3110 iwlcore_commit_rxon(priv, ctx);
3111
3112 rc = iwl_send_rxon_timing(priv, vif);
3113 if (rc)
3114 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3115 "Attempting to continue.\n");
3116
3117 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
3118
3119 ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3120
3121 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3122 vif->bss_conf.aid, vif->bss_conf.beacon_int);
3123
3124 if (vif->bss_conf.use_short_preamble)
3125 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3126 else
3127 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3128
3129 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
3130 if (vif->bss_conf.use_short_slot)
3131 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3132 else
3133 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3134 }
3135
3136 iwlcore_commit_rxon(priv, ctx);
3137
3138 switch (vif->type) {
3139 case NL80211_IFTYPE_STATION:
3140 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
3141 break;
3142 case NL80211_IFTYPE_ADHOC:
3143 iwl3945_send_beacon_cmd(priv);
3144 break;
3145 default:
3146 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3147 __func__, vif->type);
3148 break;
3149 }
3150 }
3151
3152 /*****************************************************************************
3153 *
3154 * mac80211 entry point functions
3155 *
3156 *****************************************************************************/
3157
3158 #define UCODE_READY_TIMEOUT (2 * HZ)
3159
3160 static int iwl3945_mac_start(struct ieee80211_hw *hw)
3161 {
3162 struct iwl_priv *priv = hw->priv;
3163 int ret;
3164
3165 IWL_DEBUG_MAC80211(priv, "enter\n");
3166
3167 /* we should be verifying the device is ready to be opened */
3168 mutex_lock(&priv->mutex);
3169
3170 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3171 * ucode filename and max sizes are card-specific. */
3172
3173 if (!priv->ucode_code.len) {
3174 ret = iwl3945_read_ucode(priv);
3175 if (ret) {
3176 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
3177 mutex_unlock(&priv->mutex);
3178 goto out_release_irq;
3179 }
3180 }
3181
3182 ret = __iwl3945_up(priv);
3183
3184 mutex_unlock(&priv->mutex);
3185
3186 if (ret)
3187 goto out_release_irq;
3188
3189 IWL_DEBUG_INFO(priv, "Start UP work.\n");
3190
3191 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3192 * mac80211 will not be run successfully. */
3193 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3194 test_bit(STATUS_READY, &priv->status),
3195 UCODE_READY_TIMEOUT);
3196 if (!ret) {
3197 if (!test_bit(STATUS_READY, &priv->status)) {
3198 IWL_ERR(priv,
3199 "Wait for START_ALIVE timeout after %dms.\n",
3200 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3201 ret = -ETIMEDOUT;
3202 goto out_release_irq;
3203 }
3204 }
3205
3206 /* ucode is running and will send rfkill notifications,
3207 * no need to poll the killswitch state anymore */
3208 cancel_delayed_work(&priv->_3945.rfkill_poll);
3209
3210 iwl_led_start(priv);
3211
3212 priv->is_open = 1;
3213 IWL_DEBUG_MAC80211(priv, "leave\n");
3214 return 0;
3215
3216 out_release_irq:
3217 priv->is_open = 0;
3218 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
3219 return ret;
3220 }
3221
3222 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
3223 {
3224 struct iwl_priv *priv = hw->priv;
3225
3226 IWL_DEBUG_MAC80211(priv, "enter\n");
3227
3228 if (!priv->is_open) {
3229 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
3230 return;
3231 }
3232
3233 priv->is_open = 0;
3234
3235 if (iwl_is_ready_rf(priv)) {
3236 /* stop mac, cancel any scan request and clear
3237 * RXON_FILTER_ASSOC_MSK BIT
3238 */
3239 mutex_lock(&priv->mutex);
3240 iwl_scan_cancel_timeout(priv, 100);
3241 mutex_unlock(&priv->mutex);
3242 }
3243
3244 iwl3945_down(priv);
3245
3246 flush_workqueue(priv->workqueue);
3247
3248 /* start polling the killswitch state again */
3249 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
3250 round_jiffies_relative(2 * HZ));
3251
3252 IWL_DEBUG_MAC80211(priv, "leave\n");
3253 }
3254
3255 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3256 {
3257 struct iwl_priv *priv = hw->priv;
3258
3259 IWL_DEBUG_MAC80211(priv, "enter\n");
3260
3261 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3262 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3263
3264 if (iwl3945_tx_skb(priv, skb))
3265 dev_kfree_skb_any(skb);
3266
3267 IWL_DEBUG_MAC80211(priv, "leave\n");
3268 return NETDEV_TX_OK;
3269 }
3270
3271 void iwl3945_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3272 {
3273 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3274 int rc = 0;
3275
3276 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3277 return;
3278
3279 /* The following should be done only at AP bring up */
3280 if (!(iwl_is_associated(priv, IWL_RXON_CTX_BSS))) {
3281
3282 /* RXON - unassoc (to set timing command) */
3283 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3284 iwlcore_commit_rxon(priv, ctx);
3285
3286 /* RXON Timing */
3287 rc = iwl_send_rxon_timing(priv, vif);
3288 if (rc)
3289 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3290 "Attempting to continue.\n");
3291
3292 ctx->staging.assoc_id = 0;
3293
3294 if (vif->bss_conf.use_short_preamble)
3295 ctx->staging.flags |=
3296 RXON_FLG_SHORT_PREAMBLE_MSK;
3297 else
3298 ctx->staging.flags &=
3299 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3300
3301 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
3302 if (vif->bss_conf.use_short_slot)
3303 ctx->staging.flags |=
3304 RXON_FLG_SHORT_SLOT_MSK;
3305 else
3306 ctx->staging.flags &=
3307 ~RXON_FLG_SHORT_SLOT_MSK;
3308 }
3309 /* restore RXON assoc */
3310 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
3311 iwlcore_commit_rxon(priv, ctx);
3312 }
3313 iwl3945_send_beacon_cmd(priv);
3314
3315 /* FIXME - we need to add code here to detect a totally new
3316 * configuration, reset the AP, unassoc, rxon timing, assoc,
3317 * clear sta table, add BCAST sta... */
3318 }
3319
3320 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3321 struct ieee80211_vif *vif,
3322 struct ieee80211_sta *sta,
3323 struct ieee80211_key_conf *key)
3324 {
3325 struct iwl_priv *priv = hw->priv;
3326 int ret = 0;
3327 u8 sta_id = IWL_INVALID_STATION;
3328 u8 static_key;
3329
3330 IWL_DEBUG_MAC80211(priv, "enter\n");
3331
3332 if (iwl3945_mod_params.sw_crypto) {
3333 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3334 return -EOPNOTSUPP;
3335 }
3336
3337 static_key = !iwl_is_associated(priv, IWL_RXON_CTX_BSS);
3338
3339 if (!static_key) {
3340 sta_id = iwl_sta_id_or_broadcast(
3341 priv, &priv->contexts[IWL_RXON_CTX_BSS], sta);
3342 if (sta_id == IWL_INVALID_STATION)
3343 return -EINVAL;
3344 }
3345
3346 mutex_lock(&priv->mutex);
3347 iwl_scan_cancel_timeout(priv, 100);
3348
3349 switch (cmd) {
3350 case SET_KEY:
3351 if (static_key)
3352 ret = iwl3945_set_static_key(priv, key);
3353 else
3354 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3355 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3356 break;
3357 case DISABLE_KEY:
3358 if (static_key)
3359 ret = iwl3945_remove_static_key(priv);
3360 else
3361 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3362 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3363 break;
3364 default:
3365 ret = -EINVAL;
3366 }
3367
3368 mutex_unlock(&priv->mutex);
3369 IWL_DEBUG_MAC80211(priv, "leave\n");
3370
3371 return ret;
3372 }
3373
3374 static int iwl3945_mac_sta_add(struct ieee80211_hw *hw,
3375 struct ieee80211_vif *vif,
3376 struct ieee80211_sta *sta)
3377 {
3378 struct iwl_priv *priv = hw->priv;
3379 struct iwl3945_sta_priv *sta_priv = (void *)sta->drv_priv;
3380 int ret;
3381 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3382 u8 sta_id;
3383
3384 IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3385 sta->addr);
3386 mutex_lock(&priv->mutex);
3387 IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3388 sta->addr);
3389 sta_priv->common.sta_id = IWL_INVALID_STATION;
3390
3391
3392 ret = iwl_add_station_common(priv, &priv->contexts[IWL_RXON_CTX_BSS],
3393 sta->addr, is_ap, sta, &sta_id);
3394 if (ret) {
3395 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3396 sta->addr, ret);
3397 /* Should we return success if return code is EEXIST ? */
3398 mutex_unlock(&priv->mutex);
3399 return ret;
3400 }
3401
3402 sta_priv->common.sta_id = sta_id;
3403
3404 /* Initialize rate scaling */
3405 IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3406 sta->addr);
3407 iwl3945_rs_rate_init(priv, sta, sta_id);
3408 mutex_unlock(&priv->mutex);
3409
3410 return 0;
3411 }
3412
3413 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
3414 unsigned int changed_flags,
3415 unsigned int *total_flags,
3416 u64 multicast)
3417 {
3418 struct iwl_priv *priv = hw->priv;
3419 __le32 filter_or = 0, filter_nand = 0;
3420 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3421
3422 #define CHK(test, flag) do { \
3423 if (*total_flags & (test)) \
3424 filter_or |= (flag); \
3425 else \
3426 filter_nand |= (flag); \
3427 } while (0)
3428
3429 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3430 changed_flags, *total_flags);
3431
3432 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3433 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3434 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3435
3436 #undef CHK
3437
3438 mutex_lock(&priv->mutex);
3439
3440 ctx->staging.filter_flags &= ~filter_nand;
3441 ctx->staging.filter_flags |= filter_or;
3442
3443 /*
3444 * Committing directly here breaks for some reason,
3445 * but we'll eventually commit the filter flags
3446 * change anyway.
3447 */
3448
3449 mutex_unlock(&priv->mutex);
3450
3451 /*
3452 * Receiving all multicast frames is always enabled by the
3453 * default flags setup in iwl_connection_init_rx_config()
3454 * since we currently do not support programming multicast
3455 * filters into the device.
3456 */
3457 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3458 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3459 }
3460
3461
3462 /*****************************************************************************
3463 *
3464 * sysfs attributes
3465 *
3466 *****************************************************************************/
3467
3468 #ifdef CONFIG_IWLWIFI_DEBUG
3469
3470 /*
3471 * The following adds a new attribute to the sysfs representation
3472 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3473 * used for controlling the debug level.
3474 *
3475 * See the level definitions in iwl for details.
3476 *
3477 * The debug_level being managed using sysfs below is a per device debug
3478 * level that is used instead of the global debug level if it (the per
3479 * device debug level) is set.
3480 */
3481 static ssize_t show_debug_level(struct device *d,
3482 struct device_attribute *attr, char *buf)
3483 {
3484 struct iwl_priv *priv = dev_get_drvdata(d);
3485 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3486 }
3487 static ssize_t store_debug_level(struct device *d,
3488 struct device_attribute *attr,
3489 const char *buf, size_t count)
3490 {
3491 struct iwl_priv *priv = dev_get_drvdata(d);
3492 unsigned long val;
3493 int ret;
3494
3495 ret = strict_strtoul(buf, 0, &val);
3496 if (ret)
3497 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
3498 else {
3499 priv->debug_level = val;
3500 if (iwl_alloc_traffic_mem(priv))
3501 IWL_ERR(priv,
3502 "Not enough memory to generate traffic log\n");
3503 }
3504 return strnlen(buf, count);
3505 }
3506
3507 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3508 show_debug_level, store_debug_level);
3509
3510 #endif /* CONFIG_IWLWIFI_DEBUG */
3511
3512 static ssize_t show_temperature(struct device *d,
3513 struct device_attribute *attr, char *buf)
3514 {
3515 struct iwl_priv *priv = dev_get_drvdata(d);
3516
3517 if (!iwl_is_alive(priv))
3518 return -EAGAIN;
3519
3520 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
3521 }
3522
3523 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3524
3525 static ssize_t show_tx_power(struct device *d,
3526 struct device_attribute *attr, char *buf)
3527 {
3528 struct iwl_priv *priv = dev_get_drvdata(d);
3529 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3530 }
3531
3532 static ssize_t store_tx_power(struct device *d,
3533 struct device_attribute *attr,
3534 const char *buf, size_t count)
3535 {
3536 struct iwl_priv *priv = dev_get_drvdata(d);
3537 char *p = (char *)buf;
3538 u32 val;
3539
3540 val = simple_strtoul(p, &p, 10);
3541 if (p == buf)
3542 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
3543 else
3544 iwl3945_hw_reg_set_txpower(priv, val);
3545
3546 return count;
3547 }
3548
3549 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3550
3551 static ssize_t show_flags(struct device *d,
3552 struct device_attribute *attr, char *buf)
3553 {
3554 struct iwl_priv *priv = dev_get_drvdata(d);
3555 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3556
3557 return sprintf(buf, "0x%04X\n", ctx->active.flags);
3558 }
3559
3560 static ssize_t store_flags(struct device *d,
3561 struct device_attribute *attr,
3562 const char *buf, size_t count)
3563 {
3564 struct iwl_priv *priv = dev_get_drvdata(d);
3565 u32 flags = simple_strtoul(buf, NULL, 0);
3566 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3567
3568 mutex_lock(&priv->mutex);
3569 if (le32_to_cpu(ctx->staging.flags) != flags) {
3570 /* Cancel any currently running scans... */
3571 if (iwl_scan_cancel_timeout(priv, 100))
3572 IWL_WARN(priv, "Could not cancel scan.\n");
3573 else {
3574 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
3575 flags);
3576 ctx->staging.flags = cpu_to_le32(flags);
3577 iwlcore_commit_rxon(priv, ctx);
3578 }
3579 }
3580 mutex_unlock(&priv->mutex);
3581
3582 return count;
3583 }
3584
3585 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3586
3587 static ssize_t show_filter_flags(struct device *d,
3588 struct device_attribute *attr, char *buf)
3589 {
3590 struct iwl_priv *priv = dev_get_drvdata(d);
3591 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3592
3593 return sprintf(buf, "0x%04X\n",
3594 le32_to_cpu(ctx->active.filter_flags));
3595 }
3596
3597 static ssize_t store_filter_flags(struct device *d,
3598 struct device_attribute *attr,
3599 const char *buf, size_t count)
3600 {
3601 struct iwl_priv *priv = dev_get_drvdata(d);
3602 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3603 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3604
3605 mutex_lock(&priv->mutex);
3606 if (le32_to_cpu(ctx->staging.filter_flags) != filter_flags) {
3607 /* Cancel any currently running scans... */
3608 if (iwl_scan_cancel_timeout(priv, 100))
3609 IWL_WARN(priv, "Could not cancel scan.\n");
3610 else {
3611 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3612 "0x%04X\n", filter_flags);
3613 ctx->staging.filter_flags =
3614 cpu_to_le32(filter_flags);
3615 iwlcore_commit_rxon(priv, ctx);
3616 }
3617 }
3618 mutex_unlock(&priv->mutex);
3619
3620 return count;
3621 }
3622
3623 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3624 store_filter_flags);
3625
3626 static ssize_t show_measurement(struct device *d,
3627 struct device_attribute *attr, char *buf)
3628 {
3629 struct iwl_priv *priv = dev_get_drvdata(d);
3630 struct iwl_spectrum_notification measure_report;
3631 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3632 u8 *data = (u8 *)&measure_report;
3633 unsigned long flags;
3634
3635 spin_lock_irqsave(&priv->lock, flags);
3636 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3637 spin_unlock_irqrestore(&priv->lock, flags);
3638 return 0;
3639 }
3640 memcpy(&measure_report, &priv->measure_report, size);
3641 priv->measurement_status = 0;
3642 spin_unlock_irqrestore(&priv->lock, flags);
3643
3644 while (size && (PAGE_SIZE - len)) {
3645 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3646 PAGE_SIZE - len, 1);
3647 len = strlen(buf);
3648 if (PAGE_SIZE - len)
3649 buf[len++] = '\n';
3650
3651 ofs += 16;
3652 size -= min(size, 16U);
3653 }
3654
3655 return len;
3656 }
3657
3658 static ssize_t store_measurement(struct device *d,
3659 struct device_attribute *attr,
3660 const char *buf, size_t count)
3661 {
3662 struct iwl_priv *priv = dev_get_drvdata(d);
3663 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3664 struct ieee80211_measurement_params params = {
3665 .channel = le16_to_cpu(ctx->active.channel),
3666 .start_time = cpu_to_le64(priv->_3945.last_tsf),
3667 .duration = cpu_to_le16(1),
3668 };
3669 u8 type = IWL_MEASURE_BASIC;
3670 u8 buffer[32];
3671 u8 channel;
3672
3673 if (count) {
3674 char *p = buffer;
3675 strncpy(buffer, buf, min(sizeof(buffer), count));
3676 channel = simple_strtoul(p, NULL, 0);
3677 if (channel)
3678 params.channel = channel;
3679
3680 p = buffer;
3681 while (*p && *p != ' ')
3682 p++;
3683 if (*p)
3684 type = simple_strtoul(p + 1, NULL, 0);
3685 }
3686
3687 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
3688 "channel %d (for '%s')\n", type, params.channel, buf);
3689 iwl3945_get_measurement(priv, &params, type);
3690
3691 return count;
3692 }
3693
3694 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3695 show_measurement, store_measurement);
3696
3697 static ssize_t store_retry_rate(struct device *d,
3698 struct device_attribute *attr,
3699 const char *buf, size_t count)
3700 {
3701 struct iwl_priv *priv = dev_get_drvdata(d);
3702
3703 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3704 if (priv->retry_rate <= 0)
3705 priv->retry_rate = 1;
3706
3707 return count;
3708 }
3709
3710 static ssize_t show_retry_rate(struct device *d,
3711 struct device_attribute *attr, char *buf)
3712 {
3713 struct iwl_priv *priv = dev_get_drvdata(d);
3714 return sprintf(buf, "%d", priv->retry_rate);
3715 }
3716
3717 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3718 store_retry_rate);
3719
3720
3721 static ssize_t show_channels(struct device *d,
3722 struct device_attribute *attr, char *buf)
3723 {
3724 /* all this shit doesn't belong into sysfs anyway */
3725 return 0;
3726 }
3727
3728 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3729
3730 static ssize_t show_antenna(struct device *d,
3731 struct device_attribute *attr, char *buf)
3732 {
3733 struct iwl_priv *priv = dev_get_drvdata(d);
3734
3735 if (!iwl_is_alive(priv))
3736 return -EAGAIN;
3737
3738 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
3739 }
3740
3741 static ssize_t store_antenna(struct device *d,
3742 struct device_attribute *attr,
3743 const char *buf, size_t count)
3744 {
3745 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
3746 int ant;
3747
3748 if (count == 0)
3749 return 0;
3750
3751 if (sscanf(buf, "%1i", &ant) != 1) {
3752 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
3753 return count;
3754 }
3755
3756 if ((ant >= 0) && (ant <= 2)) {
3757 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
3758 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
3759 } else
3760 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
3761
3762
3763 return count;
3764 }
3765
3766 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
3767
3768 static ssize_t show_status(struct device *d,
3769 struct device_attribute *attr, char *buf)
3770 {
3771 struct iwl_priv *priv = dev_get_drvdata(d);
3772 if (!iwl_is_alive(priv))
3773 return -EAGAIN;
3774 return sprintf(buf, "0x%08x\n", (int)priv->status);
3775 }
3776
3777 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3778
3779 static ssize_t dump_error_log(struct device *d,
3780 struct device_attribute *attr,
3781 const char *buf, size_t count)
3782 {
3783 struct iwl_priv *priv = dev_get_drvdata(d);
3784 char *p = (char *)buf;
3785
3786 if (p[0] == '1')
3787 iwl3945_dump_nic_error_log(priv);
3788
3789 return strnlen(buf, count);
3790 }
3791
3792 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
3793
3794 /*****************************************************************************
3795 *
3796 * driver setup and tear down
3797 *
3798 *****************************************************************************/
3799
3800 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
3801 {
3802 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3803
3804 init_waitqueue_head(&priv->wait_command_queue);
3805
3806 INIT_WORK(&priv->restart, iwl3945_bg_restart);
3807 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
3808 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
3809 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
3810 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
3811 INIT_DELAYED_WORK(&priv->_3945.rfkill_poll, iwl3945_rfkill_poll);
3812
3813 iwl_setup_scan_deferred_work(priv);
3814
3815 iwl3945_hw_setup_deferred_work(priv);
3816
3817 if (priv->cfg->ops->lib->recover_from_tx_stall) {
3818 init_timer(&priv->monitor_recover);
3819 priv->monitor_recover.data = (unsigned long)priv;
3820 priv->monitor_recover.function =
3821 priv->cfg->ops->lib->recover_from_tx_stall;
3822 }
3823
3824 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3825 iwl3945_irq_tasklet, (unsigned long)priv);
3826 }
3827
3828 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
3829 {
3830 iwl3945_hw_cancel_deferred_work(priv);
3831
3832 cancel_delayed_work_sync(&priv->init_alive_start);
3833 cancel_delayed_work(&priv->scan_check);
3834 cancel_delayed_work(&priv->alive_start);
3835 cancel_work_sync(&priv->start_internal_scan);
3836 cancel_work_sync(&priv->beacon_update);
3837 }
3838
3839 static struct attribute *iwl3945_sysfs_entries[] = {
3840 &dev_attr_antenna.attr,
3841 &dev_attr_channels.attr,
3842 &dev_attr_dump_errors.attr,
3843 &dev_attr_flags.attr,
3844 &dev_attr_filter_flags.attr,
3845 &dev_attr_measurement.attr,
3846 &dev_attr_retry_rate.attr,
3847 &dev_attr_status.attr,
3848 &dev_attr_temperature.attr,
3849 &dev_attr_tx_power.attr,
3850 #ifdef CONFIG_IWLWIFI_DEBUG
3851 &dev_attr_debug_level.attr,
3852 #endif
3853 NULL
3854 };
3855
3856 static struct attribute_group iwl3945_attribute_group = {
3857 .name = NULL, /* put in device directory */
3858 .attrs = iwl3945_sysfs_entries,
3859 };
3860
3861 static struct ieee80211_ops iwl3945_hw_ops = {
3862 .tx = iwl3945_mac_tx,
3863 .start = iwl3945_mac_start,
3864 .stop = iwl3945_mac_stop,
3865 .add_interface = iwl_mac_add_interface,
3866 .remove_interface = iwl_mac_remove_interface,
3867 .config = iwl_mac_config,
3868 .configure_filter = iwl3945_configure_filter,
3869 .set_key = iwl3945_mac_set_key,
3870 .conf_tx = iwl_mac_conf_tx,
3871 .reset_tsf = iwl_mac_reset_tsf,
3872 .bss_info_changed = iwl_bss_info_changed,
3873 .hw_scan = iwl_mac_hw_scan,
3874 .sta_add = iwl3945_mac_sta_add,
3875 .sta_remove = iwl_mac_sta_remove,
3876 .tx_last_beacon = iwl_mac_tx_last_beacon,
3877 };
3878
3879 static int iwl3945_init_drv(struct iwl_priv *priv)
3880 {
3881 int ret;
3882 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
3883
3884 priv->retry_rate = 1;
3885 priv->ibss_beacon = NULL;
3886
3887 spin_lock_init(&priv->sta_lock);
3888 spin_lock_init(&priv->hcmd_lock);
3889
3890 INIT_LIST_HEAD(&priv->free_frames);
3891
3892 mutex_init(&priv->mutex);
3893 mutex_init(&priv->sync_cmd_mutex);
3894
3895 priv->ieee_channels = NULL;
3896 priv->ieee_rates = NULL;
3897 priv->band = IEEE80211_BAND_2GHZ;
3898
3899 priv->iw_mode = NL80211_IFTYPE_STATION;
3900 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3901
3902 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
3903
3904 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3905 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
3906 eeprom->version);
3907 ret = -EINVAL;
3908 goto err;
3909 }
3910 ret = iwl_init_channel_map(priv);
3911 if (ret) {
3912 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3913 goto err;
3914 }
3915
3916 /* Set up txpower settings in driver for all channels */
3917 if (iwl3945_txpower_set_from_eeprom(priv)) {
3918 ret = -EIO;
3919 goto err_free_channel_map;
3920 }
3921
3922 ret = iwlcore_init_geos(priv);
3923 if (ret) {
3924 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3925 goto err_free_channel_map;
3926 }
3927 iwl3945_init_hw_rates(priv, priv->ieee_rates);
3928
3929 return 0;
3930
3931 err_free_channel_map:
3932 iwl_free_channel_map(priv);
3933 err:
3934 return ret;
3935 }
3936
3937 #define IWL3945_MAX_PROBE_REQUEST 200
3938
3939 static int iwl3945_setup_mac(struct iwl_priv *priv)
3940 {
3941 int ret;
3942 struct ieee80211_hw *hw = priv->hw;
3943
3944 hw->rate_control_algorithm = "iwl-3945-rs";
3945 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
3946 hw->vif_data_size = sizeof(struct iwl_vif_priv);
3947
3948 /* Tell mac80211 our characteristics */
3949 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3950 IEEE80211_HW_SPECTRUM_MGMT;
3951
3952 if (!priv->cfg->broken_powersave)
3953 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3954 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3955
3956 hw->wiphy->interface_modes =
3957 BIT(NL80211_IFTYPE_STATION) |
3958 BIT(NL80211_IFTYPE_ADHOC);
3959
3960 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3961 WIPHY_FLAG_DISABLE_BEACON_HINTS;
3962
3963 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3964 /* we create the 802.11 header and a zero-length SSID element */
3965 hw->wiphy->max_scan_ie_len = IWL3945_MAX_PROBE_REQUEST - 24 - 2;
3966
3967 /* Default value; 4 EDCA QOS priorities */
3968 hw->queues = 4;
3969
3970 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3971 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3972 &priv->bands[IEEE80211_BAND_2GHZ];
3973
3974 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3975 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3976 &priv->bands[IEEE80211_BAND_5GHZ];
3977
3978 ret = ieee80211_register_hw(priv->hw);
3979 if (ret) {
3980 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3981 return ret;
3982 }
3983 priv->mac80211_registered = 1;
3984
3985 return 0;
3986 }
3987
3988 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3989 {
3990 int err = 0, i;
3991 struct iwl_priv *priv;
3992 struct ieee80211_hw *hw;
3993 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3994 struct iwl3945_eeprom *eeprom;
3995 unsigned long flags;
3996
3997 /***********************
3998 * 1. Allocating HW data
3999 * ********************/
4000
4001 /* mac80211 allocates memory for this device instance, including
4002 * space for this driver's private structure */
4003 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
4004 if (hw == NULL) {
4005 pr_err("Can not allocate network device\n");
4006 err = -ENOMEM;
4007 goto out;
4008 }
4009 priv = hw->priv;
4010 SET_IEEE80211_DEV(hw, &pdev->dev);
4011
4012 priv->cmd_queue = IWL39_CMD_QUEUE_NUM;
4013
4014 /* 3945 has only one valid context */
4015 priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
4016
4017 for (i = 0; i < NUM_IWL_RXON_CTX; i++)
4018 priv->contexts[i].ctxid = i;
4019
4020 priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
4021 priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
4022 priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
4023 priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
4024 priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
4025 priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
4026
4027 /*
4028 * Disabling hardware scan means that mac80211 will perform scans
4029 * "the hard way", rather than using device's scan.
4030 */
4031 if (iwl3945_mod_params.disable_hw_scan) {
4032 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
4033 iwl3945_hw_ops.hw_scan = NULL;
4034 }
4035
4036
4037 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
4038 priv->cfg = cfg;
4039 priv->pci_dev = pdev;
4040 priv->inta_mask = CSR_INI_SET_MASK;
4041
4042 if (iwl_alloc_traffic_mem(priv))
4043 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
4044
4045 /***************************
4046 * 2. Initializing PCI bus
4047 * *************************/
4048 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
4049 PCIE_LINK_STATE_CLKPM);
4050
4051 if (pci_enable_device(pdev)) {
4052 err = -ENODEV;
4053 goto out_ieee80211_free_hw;
4054 }
4055
4056 pci_set_master(pdev);
4057
4058 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4059 if (!err)
4060 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4061 if (err) {
4062 IWL_WARN(priv, "No suitable DMA available.\n");
4063 goto out_pci_disable_device;
4064 }
4065
4066 pci_set_drvdata(pdev, priv);
4067 err = pci_request_regions(pdev, DRV_NAME);
4068 if (err)
4069 goto out_pci_disable_device;
4070
4071 /***********************
4072 * 3. Read REV Register
4073 * ********************/
4074 priv->hw_base = pci_iomap(pdev, 0, 0);
4075 if (!priv->hw_base) {
4076 err = -ENODEV;
4077 goto out_pci_release_regions;
4078 }
4079
4080 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4081 (unsigned long long) pci_resource_len(pdev, 0));
4082 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4083
4084 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4085 * PCI Tx retries from interfering with C3 CPU state */
4086 pci_write_config_byte(pdev, 0x41, 0x00);
4087
4088 /* these spin locks will be used in apm_ops.init and EEPROM access
4089 * we should init now
4090 */
4091 spin_lock_init(&priv->reg_lock);
4092 spin_lock_init(&priv->lock);
4093
4094 /*
4095 * stop and reset the on-board processor just in case it is in a
4096 * strange state ... like being left stranded by a primary kernel
4097 * and this is now the kdump kernel trying to start up
4098 */
4099 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4100
4101 /***********************
4102 * 4. Read EEPROM
4103 * ********************/
4104
4105 /* Read the EEPROM */
4106 err = iwl_eeprom_init(priv);
4107 if (err) {
4108 IWL_ERR(priv, "Unable to init EEPROM\n");
4109 goto out_iounmap;
4110 }
4111 /* MAC Address location in EEPROM same for 3945/4965 */
4112 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
4113 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", eeprom->mac_address);
4114 SET_IEEE80211_PERM_ADDR(priv->hw, eeprom->mac_address);
4115
4116 /***********************
4117 * 5. Setup HW Constants
4118 * ********************/
4119 /* Device-specific setup */
4120 if (iwl3945_hw_set_hw_params(priv)) {
4121 IWL_ERR(priv, "failed to set hw settings\n");
4122 goto out_eeprom_free;
4123 }
4124
4125 /***********************
4126 * 6. Setup priv
4127 * ********************/
4128
4129 err = iwl3945_init_drv(priv);
4130 if (err) {
4131 IWL_ERR(priv, "initializing driver failed\n");
4132 goto out_unset_hw_params;
4133 }
4134
4135 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4136 priv->cfg->name);
4137
4138 /***********************
4139 * 7. Setup Services
4140 * ********************/
4141
4142 spin_lock_irqsave(&priv->lock, flags);
4143 iwl_disable_interrupts(priv);
4144 spin_unlock_irqrestore(&priv->lock, flags);
4145
4146 pci_enable_msi(priv->pci_dev);
4147
4148 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4149 IRQF_SHARED, DRV_NAME, priv);
4150 if (err) {
4151 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4152 goto out_disable_msi;
4153 }
4154
4155 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4156 if (err) {
4157 IWL_ERR(priv, "failed to create sysfs device attributes\n");
4158 goto out_release_irq;
4159 }
4160
4161 iwl_set_rxon_channel(priv,
4162 &priv->bands[IEEE80211_BAND_2GHZ].channels[5],
4163 &priv->contexts[IWL_RXON_CTX_BSS]);
4164 iwl3945_setup_deferred_work(priv);
4165 iwl3945_setup_rx_handlers(priv);
4166 iwl_power_initialize(priv);
4167
4168 /*********************************
4169 * 8. Setup and Register mac80211
4170 * *******************************/
4171
4172 iwl_enable_interrupts(priv);
4173
4174 err = iwl3945_setup_mac(priv);
4175 if (err)
4176 goto out_remove_sysfs;
4177
4178 err = iwl_dbgfs_register(priv, DRV_NAME);
4179 if (err)
4180 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
4181
4182 /* Start monitoring the killswitch */
4183 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
4184 2 * HZ);
4185
4186 return 0;
4187
4188 out_remove_sysfs:
4189 destroy_workqueue(priv->workqueue);
4190 priv->workqueue = NULL;
4191 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4192 out_release_irq:
4193 free_irq(priv->pci_dev->irq, priv);
4194 out_disable_msi:
4195 pci_disable_msi(priv->pci_dev);
4196 iwlcore_free_geos(priv);
4197 iwl_free_channel_map(priv);
4198 out_unset_hw_params:
4199 iwl3945_unset_hw_params(priv);
4200 out_eeprom_free:
4201 iwl_eeprom_free(priv);
4202 out_iounmap:
4203 pci_iounmap(pdev, priv->hw_base);
4204 out_pci_release_regions:
4205 pci_release_regions(pdev);
4206 out_pci_disable_device:
4207 pci_set_drvdata(pdev, NULL);
4208 pci_disable_device(pdev);
4209 out_ieee80211_free_hw:
4210 iwl_free_traffic_mem(priv);
4211 ieee80211_free_hw(priv->hw);
4212 out:
4213 return err;
4214 }
4215
4216 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
4217 {
4218 struct iwl_priv *priv = pci_get_drvdata(pdev);
4219 unsigned long flags;
4220
4221 if (!priv)
4222 return;
4223
4224 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4225
4226 iwl_dbgfs_unregister(priv);
4227
4228 set_bit(STATUS_EXIT_PENDING, &priv->status);
4229
4230 if (priv->mac80211_registered) {
4231 ieee80211_unregister_hw(priv->hw);
4232 priv->mac80211_registered = 0;
4233 } else {
4234 iwl3945_down(priv);
4235 }
4236
4237 /*
4238 * Make sure device is reset to low power before unloading driver.
4239 * This may be redundant with iwl_down(), but there are paths to
4240 * run iwl_down() without calling apm_ops.stop(), and there are
4241 * paths to avoid running iwl_down() at all before leaving driver.
4242 * This (inexpensive) call *makes sure* device is reset.
4243 */
4244 priv->cfg->ops->lib->apm_ops.stop(priv);
4245
4246 /* make sure we flush any pending irq or
4247 * tasklet for the driver
4248 */
4249 spin_lock_irqsave(&priv->lock, flags);
4250 iwl_disable_interrupts(priv);
4251 spin_unlock_irqrestore(&priv->lock, flags);
4252
4253 iwl_synchronize_irq(priv);
4254
4255 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4256
4257 cancel_delayed_work_sync(&priv->_3945.rfkill_poll);
4258
4259 iwl3945_dealloc_ucode_pci(priv);
4260
4261 if (priv->rxq.bd)
4262 iwl3945_rx_queue_free(priv, &priv->rxq);
4263 iwl3945_hw_txq_ctx_free(priv);
4264
4265 iwl3945_unset_hw_params(priv);
4266
4267 /*netif_stop_queue(dev); */
4268 flush_workqueue(priv->workqueue);
4269
4270 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
4271 * priv->workqueue... so we can't take down the workqueue
4272 * until now... */
4273 destroy_workqueue(priv->workqueue);
4274 priv->workqueue = NULL;
4275 iwl_free_traffic_mem(priv);
4276
4277 free_irq(pdev->irq, priv);
4278 pci_disable_msi(pdev);
4279
4280 pci_iounmap(pdev, priv->hw_base);
4281 pci_release_regions(pdev);
4282 pci_disable_device(pdev);
4283 pci_set_drvdata(pdev, NULL);
4284
4285 iwl_free_channel_map(priv);
4286 iwlcore_free_geos(priv);
4287 kfree(priv->scan_cmd);
4288 if (priv->ibss_beacon)
4289 dev_kfree_skb(priv->ibss_beacon);
4290
4291 ieee80211_free_hw(priv->hw);
4292 }
4293
4294
4295 /*****************************************************************************
4296 *
4297 * driver and module entry point
4298 *
4299 *****************************************************************************/
4300
4301 static struct pci_driver iwl3945_driver = {
4302 .name = DRV_NAME,
4303 .id_table = iwl3945_hw_card_ids,
4304 .probe = iwl3945_pci_probe,
4305 .remove = __devexit_p(iwl3945_pci_remove),
4306 #ifdef CONFIG_PM
4307 .suspend = iwl_pci_suspend,
4308 .resume = iwl_pci_resume,
4309 #endif
4310 };
4311
4312 static int __init iwl3945_init(void)
4313 {
4314
4315 int ret;
4316 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4317 pr_info(DRV_COPYRIGHT "\n");
4318
4319 ret = iwl3945_rate_control_register();
4320 if (ret) {
4321 pr_err("Unable to register rate control algorithm: %d\n", ret);
4322 return ret;
4323 }
4324
4325 ret = pci_register_driver(&iwl3945_driver);
4326 if (ret) {
4327 pr_err("Unable to initialize PCI module\n");
4328 goto error_register;
4329 }
4330
4331 return ret;
4332
4333 error_register:
4334 iwl3945_rate_control_unregister();
4335 return ret;
4336 }
4337
4338 static void __exit iwl3945_exit(void)
4339 {
4340 pci_unregister_driver(&iwl3945_driver);
4341 iwl3945_rate_control_unregister();
4342 }
4343
4344 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
4345
4346 module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
4347 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4348 module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
4349 MODULE_PARM_DESC(swcrypto,
4350 "using software crypto (default 1 [software])\n");
4351 #ifdef CONFIG_IWLWIFI_DEBUG
4352 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4353 MODULE_PARM_DESC(debug, "debug output mask");
4354 #endif
4355 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
4356 int, S_IRUGO);
4357 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4358 module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
4359 MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4360
4361 module_exit(iwl3945_exit);
4362 module_init(iwl3945_init);
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