Merge tag 'gpio-for-v3.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw...
[linux-2.6.git] / drivers / rtc / rtc-omap.c
blobc6ffbaec32a4b509609fe03dad3e57b2db16e439
1 /*
2 * TI OMAP1 Real Time Clock interface for Linux
4 * Copyright (C) 2003 MontaVista Software, Inc.
5 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
7 * Copyright (C) 2006 David Brownell (new RTC framework)
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/ioport.h>
19 #include <linux/delay.h>
20 #include <linux/rtc.h>
21 #include <linux/bcd.h>
22 #include <linux/platform_device.h>
23 #include <linux/of.h>
24 #include <linux/of_device.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/io.h>
28 /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
29 * with century-range alarm matching, driven by the 32kHz clock.
31 * The main user-visible ways it differs from PC RTCs are by omitting
32 * "don't care" alarm fields and sub-second periodic IRQs, and having
33 * an autoadjust mechanism to calibrate to the true oscillator rate.
35 * Board-specific wiring options include using split power mode with
36 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
37 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
38 * low power modes) for OMAP1 boards (OMAP-L138 has this built into
39 * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
42 #define DRIVER_NAME "omap_rtc"
44 #define OMAP_RTC_BASE 0xfffb4800
46 /* RTC registers */
47 #define OMAP_RTC_SECONDS_REG 0x00
48 #define OMAP_RTC_MINUTES_REG 0x04
49 #define OMAP_RTC_HOURS_REG 0x08
50 #define OMAP_RTC_DAYS_REG 0x0C
51 #define OMAP_RTC_MONTHS_REG 0x10
52 #define OMAP_RTC_YEARS_REG 0x14
53 #define OMAP_RTC_WEEKS_REG 0x18
55 #define OMAP_RTC_ALARM_SECONDS_REG 0x20
56 #define OMAP_RTC_ALARM_MINUTES_REG 0x24
57 #define OMAP_RTC_ALARM_HOURS_REG 0x28
58 #define OMAP_RTC_ALARM_DAYS_REG 0x2c
59 #define OMAP_RTC_ALARM_MONTHS_REG 0x30
60 #define OMAP_RTC_ALARM_YEARS_REG 0x34
62 #define OMAP_RTC_CTRL_REG 0x40
63 #define OMAP_RTC_STATUS_REG 0x44
64 #define OMAP_RTC_INTERRUPTS_REG 0x48
66 #define OMAP_RTC_COMP_LSB_REG 0x4c
67 #define OMAP_RTC_COMP_MSB_REG 0x50
68 #define OMAP_RTC_OSC_REG 0x54
70 #define OMAP_RTC_KICK0_REG 0x6c
71 #define OMAP_RTC_KICK1_REG 0x70
73 /* OMAP_RTC_CTRL_REG bit fields: */
74 #define OMAP_RTC_CTRL_SPLIT (1<<7)
75 #define OMAP_RTC_CTRL_DISABLE (1<<6)
76 #define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5)
77 #define OMAP_RTC_CTRL_TEST (1<<4)
78 #define OMAP_RTC_CTRL_MODE_12_24 (1<<3)
79 #define OMAP_RTC_CTRL_AUTO_COMP (1<<2)
80 #define OMAP_RTC_CTRL_ROUND_30S (1<<1)
81 #define OMAP_RTC_CTRL_STOP (1<<0)
83 /* OMAP_RTC_STATUS_REG bit fields: */
84 #define OMAP_RTC_STATUS_POWER_UP (1<<7)
85 #define OMAP_RTC_STATUS_ALARM (1<<6)
86 #define OMAP_RTC_STATUS_1D_EVENT (1<<5)
87 #define OMAP_RTC_STATUS_1H_EVENT (1<<4)
88 #define OMAP_RTC_STATUS_1M_EVENT (1<<3)
89 #define OMAP_RTC_STATUS_1S_EVENT (1<<2)
90 #define OMAP_RTC_STATUS_RUN (1<<1)
91 #define OMAP_RTC_STATUS_BUSY (1<<0)
93 /* OMAP_RTC_INTERRUPTS_REG bit fields: */
94 #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3)
95 #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2)
97 /* OMAP_RTC_KICKER values */
98 #define KICK0_VALUE 0x83e70b13
99 #define KICK1_VALUE 0x95a4f1e0
101 #define OMAP_RTC_HAS_KICKER 0x1
103 static void __iomem *rtc_base;
105 #define rtc_read(addr) readb(rtc_base + (addr))
106 #define rtc_write(val, addr) writeb(val, rtc_base + (addr))
108 #define rtc_writel(val, addr) writel(val, rtc_base + (addr))
111 /* we rely on the rtc framework to handle locking (rtc->ops_lock),
112 * so the only other requirement is that register accesses which
113 * require BUSY to be clear are made with IRQs locally disabled
115 static void rtc_wait_not_busy(void)
117 int count = 0;
118 u8 status;
120 /* BUSY may stay active for 1/32768 second (~30 usec) */
121 for (count = 0; count < 50; count++) {
122 status = rtc_read(OMAP_RTC_STATUS_REG);
123 if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
124 break;
125 udelay(1);
127 /* now we have ~15 usec to read/write various registers */
130 static irqreturn_t rtc_irq(int irq, void *rtc)
132 unsigned long events = 0;
133 u8 irq_data;
135 irq_data = rtc_read(OMAP_RTC_STATUS_REG);
137 /* alarm irq? */
138 if (irq_data & OMAP_RTC_STATUS_ALARM) {
139 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
140 events |= RTC_IRQF | RTC_AF;
143 /* 1/sec periodic/update irq? */
144 if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
145 events |= RTC_IRQF | RTC_UF;
147 rtc_update_irq(rtc, 1, events);
149 return IRQ_HANDLED;
152 static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
154 u8 reg;
156 local_irq_disable();
157 rtc_wait_not_busy();
158 reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
159 if (enabled)
160 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
161 else
162 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
163 rtc_wait_not_busy();
164 rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
165 local_irq_enable();
167 return 0;
170 /* this hardware doesn't support "don't care" alarm fields */
171 static int tm2bcd(struct rtc_time *tm)
173 if (rtc_valid_tm(tm) != 0)
174 return -EINVAL;
176 tm->tm_sec = bin2bcd(tm->tm_sec);
177 tm->tm_min = bin2bcd(tm->tm_min);
178 tm->tm_hour = bin2bcd(tm->tm_hour);
179 tm->tm_mday = bin2bcd(tm->tm_mday);
181 tm->tm_mon = bin2bcd(tm->tm_mon + 1);
183 /* epoch == 1900 */
184 if (tm->tm_year < 100 || tm->tm_year > 199)
185 return -EINVAL;
186 tm->tm_year = bin2bcd(tm->tm_year - 100);
188 return 0;
191 static void bcd2tm(struct rtc_time *tm)
193 tm->tm_sec = bcd2bin(tm->tm_sec);
194 tm->tm_min = bcd2bin(tm->tm_min);
195 tm->tm_hour = bcd2bin(tm->tm_hour);
196 tm->tm_mday = bcd2bin(tm->tm_mday);
197 tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
198 /* epoch == 1900 */
199 tm->tm_year = bcd2bin(tm->tm_year) + 100;
203 static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
205 /* we don't report wday/yday/isdst ... */
206 local_irq_disable();
207 rtc_wait_not_busy();
209 tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
210 tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
211 tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
212 tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
213 tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
214 tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
216 local_irq_enable();
218 bcd2tm(tm);
219 return 0;
222 static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
224 if (tm2bcd(tm) < 0)
225 return -EINVAL;
226 local_irq_disable();
227 rtc_wait_not_busy();
229 rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
230 rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
231 rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
232 rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
233 rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
234 rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
236 local_irq_enable();
238 return 0;
241 static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
243 local_irq_disable();
244 rtc_wait_not_busy();
246 alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
247 alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
248 alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
249 alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
250 alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
251 alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
253 local_irq_enable();
255 bcd2tm(&alm->time);
256 alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
257 & OMAP_RTC_INTERRUPTS_IT_ALARM);
259 return 0;
262 static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
264 u8 reg;
266 if (tm2bcd(&alm->time) < 0)
267 return -EINVAL;
269 local_irq_disable();
270 rtc_wait_not_busy();
272 rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
273 rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
274 rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
275 rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
276 rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
277 rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
279 reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
280 if (alm->enabled)
281 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
282 else
283 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
284 rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
286 local_irq_enable();
288 return 0;
291 static struct rtc_class_ops omap_rtc_ops = {
292 .read_time = omap_rtc_read_time,
293 .set_time = omap_rtc_set_time,
294 .read_alarm = omap_rtc_read_alarm,
295 .set_alarm = omap_rtc_set_alarm,
296 .alarm_irq_enable = omap_rtc_alarm_irq_enable,
299 static int omap_rtc_alarm;
300 static int omap_rtc_timer;
302 #define OMAP_RTC_DATA_DA830_IDX 1
304 static struct platform_device_id omap_rtc_devtype[] = {
306 .name = DRIVER_NAME,
307 }, {
308 .name = "da830-rtc",
309 .driver_data = OMAP_RTC_HAS_KICKER,
313 MODULE_DEVICE_TABLE(platform, omap_rtc_devtype);
315 static const struct of_device_id omap_rtc_of_match[] = {
316 { .compatible = "ti,da830-rtc",
317 .data = &omap_rtc_devtype[OMAP_RTC_DATA_DA830_IDX],
321 MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
323 static int __init omap_rtc_probe(struct platform_device *pdev)
325 struct resource *res;
326 struct rtc_device *rtc;
327 u8 reg, new_ctrl;
328 const struct platform_device_id *id_entry;
329 const struct of_device_id *of_id;
331 of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
332 if (of_id)
333 pdev->id_entry = of_id->data;
335 omap_rtc_timer = platform_get_irq(pdev, 0);
336 if (omap_rtc_timer <= 0) {
337 pr_debug("%s: no update irq?\n", pdev->name);
338 return -ENOENT;
341 omap_rtc_alarm = platform_get_irq(pdev, 1);
342 if (omap_rtc_alarm <= 0) {
343 pr_debug("%s: no alarm irq?\n", pdev->name);
344 return -ENOENT;
347 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
348 rtc_base = devm_ioremap_resource(&pdev->dev, res);
349 if (IS_ERR(rtc_base))
350 return PTR_ERR(rtc_base);
352 /* Enable the clock/module so that we can access the registers */
353 pm_runtime_enable(&pdev->dev);
354 pm_runtime_get_sync(&pdev->dev);
356 id_entry = platform_get_device_id(pdev);
357 if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER)) {
358 rtc_writel(KICK0_VALUE, OMAP_RTC_KICK0_REG);
359 rtc_writel(KICK1_VALUE, OMAP_RTC_KICK1_REG);
362 rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
363 &omap_rtc_ops, THIS_MODULE);
364 if (IS_ERR(rtc)) {
365 pr_debug("%s: can't register RTC device, err %ld\n",
366 pdev->name, PTR_ERR(rtc));
367 goto fail0;
369 platform_set_drvdata(pdev, rtc);
371 /* clear pending irqs, and set 1/second periodic,
372 * which we'll use instead of update irqs
374 rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
376 /* clear old status */
377 reg = rtc_read(OMAP_RTC_STATUS_REG);
378 if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
379 pr_info("%s: RTC power up reset detected\n",
380 pdev->name);
381 rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
383 if (reg & (u8) OMAP_RTC_STATUS_ALARM)
384 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
386 /* handle periodic and alarm irqs */
387 if (devm_request_irq(&pdev->dev, omap_rtc_timer, rtc_irq, 0,
388 dev_name(&rtc->dev), rtc)) {
389 pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
390 pdev->name, omap_rtc_timer);
391 goto fail0;
393 if ((omap_rtc_timer != omap_rtc_alarm) &&
394 (devm_request_irq(&pdev->dev, omap_rtc_alarm, rtc_irq, 0,
395 dev_name(&rtc->dev), rtc))) {
396 pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
397 pdev->name, omap_rtc_alarm);
398 goto fail0;
401 /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
402 reg = rtc_read(OMAP_RTC_CTRL_REG);
403 if (reg & (u8) OMAP_RTC_CTRL_STOP)
404 pr_info("%s: already running\n", pdev->name);
406 /* force to 24 hour mode */
407 new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
408 new_ctrl |= OMAP_RTC_CTRL_STOP;
410 /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
412 * - Device wake-up capability setting should come through chip
413 * init logic. OMAP1 boards should initialize the "wakeup capable"
414 * flag in the platform device if the board is wired right for
415 * being woken up by RTC alarm. For OMAP-L138, this capability
416 * is built into the SoC by the "Deep Sleep" capability.
418 * - Boards wired so RTC_ON_nOFF is used as the reset signal,
419 * rather than nPWRON_RESET, should forcibly enable split
420 * power mode. (Some chip errata report that RTC_CTRL_SPLIT
421 * is write-only, and always reads as zero...)
424 device_init_wakeup(&pdev->dev, true);
426 if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
427 pr_info("%s: split power mode\n", pdev->name);
429 if (reg != new_ctrl)
430 rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
432 return 0;
434 fail0:
435 if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER))
436 rtc_writel(0, OMAP_RTC_KICK0_REG);
437 pm_runtime_put_sync(&pdev->dev);
438 pm_runtime_disable(&pdev->dev);
439 return -EIO;
442 static int __exit omap_rtc_remove(struct platform_device *pdev)
444 const struct platform_device_id *id_entry =
445 platform_get_device_id(pdev);
447 device_init_wakeup(&pdev->dev, 0);
449 /* leave rtc running, but disable irqs */
450 rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
452 if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER))
453 rtc_writel(0, OMAP_RTC_KICK0_REG);
455 /* Disable the clock/module */
456 pm_runtime_put_sync(&pdev->dev);
457 pm_runtime_disable(&pdev->dev);
459 return 0;
462 #ifdef CONFIG_PM_SLEEP
463 static u8 irqstat;
465 static int omap_rtc_suspend(struct device *dev)
467 irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
469 /* FIXME the RTC alarm is not currently acting as a wakeup event
470 * source, and in fact this enable() call is just saving a flag
471 * that's never used...
473 if (device_may_wakeup(dev))
474 enable_irq_wake(omap_rtc_alarm);
475 else
476 rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
478 /* Disable the clock/module */
479 pm_runtime_put_sync(dev);
481 return 0;
484 static int omap_rtc_resume(struct device *dev)
486 /* Enable the clock/module so that we can access the registers */
487 pm_runtime_get_sync(dev);
489 if (device_may_wakeup(dev))
490 disable_irq_wake(omap_rtc_alarm);
491 else
492 rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
493 return 0;
495 #endif
497 static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops, omap_rtc_suspend, omap_rtc_resume);
499 static void omap_rtc_shutdown(struct platform_device *pdev)
501 rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
504 MODULE_ALIAS("platform:omap_rtc");
505 static struct platform_driver omap_rtc_driver = {
506 .remove = __exit_p(omap_rtc_remove),
507 .shutdown = omap_rtc_shutdown,
508 .driver = {
509 .name = DRIVER_NAME,
510 .owner = THIS_MODULE,
511 .pm = &omap_rtc_pm_ops,
512 .of_match_table = of_match_ptr(omap_rtc_of_match),
514 .id_table = omap_rtc_devtype,
517 module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe);
519 MODULE_AUTHOR("George G. Davis (and others)");
520 MODULE_LICENSE("GPL");