Merge tag 'gpio-for-v3.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw...
[linux-2.6.git] / drivers / rtc / rtc-cmos.c
blobbe06d7150de5d4b81f6c84e9c5cc874e26360e70
1 /*
2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/platform_device.h>
37 #include <linux/mod_devicetable.h>
38 #include <linux/log2.h>
39 #include <linux/pm.h>
40 #include <linux/of.h>
41 #include <linux/of_platform.h>
43 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
44 #include <asm-generic/rtc.h>
46 struct cmos_rtc {
47 struct rtc_device *rtc;
48 struct device *dev;
49 int irq;
50 struct resource *iomem;
52 void (*wake_on)(struct device *);
53 void (*wake_off)(struct device *);
55 u8 enabled_wake;
56 u8 suspend_ctrl;
58 /* newer hardware extends the original register set */
59 u8 day_alrm;
60 u8 mon_alrm;
61 u8 century;
64 /* both platform and pnp busses use negative numbers for invalid irqs */
65 #define is_valid_irq(n) ((n) > 0)
67 static const char driver_name[] = "rtc_cmos";
69 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
70 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
71 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
73 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
75 static inline int is_intr(u8 rtc_intr)
77 if (!(rtc_intr & RTC_IRQF))
78 return 0;
79 return rtc_intr & RTC_IRQMASK;
82 /*----------------------------------------------------------------*/
84 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
85 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
86 * used in a broken "legacy replacement" mode. The breakage includes
87 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
88 * other (better) use.
90 * When that broken mode is in use, platform glue provides a partial
91 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
92 * want to use HPET for anything except those IRQs though...
94 #ifdef CONFIG_HPET_EMULATE_RTC
95 #include <asm/hpet.h>
96 #else
98 static inline int is_hpet_enabled(void)
100 return 0;
103 static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
105 return 0;
108 static inline int hpet_set_rtc_irq_bit(unsigned long mask)
110 return 0;
113 static inline int
114 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
116 return 0;
119 static inline int hpet_set_periodic_freq(unsigned long freq)
121 return 0;
124 static inline int hpet_rtc_dropped_irq(void)
126 return 0;
129 static inline int hpet_rtc_timer_init(void)
131 return 0;
134 extern irq_handler_t hpet_rtc_interrupt;
136 static inline int hpet_register_irq_handler(irq_handler_t handler)
138 return 0;
141 static inline int hpet_unregister_irq_handler(irq_handler_t handler)
143 return 0;
146 #endif
148 /*----------------------------------------------------------------*/
150 #ifdef RTC_PORT
152 /* Most newer x86 systems have two register banks, the first used
153 * for RTC and NVRAM and the second only for NVRAM. Caller must
154 * own rtc_lock ... and we won't worry about access during NMI.
156 #define can_bank2 true
158 static inline unsigned char cmos_read_bank2(unsigned char addr)
160 outb(addr, RTC_PORT(2));
161 return inb(RTC_PORT(3));
164 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
166 outb(addr, RTC_PORT(2));
167 outb(val, RTC_PORT(3));
170 #else
172 #define can_bank2 false
174 static inline unsigned char cmos_read_bank2(unsigned char addr)
176 return 0;
179 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
183 #endif
185 /*----------------------------------------------------------------*/
187 static int cmos_read_time(struct device *dev, struct rtc_time *t)
189 /* REVISIT: if the clock has a "century" register, use
190 * that instead of the heuristic in get_rtc_time().
191 * That'll make Y3K compatility (year > 2070) easy!
193 get_rtc_time(t);
194 return 0;
197 static int cmos_set_time(struct device *dev, struct rtc_time *t)
199 /* REVISIT: set the "century" register if available
201 * NOTE: this ignores the issue whereby updating the seconds
202 * takes effect exactly 500ms after we write the register.
203 * (Also queueing and other delays before we get this far.)
205 return set_rtc_time(t);
208 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
210 struct cmos_rtc *cmos = dev_get_drvdata(dev);
211 unsigned char rtc_control;
213 if (!is_valid_irq(cmos->irq))
214 return -EIO;
216 /* Basic alarms only support hour, minute, and seconds fields.
217 * Some also support day and month, for alarms up to a year in
218 * the future.
220 t->time.tm_mday = -1;
221 t->time.tm_mon = -1;
223 spin_lock_irq(&rtc_lock);
224 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
225 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
226 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
228 if (cmos->day_alrm) {
229 /* ignore upper bits on readback per ACPI spec */
230 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
231 if (!t->time.tm_mday)
232 t->time.tm_mday = -1;
234 if (cmos->mon_alrm) {
235 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
236 if (!t->time.tm_mon)
237 t->time.tm_mon = -1;
241 rtc_control = CMOS_READ(RTC_CONTROL);
242 spin_unlock_irq(&rtc_lock);
244 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
245 if (((unsigned)t->time.tm_sec) < 0x60)
246 t->time.tm_sec = bcd2bin(t->time.tm_sec);
247 else
248 t->time.tm_sec = -1;
249 if (((unsigned)t->time.tm_min) < 0x60)
250 t->time.tm_min = bcd2bin(t->time.tm_min);
251 else
252 t->time.tm_min = -1;
253 if (((unsigned)t->time.tm_hour) < 0x24)
254 t->time.tm_hour = bcd2bin(t->time.tm_hour);
255 else
256 t->time.tm_hour = -1;
258 if (cmos->day_alrm) {
259 if (((unsigned)t->time.tm_mday) <= 0x31)
260 t->time.tm_mday = bcd2bin(t->time.tm_mday);
261 else
262 t->time.tm_mday = -1;
264 if (cmos->mon_alrm) {
265 if (((unsigned)t->time.tm_mon) <= 0x12)
266 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
267 else
268 t->time.tm_mon = -1;
272 t->time.tm_year = -1;
274 t->enabled = !!(rtc_control & RTC_AIE);
275 t->pending = 0;
277 return 0;
280 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
282 unsigned char rtc_intr;
284 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
285 * allegedly some older rtcs need that to handle irqs properly
287 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
289 if (is_hpet_enabled())
290 return;
292 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
293 if (is_intr(rtc_intr))
294 rtc_update_irq(cmos->rtc, 1, rtc_intr);
297 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
299 unsigned char rtc_control;
301 /* flush any pending IRQ status, notably for update irqs,
302 * before we enable new IRQs
304 rtc_control = CMOS_READ(RTC_CONTROL);
305 cmos_checkintr(cmos, rtc_control);
307 rtc_control |= mask;
308 CMOS_WRITE(rtc_control, RTC_CONTROL);
309 hpet_set_rtc_irq_bit(mask);
311 cmos_checkintr(cmos, rtc_control);
314 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
316 unsigned char rtc_control;
318 rtc_control = CMOS_READ(RTC_CONTROL);
319 rtc_control &= ~mask;
320 CMOS_WRITE(rtc_control, RTC_CONTROL);
321 hpet_mask_rtc_irq_bit(mask);
323 cmos_checkintr(cmos, rtc_control);
326 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
328 struct cmos_rtc *cmos = dev_get_drvdata(dev);
329 unsigned char mon, mday, hrs, min, sec, rtc_control;
331 if (!is_valid_irq(cmos->irq))
332 return -EIO;
334 mon = t->time.tm_mon + 1;
335 mday = t->time.tm_mday;
336 hrs = t->time.tm_hour;
337 min = t->time.tm_min;
338 sec = t->time.tm_sec;
340 rtc_control = CMOS_READ(RTC_CONTROL);
341 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
342 /* Writing 0xff means "don't care" or "match all". */
343 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
344 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
345 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
346 min = (min < 60) ? bin2bcd(min) : 0xff;
347 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
350 spin_lock_irq(&rtc_lock);
352 /* next rtc irq must not be from previous alarm setting */
353 cmos_irq_disable(cmos, RTC_AIE);
355 /* update alarm */
356 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
357 CMOS_WRITE(min, RTC_MINUTES_ALARM);
358 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
360 /* the system may support an "enhanced" alarm */
361 if (cmos->day_alrm) {
362 CMOS_WRITE(mday, cmos->day_alrm);
363 if (cmos->mon_alrm)
364 CMOS_WRITE(mon, cmos->mon_alrm);
367 /* FIXME the HPET alarm glue currently ignores day_alrm
368 * and mon_alrm ...
370 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
372 if (t->enabled)
373 cmos_irq_enable(cmos, RTC_AIE);
375 spin_unlock_irq(&rtc_lock);
377 return 0;
380 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
382 struct cmos_rtc *cmos = dev_get_drvdata(dev);
383 unsigned long flags;
385 if (!is_valid_irq(cmos->irq))
386 return -EINVAL;
388 spin_lock_irqsave(&rtc_lock, flags);
390 if (enabled)
391 cmos_irq_enable(cmos, RTC_AIE);
392 else
393 cmos_irq_disable(cmos, RTC_AIE);
395 spin_unlock_irqrestore(&rtc_lock, flags);
396 return 0;
399 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
401 static int cmos_procfs(struct device *dev, struct seq_file *seq)
403 struct cmos_rtc *cmos = dev_get_drvdata(dev);
404 unsigned char rtc_control, valid;
406 spin_lock_irq(&rtc_lock);
407 rtc_control = CMOS_READ(RTC_CONTROL);
408 valid = CMOS_READ(RTC_VALID);
409 spin_unlock_irq(&rtc_lock);
411 /* NOTE: at least ICH6 reports battery status using a different
412 * (non-RTC) bit; and SQWE is ignored on many current systems.
414 return seq_printf(seq,
415 "periodic_IRQ\t: %s\n"
416 "update_IRQ\t: %s\n"
417 "HPET_emulated\t: %s\n"
418 // "square_wave\t: %s\n"
419 "BCD\t\t: %s\n"
420 "DST_enable\t: %s\n"
421 "periodic_freq\t: %d\n"
422 "batt_status\t: %s\n",
423 (rtc_control & RTC_PIE) ? "yes" : "no",
424 (rtc_control & RTC_UIE) ? "yes" : "no",
425 is_hpet_enabled() ? "yes" : "no",
426 // (rtc_control & RTC_SQWE) ? "yes" : "no",
427 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
428 (rtc_control & RTC_DST_EN) ? "yes" : "no",
429 cmos->rtc->irq_freq,
430 (valid & RTC_VRT) ? "okay" : "dead");
433 #else
434 #define cmos_procfs NULL
435 #endif
437 static const struct rtc_class_ops cmos_rtc_ops = {
438 .read_time = cmos_read_time,
439 .set_time = cmos_set_time,
440 .read_alarm = cmos_read_alarm,
441 .set_alarm = cmos_set_alarm,
442 .proc = cmos_procfs,
443 .alarm_irq_enable = cmos_alarm_irq_enable,
446 /*----------------------------------------------------------------*/
449 * All these chips have at least 64 bytes of address space, shared by
450 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
451 * by boot firmware. Modern chips have 128 or 256 bytes.
454 #define NVRAM_OFFSET (RTC_REG_D + 1)
456 static ssize_t
457 cmos_nvram_read(struct file *filp, struct kobject *kobj,
458 struct bin_attribute *attr,
459 char *buf, loff_t off, size_t count)
461 int retval;
463 if (unlikely(off >= attr->size))
464 return 0;
465 if (unlikely(off < 0))
466 return -EINVAL;
467 if ((off + count) > attr->size)
468 count = attr->size - off;
470 off += NVRAM_OFFSET;
471 spin_lock_irq(&rtc_lock);
472 for (retval = 0; count; count--, off++, retval++) {
473 if (off < 128)
474 *buf++ = CMOS_READ(off);
475 else if (can_bank2)
476 *buf++ = cmos_read_bank2(off);
477 else
478 break;
480 spin_unlock_irq(&rtc_lock);
482 return retval;
485 static ssize_t
486 cmos_nvram_write(struct file *filp, struct kobject *kobj,
487 struct bin_attribute *attr,
488 char *buf, loff_t off, size_t count)
490 struct cmos_rtc *cmos;
491 int retval;
493 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
494 if (unlikely(off >= attr->size))
495 return -EFBIG;
496 if (unlikely(off < 0))
497 return -EINVAL;
498 if ((off + count) > attr->size)
499 count = attr->size - off;
501 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
502 * checksum on part of the NVRAM data. That's currently ignored
503 * here. If userspace is smart enough to know what fields of
504 * NVRAM to update, updating checksums is also part of its job.
506 off += NVRAM_OFFSET;
507 spin_lock_irq(&rtc_lock);
508 for (retval = 0; count; count--, off++, retval++) {
509 /* don't trash RTC registers */
510 if (off == cmos->day_alrm
511 || off == cmos->mon_alrm
512 || off == cmos->century)
513 buf++;
514 else if (off < 128)
515 CMOS_WRITE(*buf++, off);
516 else if (can_bank2)
517 cmos_write_bank2(*buf++, off);
518 else
519 break;
521 spin_unlock_irq(&rtc_lock);
523 return retval;
526 static struct bin_attribute nvram = {
527 .attr = {
528 .name = "nvram",
529 .mode = S_IRUGO | S_IWUSR,
532 .read = cmos_nvram_read,
533 .write = cmos_nvram_write,
534 /* size gets set up later */
537 /*----------------------------------------------------------------*/
539 static struct cmos_rtc cmos_rtc;
541 static irqreturn_t cmos_interrupt(int irq, void *p)
543 u8 irqstat;
544 u8 rtc_control;
546 spin_lock(&rtc_lock);
548 /* When the HPET interrupt handler calls us, the interrupt
549 * status is passed as arg1 instead of the irq number. But
550 * always clear irq status, even when HPET is in the way.
552 * Note that HPET and RTC are almost certainly out of phase,
553 * giving different IRQ status ...
555 irqstat = CMOS_READ(RTC_INTR_FLAGS);
556 rtc_control = CMOS_READ(RTC_CONTROL);
557 if (is_hpet_enabled())
558 irqstat = (unsigned long)irq & 0xF0;
560 /* If we were suspended, RTC_CONTROL may not be accurate since the
561 * bios may have cleared it.
563 if (!cmos_rtc.suspend_ctrl)
564 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
565 else
566 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
568 /* All Linux RTC alarms should be treated as if they were oneshot.
569 * Similar code may be needed in system wakeup paths, in case the
570 * alarm woke the system.
572 if (irqstat & RTC_AIE) {
573 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
574 rtc_control &= ~RTC_AIE;
575 CMOS_WRITE(rtc_control, RTC_CONTROL);
576 hpet_mask_rtc_irq_bit(RTC_AIE);
577 CMOS_READ(RTC_INTR_FLAGS);
579 spin_unlock(&rtc_lock);
581 if (is_intr(irqstat)) {
582 rtc_update_irq(p, 1, irqstat);
583 return IRQ_HANDLED;
584 } else
585 return IRQ_NONE;
588 #ifdef CONFIG_PNP
589 #define INITSECTION
591 #else
592 #define INITSECTION __init
593 #endif
595 static int INITSECTION
596 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
598 struct cmos_rtc_board_info *info = dev->platform_data;
599 int retval = 0;
600 unsigned char rtc_control;
601 unsigned address_space;
603 /* there can be only one ... */
604 if (cmos_rtc.dev)
605 return -EBUSY;
607 if (!ports)
608 return -ENODEV;
610 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
612 * REVISIT non-x86 systems may instead use memory space resources
613 * (needing ioremap etc), not i/o space resources like this ...
615 ports = request_region(ports->start,
616 resource_size(ports),
617 driver_name);
618 if (!ports) {
619 dev_dbg(dev, "i/o registers already in use\n");
620 return -EBUSY;
623 cmos_rtc.irq = rtc_irq;
624 cmos_rtc.iomem = ports;
626 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
627 * driver did, but don't reject unknown configs. Old hardware
628 * won't address 128 bytes. Newer chips have multiple banks,
629 * though they may not be listed in one I/O resource.
631 #if defined(CONFIG_ATARI)
632 address_space = 64;
633 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
634 || defined(__sparc__) || defined(__mips__) \
635 || defined(__powerpc__)
636 address_space = 128;
637 #else
638 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
639 address_space = 128;
640 #endif
641 if (can_bank2 && ports->end > (ports->start + 1))
642 address_space = 256;
644 /* For ACPI systems extension info comes from the FADT. On others,
645 * board specific setup provides it as appropriate. Systems where
646 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
647 * some almost-clones) can provide hooks to make that behave.
649 * Note that ACPI doesn't preclude putting these registers into
650 * "extended" areas of the chip, including some that we won't yet
651 * expect CMOS_READ and friends to handle.
653 if (info) {
654 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
655 cmos_rtc.day_alrm = info->rtc_day_alarm;
656 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
657 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
658 if (info->rtc_century && info->rtc_century < 128)
659 cmos_rtc.century = info->rtc_century;
661 if (info->wake_on && info->wake_off) {
662 cmos_rtc.wake_on = info->wake_on;
663 cmos_rtc.wake_off = info->wake_off;
667 cmos_rtc.dev = dev;
668 dev_set_drvdata(dev, &cmos_rtc);
670 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
671 &cmos_rtc_ops, THIS_MODULE);
672 if (IS_ERR(cmos_rtc.rtc)) {
673 retval = PTR_ERR(cmos_rtc.rtc);
674 goto cleanup0;
677 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
679 spin_lock_irq(&rtc_lock);
681 /* force periodic irq to CMOS reset default of 1024Hz;
683 * REVISIT it's been reported that at least one x86_64 ALI mobo
684 * doesn't use 32KHz here ... for portability we might need to
685 * do something about other clock frequencies.
687 cmos_rtc.rtc->irq_freq = 1024;
688 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
689 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
691 /* disable irqs */
692 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
694 rtc_control = CMOS_READ(RTC_CONTROL);
696 spin_unlock_irq(&rtc_lock);
698 /* FIXME:
699 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
701 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
702 dev_warn(dev, "only 24-hr supported\n");
703 retval = -ENXIO;
704 goto cleanup1;
707 if (is_valid_irq(rtc_irq)) {
708 irq_handler_t rtc_cmos_int_handler;
710 if (is_hpet_enabled()) {
711 int err;
713 rtc_cmos_int_handler = hpet_rtc_interrupt;
714 err = hpet_register_irq_handler(cmos_interrupt);
715 if (err != 0) {
716 dev_warn(dev, "hpet_register_irq_handler "
717 " failed in rtc_init().");
718 goto cleanup1;
720 } else
721 rtc_cmos_int_handler = cmos_interrupt;
723 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
724 0, dev_name(&cmos_rtc.rtc->dev),
725 cmos_rtc.rtc);
726 if (retval < 0) {
727 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
728 goto cleanup1;
731 hpet_rtc_timer_init();
733 /* export at least the first block of NVRAM */
734 nvram.size = address_space - NVRAM_OFFSET;
735 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
736 if (retval < 0) {
737 dev_dbg(dev, "can't create nvram file? %d\n", retval);
738 goto cleanup2;
741 dev_info(dev, "%s%s, %zd bytes nvram%s\n",
742 !is_valid_irq(rtc_irq) ? "no alarms" :
743 cmos_rtc.mon_alrm ? "alarms up to one year" :
744 cmos_rtc.day_alrm ? "alarms up to one month" :
745 "alarms up to one day",
746 cmos_rtc.century ? ", y3k" : "",
747 nvram.size,
748 is_hpet_enabled() ? ", hpet irqs" : "");
750 return 0;
752 cleanup2:
753 if (is_valid_irq(rtc_irq))
754 free_irq(rtc_irq, cmos_rtc.rtc);
755 cleanup1:
756 cmos_rtc.dev = NULL;
757 rtc_device_unregister(cmos_rtc.rtc);
758 cleanup0:
759 release_region(ports->start, resource_size(ports));
760 return retval;
763 static void cmos_do_shutdown(void)
765 spin_lock_irq(&rtc_lock);
766 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
767 spin_unlock_irq(&rtc_lock);
770 static void __exit cmos_do_remove(struct device *dev)
772 struct cmos_rtc *cmos = dev_get_drvdata(dev);
773 struct resource *ports;
775 cmos_do_shutdown();
777 sysfs_remove_bin_file(&dev->kobj, &nvram);
779 if (is_valid_irq(cmos->irq)) {
780 free_irq(cmos->irq, cmos->rtc);
781 hpet_unregister_irq_handler(cmos_interrupt);
784 rtc_device_unregister(cmos->rtc);
785 cmos->rtc = NULL;
787 ports = cmos->iomem;
788 release_region(ports->start, resource_size(ports));
789 cmos->iomem = NULL;
791 cmos->dev = NULL;
792 dev_set_drvdata(dev, NULL);
795 #ifdef CONFIG_PM
797 static int cmos_suspend(struct device *dev)
799 struct cmos_rtc *cmos = dev_get_drvdata(dev);
800 unsigned char tmp;
802 /* only the alarm might be a wakeup event source */
803 spin_lock_irq(&rtc_lock);
804 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
805 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
806 unsigned char mask;
808 if (device_may_wakeup(dev))
809 mask = RTC_IRQMASK & ~RTC_AIE;
810 else
811 mask = RTC_IRQMASK;
812 tmp &= ~mask;
813 CMOS_WRITE(tmp, RTC_CONTROL);
814 hpet_mask_rtc_irq_bit(mask);
816 cmos_checkintr(cmos, tmp);
818 spin_unlock_irq(&rtc_lock);
820 if (tmp & RTC_AIE) {
821 cmos->enabled_wake = 1;
822 if (cmos->wake_on)
823 cmos->wake_on(dev);
824 else
825 enable_irq_wake(cmos->irq);
828 dev_dbg(dev, "suspend%s, ctrl %02x\n",
829 (tmp & RTC_AIE) ? ", alarm may wake" : "",
830 tmp);
832 return 0;
835 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
836 * after a detour through G3 "mechanical off", although the ACPI spec
837 * says wakeup should only work from G1/S4 "hibernate". To most users,
838 * distinctions between S4 and S5 are pointless. So when the hardware
839 * allows, don't draw that distinction.
841 static inline int cmos_poweroff(struct device *dev)
843 return cmos_suspend(dev);
846 static int cmos_resume(struct device *dev)
848 struct cmos_rtc *cmos = dev_get_drvdata(dev);
849 unsigned char tmp;
851 if (cmos->enabled_wake) {
852 if (cmos->wake_off)
853 cmos->wake_off(dev);
854 else
855 disable_irq_wake(cmos->irq);
856 cmos->enabled_wake = 0;
859 spin_lock_irq(&rtc_lock);
860 tmp = cmos->suspend_ctrl;
861 cmos->suspend_ctrl = 0;
862 /* re-enable any irqs previously active */
863 if (tmp & RTC_IRQMASK) {
864 unsigned char mask;
866 if (device_may_wakeup(dev))
867 hpet_rtc_timer_init();
869 do {
870 CMOS_WRITE(tmp, RTC_CONTROL);
871 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
873 mask = CMOS_READ(RTC_INTR_FLAGS);
874 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
875 if (!is_hpet_enabled() || !is_intr(mask))
876 break;
878 /* force one-shot behavior if HPET blocked
879 * the wake alarm's irq
881 rtc_update_irq(cmos->rtc, 1, mask);
882 tmp &= ~RTC_AIE;
883 hpet_mask_rtc_irq_bit(RTC_AIE);
884 } while (mask & RTC_AIE);
886 spin_unlock_irq(&rtc_lock);
888 dev_dbg(dev, "resume, ctrl %02x\n", tmp);
890 return 0;
893 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
895 #else
897 static inline int cmos_poweroff(struct device *dev)
899 return -ENOSYS;
902 #endif
904 /*----------------------------------------------------------------*/
906 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
907 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
908 * probably list them in similar PNPBIOS tables; so PNP is more common.
910 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
911 * predate even PNPBIOS should set up platform_bus devices.
914 #ifdef CONFIG_ACPI
916 #include <linux/acpi.h>
918 static u32 rtc_handler(void *context)
920 struct device *dev = context;
922 pm_wakeup_event(dev, 0);
923 acpi_clear_event(ACPI_EVENT_RTC);
924 acpi_disable_event(ACPI_EVENT_RTC, 0);
925 return ACPI_INTERRUPT_HANDLED;
928 static inline void rtc_wake_setup(struct device *dev)
930 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
932 * After the RTC handler is installed, the Fixed_RTC event should
933 * be disabled. Only when the RTC alarm is set will it be enabled.
935 acpi_clear_event(ACPI_EVENT_RTC);
936 acpi_disable_event(ACPI_EVENT_RTC, 0);
939 static void rtc_wake_on(struct device *dev)
941 acpi_clear_event(ACPI_EVENT_RTC);
942 acpi_enable_event(ACPI_EVENT_RTC, 0);
945 static void rtc_wake_off(struct device *dev)
947 acpi_disable_event(ACPI_EVENT_RTC, 0);
950 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
951 * its device node and pass extra config data. This helps its driver use
952 * capabilities that the now-obsolete mc146818 didn't have, and informs it
953 * that this board's RTC is wakeup-capable (per ACPI spec).
955 static struct cmos_rtc_board_info acpi_rtc_info;
957 static void cmos_wake_setup(struct device *dev)
959 if (acpi_disabled)
960 return;
962 rtc_wake_setup(dev);
963 acpi_rtc_info.wake_on = rtc_wake_on;
964 acpi_rtc_info.wake_off = rtc_wake_off;
966 /* workaround bug in some ACPI tables */
967 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
968 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
969 acpi_gbl_FADT.month_alarm);
970 acpi_gbl_FADT.month_alarm = 0;
973 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
974 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
975 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
977 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
978 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
979 dev_info(dev, "RTC can wake from S4\n");
981 dev->platform_data = &acpi_rtc_info;
983 /* RTC always wakes from S1/S2/S3, and often S4/STD */
984 device_init_wakeup(dev, 1);
987 #else
989 static void cmos_wake_setup(struct device *dev)
993 #endif
995 #ifdef CONFIG_PNP
997 #include <linux/pnp.h>
999 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1001 cmos_wake_setup(&pnp->dev);
1003 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0))
1004 /* Some machines contain a PNP entry for the RTC, but
1005 * don't define the IRQ. It should always be safe to
1006 * hardcode it in these cases
1008 return cmos_do_probe(&pnp->dev,
1009 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1010 else
1011 return cmos_do_probe(&pnp->dev,
1012 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1013 pnp_irq(pnp, 0));
1016 static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
1018 cmos_do_remove(&pnp->dev);
1021 #ifdef CONFIG_PM
1023 static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
1025 return cmos_suspend(&pnp->dev);
1028 static int cmos_pnp_resume(struct pnp_dev *pnp)
1030 return cmos_resume(&pnp->dev);
1033 #else
1034 #define cmos_pnp_suspend NULL
1035 #define cmos_pnp_resume NULL
1036 #endif
1038 static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1040 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev))
1041 return;
1043 cmos_do_shutdown();
1046 static const struct pnp_device_id rtc_ids[] = {
1047 { .id = "PNP0b00", },
1048 { .id = "PNP0b01", },
1049 { .id = "PNP0b02", },
1050 { },
1052 MODULE_DEVICE_TABLE(pnp, rtc_ids);
1054 static struct pnp_driver cmos_pnp_driver = {
1055 .name = (char *) driver_name,
1056 .id_table = rtc_ids,
1057 .probe = cmos_pnp_probe,
1058 .remove = __exit_p(cmos_pnp_remove),
1059 .shutdown = cmos_pnp_shutdown,
1061 /* flag ensures resume() gets called, and stops syslog spam */
1062 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1063 .suspend = cmos_pnp_suspend,
1064 .resume = cmos_pnp_resume,
1067 #endif /* CONFIG_PNP */
1069 #ifdef CONFIG_OF
1070 static const struct of_device_id of_cmos_match[] = {
1072 .compatible = "motorola,mc146818",
1074 { },
1076 MODULE_DEVICE_TABLE(of, of_cmos_match);
1078 static __init void cmos_of_init(struct platform_device *pdev)
1080 struct device_node *node = pdev->dev.of_node;
1081 struct rtc_time time;
1082 int ret;
1083 const __be32 *val;
1085 if (!node)
1086 return;
1088 val = of_get_property(node, "ctrl-reg", NULL);
1089 if (val)
1090 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1092 val = of_get_property(node, "freq-reg", NULL);
1093 if (val)
1094 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1096 get_rtc_time(&time);
1097 ret = rtc_valid_tm(&time);
1098 if (ret) {
1099 struct rtc_time def_time = {
1100 .tm_year = 1,
1101 .tm_mday = 1,
1103 set_rtc_time(&def_time);
1106 #else
1107 static inline void cmos_of_init(struct platform_device *pdev) {}
1108 #endif
1109 /*----------------------------------------------------------------*/
1111 /* Platform setup should have set up an RTC device, when PNP is
1112 * unavailable ... this could happen even on (older) PCs.
1115 static int __init cmos_platform_probe(struct platform_device *pdev)
1117 cmos_of_init(pdev);
1118 cmos_wake_setup(&pdev->dev);
1119 return cmos_do_probe(&pdev->dev,
1120 platform_get_resource(pdev, IORESOURCE_IO, 0),
1121 platform_get_irq(pdev, 0));
1124 static int __exit cmos_platform_remove(struct platform_device *pdev)
1126 cmos_do_remove(&pdev->dev);
1127 return 0;
1130 static void cmos_platform_shutdown(struct platform_device *pdev)
1132 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pdev->dev))
1133 return;
1135 cmos_do_shutdown();
1138 /* work with hotplug and coldplug */
1139 MODULE_ALIAS("platform:rtc_cmos");
1141 static struct platform_driver cmos_platform_driver = {
1142 .remove = __exit_p(cmos_platform_remove),
1143 .shutdown = cmos_platform_shutdown,
1144 .driver = {
1145 .name = (char *) driver_name,
1146 #ifdef CONFIG_PM
1147 .pm = &cmos_pm_ops,
1148 #endif
1149 .of_match_table = of_match_ptr(of_cmos_match),
1153 #ifdef CONFIG_PNP
1154 static bool pnp_driver_registered;
1155 #endif
1156 static bool platform_driver_registered;
1158 static int __init cmos_init(void)
1160 int retval = 0;
1162 #ifdef CONFIG_PNP
1163 retval = pnp_register_driver(&cmos_pnp_driver);
1164 if (retval == 0)
1165 pnp_driver_registered = true;
1166 #endif
1168 if (!cmos_rtc.dev) {
1169 retval = platform_driver_probe(&cmos_platform_driver,
1170 cmos_platform_probe);
1171 if (retval == 0)
1172 platform_driver_registered = true;
1175 if (retval == 0)
1176 return 0;
1178 #ifdef CONFIG_PNP
1179 if (pnp_driver_registered)
1180 pnp_unregister_driver(&cmos_pnp_driver);
1181 #endif
1182 return retval;
1184 module_init(cmos_init);
1186 static void __exit cmos_exit(void)
1188 #ifdef CONFIG_PNP
1189 if (pnp_driver_registered)
1190 pnp_unregister_driver(&cmos_pnp_driver);
1191 #endif
1192 if (platform_driver_registered)
1193 platform_driver_unregister(&cmos_platform_driver);
1195 module_exit(cmos_exit);
1198 MODULE_AUTHOR("David Brownell");
1199 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1200 MODULE_LICENSE("GPL");