2 * Miscellaneous low-level MMU functions.
4 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2008-2009 PetaLogix
6 * Copyright (C) 2007 Xilinx, Inc. All rights reserved.
8 * Derived from arch/ppc/kernel/misc.S
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file COPYING in the main directory of this
12 * archive for more details.
15 #include <linux/linkage.h>
16 #include <linux/sys.h>
17 #include <asm/unistd.h>
18 #include <linux/errno.h>
26 * We avoid flushing the pinned 0, 1 and possibly 2 entries.
29 .type _tlbia, @function
32 lwi r12, r0, tlb_skip;
37 mts rtlbhi, r0 /* flush: ensure V is clear */
39 rsubi r11, r12, MICROBLAZE_TLB_SIZE - 1
40 bneid r11, _tlbia_1 /* loop for all entries */
45 .size _tlbia, . - _tlbia
48 * Flush MMU TLB for a particular address (in r5)
51 .type _tlbie, @function
54 mts rtlbsx, r5 /* look up the address in TLB */
56 mfs r12, rtlbx /* Retrieve index */
58 blti r12, _tlbie_1 /* Check if found */
59 mts rtlbhi, r0 /* flush: ensure V is clear */
65 .size _tlbie, . - _tlbie
68 * Allocate TLB entry for early console
70 .globl early_console_reg_tlb_alloc;
71 .type early_console_reg_tlb_alloc, @function
73 early_console_reg_tlb_alloc:
75 * Load a TLB entry for the UART, so that microblaze_progress() can use
76 * the UARTs nice and early. We use a 4k real==virtual mapping.
79 mts rtlbx, r4 /* TLB slot 63 */
83 ori r4,r4,(TLB_WR|TLB_I|TLB_M|TLB_G)
86 ori r5,r5,(TLB_VALID | TLB_PAGESZ(PAGESZ_4K))
88 mts rtlblo,r4 /* Load the data portion of the entry */
90 mts rtlbhi,r5 /* Load the tag portion of the entry */
100 .size early_console_reg_tlb_alloc, . - early_console_reg_tlb_alloc