| blob | 60c2f9c0ba1af990c30902eb6dbfd40d8b02390a |
1 config ARM
2 bool
3 default y
4 select HAVE_AOUT
5 select HAVE_DMA_API_DEBUG
6 select HAVE_IDE if PCI || ISA || PCMCIA
7 select HAVE_MEMBLOCK
8 select RTC_LIB
9 select SYS_SUPPORTS_APM_EMULATION
10 select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
12 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
13 select HAVE_ARCH_KGDB
14 select HAVE_KPROBES if !XIP_KERNEL
15 select HAVE_KRETPROBES if (HAVE_KPROBES)
16 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
17 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
18 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
19 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
20 select ARCH_BINFMT_ELF_RANDOMIZE_PIE
21 select HAVE_GENERIC_DMA_COHERENT
22 select HAVE_KERNEL_GZIP
23 select HAVE_KERNEL_LZO
24 select HAVE_KERNEL_LZMA
25 select HAVE_KERNEL_XZ
26 select HAVE_IRQ_WORK
27 select HAVE_PERF_EVENTS
28 select PERF_USE_VMALLOC
29 select HAVE_REGS_AND_STACK_ACCESS_API
30 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
31 select HAVE_C_RECORDMCOUNT
32 select HAVE_GENERIC_HARDIRQS
33 select GENERIC_IRQ_SHOW
34 select CPU_PM if (SUSPEND || CPU_IDLE)
35 select GENERIC_PCI_IOMAP
36 select HAVE_BPF_JIT if NET
37 help
38 The ARM series is a line of low-power-consumption RISC chip designs
39 licensed by ARM Ltd and targeted at embedded applications and
40 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
41 manufactured, but legacy ARM-based PC hardware remains popular in
42 Europe. There is an ARM Linux project with a web page at
43 <http://www.arm.linux.org.uk/>.
45 config ARM_HAS_SG_CHAIN
46 bool
48 config HAVE_PWM
49 bool
51 config MIGHT_HAVE_PCI
52 bool
54 config SYS_SUPPORTS_APM_EMULATION
55 bool
57 config GENERIC_GPIO
58 bool
60 config ARCH_USES_GETTIMEOFFSET
61 bool
62 default n
64 config GENERIC_CLOCKEVENTS
65 bool
67 config GENERIC_CLOCKEVENTS_BROADCAST
68 bool
69 depends on GENERIC_CLOCKEVENTS
70 default y if SMP
72 config KTIME_SCALAR
73 bool
74 default y
76 config HAVE_TCM
77 bool
78 select GENERIC_ALLOCATOR
80 config HAVE_PROC_CPU
81 bool
83 config NO_IOPORT
84 bool
86 config EISA
87 bool
88 ---help---
89 The Extended Industry Standard Architecture (EISA) bus was
90 developed as an open alternative to the IBM MicroChannel bus.
92 The EISA bus provided some of the features of the IBM MicroChannel
93 bus while maintaining backward compatibility with cards made for
94 the older ISA bus. The EISA bus saw limited use between 1988 and
95 1995 when it was made obsolete by the PCI bus.
97 Say Y here if you are building a kernel for an EISA-based machine.
99 Otherwise, say N.
101 config SBUS
102 bool
104 config MCA
105 bool
106 help
107 MicroChannel Architecture is found in some IBM PS/2 machines and
108 laptops. It is a bus system similar to PCI or ISA. See
109 <file:Documentation/mca.txt> (and especially the web page given
110 there) before attempting to build an MCA bus kernel.
112 config STACKTRACE_SUPPORT
113 bool
114 default y
116 config HAVE_LATENCYTOP_SUPPORT
117 bool
118 depends on !SMP
119 default y
121 config LOCKDEP_SUPPORT
122 bool
123 default y
125 config TRACE_IRQFLAGS_SUPPORT
126 bool
127 default y
129 config HARDIRQS_SW_RESEND
130 bool
131 default y
133 config GENERIC_IRQ_PROBE
134 bool
135 default y
137 config GENERIC_LOCKBREAK
138 bool
139 default y
140 depends on SMP && PREEMPT
142 config RWSEM_GENERIC_SPINLOCK
143 bool
144 default y
146 config RWSEM_XCHGADD_ALGORITHM
147 bool
149 config ARCH_HAS_ILOG2_U32
150 bool
152 config ARCH_HAS_ILOG2_U64
153 bool
155 config ARCH_HAS_CPUFREQ
156 bool
157 help
158 Internal node to signify that the ARCH has CPUFREQ support
159 and that the relevant menu configurations are displayed for
160 it.
162 config ARCH_HAS_CPU_IDLE_WAIT
163 def_bool y
165 config GENERIC_HWEIGHT
166 bool
167 default y
169 config GENERIC_CALIBRATE_DELAY
170 bool
171 default y
173 config ARCH_MAY_HAVE_PC_FDC
174 bool
176 config ZONE_DMA
177 bool
179 config NEED_DMA_MAP_STATE
180 def_bool y
182 config ARCH_HAS_DMA_SET_COHERENT_MASK
183 bool
185 config GENERIC_ISA_DMA
186 bool
188 config FIQ
189 bool
191 config NEED_RET_TO_USER
192 bool
194 config ARCH_MTD_XIP
195 bool
197 config VECTORS_BASE
198 hex
199 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
200 default DRAM_BASE if REMAP_VECTORS_TO_RAM
201 default 0x00000000
202 help
203 The base address of exception vectors.
205 config ARM_PATCH_PHYS_VIRT
206 bool "Patch physical to virtual translations at runtime" if EMBEDDED
207 default y
208 depends on !XIP_KERNEL && MMU
209 depends on !ARCH_REALVIEW || !SPARSEMEM
210 help
211 Patch phys-to-virt and virt-to-phys translation functions at
212 boot and module load time according to the position of the
213 kernel in system memory.
215 This can only be used with non-XIP MMU kernels where the base
216 of physical memory is at a 16MB boundary.
218 Only disable this option if you know that you do not require
219 this feature (eg, building a kernel for a single machine) and
220 you need to shrink the kernel to the minimal size.
222 config NEED_MACH_IO_H
223 bool
224 help
225 Select this when mach/io.h is required to provide special
226 definitions for this platform. The need for mach/io.h should
227 be avoided when possible.
229 config NEED_MACH_MEMORY_H
230 bool
231 help
232 Select this when mach/memory.h is required to provide special
233 definitions for this platform. The need for mach/memory.h should
234 be avoided when possible.
236 config PHYS_OFFSET
237 hex "Physical address of main memory" if MMU
238 depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
239 default DRAM_BASE if !MMU
240 help
241 Please provide the physical address corresponding to the
242 location of main memory in your system.
244 config GENERIC_BUG
245 def_bool y
246 depends on BUG
248 source "init/Kconfig"
250 source "kernel/Kconfig.freezer"
252 menu "System Type"
254 config MMU
255 bool "MMU-based Paged Memory Management Support"
256 default y
257 help
258 Select if you want MMU-based virtualised addressing space
259 support by paged memory management. If unsure, say 'Y'.
261 #
262 # The "ARM system type" choice list is ordered alphabetically by option
263 # text. Please add new entries in the option alphabetic order.
264 #
265 choice
266 prompt "ARM system type"
267 default ARCH_VERSATILE
269 config ARCH_INTEGRATOR
270 bool "ARM Ltd. Integrator family"
271 select ARM_AMBA
272 select ARCH_HAS_CPUFREQ
273 select CLKDEV_LOOKUP
274 select HAVE_MACH_CLKDEV
275 select HAVE_TCM
276 select ICST
277 select GENERIC_CLOCKEVENTS
278 select PLAT_VERSATILE
279 select PLAT_VERSATILE_FPGA_IRQ
280 select NEED_MACH_IO_H
281 select NEED_MACH_MEMORY_H
282 select SPARSE_IRQ
283 help
284 Support for ARM's Integrator platform.
286 config ARCH_REALVIEW
287 bool "ARM Ltd. RealView family"
288 select ARM_AMBA
289 select CLKDEV_LOOKUP
290 select HAVE_MACH_CLKDEV
291 select ICST
292 select GENERIC_CLOCKEVENTS
293 select ARCH_WANT_OPTIONAL_GPIOLIB
294 select PLAT_VERSATILE
295 select PLAT_VERSATILE_CLCD
296 select ARM_TIMER_SP804
297 select GPIO_PL061 if GPIOLIB
298 select NEED_MACH_MEMORY_H
299 help
300 This enables support for ARM Ltd RealView boards.
302 config ARCH_VERSATILE
303 bool "ARM Ltd. Versatile family"
304 select ARM_AMBA
305 select ARM_VIC
306 select CLKDEV_LOOKUP
307 select HAVE_MACH_CLKDEV
308 select ICST
309 select GENERIC_CLOCKEVENTS
310 select ARCH_WANT_OPTIONAL_GPIOLIB
311 select PLAT_VERSATILE
312 select PLAT_VERSATILE_CLCD
313 select PLAT_VERSATILE_FPGA_IRQ
314 select ARM_TIMER_SP804
315 help
316 This enables support for ARM Ltd Versatile board.
318 config ARCH_VEXPRESS
319 bool "ARM Ltd. Versatile Express family"
320 select ARCH_WANT_OPTIONAL_GPIOLIB
321 select ARM_AMBA
322 select ARM_TIMER_SP804
323 select CLKDEV_LOOKUP
324 select HAVE_MACH_CLKDEV
325 select GENERIC_CLOCKEVENTS
326 select HAVE_CLK
327 select HAVE_PATA_PLATFORM
328 select ICST
329 select NO_IOPORT
330 select PLAT_VERSATILE
331 select PLAT_VERSATILE_CLCD
332 help
333 This enables support for the ARM Ltd Versatile Express boards.
335 config ARCH_AT91
336 bool "Atmel AT91"
337 select ARCH_REQUIRE_GPIOLIB
338 select HAVE_CLK
339 select CLKDEV_LOOKUP
340 select IRQ_DOMAIN
341 help
342 This enables support for systems based on the Atmel AT91RM9200,
343 AT91SAM9 processors.
345 config ARCH_BCMRING
346 bool "Broadcom BCMRING"
347 depends on MMU
348 select CPU_V6
349 select ARM_AMBA
350 select ARM_TIMER_SP804
351 select CLKDEV_LOOKUP
352 select GENERIC_CLOCKEVENTS
353 select ARCH_WANT_OPTIONAL_GPIOLIB
354 help
355 Support for Broadcom's BCMRing platform.
357 config ARCH_HIGHBANK
358 bool "Calxeda Highbank-based"
359 select ARCH_WANT_OPTIONAL_GPIOLIB
360 select ARM_AMBA
361 select ARM_GIC
362 select ARM_TIMER_SP804
363 select CACHE_L2X0
364 select CLKDEV_LOOKUP
365 select CPU_V7
366 select GENERIC_CLOCKEVENTS
367 select HAVE_ARM_SCU
368 select HAVE_SMP
369 select SPARSE_IRQ
370 select USE_OF
371 help
372 Support for the Calxeda Highbank SoC based boards.
374 config ARCH_CLPS711X
375 bool "Cirrus Logic CLPS711x/EP721x-based"
376 select CPU_ARM720T
377 select ARCH_USES_GETTIMEOFFSET
378 select NEED_MACH_MEMORY_H
379 help
380 Support for Cirrus Logic 711x/721x based boards.
382 config ARCH_CNS3XXX
383 bool "Cavium Networks CNS3XXX family"
384 select CPU_V6K
385 select GENERIC_CLOCKEVENTS
386 select ARM_GIC
387 select MIGHT_HAVE_CACHE_L2X0
388 select MIGHT_HAVE_PCI
389 select PCI_DOMAINS if PCI
390 help
391 Support for Cavium Networks CNS3XXX platform.
393 config ARCH_GEMINI
394 bool "Cortina Systems Gemini"
395 select CPU_FA526
396 select ARCH_REQUIRE_GPIOLIB
397 select ARCH_USES_GETTIMEOFFSET
398 help
399 Support for the Cortina Systems Gemini family SoCs
401 config ARCH_PRIMA2
402 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
403 select CPU_V7
404 select NO_IOPORT
405 select GENERIC_CLOCKEVENTS
406 select CLKDEV_LOOKUP
407 select GENERIC_IRQ_CHIP
408 select MIGHT_HAVE_CACHE_L2X0
409 select USE_OF
410 select ZONE_DMA
411 help
412 Support for CSR SiRFSoC ARM Cortex A9 Platform
414 config ARCH_EBSA110
415 bool "EBSA-110"
416 select CPU_SA110
417 select ISA
418 select NO_IOPORT
419 select ARCH_USES_GETTIMEOFFSET
420 select NEED_MACH_IO_H
421 select NEED_MACH_MEMORY_H
422 help
423 This is an evaluation board for the StrongARM processor available
424 from Digital. It has limited hardware on-board, including an
425 Ethernet interface, two PCMCIA sockets, two serial ports and a
426 parallel port.
428 config ARCH_EP93XX
429 bool "EP93xx-based"
430 select CPU_ARM920T
431 select ARM_AMBA
432 select ARM_VIC
433 select CLKDEV_LOOKUP
434 select ARCH_REQUIRE_GPIOLIB
435 select ARCH_HAS_HOLES_MEMORYMODEL
436 select ARCH_USES_GETTIMEOFFSET
437 select NEED_MACH_MEMORY_H
438 help
439 This enables support for the Cirrus EP93xx series of CPUs.
441 config ARCH_FOOTBRIDGE
442 bool "FootBridge"
443 select CPU_SA110
444 select FOOTBRIDGE
445 select GENERIC_CLOCKEVENTS
446 select HAVE_IDE
447 select NEED_MACH_IO_H
448 select NEED_MACH_MEMORY_H
449 help
450 Support for systems based on the DC21285 companion chip
451 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
453 config ARCH_MXC
454 bool "Freescale MXC/iMX-based"
455 select GENERIC_CLOCKEVENTS
456 select ARCH_REQUIRE_GPIOLIB
457 select CLKDEV_LOOKUP
458 select CLKSRC_MMIO
459 select GENERIC_IRQ_CHIP
460 select MULTI_IRQ_HANDLER
461 help
462 Support for Freescale MXC/iMX-based family of processors
464 config ARCH_MXS
465 bool "Freescale MXS-based"
466 select GENERIC_CLOCKEVENTS
467 select ARCH_REQUIRE_GPIOLIB
468 select CLKDEV_LOOKUP
469 select CLKSRC_MMIO
470 select HAVE_CLK_PREPARE
471 help
472 Support for Freescale MXS-based family of processors
474 config ARCH_NETX
475 bool "Hilscher NetX based"
476 select CLKSRC_MMIO
477 select CPU_ARM926T
478 select ARM_VIC
479 select GENERIC_CLOCKEVENTS
480 help
481 This enables support for systems based on the Hilscher NetX Soc
483 config ARCH_H720X
484 bool "Hynix HMS720x-based"
485 select CPU_ARM720T
486 select ISA_DMA_API
487 select ARCH_USES_GETTIMEOFFSET
488 help
489 This enables support for systems based on the Hynix HMS720x
491 config ARCH_IOP13XX
492 bool "IOP13xx-based"
493 depends on MMU
494 select CPU_XSC3
495 select PLAT_IOP
496 select PCI
497 select ARCH_SUPPORTS_MSI
498 select VMSPLIT_1G
499 select NEED_MACH_IO_H
500 select NEED_MACH_MEMORY_H
501 select NEED_RET_TO_USER
502 help
503 Support for Intel's IOP13XX (XScale) family of processors.
505 config ARCH_IOP32X
506 bool "IOP32x-based"
507 depends on MMU
508 select CPU_XSCALE
509 select NEED_MACH_IO_H
510 select NEED_RET_TO_USER
511 select PLAT_IOP
512 select PCI
513 select ARCH_REQUIRE_GPIOLIB
514 help
515 Support for Intel's 80219 and IOP32X (XScale) family of
516 processors.
518 config ARCH_IOP33X
519 bool "IOP33x-based"
520 depends on MMU
521 select CPU_XSCALE
522 select NEED_MACH_IO_H
523 select NEED_RET_TO_USER
524 select PLAT_IOP
525 select PCI
526 select ARCH_REQUIRE_GPIOLIB
527 help
528 Support for Intel's IOP33X (XScale) family of processors.
530 config ARCH_IXP23XX
531 bool "IXP23XX-based"
532 depends on MMU
533 select CPU_XSC3
534 select PCI
535 select ARCH_USES_GETTIMEOFFSET
536 select NEED_MACH_IO_H
537 select NEED_MACH_MEMORY_H
538 help
539 Support for Intel's IXP23xx (XScale) family of processors.
541 config ARCH_IXP2000
542 bool "IXP2400/2800-based"
543 depends on MMU
544 select CPU_XSCALE
545 select PCI
546 select ARCH_USES_GETTIMEOFFSET
547 select NEED_MACH_IO_H
548 select NEED_MACH_MEMORY_H
549 help
550 Support for Intel's IXP2400/2800 (XScale) family of processors.
552 config ARCH_IXP4XX
553 bool "IXP4xx-based"
554 depends on MMU
555 select ARCH_HAS_DMA_SET_COHERENT_MASK
556 select CLKSRC_MMIO
557 select CPU_XSCALE
558 select GENERIC_GPIO
559 select GENERIC_CLOCKEVENTS
560 select MIGHT_HAVE_PCI
561 select NEED_MACH_IO_H
562 select DMABOUNCE if PCI
563 help
564 Support for Intel's IXP4XX (XScale) family of processors.
566 config ARCH_DOVE
567 bool "Marvell Dove"
568 select CPU_V7
569 select PCI
570 select ARCH_REQUIRE_GPIOLIB
571 select GENERIC_CLOCKEVENTS
572 select NEED_MACH_IO_H
573 select PLAT_ORION
574 help
575 Support for the Marvell Dove SoC 88AP510
577 config ARCH_KIRKWOOD
578 bool "Marvell Kirkwood"
579 select CPU_FEROCEON
580 select PCI
581 select ARCH_REQUIRE_GPIOLIB
582 select GENERIC_CLOCKEVENTS
583 select NEED_MACH_IO_H
584 select PLAT_ORION
585 help
586 Support for the following Marvell Kirkwood series SoCs:
587 88F6180, 88F6192 and 88F6281.
589 config ARCH_LPC32XX
590 bool "NXP LPC32XX"
591 select CLKSRC_MMIO
592 select CPU_ARM926T
593 select ARCH_REQUIRE_GPIOLIB
594 select HAVE_IDE
595 select ARM_AMBA
596 select USB_ARCH_HAS_OHCI
597 select CLKDEV_LOOKUP
598 select GENERIC_CLOCKEVENTS
599 help
600 Support for the NXP LPC32XX family of processors
602 config ARCH_MV78XX0
603 bool "Marvell MV78xx0"
604 select CPU_FEROCEON
605 select PCI
606 select ARCH_REQUIRE_GPIOLIB
607 select GENERIC_CLOCKEVENTS
608 select NEED_MACH_IO_H
609 select PLAT_ORION
610 help
611 Support for the following Marvell MV78xx0 series SoCs:
612 MV781x0, MV782x0.
614 config ARCH_ORION5X
615 bool "Marvell Orion"
616 depends on MMU
617 select CPU_FEROCEON
618 select PCI
619 select ARCH_REQUIRE_GPIOLIB
620 select GENERIC_CLOCKEVENTS
621 select PLAT_ORION
622 help
623 Support for the following Marvell Orion 5x series SoCs:
624 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
625 Orion-2 (5281), Orion-1-90 (6183).
627 config ARCH_MMP
628 bool "Marvell PXA168/910/MMP2"
629 depends on MMU
630 select ARCH_REQUIRE_GPIOLIB
631 select CLKDEV_LOOKUP
632 select GENERIC_CLOCKEVENTS
633 select GPIO_PXA
634 select TICK_ONESHOT
635 select PLAT_PXA
636 select SPARSE_IRQ
637 select GENERIC_ALLOCATOR
638 help
639 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
641 config ARCH_KS8695
642 bool "Micrel/Kendin KS8695"
643 select CPU_ARM922T
644 select ARCH_REQUIRE_GPIOLIB
645 select ARCH_USES_GETTIMEOFFSET
646 select NEED_MACH_MEMORY_H
647 help
648 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
649 System-on-Chip devices.
651 config ARCH_W90X900
652 bool "Nuvoton W90X900 CPU"
653 select CPU_ARM926T
654 select ARCH_REQUIRE_GPIOLIB
655 select CLKDEV_LOOKUP
656 select CLKSRC_MMIO
657 select GENERIC_CLOCKEVENTS
658 help
659 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
660 At present, the w90x900 has been renamed nuc900, regarding
661 the ARM series product line, you can login the following
662 link address to know more.
664 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
665 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
667 config ARCH_TEGRA
668 bool "NVIDIA Tegra"
669 select CLKDEV_LOOKUP
670 select CLKSRC_MMIO
671 select GENERIC_CLOCKEVENTS
672 select GENERIC_GPIO
673 select HAVE_CLK
674 select HAVE_SMP
675 select MIGHT_HAVE_CACHE_L2X0
676 select NEED_MACH_IO_H if PCI
677 select ARCH_HAS_CPUFREQ
678 help
679 This enables support for NVIDIA Tegra based systems (Tegra APX,
680 Tegra 6xx and Tegra 2 series).
682 config ARCH_PICOXCELL
683 bool "Picochip picoXcell"
684 select ARCH_REQUIRE_GPIOLIB
685 select ARM_PATCH_PHYS_VIRT
686 select ARM_VIC
687 select CPU_V6K
688 select DW_APB_TIMER
689 select GENERIC_CLOCKEVENTS
690 select GENERIC_GPIO
691 select HAVE_TCM
692 select NO_IOPORT
693 select SPARSE_IRQ
694 select USE_OF
695 help
696 This enables support for systems based on the Picochip picoXcell
697 family of Femtocell devices. The picoxcell support requires device tree
698 for all boards.
700 config ARCH_PNX4008
701 bool "Philips Nexperia PNX4008 Mobile"
702 select CPU_ARM926T
703 select CLKDEV_LOOKUP
704 select ARCH_USES_GETTIMEOFFSET
705 help
706 This enables support for Philips PNX4008 mobile platform.
708 config ARCH_PXA
709 bool "PXA2xx/PXA3xx-based"
710 depends on MMU
711 select ARCH_MTD_XIP
712 select ARCH_HAS_CPUFREQ
713 select CLKDEV_LOOKUP
714 select CLKSRC_MMIO
715 select ARCH_REQUIRE_GPIOLIB
716 select GENERIC_CLOCKEVENTS
717 select GPIO_PXA
718 select TICK_ONESHOT
719 select PLAT_PXA
720 select SPARSE_IRQ
721 select AUTO_ZRELADDR
722 select MULTI_IRQ_HANDLER
723 select ARM_CPU_SUSPEND if PM
724 select HAVE_IDE
725 help
726 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
728 config ARCH_MSM
729 bool "Qualcomm MSM"
730 select HAVE_CLK
731 select GENERIC_CLOCKEVENTS
732 select ARCH_REQUIRE_GPIOLIB
733 select CLKDEV_LOOKUP
734 help
735 Support for Qualcomm MSM/QSD based systems. This runs on the
736 apps processor of the MSM/QSD and depends on a shared memory
737 interface to the modem processor which runs the baseband
738 stack and controls some vital subsystems
739 (clock and power control, etc).
741 config ARCH_SHMOBILE
742 bool "Renesas SH-Mobile / R-Mobile"
743 select HAVE_CLK
744 select CLKDEV_LOOKUP
745 select HAVE_MACH_CLKDEV
746 select HAVE_SMP
747 select GENERIC_CLOCKEVENTS
748 select MIGHT_HAVE_CACHE_L2X0
749 select NO_IOPORT
750 select SPARSE_IRQ
751 select MULTI_IRQ_HANDLER
752 select PM_GENERIC_DOMAINS if PM
753 select NEED_MACH_MEMORY_H
754 help
755 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
757 config ARCH_RPC
758 bool "RiscPC"
759 select ARCH_ACORN
760 select FIQ
761 select ARCH_MAY_HAVE_PC_FDC
762 select HAVE_PATA_PLATFORM
763 select ISA_DMA_API
764 select NO_IOPORT
765 select ARCH_SPARSEMEM_ENABLE
766 select ARCH_USES_GETTIMEOFFSET
767 select HAVE_IDE
768 select NEED_MACH_IO_H
769 select NEED_MACH_MEMORY_H
770 help
771 On the Acorn Risc-PC, Linux can support the internal IDE disk and
772 CD-ROM interface, serial and parallel port, and the floppy drive.
774 config ARCH_SA1100
775 bool "SA1100-based"
776 select CLKSRC_MMIO
777 select CPU_SA1100
778 select ISA
779 select ARCH_SPARSEMEM_ENABLE
780 select ARCH_MTD_XIP
781 select ARCH_HAS_CPUFREQ
782 select CPU_FREQ
783 select GENERIC_CLOCKEVENTS
784 select CLKDEV_LOOKUP
785 select TICK_ONESHOT
786 select ARCH_REQUIRE_GPIOLIB
787 select HAVE_IDE
788 select NEED_MACH_MEMORY_H
789 select SPARSE_IRQ
790 help
791 Support for StrongARM 11x0 based boards.
793 config ARCH_S3C24XX
794 bool "Samsung S3C24XX SoCs"
795 select GENERIC_GPIO
796 select ARCH_HAS_CPUFREQ
797 select HAVE_CLK
798 select CLKDEV_LOOKUP
799 select ARCH_USES_GETTIMEOFFSET
800 select HAVE_S3C2410_I2C if I2C
801 select HAVE_S3C_RTC if RTC_CLASS
802 select HAVE_S3C2410_WATCHDOG if WATCHDOG
803 select NEED_MACH_IO_H
804 help
805 Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
806 and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
807 (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
808 Samsung SMDK2410 development board (and derivatives).
810 config ARCH_S3C64XX
811 bool "Samsung S3C64XX"
812 select PLAT_SAMSUNG
813 select CPU_V6
814 select ARM_VIC
815 select HAVE_CLK
816 select HAVE_TCM
817 select CLKDEV_LOOKUP
818 select NO_IOPORT
819 select ARCH_USES_GETTIMEOFFSET
820 select ARCH_HAS_CPUFREQ
821 select ARCH_REQUIRE_GPIOLIB
822 select SAMSUNG_CLKSRC
823 select SAMSUNG_IRQ_VIC_TIMER
824 select S3C_GPIO_TRACK
825 select S3C_DEV_NAND
826 select USB_ARCH_HAS_OHCI
827 select SAMSUNG_GPIOLIB_4BIT
828 select HAVE_S3C2410_I2C if I2C
829 select HAVE_S3C2410_WATCHDOG if WATCHDOG
830 help
831 Samsung S3C64XX series based systems
833 config ARCH_S5P64X0
834 bool "Samsung S5P6440 S5P6450"
835 select CPU_V6
836 select GENERIC_GPIO
837 select HAVE_CLK
838 select CLKDEV_LOOKUP
839 select CLKSRC_MMIO
840 select HAVE_S3C2410_WATCHDOG if WATCHDOG
841 select GENERIC_CLOCKEVENTS
842 select HAVE_S3C2410_I2C if I2C
843 select HAVE_S3C_RTC if RTC_CLASS
844 help
845 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
846 SMDK6450.
848 config ARCH_S5PC100
849 bool "Samsung S5PC100"
850 select GENERIC_GPIO
851 select HAVE_CLK
852 select CLKDEV_LOOKUP
853 select CPU_V7
854 select ARCH_USES_GETTIMEOFFSET
855 select HAVE_S3C2410_I2C if I2C
856 select HAVE_S3C_RTC if RTC_CLASS
857 select HAVE_S3C2410_WATCHDOG if WATCHDOG
858 help
859 Samsung S5PC100 series based systems
861 config ARCH_S5PV210
862 bool "Samsung S5PV210/S5PC110"
863 select CPU_V7
864 select ARCH_SPARSEMEM_ENABLE
865 select ARCH_HAS_HOLES_MEMORYMODEL
866 select GENERIC_GPIO
867 select HAVE_CLK
868 select CLKDEV_LOOKUP
869 select CLKSRC_MMIO
870 select ARCH_HAS_CPUFREQ
871 select GENERIC_CLOCKEVENTS
872 select HAVE_S3C2410_I2C if I2C
873 select HAVE_S3C_RTC if RTC_CLASS
874 select HAVE_S3C2410_WATCHDOG if WATCHDOG
875 select NEED_MACH_MEMORY_H
876 help
877 Samsung S5PV210/S5PC110 series based systems
879 config ARCH_EXYNOS
880 bool "SAMSUNG EXYNOS"
881 select CPU_V7
882 select ARCH_SPARSEMEM_ENABLE
883 select ARCH_HAS_HOLES_MEMORYMODEL
884 select GENERIC_GPIO
885 select HAVE_CLK
886 select CLKDEV_LOOKUP
887 select ARCH_HAS_CPUFREQ
888 select GENERIC_CLOCKEVENTS
889 select HAVE_S3C_RTC if RTC_CLASS
890 select HAVE_S3C2410_I2C if I2C
891 select HAVE_S3C2410_WATCHDOG if WATCHDOG
892 select NEED_MACH_MEMORY_H
893 help
894 Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
896 config ARCH_SHARK
897 bool "Shark"
898 select CPU_SA110
899 select ISA
900 select ISA_DMA
901 select ZONE_DMA
902 select PCI
903 select ARCH_USES_GETTIMEOFFSET
904 select NEED_MACH_MEMORY_H
905 select NEED_MACH_IO_H
906 help
907 Support for the StrongARM based Digital DNARD machine, also known
908 as "Shark" (<http://www.shark-linux.de/shark.html>).
910 config ARCH_U300
911 bool "ST-Ericsson U300 Series"
912 depends on MMU
913 select CLKSRC_MMIO
914 select CPU_ARM926T
915 select HAVE_TCM
916 select ARM_AMBA
917 select ARM_PATCH_PHYS_VIRT
918 select ARM_VIC
919 select GENERIC_CLOCKEVENTS
920 select CLKDEV_LOOKUP
921 select HAVE_MACH_CLKDEV
922 select GENERIC_GPIO
923 select ARCH_REQUIRE_GPIOLIB
924 help
925 Support for ST-Ericsson U300 series mobile platforms.
927 config ARCH_U8500
928 bool "ST-Ericsson U8500 Series"
929 depends on MMU
930 select CPU_V7
931 select ARM_AMBA
932 select GENERIC_CLOCKEVENTS
933 select CLKDEV_LOOKUP
934 select ARCH_REQUIRE_GPIOLIB
935 select ARCH_HAS_CPUFREQ
936 select HAVE_SMP
937 select MIGHT_HAVE_CACHE_L2X0
938 help
939 Support for ST-Ericsson's Ux500 architecture
941 config ARCH_NOMADIK
942 bool "STMicroelectronics Nomadik"
943 select ARM_AMBA
944 select ARM_VIC
945 select CPU_ARM926T
946 select CLKDEV_LOOKUP
947 select GENERIC_CLOCKEVENTS
948 select MIGHT_HAVE_CACHE_L2X0
949 select ARCH_REQUIRE_GPIOLIB
950 help
951 Support for the Nomadik platform by ST-Ericsson
953 config ARCH_DAVINCI
954 bool "TI DaVinci"
955 select GENERIC_CLOCKEVENTS
956 select ARCH_REQUIRE_GPIOLIB
957 select ZONE_DMA
958 select HAVE_IDE
959 select CLKDEV_LOOKUP
960 select GENERIC_ALLOCATOR
961 select GENERIC_IRQ_CHIP
962 select ARCH_HAS_HOLES_MEMORYMODEL
963 help
964 Support for TI's DaVinci platform.
966 config ARCH_OMAP
967 bool "TI OMAP"
968 select HAVE_CLK
969 select ARCH_REQUIRE_GPIOLIB
970 select ARCH_HAS_CPUFREQ
971 select CLKSRC_MMIO
972 select GENERIC_CLOCKEVENTS
973 select ARCH_HAS_HOLES_MEMORYMODEL
974 help
975 Support for TI's OMAP platform (OMAP1/2/3/4).
977 config PLAT_SPEAR
978 bool "ST SPEAr"
979 select ARM_AMBA
980 select ARCH_REQUIRE_GPIOLIB
981 select CLKDEV_LOOKUP
982 select CLKSRC_MMIO
983 select GENERIC_CLOCKEVENTS
984 select HAVE_CLK
985 help
986 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
988 config ARCH_VT8500
989 bool "VIA/WonderMedia 85xx"
990 select CPU_ARM926T
991 select GENERIC_GPIO
992 select ARCH_HAS_CPUFREQ
993 select GENERIC_CLOCKEVENTS
994 select ARCH_REQUIRE_GPIOLIB
995 select HAVE_PWM
996 help
997 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
999 config ARCH_ZYNQ
1000 bool "Xilinx Zynq ARM Cortex A9 Platform"
1001 select CPU_V7
1002 select GENERIC_CLOCKEVENTS
1003 select CLKDEV_LOOKUP
1004 select ARM_GIC
1005 select ARM_AMBA
1006 select ICST
1007 select MIGHT_HAVE_CACHE_L2X0
1008 select USE_OF
1009 help
1010 Support for Xilinx Zynq ARM Cortex A9 Platform
1011 endchoice
1013 #
1014 # This is sorted alphabetically by mach-* pathname. However, plat-*
1015 # Kconfigs may be included either alphabetically (according to the
1016 # plat- suffix) or along side the corresponding mach-* source.
1017 #
1018 source "arch/arm/mach-at91/Kconfig"
1020 source "arch/arm/mach-bcmring/Kconfig"
1022 source "arch/arm/mach-clps711x/Kconfig"
1024 source "arch/arm/mach-cns3xxx/Kconfig"
1026 source "arch/arm/mach-davinci/Kconfig"
1028 source "arch/arm/mach-dove/Kconfig"
1030 source "arch/arm/mach-ep93xx/Kconfig"
1032 source "arch/arm/mach-footbridge/Kconfig"
1034 source "arch/arm/mach-gemini/Kconfig"
1036 source "arch/arm/mach-h720x/Kconfig"
1038 source "arch/arm/mach-integrator/Kconfig"
1040 source "arch/arm/mach-iop32x/Kconfig"
1042 source "arch/arm/mach-iop33x/Kconfig"
1044 source "arch/arm/mach-iop13xx/Kconfig"
1046 source "arch/arm/mach-ixp4xx/Kconfig"
1048 source "arch/arm/mach-ixp2000/Kconfig"
1050 source "arch/arm/mach-ixp23xx/Kconfig"
1052 source "arch/arm/mach-kirkwood/Kconfig"
1054 source "arch/arm/mach-ks8695/Kconfig"
1056 source "arch/arm/mach-lpc32xx/Kconfig"
1058 source "arch/arm/mach-msm/Kconfig"
1060 source "arch/arm/mach-mv78xx0/Kconfig"
1062 source "arch/arm/plat-mxc/Kconfig"
1064 source "arch/arm/mach-mxs/Kconfig"
1066 source "arch/arm/mach-netx/Kconfig"
1068 source "arch/arm/mach-nomadik/Kconfig"
1069 source "arch/arm/plat-nomadik/Kconfig"
1071 source "arch/arm/plat-omap/Kconfig"
1073 source "arch/arm/mach-omap1/Kconfig"
1075 source "arch/arm/mach-omap2/Kconfig"
1077 source "arch/arm/mach-orion5x/Kconfig"
1079 source "arch/arm/mach-pxa/Kconfig"
1080 source "arch/arm/plat-pxa/Kconfig"
1082 source "arch/arm/mach-mmp/Kconfig"
1084 source "arch/arm/mach-realview/Kconfig"
1086 source "arch/arm/mach-sa1100/Kconfig"
1088 source "arch/arm/plat-samsung/Kconfig"
1089 source "arch/arm/plat-s3c24xx/Kconfig"
1091 source "arch/arm/plat-spear/Kconfig"
1093 source "arch/arm/mach-s3c24xx/Kconfig"
1094 if ARCH_S3C24XX
1095 source "arch/arm/mach-s3c2412/Kconfig"
1096 source "arch/arm/mach-s3c2440/Kconfig"
1097 endif
1099 if ARCH_S3C64XX
1100 source "arch/arm/mach-s3c64xx/Kconfig"
1101 endif
1103 source "arch/arm/mach-s5p64x0/Kconfig"
1105 source "arch/arm/mach-s5pc100/Kconfig"
1107 source "arch/arm/mach-s5pv210/Kconfig"
1109 source "arch/arm/mach-exynos/Kconfig"
1111 source "arch/arm/mach-shmobile/Kconfig"
1113 source "arch/arm/mach-tegra/Kconfig"
1115 source "arch/arm/mach-u300/Kconfig"
1117 source "arch/arm/mach-ux500/Kconfig"
1119 source "arch/arm/mach-versatile/Kconfig"
1121 source "arch/arm/mach-vexpress/Kconfig"
1122 source "arch/arm/plat-versatile/Kconfig"
1124 source "arch/arm/mach-vt8500/Kconfig"
1126 source "arch/arm/mach-w90x900/Kconfig"
1128 # Definitions to make life easier
1129 config ARCH_ACORN
1130 bool
1132 config PLAT_IOP
1133 bool
1134 select GENERIC_CLOCKEVENTS
1136 config PLAT_ORION
1137 bool
1138 select CLKSRC_MMIO
1139 select GENERIC_IRQ_CHIP
1141 config PLAT_PXA
1142 bool
1144 config PLAT_VERSATILE
1145 bool
1147 config ARM_TIMER_SP804
1148 bool
1149 select CLKSRC_MMIO
1150 select HAVE_SCHED_CLOCK
1152 source arch/arm/mm/Kconfig
1154 config ARM_NR_BANKS
1155 int
1156 default 16 if ARCH_EP93XX
1157 default 8
1159 config IWMMXT
1160 bool "Enable iWMMXt support"
1161 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1162 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1163 help
1164 Enable support for iWMMXt context switching at run time if
1165 running on a CPU that supports it.
1167 config XSCALE_PMU
1168 bool
1169 depends on CPU_XSCALE
1170 default y
1172 config CPU_HAS_PMU
1173 depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1174 (!ARCH_OMAP3 || OMAP3_EMU)
1175 default y
1176 bool
1178 config MULTI_IRQ_HANDLER
1179 bool
1180 help
1181 Allow each machine to specify it's own IRQ handler at run time.
1183 if !MMU
1184 source "arch/arm/Kconfig-nommu"
1185 endif
1187 config ARM_ERRATA_411920
1188 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1189 depends on CPU_V6 || CPU_V6K
1190 help
1191 Invalidation of the Instruction Cache operation can
1192 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1193 It does not affect the MPCore. This option enables the ARM Ltd.
1194 recommended workaround.
1196 config ARM_ERRATA_430973
1197 bool "ARM errata: Stale prediction on replaced interworking branch"
1198 depends on CPU_V7
1199 help
1200 This option enables the workaround for the 430973 Cortex-A8
1201 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1202 interworking branch is replaced with another code sequence at the
1203 same virtual address, whether due to self-modifying code or virtual
1204 to physical address re-mapping, Cortex-A8 does not recover from the
1205 stale interworking branch prediction. This results in Cortex-A8
1206 executing the new code sequence in the incorrect ARM or Thumb state.
1207 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1208 and also flushes the branch target cache at every context switch.
1209 Note that setting specific bits in the ACTLR register may not be
1210 available in non-secure mode.
1212 config ARM_ERRATA_458693
1213 bool "ARM errata: Processor deadlock when a false hazard is created"
1214 depends on CPU_V7
1215 help
1216 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1217 erratum. For very specific sequences of memory operations, it is
1218 possible for a hazard condition intended for a cache line to instead
1219 be incorrectly associated with a different cache line. This false
1220 hazard might then cause a processor deadlock. The workaround enables
1221 the L1 caching of the NEON accesses and disables the PLD instruction
1222 in the ACTLR register. Note that setting specific bits in the ACTLR
1223 register may not be available in non-secure mode.
1225 config ARM_ERRATA_460075
1226 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1227 depends on CPU_V7
1228 help
1229 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1230 erratum. Any asynchronous access to the L2 cache may encounter a
1231 situation in which recent store transactions to the L2 cache are lost
1232 and overwritten with stale memory contents from external memory. The
1233 workaround disables the write-allocate mode for the L2 cache via the
1234 ACTLR register. Note that setting specific bits in the ACTLR register
1235 may not be available in non-secure mode.
1237 config ARM_ERRATA_742230
1238 bool "ARM errata: DMB operation may be faulty"
1239 depends on CPU_V7 && SMP
1240 help
1241 This option enables the workaround for the 742230 Cortex-A9
1242 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1243 between two write operations may not ensure the correct visibility
1244 ordering of the two writes. This workaround sets a specific bit in
1245 the diagnostic register of the Cortex-A9 which causes the DMB
1246 instruction to behave as a DSB, ensuring the correct behaviour of
1247 the two writes.
1249 config ARM_ERRATA_742231
1250 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1251 depends on CPU_V7 && SMP
1252 help
1253 This option enables the workaround for the 742231 Cortex-A9
1254 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1255 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1256 accessing some data located in the same cache line, may get corrupted
1257 data due to bad handling of the address hazard when the line gets
1258 replaced from one of the CPUs at the same time as another CPU is
1259 accessing it. This workaround sets specific bits in the diagnostic
1260 register of the Cortex-A9 which reduces the linefill issuing
1261 capabilities of the processor.
1263 config PL310_ERRATA_588369
1264 bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1265 depends on CACHE_L2X0
1266 help
1267 The PL310 L2 cache controller implements three types of Clean &
1268 Invalidate maintenance operations: by Physical Address
1269 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1270 They are architecturally defined to behave as the execution of a
1271 clean operation followed immediately by an invalidate operation,
1272 both performing to the same memory location. This functionality
1273 is not correctly implemented in PL310 as clean lines are not
1274 invalidated as a result of these operations.
1276 config ARM_ERRATA_720789
1277 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1278 depends on CPU_V7
1279 help
1280 This option enables the workaround for the 720789 Cortex-A9 (prior to
1281 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1282 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1283 As a consequence of this erratum, some TLB entries which should be
1284 invalidated are not, resulting in an incoherency in the system page
1285 tables. The workaround changes the TLB flushing routines to invalidate
1286 entries regardless of the ASID.
1288 config PL310_ERRATA_727915
1289 bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1290 depends on CACHE_L2X0
1291 help
1292 PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1293 operation (offset 0x7FC). This operation runs in background so that
1294 PL310 can handle normal accesses while it is in progress. Under very
1295 rare circumstances, due to this erratum, write data can be lost when
1296 PL310 treats a cacheable write transaction during a Clean &
1297 Invalidate by Way operation.
1299 config ARM_ERRATA_743622
1300 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1301 depends on CPU_V7
1302 help
1303 This option enables the workaround for the 743622 Cortex-A9
1304 (r2p*) erratum. Under very rare conditions, a faulty
1305 optimisation in the Cortex-A9 Store Buffer may lead to data
1306 corruption. This workaround sets a specific bit in the diagnostic
1307 register of the Cortex-A9 which disables the Store Buffer
1308 optimisation, preventing the defect from occurring. This has no
1309 visible impact on the overall performance or power consumption of the
1310 processor.
1312 config ARM_ERRATA_751472
1313 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1314 depends on CPU_V7
1315 help
1316 This option enables the workaround for the 751472 Cortex-A9 (prior
1317 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1318 completion of a following broadcasted operation if the second
1319 operation is received by a CPU before the ICIALLUIS has completed,
1320 potentially leading to corrupted entries in the cache or TLB.
1322 config PL310_ERRATA_753970
1323 bool "PL310 errata: cache sync operation may be faulty"
1324 depends on CACHE_PL310
1325 help
1326 This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1328 Under some condition the effect of cache sync operation on
1329 the store buffer still remains when the operation completes.
1330 This means that the store buffer is always asked to drain and
1331 this prevents it from merging any further writes. The workaround
1332 is to replace the normal offset of cache sync operation (0x730)
1333 by another offset targeting an unmapped PL310 register 0x740.
1334 This has the same effect as the cache sync operation: store buffer
1335 drain and waiting for all buffers empty.
1337 config ARM_ERRATA_754322
1338 bool "ARM errata: possible faulty MMU translations following an ASID switch"
1339 depends on CPU_V7
1340 help
1341 This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1342 r3p*) erratum. A speculative memory access may cause a page table walk
1343 which starts prior to an ASID switch but completes afterwards. This
1344 can populate the micro-TLB with a stale entry which may be hit with
1345 the new ASID. This workaround places two dsb instructions in the mm
1346 switching code so that no page table walks can cross the ASID switch.
1348 config ARM_ERRATA_754327
1349 bool "ARM errata: no automatic Store Buffer drain"
1350 depends on CPU_V7 && SMP
1351 help
1352 This option enables the workaround for the 754327 Cortex-A9 (prior to
1353 r2p0) erratum. The Store Buffer does not have any automatic draining
1354 mechanism and therefore a livelock may occur if an external agent
1355 continuously polls a memory location waiting to observe an update.
1356 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1357 written polling loops from denying visibility of updates to memory.
1359 config ARM_ERRATA_364296
1360 bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1361 depends on CPU_V6 && !SMP
1362 help
1363 This options enables the workaround for the 364296 ARM1136
1364 r0p2 erratum (possible cache data corruption with
1365 hit-under-miss enabled). It sets the undocumented bit 31 in
1366 the auxiliary control register and the FI bit in the control
1367 register, thus disabling hit-under-miss without putting the
1368 processor into full low interrupt latency mode. ARM11MPCore
1369 is not affected.
1371 config ARM_ERRATA_764369
1372 bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1373 depends on CPU_V7 && SMP
1374 help
1375 This option enables the workaround for erratum 764369
1376 affecting Cortex-A9 MPCore with two or more processors (all
1377 current revisions). Under certain timing circumstances, a data
1378 cache line maintenance operation by MVA targeting an Inner
1379 Shareable memory region may fail to proceed up to either the
1380 Point of Coherency or to the Point of Unification of the
1381 system. This workaround adds a DSB instruction before the
1382 relevant cache maintenance functions and sets a specific bit
1383 in the diagnostic control register of the SCU.
1385 config PL310_ERRATA_769419
1386 bool "PL310 errata: no automatic Store Buffer drain"
1387 depends on CACHE_L2X0
1388 help
1389 On revisions of the PL310 prior to r3p2, the Store Buffer does
1390 not automatically drain. This can cause normal, non-cacheable
1391 writes to be retained when the memory system is idle, leading
1392 to suboptimal I/O performance for drivers using coherent DMA.
1393 This option adds a write barrier to the cpu_idle loop so that,
1394 on systems with an outer cache, the store buffer is drained
1395 explicitly.
1397 endmenu
1399 source "arch/arm/common/Kconfig"
1401 menu "Bus support"
1403 config ARM_AMBA
1404 bool
1406 config ISA
1407 bool
1408 help
1409 Find out whether you have ISA slots on your motherboard. ISA is the
1410 name of a bus system, i.e. the way the CPU talks to the other stuff
1411 inside your box. Other bus systems are PCI, EISA, MicroChannel
1412 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1413 newer boards don't support it. If you have ISA, say Y, otherwise N.
1415 # Select ISA DMA controller support
1416 config ISA_DMA
1417 bool
1418 select ISA_DMA_API
1420 # Select ISA DMA interface
1421 config ISA_DMA_API
1422 bool
1424 config PCI
1425 bool "PCI support" if MIGHT_HAVE_PCI
1426 help
1427 Find out whether you have a PCI motherboard. PCI is the name of a
1428 bus system, i.e. the way the CPU talks to the other stuff inside
1429 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1430 VESA. If you have PCI, say Y, otherwise N.
1432 config PCI_DOMAINS
1433 bool
1434 depends on PCI
1436 config PCI_NANOENGINE
1437 bool "BSE nanoEngine PCI support"
1438 depends on SA1100_NANOENGINE
1439 help
1440 Enable PCI on the BSE nanoEngine board.
1442 config PCI_SYSCALL
1443 def_bool PCI
1445 # Select the host bridge type
1446 config PCI_HOST_VIA82C505
1447 bool
1448 depends on PCI && ARCH_SHARK
1449 default y
1451 config PCI_HOST_ITE8152
1452 bool
1453 depends on PCI && MACH_ARMCORE
1454 default y
1455 select DMABOUNCE
1457 source "drivers/pci/Kconfig"
1459 source "drivers/pcmcia/Kconfig"
1461 endmenu
1463 menu "Kernel Features"
1465 source "kernel/time/Kconfig"
1467 config HAVE_SMP
1468 bool
1469 help
1470 This option should be selected by machines which have an SMP-
1471 capable CPU.
1473 The only effect of this option is to make the SMP-related
1474 options available to the user for configuration.
1476 config SMP
1477 bool "Symmetric Multi-Processing"
1478 depends on CPU_V6K || CPU_V7
1479 depends on GENERIC_CLOCKEVENTS
1480 depends on HAVE_SMP
1481 depends on MMU
1482 select USE_GENERIC_SMP_HELPERS
1483 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1484 help
1485 This enables support for systems with more than one CPU. If you have
1486 a system with only one CPU, like most personal computers, say N. If
1487 you have a system with more than one CPU, say Y.
1489 If you say N here, the kernel will run on single and multiprocessor
1490 machines, but will use only one CPU of a multiprocessor machine. If
1491 you say Y here, the kernel will run on many, but not all, single
1492 processor machines. On a single processor machine, the kernel will
1493 run faster if you say N here.
1495 See also <file:Documentation/x86/i386/IO-APIC.txt>,
1496 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1497 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1499 If you don't know what to do here, say N.
1501 config SMP_ON_UP
1502 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1503 depends on EXPERIMENTAL
1504 depends on SMP && !XIP_KERNEL
1505 default y
1506 help
1507 SMP kernels contain instructions which fail on non-SMP processors.
1508 Enabling this option allows the kernel to modify itself to make
1509 these instructions safe. Disabling it allows about 1K of space
1510 savings.
1512 If you don't know what to do here, say Y.
1514 config ARM_CPU_TOPOLOGY
1515 bool "Support cpu topology definition"
1516 depends on SMP && CPU_V7
1517 default y
1518 help
1519 Support ARM cpu topology definition. The MPIDR register defines
1520 affinity between processors which is then used to describe the cpu
1521 topology of an ARM System.
1523 config SCHED_MC
1524 bool "Multi-core scheduler support"
1525 depends on ARM_CPU_TOPOLOGY
1526 help
1527 Multi-core scheduler support improves the CPU scheduler's decision
1528 making when dealing with multi-core CPU chips at a cost of slightly
1529 increased overhead in some places. If unsure say N here.
1531 config SCHED_SMT
1532 bool "SMT scheduler support"
1533 depends on ARM_CPU_TOPOLOGY
1534 help
1535 Improves the CPU scheduler's decision making when dealing with
1536 MultiThreading at a cost of slightly increased overhead in some
1537 places. If unsure say N here.
1539 config HAVE_ARM_SCU
1540 bool
1541 help
1542 This option enables support for the ARM system coherency unit
1544 config HAVE_ARM_TWD
1545 bool
1546 depends on SMP
1547 select TICK_ONESHOT
1548 help
1549 This options enables support for the ARM timer and watchdog unit
1551 choice
1552 prompt "Memory split"
1553 default VMSPLIT_3G
1554 help
1555 Select the desired split between kernel and user memory.
1557 If you are not absolutely sure what you are doing, leave this
1558 option alone!
1560 config VMSPLIT_3G
1561 bool "3G/1G user/kernel split"
1562 config VMSPLIT_2G
1563 bool "2G/2G user/kernel split"
1564 config VMSPLIT_1G
1565 bool "1G/3G user/kernel split"
1566 endchoice
1568 config PAGE_OFFSET
1569 hex
1570 default 0x40000000 if VMSPLIT_1G
1571 default 0x80000000 if VMSPLIT_2G
1572 default 0xC0000000
1574 config NR_CPUS
1575 int "Maximum number of CPUs (2-32)"
1576 range 2 32
1577 depends on SMP
1578 default "4"
1580 config HOTPLUG_CPU
1581 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1582 depends on SMP && HOTPLUG && EXPERIMENTAL
1583 help
1584 Say Y here to experiment with turning CPUs off and on. CPUs
1585 can be controlled through /sys/devices/system/cpu.
1587 config LOCAL_TIMERS
1588 bool "Use local timer interrupts"
1589 depends on SMP
1590 default y
1591 select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1592 help
1593 Enable support for local timers on SMP platforms, rather then the
1594 legacy IPI broadcast method. Local timers allows the system
1595 accounting to be spread across the timer interval, preventing a
1596 "thundering herd" at every timer tick.
1598 config ARCH_NR_GPIO
1599 int
1600 default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1601 default 355 if ARCH_U8500
1602 default 264 if MACH_H4700
1603 default 0
1604 help
1605 Maximum number of GPIOs in the system.
1607 If unsure, leave the default value.
1609 source kernel/Kconfig.preempt
1611 config HZ
1612 int
1613 default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1614 ARCH_S5PV210 || ARCH_EXYNOS4
1615 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1616 default AT91_TIMER_HZ if ARCH_AT91
1617 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1618 default 100
1620 config THUMB2_KERNEL
1621 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1622 depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1623 select AEABI
1624 select ARM_ASM_UNIFIED
1625 select ARM_UNWIND
1626 help
1627 By enabling this option, the kernel will be compiled in
1628 Thumb-2 mode. A compiler/assembler that understand the unified
1629 ARM-Thumb syntax is needed.
1631 If unsure, say N.
1633 config THUMB2_AVOID_R_ARM_THM_JUMP11
1634 bool "Work around buggy Thumb-2 short branch relocations in gas"
1635 depends on THUMB2_KERNEL && MODULES
1636 default y
1637 help
1638 Various binutils versions can resolve Thumb-2 branches to
1639 locally-defined, preemptible global symbols as short-range "b.n"
1640 branch instructions.
1642 This is a problem, because there's no guarantee the final
1643 destination of the symbol, or any candidate locations for a
1644 trampoline, are within range of the branch. For this reason, the
1645 kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1646 relocation in modules at all, and it makes little sense to add
1647 support.
1649 The symptom is that the kernel fails with an "unsupported
1650 relocation" error when loading some modules.
1652 Until fixed tools are available, passing
1653 -fno-optimize-sibling-calls to gcc should prevent gcc generating
1654 code which hits this problem, at the cost of a bit of extra runtime
1655 stack usage in some cases.
1657 The problem is described in more detail at:
1658 https://bugs.launchpad.net/binutils-linaro/+bug/725126
1660 Only Thumb-2 kernels are affected.
1662 Unless you are sure your tools don't have this problem, say Y.
1664 config ARM_ASM_UNIFIED
1665 bool
1667 config AEABI
1668 bool "Use the ARM EABI to compile the kernel"
1669 help
1670 This option allows for the kernel to be compiled using the latest
1671 ARM ABI (aka EABI). This is only useful if you are using a user
1672 space environment that is also compiled with EABI.
1674 Since there are major incompatibilities between the legacy ABI and
1675 EABI, especially with regard to structure member alignment, this
1676 option also changes the kernel syscall calling convention to
1677 disambiguate both ABIs and allow for backward compatibility support
1678 (selected with CONFIG_OABI_COMPAT).
1680 To use this you need GCC version 4.0.0 or later.
1682 config OABI_COMPAT
1683 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1684 depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1685 default y
1686 help
1687 This option preserves the old syscall interface along with the
1688 new (ARM EABI) one. It also provides a compatibility layer to
1689 intercept syscalls that have structure arguments which layout
1690 in memory differs between the legacy ABI and the new ARM EABI
1691 (only for non "thumb" binaries). This option adds a tiny
1692 overhead to all syscalls and produces a slightly larger kernel.
1693 If you know you'll be using only pure EABI user space then you
1694 can say N here. If this option is not selected and you attempt
1695 to execute a legacy ABI binary then the result will be
1696 UNPREDICTABLE (in fact it can be predicted that it won't work
1697 at all). If in doubt say Y.
1699 config ARCH_HAS_HOLES_MEMORYMODEL
1700 bool
1702 config ARCH_SPARSEMEM_ENABLE
1703 bool
1705 config ARCH_SPARSEMEM_DEFAULT
1706 def_bool ARCH_SPARSEMEM_ENABLE
1708 config ARCH_SELECT_MEMORY_MODEL
1709 def_bool ARCH_SPARSEMEM_ENABLE
1711 config HAVE_ARCH_PFN_VALID
1712 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1714 config HIGHMEM
1715 bool "High Memory Support"
1716 depends on MMU
1717 help
1718 The address space of ARM processors is only 4 Gigabytes large
1719 and it has to accommodate user address space, kernel address
1720 space as well as some memory mapped IO. That means that, if you
1721 have a large amount of physical memory and/or IO, not all of the
1722 memory can be "permanently mapped" by the kernel. The physical
1723 memory that is not permanently mapped is called "high memory".
1725 Depending on the selected kernel/user memory split, minimum
1726 vmalloc space and actual amount of RAM, you may not need this
1727 option which should result in a slightly faster kernel.
1729 If unsure, say n.
1731 config HIGHPTE
1732 bool "Allocate 2nd-level pagetables from highmem"
1733 depends on HIGHMEM
1735 config HW_PERF_EVENTS
1736 bool "Enable hardware performance counter support for perf events"
1737 depends on PERF_EVENTS && CPU_HAS_PMU
1738 default y
1739 help
1740 Enable hardware performance counter support for perf events. If
1741 disabled, perf events will use software events only.
1743 source "mm/Kconfig"
1745 config FORCE_MAX_ZONEORDER
1746 int "Maximum zone order" if ARCH_SHMOBILE
1747 range 11 64 if ARCH_SHMOBILE
1748 default "9" if SA1111
1749 default "11"
1750 help
1751 The kernel memory allocator divides physically contiguous memory
1752 blocks into "zones", where each zone is a power of two number of
1753 pages. This option selects the largest power of two that the kernel
1754 keeps in the memory allocator. If you need to allocate very large
1755 blocks of physically contiguous memory, then you may need to
1756 increase this value.
1758 This config option is actually maximum order plus one. For example,
1759 a value of 11 means that the largest free memory block is 2^10 pages.
1761 config LEDS
1762 bool "Timer and CPU usage LEDs"
1763 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1764 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1765 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1766 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1767 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1768 ARCH_AT91 || ARCH_DAVINCI || \
1769 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1770 help
1771 If you say Y here, the LEDs on your machine will be used
1772 to provide useful information about your current system status.
1774 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1775 be able to select which LEDs are active using the options below. If
1776 you are compiling a kernel for the EBSA-110 or the LART however, the
1777 red LED will simply flash regularly to indicate that the system is
1778 still functional. It is safe to say Y here if you have a CATS
1779 system, but the driver will do nothing.
1781 config LEDS_TIMER
1782 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1783 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1784 || MACH_OMAP_PERSEUS2
1785 depends on LEDS
1786 depends on !GENERIC_CLOCKEVENTS
1787 default y if ARCH_EBSA110
1788 help
1789 If you say Y here, one of the system LEDs (the green one on the
1790 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1791 will flash regularly to indicate that the system is still
1792 operational. This is mainly useful to kernel hackers who are
1793 debugging unstable kernels.
1795 The LART uses the same LED for both Timer LED and CPU usage LED
1796 functions. You may choose to use both, but the Timer LED function
1797 will overrule the CPU usage LED.
1799 config LEDS_CPU
1800 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1801 !ARCH_OMAP) \
1802 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1803 || MACH_OMAP_PERSEUS2
1804 depends on LEDS
1805 help
1806 If you say Y here, the red LED will be used to give a good real
1807 time indication of CPU usage, by lighting whenever the idle task
1808 is not currently executing.
1810 The LART uses the same LED for both Timer LED and CPU usage LED
1811 functions. You may choose to use both, but the Timer LED function
1812 will overrule the CPU usage LED.
1814 config ALIGNMENT_TRAP
1815 bool
1816 depends on CPU_CP15_MMU
1817 default y if !ARCH_EBSA110
1818 select HAVE_PROC_CPU if PROC_FS
1819 help
1820 ARM processors cannot fetch/store information which is not
1821 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1822 address divisible by 4. On 32-bit ARM processors, these non-aligned
1823 fetch/store instructions will be emulated in software if you say
1824 here, which has a severe performance impact. This is necessary for
1825 correct operation of some network protocols. With an IP-only
1826 configuration it is safe to say N, otherwise say Y.
1828 config UACCESS_WITH_MEMCPY
1829 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1830 depends on MMU && EXPERIMENTAL
1831 default y if CPU_FEROCEON
1832 help
1833 Implement faster copy_to_user and clear_user methods for CPU
1834 cores where a 8-word STM instruction give significantly higher
1835 memory write throughput than a sequence of individual 32bit stores.
1837 A possible side effect is a slight increase in scheduling latency
1838 between threads sharing the same address space if they invoke
1839 such copy operations with large buffers.
1841 However, if the CPU data cache is using a write-allocate mode,
1842 this option is unlikely to provide any performance gain.
1844 config SECCOMP
1845 bool
1846 prompt "Enable seccomp to safely compute untrusted bytecode"
1847 ---help---
1848 This kernel feature is useful for number crunching applications
1849 that may need to compute untrusted bytecode during their
1850 execution. By using pipes or other transports made available to
1851 the process as file descriptors supporting the read/write
1852 syscalls, it's possible to isolate those applications in
1853 their own address space using seccomp. Once seccomp is
1854 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1855 and the task is only allowed to execute a few safe syscalls
1856 defined by each seccomp mode.
1858 config CC_STACKPROTECTOR
1859 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1860 depends on EXPERIMENTAL
1861 help
1862 This option turns on the -fstack-protector GCC feature. This
1863 feature puts, at the beginning of functions, a canary value on
1864 the stack just before the return address, and validates
1865 the value just before actually returning. Stack based buffer
1866 overflows (that need to overwrite this return address) now also
1867 overwrite the canary, which gets detected and the attack is then
1868 neutralized via a kernel panic.
1869 This feature requires gcc version 4.2 or above.
1871 config DEPRECATED_PARAM_STRUCT
1872 bool "Provide old way to pass kernel parameters"
1873 help
1874 This was deprecated in 2001 and announced to live on for 5 years.
1875 Some old boot loaders still use this way.
1877 endmenu
1879 menu "Boot options"
1881 config USE_OF
1882 bool "Flattened Device Tree support"
1883 select OF
1884 select OF_EARLY_FLATTREE
1885 select IRQ_DOMAIN
1886 help
1887 Include support for flattened device tree machine descriptions.
1889 # Compressed boot loader in ROM. Yes, we really want to ask about
1890 # TEXT and BSS so we preserve their values in the config files.
1891 config ZBOOT_ROM_TEXT
1892 hex "Compressed ROM boot loader base address"
1893 default "0"
1894 help
1895 The physical address at which the ROM-able zImage is to be
1896 placed in the target. Platforms which normally make use of
1897 ROM-able zImage formats normally set this to a suitable
1898 value in their defconfig file.
1900 If ZBOOT_ROM is not enabled, this has no effect.
1902 config ZBOOT_ROM_BSS
1903 hex "Compressed ROM boot loader BSS address"
1904 default "0"
1905 help
1906 The base address of an area of read/write memory in the target
1907 for the ROM-able zImage which must be available while the
1908 decompressor is running. It must be large enough to hold the
1909 entire decompressed kernel plus an additional 128 KiB.
1910 Platforms which normally make use of ROM-able zImage formats
1911 normally set this to a suitable value in their defconfig file.
1913 If ZBOOT_ROM is not enabled, this has no effect.
1915 config ZBOOT_ROM
1916 bool "Compressed boot loader in ROM/flash"
1917 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1918 help
1919 Say Y here if you intend to execute your compressed kernel image
1920 (zImage) directly from ROM or flash. If unsure, say N.
1922 choice
1923 prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1924 depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1925 default ZBOOT_ROM_NONE
1926 help
1927 Include experimental SD/MMC loading code in the ROM-able zImage.
1928 With this enabled it is possible to write the the ROM-able zImage
1929 kernel image to an MMC or SD card and boot the kernel straight
1930 from the reset vector. At reset the processor Mask ROM will load
1931 the first part of the the ROM-able zImage which in turn loads the
1932 rest the kernel image to RAM.
1934 config ZBOOT_ROM_NONE
1935 bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1936 help
1937 Do not load image from SD or MMC
1939 config ZBOOT_ROM_MMCIF
1940 bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1941 help
1942 Load image from MMCIF hardware block.
1944 config ZBOOT_ROM_SH_MOBILE_SDHI
1945 bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1946 help
1947 Load image from SDHI hardware block
1949 endchoice
1951 config ARM_APPENDED_DTB
1952 bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1953 depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1954 help
1955 With this option, the boot code will look for a device tree binary
1956 (DTB) appended to zImage
1957 (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1959 This is meant as a backward compatibility convenience for those
1960 systems with a bootloader that can't be upgraded to accommodate
1961 the documented boot protocol using a device tree.
1963 Beware that there is very little in terms of protection against
1964 this option being confused by leftover garbage in memory that might
1965 look like a DTB header after a reboot if no actual DTB is appended
1966 to zImage. Do not leave this option active in a production kernel
1967 if you don't intend to always append a DTB. Proper passing of the
1968 location into r2 of a bootloader provided DTB is always preferable
1969 to this option.
1971 config ARM_ATAG_DTB_COMPAT
1972 bool "Supplement the appended DTB with traditional ATAG information"
1973 depends on ARM_APPENDED_DTB
1974 help
1975 Some old bootloaders can't be updated to a DTB capable one, yet
1976 they provide ATAGs with memory configuration, the ramdisk address,
1977 the kernel cmdline string, etc. Such information is dynamically
1978 provided by the bootloader and can't always be stored in a static
1979 DTB. To allow a device tree enabled kernel to be used with such
1980 bootloaders, this option allows zImage to extract the information
1981 from the ATAG list and store it at run time into the appended DTB.
1983 config CMDLINE
1984 string "Default kernel command string"
1985 default ""
1986 help
1987 On some architectures (EBSA110 and CATS), there is currently no way
1988 for the boot loader to pass arguments to the kernel. For these
1989 architectures, you should supply some command-line options at build
1990 time by entering them here. As a minimum, you should specify the
1991 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1993 choice
1994 prompt "Kernel command line type" if CMDLINE != ""
1995 default CMDLINE_FROM_BOOTLOADER
1997 config CMDLINE_FROM_BOOTLOADER
1998 bool "Use bootloader kernel arguments if available"
1999 help
2000 Uses the command-line options passed by the boot loader. If
2001 the boot loader doesn't provide any, the default kernel command
2002 string provided in CMDLINE will be used.
2004 config CMDLINE_EXTEND
2005 bool "Extend bootloader kernel arguments"
2006 help
2007 The command-line arguments provided by the boot loader will be
2008 appended to the default kernel command string.
2010 config CMDLINE_FORCE
2011 bool "Always use the default kernel command string"
2012 help
2013 Always use the default kernel command string, even if the boot
2014 loader passes other arguments to the kernel.
2015 This is useful if you cannot or don't want to change the
2016 command-line options your boot loader passes to the kernel.
2017 endchoice
2019 config XIP_KERNEL
2020 bool "Kernel Execute-In-Place from ROM"
2021 depends on !ZBOOT_ROM && !ARM_LPAE
2022 help
2023 Execute-In-Place allows the kernel to run from non-volatile storage
2024 directly addressable by the CPU, such as NOR flash. This saves RAM
2025 space since the text section of the kernel is not loaded from flash
2026 to RAM. Read-write sections, such as the data section and stack,
2027 are still copied to RAM. The XIP kernel is not compressed since
2028 it has to run directly from flash, so it will take more space to
2029 store it. The flash address used to link the kernel object files,
2030 and for storing it, is configuration dependent. Therefore, if you
2031 say Y here, you must know the proper physical address where to
2032 store the kernel image depending on your own flash memory usage.
2034 Also note that the make target becomes "make xipImage" rather than
2035 "make zImage" or "make Image". The final kernel binary to put in
2036 ROM memory will be arch/arm/boot/xipImage.
2038 If unsure, say N.
2040 config XIP_PHYS_ADDR
2041 hex "XIP Kernel Physical Location"
2042 depends on XIP_KERNEL
2043 default "0x00080000"
2044 help
2045 This is the physical address in your flash memory the kernel will
2046 be linked for and stored to. This address is dependent on your
2047 own flash usage.
2049 config KEXEC
2050 bool "Kexec system call (EXPERIMENTAL)"
2051 depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
2052 help
2053 kexec is a system call that implements the ability to shutdown your
2054 current kernel, and to start another kernel. It is like a reboot
2055 but it is independent of the system firmware. And like a reboot
2056 you can start any kernel with it, not just Linux.
2058 It is an ongoing process to be certain the hardware in a machine
2059 is properly shutdown, so do not be surprised if this code does not
2060 initially work for you. It may help to enable device hotplugging
2061 support.
2063 config ATAGS_PROC
2064 bool "Export atags in procfs"
2065 depends on KEXEC
2066 default y
2067 help
2068 Should the atags used to boot the kernel be exported in an "atags"
2069 file in procfs. Useful with kexec.
2071 config CRASH_DUMP
2072 bool "Build kdump crash kernel (EXPERIMENTAL)"
2073 depends on EXPERIMENTAL
2074 help
2075 Generate crash dump after being started by kexec. This should
2076 be normally only set in special crash dump kernels which are
2077 loaded in the main kernel with kexec-tools into a specially
2078 reserved region and then later executed after a crash by
2079 kdump/kexec. The crash dump kernel must be compiled to a
2080 memory address not used by the main kernel
2082 For more details see Documentation/kdump/kdump.txt
2084 config AUTO_ZRELADDR
2085 bool "Auto calculation of the decompressed kernel image address"
2086 depends on !ZBOOT_ROM && !ARCH_U300
2087 help
2088 ZRELADDR is the physical address where the decompressed kernel
2089 image will be placed. If AUTO_ZRELADDR is selected, the address
2090 will be determined at run-time by masking the current IP with
2091 0xf8000000. This assumes the zImage being placed in the first 128MB
2092 from start of memory.
2094 endmenu
2096 menu "CPU Power Management"
2098 if ARCH_HAS_CPUFREQ
2100 source "drivers/cpufreq/Kconfig"
2102 config CPU_FREQ_IMX
2103 tristate "CPUfreq driver for i.MX CPUs"
2104 depends on ARCH_MXC && CPU_FREQ
2105 help
2106 This enables the CPUfreq driver for i.MX CPUs.
2108 config CPU_FREQ_SA1100
2109 bool
2111 config CPU_FREQ_SA1110
2112 bool
2114 config CPU_FREQ_INTEGRATOR
2115 tristate "CPUfreq driver for ARM Integrator CPUs"
2116 depends on ARCH_INTEGRATOR && CPU_FREQ
2117 default y
2118 help
2119 This enables the CPUfreq driver for ARM Integrator CPUs.
2121 For details, take a look at <file:Documentation/cpu-freq>.
2123 If in doubt, say Y.
2125 config CPU_FREQ_PXA
2126 bool
2127 depends on CPU_FREQ && ARCH_PXA && PXA25x
2128 default y
2129 select CPU_FREQ_TABLE
2130 select CPU_FREQ_DEFAULT_GOV_USERSPACE
2132 config CPU_FREQ_S3C
2133 bool
2134 help
2135 Internal configuration node for common cpufreq on Samsung SoC
2137 config CPU_FREQ_S3C24XX
2138 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2139 depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL
2140 select CPU_FREQ_S3C
2141 help
2142 This enables the CPUfreq driver for the Samsung S3C24XX family
2143 of CPUs.
2145 For details, take a look at <file:Documentation/cpu-freq>.
2147 If in doubt, say N.
2149 config CPU_FREQ_S3C24XX_PLL
2150 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2151 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2152 help
2153 Compile in support for changing the PLL frequency from the
2154 S3C24XX series CPUfreq driver. The PLL takes time to settle
2155 after a frequency change, so by default it is not enabled.
2157 This also means that the PLL tables for the selected CPU(s) will
2158 be built which may increase the size of the kernel image.
2160 config CPU_FREQ_S3C24XX_DEBUG
2161 bool "Debug CPUfreq Samsung driver core"
2162 depends on CPU_FREQ_S3C24XX
2163 help
2164 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2166 config CPU_FREQ_S3C24XX_IODEBUG
2167 bool "Debug CPUfreq Samsung driver IO timing"
2168 depends on CPU_FREQ_S3C24XX
2169 help
2170 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2172 config CPU_FREQ_S3C24XX_DEBUGFS
2173 bool "Export debugfs for CPUFreq"
2174 depends on CPU_FREQ_S3C24XX && DEBUG_FS
2175 help
2176 Export status information via debugfs.
2178 endif
2180 source "drivers/cpuidle/Kconfig"
2182 endmenu
2184 menu "Floating point emulation"
2186 comment "At least one emulation must be selected"
2188 config FPE_NWFPE
2189 bool "NWFPE math emulation"
2190 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2191 ---help---
2192 Say Y to include the NWFPE floating point emulator in the kernel.
2193 This is necessary to run most binaries. Linux does not currently
2194 support floating point hardware so you need to say Y here even if
2195 your machine has an FPA or floating point co-processor podule.
2197 You may say N here if you are going to load the Acorn FPEmulator
2198 early in the bootup.
2200 config FPE_NWFPE_XP
2201 bool "Support extended precision"
2202 depends on FPE_NWFPE
2203 help
2204 Say Y to include 80-bit support in the kernel floating-point
2205 emulator. Otherwise, only 32 and 64-bit support is compiled in.
2206 Note that gcc does not generate 80-bit operations by default,
2207 so in most cases this option only enlarges the size of the
2208 floating point emulator without any good reason.
2210 You almost surely want to say N here.
2212 config FPE_FASTFPE
2213 bool "FastFPE math emulation (EXPERIMENTAL)"
2214 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2215 ---help---
2216 Say Y here to include the FAST floating point emulator in the kernel.
2217 This is an experimental much faster emulator which now also has full
2218 precision for the mantissa. It does not support any exceptions.
2219 It is very simple, and approximately 3-6 times faster than NWFPE.
2221 It should be sufficient for most programs. It may be not suitable
2222 for scientific calculations, but you have to check this for yourself.
2223 If you do not feel you need a faster FP emulation you should better
2224 choose NWFPE.
2226 config VFP
2227 bool "VFP-format floating point maths"
2228 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2229 help
2230 Say Y to include VFP support code in the kernel. This is needed
2231 if your hardware includes a VFP unit.
2233 Please see <file:Documentation/arm/VFP/release-notes.txt> for
2234 release notes and additional status information.
2236 Say N if your target does not have VFP hardware.
2238 config VFPv3
2239 bool
2240 depends on VFP
2241 default y if CPU_V7
2243 config NEON
2244 bool "Advanced SIMD (NEON) Extension support"
2245 depends on VFPv3 && CPU_V7
2246 help
2247 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2248 Extension.
2250 endmenu
2252 menu "Userspace binary formats"
2254 source "fs/Kconfig.binfmt"
2256 config ARTHUR
2257 tristate "RISC OS personality"
2258 depends on !AEABI
2259 help
2260 Say Y here to include the kernel code necessary if you want to run
2261 Acorn RISC OS/Arthur binaries under Linux. This code is still very
2262 experimental; if this sounds frightening, say N and sleep in peace.
2263 You can also say M here to compile this support as a module (which
2264 will be called arthur).
2266 endmenu
2268 menu "Power management options"
2270 source "kernel/power/Kconfig"
2272 config ARCH_SUSPEND_POSSIBLE
2273 depends on !ARCH_S5PC100
2274 depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2275 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2276 def_bool y
2278 config ARM_CPU_SUSPEND
2279 def_bool PM_SLEEP
2281 endmenu
2283 source "net/Kconfig"
2285 source "drivers/Kconfig"
2287 source "fs/Kconfig"
2289 source "arch/arm/Kconfig.debug"
2291 source "security/Kconfig"
2293 source "crypto/Kconfig"
2295 source "lib/Kconfig"