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Merge branch 'nfs-for-2.6.37' of git://git.linux-nfs.org/projects/trondmy/nfs-2.6
[linux-2.6.git] / drivers / net / wireless / mwl8k.c
blobf152a25be59f7020998d35ceb72ba55100ebff2b
1 /*
2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
4 *
5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <linux/slab.h>
23 #include <net/mac80211.h>
24 #include <linux/moduleparam.h>
25 #include <linux/firmware.h>
26 #include <linux/workqueue.h>
27
28 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
29 #define MWL8K_NAME KBUILD_MODNAME
30 #define MWL8K_VERSION "0.12"
31
32 /* Register definitions */
33 #define MWL8K_HIU_GEN_PTR 0x00000c10
34 #define MWL8K_MODE_STA 0x0000005a
35 #define MWL8K_MODE_AP 0x000000a5
36 #define MWL8K_HIU_INT_CODE 0x00000c14
37 #define MWL8K_FWSTA_READY 0xf0f1f2f4
38 #define MWL8K_FWAP_READY 0xf1f2f4a5
39 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
40 #define MWL8K_HIU_SCRATCH 0x00000c40
41
42 /* Host->device communications */
43 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
44 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
45 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
46 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
47 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
48 #define MWL8K_H2A_INT_DUMMY (1 << 20)
49 #define MWL8K_H2A_INT_RESET (1 << 15)
50 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
51 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52
53 /* Device->host communications */
54 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
55 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
56 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
57 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
58 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
59 #define MWL8K_A2H_INT_DUMMY (1 << 20)
60 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
61 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
62 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
63 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
64 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
65 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
66 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
67 #define MWL8K_A2H_INT_RX_READY (1 << 1)
68 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69
70 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
71 MWL8K_A2H_INT_CHNL_SWITCHED | \
72 MWL8K_A2H_INT_QUEUE_EMPTY | \
73 MWL8K_A2H_INT_RADAR_DETECT | \
74 MWL8K_A2H_INT_RADIO_ON | \
75 MWL8K_A2H_INT_RADIO_OFF | \
76 MWL8K_A2H_INT_MAC_EVENT | \
77 MWL8K_A2H_INT_OPC_DONE | \
78 MWL8K_A2H_INT_RX_READY | \
79 MWL8K_A2H_INT_TX_DONE)
80
81 #define MWL8K_RX_QUEUES 1
82 #define MWL8K_TX_QUEUES 4
83
84 struct rxd_ops {
85 int rxd_size;
86 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
87 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
88 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
89 __le16 *qos, s8 *noise);
90 };
91
92 struct mwl8k_device_info {
93 char *part_name;
94 char *helper_image;
95 char *fw_image;
96 struct rxd_ops *ap_rxd_ops;
97 };
98
99 struct mwl8k_rx_queue {
100 int rxd_count;
101
102 /* hw receives here */
103 int head;
104
105 /* refill descs here */
106 int tail;
107
108 void *rxd;
109 dma_addr_t rxd_dma;
110 struct {
111 struct sk_buff *skb;
112 DEFINE_DMA_UNMAP_ADDR(dma);
113 } *buf;
114 };
115
116 struct mwl8k_tx_queue {
117 /* hw transmits here */
118 int head;
119
120 /* sw appends here */
121 int tail;
122
123 unsigned int len;
124 struct mwl8k_tx_desc *txd;
125 dma_addr_t txd_dma;
126 struct sk_buff **skb;
127 };
128
129 struct mwl8k_priv {
130 struct ieee80211_hw *hw;
131 struct pci_dev *pdev;
132
133 struct mwl8k_device_info *device_info;
134
135 void __iomem *sram;
136 void __iomem *regs;
137
138 /* firmware */
139 struct firmware *fw_helper;
140 struct firmware *fw_ucode;
141
142 /* hardware/firmware parameters */
143 bool ap_fw;
144 struct rxd_ops *rxd_ops;
145 struct ieee80211_supported_band band_24;
146 struct ieee80211_channel channels_24[14];
147 struct ieee80211_rate rates_24[14];
148 struct ieee80211_supported_band band_50;
149 struct ieee80211_channel channels_50[4];
150 struct ieee80211_rate rates_50[9];
151 u32 ap_macids_supported;
152 u32 sta_macids_supported;
153
154 /* firmware access */
155 struct mutex fw_mutex;
156 struct task_struct *fw_mutex_owner;
157 int fw_mutex_depth;
158 struct completion *hostcmd_wait;
159
160 /* lock held over TX and TX reap */
161 spinlock_t tx_lock;
162
163 /* TX quiesce completion, protected by fw_mutex and tx_lock */
164 struct completion *tx_wait;
165
166 /* List of interfaces. */
167 u32 macids_used;
168 struct list_head vif_list;
169
170 /* power management status cookie from firmware */
171 u32 *cookie;
172 dma_addr_t cookie_dma;
173
174 u16 num_mcaddrs;
175 u8 hw_rev;
176 u32 fw_rev;
177
178 /*
179 * Running count of TX packets in flight, to avoid
180 * iterating over the transmit rings each time.
181 */
182 int pending_tx_pkts;
183
184 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
185 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
186
187 bool radio_on;
188 bool radio_short_preamble;
189 bool sniffer_enabled;
190 bool wmm_enabled;
191
192 /* XXX need to convert this to handle multiple interfaces */
193 bool capture_beacon;
194 u8 capture_bssid[ETH_ALEN];
195 struct sk_buff *beacon_skb;
196
197 /*
198 * This FJ worker has to be global as it is scheduled from the
199 * RX handler. At this point we don't know which interface it
200 * belongs to until the list of bssids waiting to complete join
201 * is checked.
202 */
203 struct work_struct finalize_join_worker;
204
205 /* Tasklet to perform TX reclaim. */
206 struct tasklet_struct poll_tx_task;
207
208 /* Tasklet to perform RX. */
209 struct tasklet_struct poll_rx_task;
210
211 /* Most recently reported noise in dBm */
212 s8 noise;
213 };
214
215 /* Per interface specific private data */
216 struct mwl8k_vif {
217 struct list_head list;
218 struct ieee80211_vif *vif;
219
220 /* Firmware macid for this vif. */
221 int macid;
222
223 /* Non AMPDU sequence number assigned by driver. */
224 u16 seqno;
225 };
226 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
227
228 struct mwl8k_sta {
229 /* Index into station database. Returned by UPDATE_STADB. */
230 u8 peer_id;
231 };
232 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
233
234 static const struct ieee80211_channel mwl8k_channels_24[] = {
235 { .center_freq = 2412, .hw_value = 1, },
236 { .center_freq = 2417, .hw_value = 2, },
237 { .center_freq = 2422, .hw_value = 3, },
238 { .center_freq = 2427, .hw_value = 4, },
239 { .center_freq = 2432, .hw_value = 5, },
240 { .center_freq = 2437, .hw_value = 6, },
241 { .center_freq = 2442, .hw_value = 7, },
242 { .center_freq = 2447, .hw_value = 8, },
243 { .center_freq = 2452, .hw_value = 9, },
244 { .center_freq = 2457, .hw_value = 10, },
245 { .center_freq = 2462, .hw_value = 11, },
246 { .center_freq = 2467, .hw_value = 12, },
247 { .center_freq = 2472, .hw_value = 13, },
248 { .center_freq = 2484, .hw_value = 14, },
249 };
250
251 static const struct ieee80211_rate mwl8k_rates_24[] = {
252 { .bitrate = 10, .hw_value = 2, },
253 { .bitrate = 20, .hw_value = 4, },
254 { .bitrate = 55, .hw_value = 11, },
255 { .bitrate = 110, .hw_value = 22, },
256 { .bitrate = 220, .hw_value = 44, },
257 { .bitrate = 60, .hw_value = 12, },
258 { .bitrate = 90, .hw_value = 18, },
259 { .bitrate = 120, .hw_value = 24, },
260 { .bitrate = 180, .hw_value = 36, },
261 { .bitrate = 240, .hw_value = 48, },
262 { .bitrate = 360, .hw_value = 72, },
263 { .bitrate = 480, .hw_value = 96, },
264 { .bitrate = 540, .hw_value = 108, },
265 { .bitrate = 720, .hw_value = 144, },
266 };
267
268 static const struct ieee80211_channel mwl8k_channels_50[] = {
269 { .center_freq = 5180, .hw_value = 36, },
270 { .center_freq = 5200, .hw_value = 40, },
271 { .center_freq = 5220, .hw_value = 44, },
272 { .center_freq = 5240, .hw_value = 48, },
273 };
274
275 static const struct ieee80211_rate mwl8k_rates_50[] = {
276 { .bitrate = 60, .hw_value = 12, },
277 { .bitrate = 90, .hw_value = 18, },
278 { .bitrate = 120, .hw_value = 24, },
279 { .bitrate = 180, .hw_value = 36, },
280 { .bitrate = 240, .hw_value = 48, },
281 { .bitrate = 360, .hw_value = 72, },
282 { .bitrate = 480, .hw_value = 96, },
283 { .bitrate = 540, .hw_value = 108, },
284 { .bitrate = 720, .hw_value = 144, },
285 };
286
287 /* Set or get info from Firmware */
288 #define MWL8K_CMD_SET 0x0001
289 #define MWL8K_CMD_GET 0x0000
290
291 /* Firmware command codes */
292 #define MWL8K_CMD_CODE_DNLD 0x0001
293 #define MWL8K_CMD_GET_HW_SPEC 0x0003
294 #define MWL8K_CMD_SET_HW_SPEC 0x0004
295 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
296 #define MWL8K_CMD_GET_STAT 0x0014
297 #define MWL8K_CMD_RADIO_CONTROL 0x001c
298 #define MWL8K_CMD_RF_TX_POWER 0x001e
299 #define MWL8K_CMD_RF_ANTENNA 0x0020
300 #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
301 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
302 #define MWL8K_CMD_SET_POST_SCAN 0x0108
303 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
304 #define MWL8K_CMD_SET_AID 0x010d
305 #define MWL8K_CMD_SET_RATE 0x0110
306 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
307 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
308 #define MWL8K_CMD_SET_SLOT 0x0114
309 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
310 #define MWL8K_CMD_SET_WMM_MODE 0x0123
311 #define MWL8K_CMD_MIMO_CONFIG 0x0125
312 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
313 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
314 #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
315 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
316 #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
317 #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
318 #define MWL8K_CMD_UPDATE_STADB 0x1123
319
320 static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
321 {
322 u16 command = le16_to_cpu(cmd);
323
324 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
325 snprintf(buf, bufsize, "%s", #x);\
326 return buf;\
327 } while (0)
328 switch (command & ~0x8000) {
329 MWL8K_CMDNAME(CODE_DNLD);
330 MWL8K_CMDNAME(GET_HW_SPEC);
331 MWL8K_CMDNAME(SET_HW_SPEC);
332 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
333 MWL8K_CMDNAME(GET_STAT);
334 MWL8K_CMDNAME(RADIO_CONTROL);
335 MWL8K_CMDNAME(RF_TX_POWER);
336 MWL8K_CMDNAME(RF_ANTENNA);
337 MWL8K_CMDNAME(SET_BEACON);
338 MWL8K_CMDNAME(SET_PRE_SCAN);
339 MWL8K_CMDNAME(SET_POST_SCAN);
340 MWL8K_CMDNAME(SET_RF_CHANNEL);
341 MWL8K_CMDNAME(SET_AID);
342 MWL8K_CMDNAME(SET_RATE);
343 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
344 MWL8K_CMDNAME(RTS_THRESHOLD);
345 MWL8K_CMDNAME(SET_SLOT);
346 MWL8K_CMDNAME(SET_EDCA_PARAMS);
347 MWL8K_CMDNAME(SET_WMM_MODE);
348 MWL8K_CMDNAME(MIMO_CONFIG);
349 MWL8K_CMDNAME(USE_FIXED_RATE);
350 MWL8K_CMDNAME(ENABLE_SNIFFER);
351 MWL8K_CMDNAME(SET_MAC_ADDR);
352 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
353 MWL8K_CMDNAME(BSS_START);
354 MWL8K_CMDNAME(SET_NEW_STN);
355 MWL8K_CMDNAME(UPDATE_STADB);
356 default:
357 snprintf(buf, bufsize, "0x%x", cmd);
358 }
359 #undef MWL8K_CMDNAME
360
361 return buf;
362 }
363
364 /* Hardware and firmware reset */
365 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
366 {
367 iowrite32(MWL8K_H2A_INT_RESET,
368 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
369 iowrite32(MWL8K_H2A_INT_RESET,
370 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
371 msleep(20);
372 }
373
374 /* Release fw image */
375 static void mwl8k_release_fw(struct firmware **fw)
376 {
377 if (*fw == NULL)
378 return;
379 release_firmware(*fw);
380 *fw = NULL;
381 }
382
383 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
384 {
385 mwl8k_release_fw(&priv->fw_ucode);
386 mwl8k_release_fw(&priv->fw_helper);
387 }
388
389 /* Request fw image */
390 static int mwl8k_request_fw(struct mwl8k_priv *priv,
391 const char *fname, struct firmware **fw)
392 {
393 /* release current image */
394 if (*fw != NULL)
395 mwl8k_release_fw(fw);
396
397 return request_firmware((const struct firmware **)fw,
398 fname, &priv->pdev->dev);
399 }
400
401 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
402 {
403 struct mwl8k_device_info *di = priv->device_info;
404 int rc;
405
406 if (di->helper_image != NULL) {
407 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
408 if (rc) {
409 printk(KERN_ERR "%s: Error requesting helper "
410 "firmware file %s\n", pci_name(priv->pdev),
411 di->helper_image);
412 return rc;
413 }
414 }
415
416 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
417 if (rc) {
418 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
419 pci_name(priv->pdev), di->fw_image);
420 mwl8k_release_fw(&priv->fw_helper);
421 return rc;
422 }
423
424 return 0;
425 }
426
427 struct mwl8k_cmd_pkt {
428 __le16 code;
429 __le16 length;
430 __u8 seq_num;
431 __u8 macid;
432 __le16 result;
433 char payload[0];
434 } __packed;
435
436 /*
437 * Firmware loading.
438 */
439 static int
440 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
441 {
442 void __iomem *regs = priv->regs;
443 dma_addr_t dma_addr;
444 int loops;
445
446 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
447 if (pci_dma_mapping_error(priv->pdev, dma_addr))
448 return -ENOMEM;
449
450 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
451 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
452 iowrite32(MWL8K_H2A_INT_DOORBELL,
453 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
454 iowrite32(MWL8K_H2A_INT_DUMMY,
455 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
456
457 loops = 1000;
458 do {
459 u32 int_code;
460
461 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
462 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
463 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
464 break;
465 }
466
467 cond_resched();
468 udelay(1);
469 } while (--loops);
470
471 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
472
473 return loops ? 0 : -ETIMEDOUT;
474 }
475
476 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
477 const u8 *data, size_t length)
478 {
479 struct mwl8k_cmd_pkt *cmd;
480 int done;
481 int rc = 0;
482
483 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
484 if (cmd == NULL)
485 return -ENOMEM;
486
487 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
488 cmd->seq_num = 0;
489 cmd->macid = 0;
490 cmd->result = 0;
491
492 done = 0;
493 while (length) {
494 int block_size = length > 256 ? 256 : length;
495
496 memcpy(cmd->payload, data + done, block_size);
497 cmd->length = cpu_to_le16(block_size);
498
499 rc = mwl8k_send_fw_load_cmd(priv, cmd,
500 sizeof(*cmd) + block_size);
501 if (rc)
502 break;
503
504 done += block_size;
505 length -= block_size;
506 }
507
508 if (!rc) {
509 cmd->length = 0;
510 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
511 }
512
513 kfree(cmd);
514
515 return rc;
516 }
517
518 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
519 const u8 *data, size_t length)
520 {
521 unsigned char *buffer;
522 int may_continue, rc = 0;
523 u32 done, prev_block_size;
524
525 buffer = kmalloc(1024, GFP_KERNEL);
526 if (buffer == NULL)
527 return -ENOMEM;
528
529 done = 0;
530 prev_block_size = 0;
531 may_continue = 1000;
532 while (may_continue > 0) {
533 u32 block_size;
534
535 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
536 if (block_size & 1) {
537 block_size &= ~1;
538 may_continue--;
539 } else {
540 done += prev_block_size;
541 length -= prev_block_size;
542 }
543
544 if (block_size > 1024 || block_size > length) {
545 rc = -EOVERFLOW;
546 break;
547 }
548
549 if (length == 0) {
550 rc = 0;
551 break;
552 }
553
554 if (block_size == 0) {
555 rc = -EPROTO;
556 may_continue--;
557 udelay(1);
558 continue;
559 }
560
561 prev_block_size = block_size;
562 memcpy(buffer, data + done, block_size);
563
564 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
565 if (rc)
566 break;
567 }
568
569 if (!rc && length != 0)
570 rc = -EREMOTEIO;
571
572 kfree(buffer);
573
574 return rc;
575 }
576
577 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
578 {
579 struct mwl8k_priv *priv = hw->priv;
580 struct firmware *fw = priv->fw_ucode;
581 int rc;
582 int loops;
583
584 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
585 struct firmware *helper = priv->fw_helper;
586
587 if (helper == NULL) {
588 printk(KERN_ERR "%s: helper image needed but none "
589 "given\n", pci_name(priv->pdev));
590 return -EINVAL;
591 }
592
593 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
594 if (rc) {
595 printk(KERN_ERR "%s: unable to load firmware "
596 "helper image\n", pci_name(priv->pdev));
597 return rc;
598 }
599 msleep(5);
600
601 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
602 } else {
603 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
604 }
605
606 if (rc) {
607 printk(KERN_ERR "%s: unable to load firmware image\n",
608 pci_name(priv->pdev));
609 return rc;
610 }
611
612 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
613
614 loops = 500000;
615 do {
616 u32 ready_code;
617
618 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
619 if (ready_code == MWL8K_FWAP_READY) {
620 priv->ap_fw = 1;
621 break;
622 } else if (ready_code == MWL8K_FWSTA_READY) {
623 priv->ap_fw = 0;
624 break;
625 }
626
627 cond_resched();
628 udelay(1);
629 } while (--loops);
630
631 return loops ? 0 : -ETIMEDOUT;
632 }
633
634
635 /* DMA header used by firmware and hardware. */
636 struct mwl8k_dma_data {
637 __le16 fwlen;
638 struct ieee80211_hdr wh;
639 char data[0];
640 } __packed;
641
642 /* Routines to add/remove DMA header from skb. */
643 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
644 {
645 struct mwl8k_dma_data *tr;
646 int hdrlen;
647
648 tr = (struct mwl8k_dma_data *)skb->data;
649 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
650
651 if (hdrlen != sizeof(tr->wh)) {
652 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
653 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
654 *((__le16 *)(tr->data - 2)) = qos;
655 } else {
656 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
657 }
658 }
659
660 if (hdrlen != sizeof(*tr))
661 skb_pull(skb, sizeof(*tr) - hdrlen);
662 }
663
664 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
665 {
666 struct ieee80211_hdr *wh;
667 int hdrlen;
668 struct mwl8k_dma_data *tr;
669
670 /*
671 * Add a firmware DMA header; the firmware requires that we
672 * present a 2-byte payload length followed by a 4-address
673 * header (without QoS field), followed (optionally) by any
674 * WEP/ExtIV header (but only filled in for CCMP).
675 */
676 wh = (struct ieee80211_hdr *)skb->data;
677
678 hdrlen = ieee80211_hdrlen(wh->frame_control);
679 if (hdrlen != sizeof(*tr))
680 skb_push(skb, sizeof(*tr) - hdrlen);
681
682 if (ieee80211_is_data_qos(wh->frame_control))
683 hdrlen -= 2;
684
685 tr = (struct mwl8k_dma_data *)skb->data;
686 if (wh != &tr->wh)
687 memmove(&tr->wh, wh, hdrlen);
688 if (hdrlen != sizeof(tr->wh))
689 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
690
691 /*
692 * Firmware length is the length of the fully formed "802.11
693 * payload". That is, everything except for the 802.11 header.
694 * This includes all crypto material including the MIC.
695 */
696 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
697 }
698
699
700 /*
701 * Packet reception for 88w8366 AP firmware.
702 */
703 struct mwl8k_rxd_8366_ap {
704 __le16 pkt_len;
705 __u8 sq2;
706 __u8 rate;
707 __le32 pkt_phys_addr;
708 __le32 next_rxd_phys_addr;
709 __le16 qos_control;
710 __le16 htsig2;
711 __le32 hw_rssi_info;
712 __le32 hw_noise_floor_info;
713 __u8 noise_floor;
714 __u8 pad0[3];
715 __u8 rssi;
716 __u8 rx_status;
717 __u8 channel;
718 __u8 rx_ctrl;
719 } __packed;
720
721 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
722 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
723 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
724
725 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
726
727 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
728 {
729 struct mwl8k_rxd_8366_ap *rxd = _rxd;
730
731 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
732 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
733 }
734
735 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
736 {
737 struct mwl8k_rxd_8366_ap *rxd = _rxd;
738
739 rxd->pkt_len = cpu_to_le16(len);
740 rxd->pkt_phys_addr = cpu_to_le32(addr);
741 wmb();
742 rxd->rx_ctrl = 0;
743 }
744
745 static int
746 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
747 __le16 *qos, s8 *noise)
748 {
749 struct mwl8k_rxd_8366_ap *rxd = _rxd;
750
751 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
752 return -1;
753 rmb();
754
755 memset(status, 0, sizeof(*status));
756
757 status->signal = -rxd->rssi;
758 *noise = -rxd->noise_floor;
759
760 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
761 status->flag |= RX_FLAG_HT;
762 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
763 status->flag |= RX_FLAG_40MHZ;
764 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
765 } else {
766 int i;
767
768 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
769 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
770 status->rate_idx = i;
771 break;
772 }
773 }
774 }
775
776 if (rxd->channel > 14) {
777 status->band = IEEE80211_BAND_5GHZ;
778 if (!(status->flag & RX_FLAG_HT))
779 status->rate_idx -= 5;
780 } else {
781 status->band = IEEE80211_BAND_2GHZ;
782 }
783 status->freq = ieee80211_channel_to_frequency(rxd->channel);
784
785 *qos = rxd->qos_control;
786
787 return le16_to_cpu(rxd->pkt_len);
788 }
789
790 static struct rxd_ops rxd_8366_ap_ops = {
791 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
792 .rxd_init = mwl8k_rxd_8366_ap_init,
793 .rxd_refill = mwl8k_rxd_8366_ap_refill,
794 .rxd_process = mwl8k_rxd_8366_ap_process,
795 };
796
797 /*
798 * Packet reception for STA firmware.
799 */
800 struct mwl8k_rxd_sta {
801 __le16 pkt_len;
802 __u8 link_quality;
803 __u8 noise_level;
804 __le32 pkt_phys_addr;
805 __le32 next_rxd_phys_addr;
806 __le16 qos_control;
807 __le16 rate_info;
808 __le32 pad0[4];
809 __u8 rssi;
810 __u8 channel;
811 __le16 pad1;
812 __u8 rx_ctrl;
813 __u8 rx_status;
814 __u8 pad2[2];
815 } __packed;
816
817 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
818 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
819 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
820 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
821 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
822 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
823
824 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
825
826 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
827 {
828 struct mwl8k_rxd_sta *rxd = _rxd;
829
830 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
831 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
832 }
833
834 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
835 {
836 struct mwl8k_rxd_sta *rxd = _rxd;
837
838 rxd->pkt_len = cpu_to_le16(len);
839 rxd->pkt_phys_addr = cpu_to_le32(addr);
840 wmb();
841 rxd->rx_ctrl = 0;
842 }
843
844 static int
845 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
846 __le16 *qos, s8 *noise)
847 {
848 struct mwl8k_rxd_sta *rxd = _rxd;
849 u16 rate_info;
850
851 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
852 return -1;
853 rmb();
854
855 rate_info = le16_to_cpu(rxd->rate_info);
856
857 memset(status, 0, sizeof(*status));
858
859 status->signal = -rxd->rssi;
860 *noise = -rxd->noise_level;
861 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
862 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
863
864 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
865 status->flag |= RX_FLAG_SHORTPRE;
866 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
867 status->flag |= RX_FLAG_40MHZ;
868 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
869 status->flag |= RX_FLAG_SHORT_GI;
870 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
871 status->flag |= RX_FLAG_HT;
872
873 if (rxd->channel > 14) {
874 status->band = IEEE80211_BAND_5GHZ;
875 if (!(status->flag & RX_FLAG_HT))
876 status->rate_idx -= 5;
877 } else {
878 status->band = IEEE80211_BAND_2GHZ;
879 }
880 status->freq = ieee80211_channel_to_frequency(rxd->channel);
881
882 *qos = rxd->qos_control;
883
884 return le16_to_cpu(rxd->pkt_len);
885 }
886
887 static struct rxd_ops rxd_sta_ops = {
888 .rxd_size = sizeof(struct mwl8k_rxd_sta),
889 .rxd_init = mwl8k_rxd_sta_init,
890 .rxd_refill = mwl8k_rxd_sta_refill,
891 .rxd_process = mwl8k_rxd_sta_process,
892 };
893
894
895 #define MWL8K_RX_DESCS 256
896 #define MWL8K_RX_MAXSZ 3800
897
898 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
899 {
900 struct mwl8k_priv *priv = hw->priv;
901 struct mwl8k_rx_queue *rxq = priv->rxq + index;
902 int size;
903 int i;
904
905 rxq->rxd_count = 0;
906 rxq->head = 0;
907 rxq->tail = 0;
908
909 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
910
911 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
912 if (rxq->rxd == NULL) {
913 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
914 return -ENOMEM;
915 }
916 memset(rxq->rxd, 0, size);
917
918 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
919 if (rxq->buf == NULL) {
920 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
921 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
922 return -ENOMEM;
923 }
924 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
925
926 for (i = 0; i < MWL8K_RX_DESCS; i++) {
927 int desc_size;
928 void *rxd;
929 int nexti;
930 dma_addr_t next_dma_addr;
931
932 desc_size = priv->rxd_ops->rxd_size;
933 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
934
935 nexti = i + 1;
936 if (nexti == MWL8K_RX_DESCS)
937 nexti = 0;
938 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
939
940 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
941 }
942
943 return 0;
944 }
945
946 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
947 {
948 struct mwl8k_priv *priv = hw->priv;
949 struct mwl8k_rx_queue *rxq = priv->rxq + index;
950 int refilled;
951
952 refilled = 0;
953 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
954 struct sk_buff *skb;
955 dma_addr_t addr;
956 int rx;
957 void *rxd;
958
959 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
960 if (skb == NULL)
961 break;
962
963 addr = pci_map_single(priv->pdev, skb->data,
964 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
965
966 rxq->rxd_count++;
967 rx = rxq->tail++;
968 if (rxq->tail == MWL8K_RX_DESCS)
969 rxq->tail = 0;
970 rxq->buf[rx].skb = skb;
971 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
972
973 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
974 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
975
976 refilled++;
977 }
978
979 return refilled;
980 }
981
982 /* Must be called only when the card's reception is completely halted */
983 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
984 {
985 struct mwl8k_priv *priv = hw->priv;
986 struct mwl8k_rx_queue *rxq = priv->rxq + index;
987 int i;
988
989 for (i = 0; i < MWL8K_RX_DESCS; i++) {
990 if (rxq->buf[i].skb != NULL) {
991 pci_unmap_single(priv->pdev,
992 dma_unmap_addr(&rxq->buf[i], dma),
993 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
994 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
995
996 kfree_skb(rxq->buf[i].skb);
997 rxq->buf[i].skb = NULL;
998 }
999 }
1000
1001 kfree(rxq->buf);
1002 rxq->buf = NULL;
1003
1004 pci_free_consistent(priv->pdev,
1005 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
1006 rxq->rxd, rxq->rxd_dma);
1007 rxq->rxd = NULL;
1008 }
1009
1010
1011 /*
1012 * Scan a list of BSSIDs to process for finalize join.
1013 * Allows for extension to process multiple BSSIDs.
1014 */
1015 static inline int
1016 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1017 {
1018 return priv->capture_beacon &&
1019 ieee80211_is_beacon(wh->frame_control) &&
1020 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1021 }
1022
1023 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1024 struct sk_buff *skb)
1025 {
1026 struct mwl8k_priv *priv = hw->priv;
1027
1028 priv->capture_beacon = false;
1029 memset(priv->capture_bssid, 0, ETH_ALEN);
1030
1031 /*
1032 * Use GFP_ATOMIC as rxq_process is called from
1033 * the primary interrupt handler, memory allocation call
1034 * must not sleep.
1035 */
1036 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1037 if (priv->beacon_skb != NULL)
1038 ieee80211_queue_work(hw, &priv->finalize_join_worker);
1039 }
1040
1041 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1042 {
1043 struct mwl8k_priv *priv = hw->priv;
1044 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1045 int processed;
1046
1047 processed = 0;
1048 while (rxq->rxd_count && limit--) {
1049 struct sk_buff *skb;
1050 void *rxd;
1051 int pkt_len;
1052 struct ieee80211_rx_status status;
1053 __le16 qos;
1054
1055 skb = rxq->buf[rxq->head].skb;
1056 if (skb == NULL)
1057 break;
1058
1059 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1060
1061 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1062 &priv->noise);
1063 if (pkt_len < 0)
1064 break;
1065
1066 rxq->buf[rxq->head].skb = NULL;
1067
1068 pci_unmap_single(priv->pdev,
1069 dma_unmap_addr(&rxq->buf[rxq->head], dma),
1070 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1071 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1072
1073 rxq->head++;
1074 if (rxq->head == MWL8K_RX_DESCS)
1075 rxq->head = 0;
1076
1077 rxq->rxd_count--;
1078
1079 skb_put(skb, pkt_len);
1080 mwl8k_remove_dma_header(skb, qos);
1081
1082 /*
1083 * Check for a pending join operation. Save a
1084 * copy of the beacon and schedule a tasklet to
1085 * send a FINALIZE_JOIN command to the firmware.
1086 */
1087 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1088 mwl8k_save_beacon(hw, skb);
1089
1090 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1091 ieee80211_rx_irqsafe(hw, skb);
1092
1093 processed++;
1094 }
1095
1096 return processed;
1097 }
1098
1099
1100 /*
1101 * Packet transmission.
1102 */
1103
1104 #define MWL8K_TXD_STATUS_OK 0x00000001
1105 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1106 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1107 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1108 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1109
1110 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1111 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1112 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1113 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1114 #define MWL8K_QOS_EOSP 0x0010
1115
1116 struct mwl8k_tx_desc {
1117 __le32 status;
1118 __u8 data_rate;
1119 __u8 tx_priority;
1120 __le16 qos_control;
1121 __le32 pkt_phys_addr;
1122 __le16 pkt_len;
1123 __u8 dest_MAC_addr[ETH_ALEN];
1124 __le32 next_txd_phys_addr;
1125 __le32 reserved;
1126 __le16 rate_info;
1127 __u8 peer_id;
1128 __u8 tx_frag_cnt;
1129 } __packed;
1130
1131 #define MWL8K_TX_DESCS 128
1132
1133 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1134 {
1135 struct mwl8k_priv *priv = hw->priv;
1136 struct mwl8k_tx_queue *txq = priv->txq + index;
1137 int size;
1138 int i;
1139
1140 txq->len = 0;
1141 txq->head = 0;
1142 txq->tail = 0;
1143
1144 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1145
1146 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1147 if (txq->txd == NULL) {
1148 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
1149 return -ENOMEM;
1150 }
1151 memset(txq->txd, 0, size);
1152
1153 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1154 if (txq->skb == NULL) {
1155 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
1156 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1157 return -ENOMEM;
1158 }
1159 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1160
1161 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1162 struct mwl8k_tx_desc *tx_desc;
1163 int nexti;
1164
1165 tx_desc = txq->txd + i;
1166 nexti = (i + 1) % MWL8K_TX_DESCS;
1167
1168 tx_desc->status = 0;
1169 tx_desc->next_txd_phys_addr =
1170 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1171 }
1172
1173 return 0;
1174 }
1175
1176 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1177 {
1178 iowrite32(MWL8K_H2A_INT_PPA_READY,
1179 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1180 iowrite32(MWL8K_H2A_INT_DUMMY,
1181 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1182 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1183 }
1184
1185 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1186 {
1187 struct mwl8k_priv *priv = hw->priv;
1188 int i;
1189
1190 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1191 struct mwl8k_tx_queue *txq = priv->txq + i;
1192 int fw_owned = 0;
1193 int drv_owned = 0;
1194 int unused = 0;
1195 int desc;
1196
1197 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1198 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1199 u32 status;
1200
1201 status = le32_to_cpu(tx_desc->status);
1202 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1203 fw_owned++;
1204 else
1205 drv_owned++;
1206
1207 if (tx_desc->pkt_len == 0)
1208 unused++;
1209 }
1210
1211 wiphy_err(hw->wiphy,
1212 "txq[%d] len=%d head=%d tail=%d "
1213 "fw_owned=%d drv_owned=%d unused=%d\n",
1214 i,
1215 txq->len, txq->head, txq->tail,
1216 fw_owned, drv_owned, unused);
1217 }
1218 }
1219
1220 /*
1221 * Must be called with priv->fw_mutex held and tx queues stopped.
1222 */
1223 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1224
1225 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1226 {
1227 struct mwl8k_priv *priv = hw->priv;
1228 DECLARE_COMPLETION_ONSTACK(tx_wait);
1229 int retry;
1230 int rc;
1231
1232 might_sleep();
1233
1234 /*
1235 * The TX queues are stopped at this point, so this test
1236 * doesn't need to take ->tx_lock.
1237 */
1238 if (!priv->pending_tx_pkts)
1239 return 0;
1240
1241 retry = 0;
1242 rc = 0;
1243
1244 spin_lock_bh(&priv->tx_lock);
1245 priv->tx_wait = &tx_wait;
1246 while (!rc) {
1247 int oldcount;
1248 unsigned long timeout;
1249
1250 oldcount = priv->pending_tx_pkts;
1251
1252 spin_unlock_bh(&priv->tx_lock);
1253 timeout = wait_for_completion_timeout(&tx_wait,
1254 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1255 spin_lock_bh(&priv->tx_lock);
1256
1257 if (timeout) {
1258 WARN_ON(priv->pending_tx_pkts);
1259 if (retry) {
1260 wiphy_notice(hw->wiphy, "tx rings drained\n");
1261 }
1262 break;
1263 }
1264
1265 if (priv->pending_tx_pkts < oldcount) {
1266 wiphy_notice(hw->wiphy,
1267 "waiting for tx rings to drain (%d -> %d pkts)\n",
1268 oldcount, priv->pending_tx_pkts);
1269 retry = 1;
1270 continue;
1271 }
1272
1273 priv->tx_wait = NULL;
1274
1275 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1276 MWL8K_TX_WAIT_TIMEOUT_MS);
1277 mwl8k_dump_tx_rings(hw);
1278
1279 rc = -ETIMEDOUT;
1280 }
1281 spin_unlock_bh(&priv->tx_lock);
1282
1283 return rc;
1284 }
1285
1286 #define MWL8K_TXD_SUCCESS(status) \
1287 ((status) & (MWL8K_TXD_STATUS_OK | \
1288 MWL8K_TXD_STATUS_OK_RETRY | \
1289 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1290
1291 static int
1292 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1293 {
1294 struct mwl8k_priv *priv = hw->priv;
1295 struct mwl8k_tx_queue *txq = priv->txq + index;
1296 int processed;
1297
1298 processed = 0;
1299 while (txq->len > 0 && limit--) {
1300 int tx;
1301 struct mwl8k_tx_desc *tx_desc;
1302 unsigned long addr;
1303 int size;
1304 struct sk_buff *skb;
1305 struct ieee80211_tx_info *info;
1306 u32 status;
1307
1308 tx = txq->head;
1309 tx_desc = txq->txd + tx;
1310
1311 status = le32_to_cpu(tx_desc->status);
1312
1313 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1314 if (!force)
1315 break;
1316 tx_desc->status &=
1317 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1318 }
1319
1320 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1321 BUG_ON(txq->len == 0);
1322 txq->len--;
1323 priv->pending_tx_pkts--;
1324
1325 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1326 size = le16_to_cpu(tx_desc->pkt_len);
1327 skb = txq->skb[tx];
1328 txq->skb[tx] = NULL;
1329
1330 BUG_ON(skb == NULL);
1331 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1332
1333 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1334
1335 /* Mark descriptor as unused */
1336 tx_desc->pkt_phys_addr = 0;
1337 tx_desc->pkt_len = 0;
1338
1339 info = IEEE80211_SKB_CB(skb);
1340 ieee80211_tx_info_clear_status(info);
1341 if (MWL8K_TXD_SUCCESS(status))
1342 info->flags |= IEEE80211_TX_STAT_ACK;
1343
1344 ieee80211_tx_status_irqsafe(hw, skb);
1345
1346 processed++;
1347 }
1348
1349 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1350 ieee80211_wake_queue(hw, index);
1351
1352 return processed;
1353 }
1354
1355 /* must be called only when the card's transmit is completely halted */
1356 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1357 {
1358 struct mwl8k_priv *priv = hw->priv;
1359 struct mwl8k_tx_queue *txq = priv->txq + index;
1360
1361 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1362
1363 kfree(txq->skb);
1364 txq->skb = NULL;
1365
1366 pci_free_consistent(priv->pdev,
1367 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1368 txq->txd, txq->txd_dma);
1369 txq->txd = NULL;
1370 }
1371
1372 static int
1373 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1374 {
1375 struct mwl8k_priv *priv = hw->priv;
1376 struct ieee80211_tx_info *tx_info;
1377 struct mwl8k_vif *mwl8k_vif;
1378 struct ieee80211_hdr *wh;
1379 struct mwl8k_tx_queue *txq;
1380 struct mwl8k_tx_desc *tx;
1381 dma_addr_t dma;
1382 u32 txstatus;
1383 u8 txdatarate;
1384 u16 qos;
1385
1386 wh = (struct ieee80211_hdr *)skb->data;
1387 if (ieee80211_is_data_qos(wh->frame_control))
1388 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1389 else
1390 qos = 0;
1391
1392 mwl8k_add_dma_header(skb);
1393 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1394
1395 tx_info = IEEE80211_SKB_CB(skb);
1396 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1397
1398 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1399 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1400 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1401 mwl8k_vif->seqno += 0x10;
1402 }
1403
1404 /* Setup firmware control bit fields for each frame type. */
1405 txstatus = 0;
1406 txdatarate = 0;
1407 if (ieee80211_is_mgmt(wh->frame_control) ||
1408 ieee80211_is_ctl(wh->frame_control)) {
1409 txdatarate = 0;
1410 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1411 } else if (ieee80211_is_data(wh->frame_control)) {
1412 txdatarate = 1;
1413 if (is_multicast_ether_addr(wh->addr1))
1414 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1415
1416 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1417 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1418 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1419 else
1420 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1421 }
1422
1423 dma = pci_map_single(priv->pdev, skb->data,
1424 skb->len, PCI_DMA_TODEVICE);
1425
1426 if (pci_dma_mapping_error(priv->pdev, dma)) {
1427 wiphy_debug(hw->wiphy,
1428 "failed to dma map skb, dropping TX frame.\n");
1429 dev_kfree_skb(skb);
1430 return NETDEV_TX_OK;
1431 }
1432
1433 spin_lock_bh(&priv->tx_lock);
1434
1435 txq = priv->txq + index;
1436
1437 BUG_ON(txq->skb[txq->tail] != NULL);
1438 txq->skb[txq->tail] = skb;
1439
1440 tx = txq->txd + txq->tail;
1441 tx->data_rate = txdatarate;
1442 tx->tx_priority = index;
1443 tx->qos_control = cpu_to_le16(qos);
1444 tx->pkt_phys_addr = cpu_to_le32(dma);
1445 tx->pkt_len = cpu_to_le16(skb->len);
1446 tx->rate_info = 0;
1447 if (!priv->ap_fw && tx_info->control.sta != NULL)
1448 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1449 else
1450 tx->peer_id = 0;
1451 wmb();
1452 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1453
1454 txq->len++;
1455 priv->pending_tx_pkts++;
1456
1457 txq->tail++;
1458 if (txq->tail == MWL8K_TX_DESCS)
1459 txq->tail = 0;
1460
1461 if (txq->head == txq->tail)
1462 ieee80211_stop_queue(hw, index);
1463
1464 mwl8k_tx_start(priv);
1465
1466 spin_unlock_bh(&priv->tx_lock);
1467
1468 return NETDEV_TX_OK;
1469 }
1470
1471
1472 /*
1473 * Firmware access.
1474 *
1475 * We have the following requirements for issuing firmware commands:
1476 * - Some commands require that the packet transmit path is idle when
1477 * the command is issued. (For simplicity, we'll just quiesce the
1478 * transmit path for every command.)
1479 * - There are certain sequences of commands that need to be issued to
1480 * the hardware sequentially, with no other intervening commands.
1481 *
1482 * This leads to an implementation of a "firmware lock" as a mutex that
1483 * can be taken recursively, and which is taken by both the low-level
1484 * command submission function (mwl8k_post_cmd) as well as any users of
1485 * that function that require issuing of an atomic sequence of commands,
1486 * and quiesces the transmit path whenever it's taken.
1487 */
1488 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1489 {
1490 struct mwl8k_priv *priv = hw->priv;
1491
1492 if (priv->fw_mutex_owner != current) {
1493 int rc;
1494
1495 mutex_lock(&priv->fw_mutex);
1496 ieee80211_stop_queues(hw);
1497
1498 rc = mwl8k_tx_wait_empty(hw);
1499 if (rc) {
1500 ieee80211_wake_queues(hw);
1501 mutex_unlock(&priv->fw_mutex);
1502
1503 return rc;
1504 }
1505
1506 priv->fw_mutex_owner = current;
1507 }
1508
1509 priv->fw_mutex_depth++;
1510
1511 return 0;
1512 }
1513
1514 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1515 {
1516 struct mwl8k_priv *priv = hw->priv;
1517
1518 if (!--priv->fw_mutex_depth) {
1519 ieee80211_wake_queues(hw);
1520 priv->fw_mutex_owner = NULL;
1521 mutex_unlock(&priv->fw_mutex);
1522 }
1523 }
1524
1525
1526 /*
1527 * Command processing.
1528 */
1529
1530 /* Timeout firmware commands after 10s */
1531 #define MWL8K_CMD_TIMEOUT_MS 10000
1532
1533 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1534 {
1535 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1536 struct mwl8k_priv *priv = hw->priv;
1537 void __iomem *regs = priv->regs;
1538 dma_addr_t dma_addr;
1539 unsigned int dma_size;
1540 int rc;
1541 unsigned long timeout = 0;
1542 u8 buf[32];
1543
1544 cmd->result = (__force __le16) 0xffff;
1545 dma_size = le16_to_cpu(cmd->length);
1546 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1547 PCI_DMA_BIDIRECTIONAL);
1548 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1549 return -ENOMEM;
1550
1551 rc = mwl8k_fw_lock(hw);
1552 if (rc) {
1553 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1554 PCI_DMA_BIDIRECTIONAL);
1555 return rc;
1556 }
1557
1558 priv->hostcmd_wait = &cmd_wait;
1559 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1560 iowrite32(MWL8K_H2A_INT_DOORBELL,
1561 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1562 iowrite32(MWL8K_H2A_INT_DUMMY,
1563 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1564
1565 timeout = wait_for_completion_timeout(&cmd_wait,
1566 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1567
1568 priv->hostcmd_wait = NULL;
1569
1570 mwl8k_fw_unlock(hw);
1571
1572 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1573 PCI_DMA_BIDIRECTIONAL);
1574
1575 if (!timeout) {
1576 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
1577 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1578 MWL8K_CMD_TIMEOUT_MS);
1579 rc = -ETIMEDOUT;
1580 } else {
1581 int ms;
1582
1583 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1584
1585 rc = cmd->result ? -EINVAL : 0;
1586 if (rc)
1587 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
1588 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1589 le16_to_cpu(cmd->result));
1590 else if (ms > 2000)
1591 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
1592 mwl8k_cmd_name(cmd->code,
1593 buf, sizeof(buf)),
1594 ms);
1595 }
1596
1597 return rc;
1598 }
1599
1600 static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
1601 struct ieee80211_vif *vif,
1602 struct mwl8k_cmd_pkt *cmd)
1603 {
1604 if (vif != NULL)
1605 cmd->macid = MWL8K_VIF(vif)->macid;
1606 return mwl8k_post_cmd(hw, cmd);
1607 }
1608
1609 /*
1610 * Setup code shared between STA and AP firmware images.
1611 */
1612 static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
1613 {
1614 struct mwl8k_priv *priv = hw->priv;
1615
1616 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
1617 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
1618
1619 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
1620 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
1621
1622 priv->band_24.band = IEEE80211_BAND_2GHZ;
1623 priv->band_24.channels = priv->channels_24;
1624 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
1625 priv->band_24.bitrates = priv->rates_24;
1626 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
1627
1628 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
1629 }
1630
1631 static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
1632 {
1633 struct mwl8k_priv *priv = hw->priv;
1634
1635 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
1636 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
1637
1638 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
1639 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
1640
1641 priv->band_50.band = IEEE80211_BAND_5GHZ;
1642 priv->band_50.channels = priv->channels_50;
1643 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
1644 priv->band_50.bitrates = priv->rates_50;
1645 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
1646
1647 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
1648 }
1649
1650 /*
1651 * CMD_GET_HW_SPEC (STA version).
1652 */
1653 struct mwl8k_cmd_get_hw_spec_sta {
1654 struct mwl8k_cmd_pkt header;
1655 __u8 hw_rev;
1656 __u8 host_interface;
1657 __le16 num_mcaddrs;
1658 __u8 perm_addr[ETH_ALEN];
1659 __le16 region_code;
1660 __le32 fw_rev;
1661 __le32 ps_cookie;
1662 __le32 caps;
1663 __u8 mcs_bitmap[16];
1664 __le32 rx_queue_ptr;
1665 __le32 num_tx_queues;
1666 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1667 __le32 caps2;
1668 __le32 num_tx_desc_per_queue;
1669 __le32 total_rxd;
1670 } __packed;
1671
1672 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1673 #define MWL8K_CAP_GREENFIELD 0x08000000
1674 #define MWL8K_CAP_AMPDU 0x04000000
1675 #define MWL8K_CAP_RX_STBC 0x01000000
1676 #define MWL8K_CAP_TX_STBC 0x00800000
1677 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1678 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1679 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1680 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1681 #define MWL8K_CAP_DELAY_BA 0x00003000
1682 #define MWL8K_CAP_MIMO 0x00000200
1683 #define MWL8K_CAP_40MHZ 0x00000100
1684 #define MWL8K_CAP_BAND_MASK 0x00000007
1685 #define MWL8K_CAP_5GHZ 0x00000004
1686 #define MWL8K_CAP_2GHZ4 0x00000001
1687
1688 static void
1689 mwl8k_set_ht_caps(struct ieee80211_hw *hw,
1690 struct ieee80211_supported_band *band, u32 cap)
1691 {
1692 int rx_streams;
1693 int tx_streams;
1694
1695 band->ht_cap.ht_supported = 1;
1696
1697 if (cap & MWL8K_CAP_MAX_AMSDU)
1698 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1699 if (cap & MWL8K_CAP_GREENFIELD)
1700 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1701 if (cap & MWL8K_CAP_AMPDU) {
1702 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1703 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1704 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
1705 }
1706 if (cap & MWL8K_CAP_RX_STBC)
1707 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1708 if (cap & MWL8K_CAP_TX_STBC)
1709 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1710 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1711 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1712 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1713 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1714 if (cap & MWL8K_CAP_DELAY_BA)
1715 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1716 if (cap & MWL8K_CAP_40MHZ)
1717 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1718
1719 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1720 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1721
1722 band->ht_cap.mcs.rx_mask[0] = 0xff;
1723 if (rx_streams >= 2)
1724 band->ht_cap.mcs.rx_mask[1] = 0xff;
1725 if (rx_streams >= 3)
1726 band->ht_cap.mcs.rx_mask[2] = 0xff;
1727 band->ht_cap.mcs.rx_mask[4] = 0x01;
1728 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1729
1730 if (rx_streams != tx_streams) {
1731 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1732 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1733 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1734 }
1735 }
1736
1737 static void
1738 mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
1739 {
1740 struct mwl8k_priv *priv = hw->priv;
1741
1742 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
1743 mwl8k_setup_2ghz_band(hw);
1744 if (caps & MWL8K_CAP_MIMO)
1745 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
1746 }
1747
1748 if (caps & MWL8K_CAP_5GHZ) {
1749 mwl8k_setup_5ghz_band(hw);
1750 if (caps & MWL8K_CAP_MIMO)
1751 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
1752 }
1753 }
1754
1755 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1756 {
1757 struct mwl8k_priv *priv = hw->priv;
1758 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1759 int rc;
1760 int i;
1761
1762 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1763 if (cmd == NULL)
1764 return -ENOMEM;
1765
1766 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1767 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1768
1769 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1770 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1771 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1772 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1773 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1774 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1775 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1776 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1777
1778 rc = mwl8k_post_cmd(hw, &cmd->header);
1779
1780 if (!rc) {
1781 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1782 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1783 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1784 priv->hw_rev = cmd->hw_rev;
1785 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
1786 priv->ap_macids_supported = 0x00000000;
1787 priv->sta_macids_supported = 0x00000001;
1788 }
1789
1790 kfree(cmd);
1791 return rc;
1792 }
1793
1794 /*
1795 * CMD_GET_HW_SPEC (AP version).
1796 */
1797 struct mwl8k_cmd_get_hw_spec_ap {
1798 struct mwl8k_cmd_pkt header;
1799 __u8 hw_rev;
1800 __u8 host_interface;
1801 __le16 num_wcb;
1802 __le16 num_mcaddrs;
1803 __u8 perm_addr[ETH_ALEN];
1804 __le16 region_code;
1805 __le16 num_antenna;
1806 __le32 fw_rev;
1807 __le32 wcbbase0;
1808 __le32 rxwrptr;
1809 __le32 rxrdptr;
1810 __le32 ps_cookie;
1811 __le32 wcbbase1;
1812 __le32 wcbbase2;
1813 __le32 wcbbase3;
1814 } __packed;
1815
1816 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1817 {
1818 struct mwl8k_priv *priv = hw->priv;
1819 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1820 int rc;
1821
1822 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1823 if (cmd == NULL)
1824 return -ENOMEM;
1825
1826 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1827 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1828
1829 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1830 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1831
1832 rc = mwl8k_post_cmd(hw, &cmd->header);
1833
1834 if (!rc) {
1835 int off;
1836
1837 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1838 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1839 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1840 priv->hw_rev = cmd->hw_rev;
1841 mwl8k_setup_2ghz_band(hw);
1842 priv->ap_macids_supported = 0x000000ff;
1843 priv->sta_macids_supported = 0x00000000;
1844
1845 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1846 iowrite32(priv->txq[0].txd_dma, priv->sram + off);
1847
1848 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1849 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
1850
1851 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1852 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
1853
1854 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1855 iowrite32(priv->txq[1].txd_dma, priv->sram + off);
1856
1857 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1858 iowrite32(priv->txq[2].txd_dma, priv->sram + off);
1859
1860 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1861 iowrite32(priv->txq[3].txd_dma, priv->sram + off);
1862 }
1863
1864 kfree(cmd);
1865 return rc;
1866 }
1867
1868 /*
1869 * CMD_SET_HW_SPEC.
1870 */
1871 struct mwl8k_cmd_set_hw_spec {
1872 struct mwl8k_cmd_pkt header;
1873 __u8 hw_rev;
1874 __u8 host_interface;
1875 __le16 num_mcaddrs;
1876 __u8 perm_addr[ETH_ALEN];
1877 __le16 region_code;
1878 __le32 fw_rev;
1879 __le32 ps_cookie;
1880 __le32 caps;
1881 __le32 rx_queue_ptr;
1882 __le32 num_tx_queues;
1883 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1884 __le32 flags;
1885 __le32 num_tx_desc_per_queue;
1886 __le32 total_rxd;
1887 } __packed;
1888
1889 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1890 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1891 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1892
1893 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1894 {
1895 struct mwl8k_priv *priv = hw->priv;
1896 struct mwl8k_cmd_set_hw_spec *cmd;
1897 int rc;
1898 int i;
1899
1900 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1901 if (cmd == NULL)
1902 return -ENOMEM;
1903
1904 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1905 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1906
1907 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1908 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1909 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1910 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1911 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1912 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1913 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1914 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1915 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1916 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1917
1918 rc = mwl8k_post_cmd(hw, &cmd->header);
1919 kfree(cmd);
1920
1921 return rc;
1922 }
1923
1924 /*
1925 * CMD_MAC_MULTICAST_ADR.
1926 */
1927 struct mwl8k_cmd_mac_multicast_adr {
1928 struct mwl8k_cmd_pkt header;
1929 __le16 action;
1930 __le16 numaddr;
1931 __u8 addr[0][ETH_ALEN];
1932 };
1933
1934 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1935 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1936 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1937 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1938
1939 static struct mwl8k_cmd_pkt *
1940 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1941 struct netdev_hw_addr_list *mc_list)
1942 {
1943 struct mwl8k_priv *priv = hw->priv;
1944 struct mwl8k_cmd_mac_multicast_adr *cmd;
1945 int size;
1946 int mc_count = 0;
1947
1948 if (mc_list)
1949 mc_count = netdev_hw_addr_list_count(mc_list);
1950
1951 if (allmulti || mc_count > priv->num_mcaddrs) {
1952 allmulti = 1;
1953 mc_count = 0;
1954 }
1955
1956 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1957
1958 cmd = kzalloc(size, GFP_ATOMIC);
1959 if (cmd == NULL)
1960 return NULL;
1961
1962 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1963 cmd->header.length = cpu_to_le16(size);
1964 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1965 MWL8K_ENABLE_RX_BROADCAST);
1966
1967 if (allmulti) {
1968 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1969 } else if (mc_count) {
1970 struct netdev_hw_addr *ha;
1971 int i = 0;
1972
1973 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1974 cmd->numaddr = cpu_to_le16(mc_count);
1975 netdev_hw_addr_list_for_each(ha, mc_list) {
1976 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
1977 }
1978 }
1979
1980 return &cmd->header;
1981 }
1982
1983 /*
1984 * CMD_GET_STAT.
1985 */
1986 struct mwl8k_cmd_get_stat {
1987 struct mwl8k_cmd_pkt header;
1988 __le32 stats[64];
1989 } __packed;
1990
1991 #define MWL8K_STAT_ACK_FAILURE 9
1992 #define MWL8K_STAT_RTS_FAILURE 12
1993 #define MWL8K_STAT_FCS_ERROR 24
1994 #define MWL8K_STAT_RTS_SUCCESS 11
1995
1996 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1997 struct ieee80211_low_level_stats *stats)
1998 {
1999 struct mwl8k_cmd_get_stat *cmd;
2000 int rc;
2001
2002 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2003 if (cmd == NULL)
2004 return -ENOMEM;
2005
2006 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2007 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2008
2009 rc = mwl8k_post_cmd(hw, &cmd->header);
2010 if (!rc) {
2011 stats->dot11ACKFailureCount =
2012 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2013 stats->dot11RTSFailureCount =
2014 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2015 stats->dot11FCSErrorCount =
2016 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2017 stats->dot11RTSSuccessCount =
2018 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2019 }
2020 kfree(cmd);
2021
2022 return rc;
2023 }
2024
2025 /*
2026 * CMD_RADIO_CONTROL.
2027 */
2028 struct mwl8k_cmd_radio_control {
2029 struct mwl8k_cmd_pkt header;
2030 __le16 action;
2031 __le16 control;
2032 __le16 radio_on;
2033 } __packed;
2034
2035 static int
2036 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
2037 {
2038 struct mwl8k_priv *priv = hw->priv;
2039 struct mwl8k_cmd_radio_control *cmd;
2040 int rc;
2041
2042 if (enable == priv->radio_on && !force)
2043 return 0;
2044
2045 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2046 if (cmd == NULL)
2047 return -ENOMEM;
2048
2049 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2050 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2051 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2052 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
2053 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2054
2055 rc = mwl8k_post_cmd(hw, &cmd->header);
2056 kfree(cmd);
2057
2058 if (!rc)
2059 priv->radio_on = enable;
2060
2061 return rc;
2062 }
2063
2064 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
2065 {
2066 return mwl8k_cmd_radio_control(hw, 0, 0);
2067 }
2068
2069 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
2070 {
2071 return mwl8k_cmd_radio_control(hw, 1, 0);
2072 }
2073
2074 static int
2075 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2076 {
2077 struct mwl8k_priv *priv = hw->priv;
2078
2079 priv->radio_short_preamble = short_preamble;
2080
2081 return mwl8k_cmd_radio_control(hw, 1, 1);
2082 }
2083
2084 /*
2085 * CMD_RF_TX_POWER.
2086 */
2087 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
2088
2089 struct mwl8k_cmd_rf_tx_power {
2090 struct mwl8k_cmd_pkt header;
2091 __le16 action;
2092 __le16 support_level;
2093 __le16 current_level;
2094 __le16 reserved;
2095 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2096 } __packed;
2097
2098 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
2099 {
2100 struct mwl8k_cmd_rf_tx_power *cmd;
2101 int rc;
2102
2103 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2104 if (cmd == NULL)
2105 return -ENOMEM;
2106
2107 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2108 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2109 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2110 cmd->support_level = cpu_to_le16(dBm);
2111
2112 rc = mwl8k_post_cmd(hw, &cmd->header);
2113 kfree(cmd);
2114
2115 return rc;
2116 }
2117
2118 /*
2119 * CMD_RF_ANTENNA.
2120 */
2121 struct mwl8k_cmd_rf_antenna {
2122 struct mwl8k_cmd_pkt header;
2123 __le16 antenna;
2124 __le16 mode;
2125 } __packed;
2126
2127 #define MWL8K_RF_ANTENNA_RX 1
2128 #define MWL8K_RF_ANTENNA_TX 2
2129
2130 static int
2131 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2132 {
2133 struct mwl8k_cmd_rf_antenna *cmd;
2134 int rc;
2135
2136 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2137 if (cmd == NULL)
2138 return -ENOMEM;
2139
2140 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2141 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2142 cmd->antenna = cpu_to_le16(antenna);
2143 cmd->mode = cpu_to_le16(mask);
2144
2145 rc = mwl8k_post_cmd(hw, &cmd->header);
2146 kfree(cmd);
2147
2148 return rc;
2149 }
2150
2151 /*
2152 * CMD_SET_BEACON.
2153 */
2154 struct mwl8k_cmd_set_beacon {
2155 struct mwl8k_cmd_pkt header;
2156 __le16 beacon_len;
2157 __u8 beacon[0];
2158 };
2159
2160 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2161 struct ieee80211_vif *vif, u8 *beacon, int len)
2162 {
2163 struct mwl8k_cmd_set_beacon *cmd;
2164 int rc;
2165
2166 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2167 if (cmd == NULL)
2168 return -ENOMEM;
2169
2170 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2171 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2172 cmd->beacon_len = cpu_to_le16(len);
2173 memcpy(cmd->beacon, beacon, len);
2174
2175 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2176 kfree(cmd);
2177
2178 return rc;
2179 }
2180
2181 /*
2182 * CMD_SET_PRE_SCAN.
2183 */
2184 struct mwl8k_cmd_set_pre_scan {
2185 struct mwl8k_cmd_pkt header;
2186 } __packed;
2187
2188 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2189 {
2190 struct mwl8k_cmd_set_pre_scan *cmd;
2191 int rc;
2192
2193 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2194 if (cmd == NULL)
2195 return -ENOMEM;
2196
2197 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2198 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2199
2200 rc = mwl8k_post_cmd(hw, &cmd->header);
2201 kfree(cmd);
2202
2203 return rc;
2204 }
2205
2206 /*
2207 * CMD_SET_POST_SCAN.
2208 */
2209 struct mwl8k_cmd_set_post_scan {
2210 struct mwl8k_cmd_pkt header;
2211 __le32 isibss;
2212 __u8 bssid[ETH_ALEN];
2213 } __packed;
2214
2215 static int
2216 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2217 {
2218 struct mwl8k_cmd_set_post_scan *cmd;
2219 int rc;
2220
2221 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2222 if (cmd == NULL)
2223 return -ENOMEM;
2224
2225 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2226 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2227 cmd->isibss = 0;
2228 memcpy(cmd->bssid, mac, ETH_ALEN);
2229
2230 rc = mwl8k_post_cmd(hw, &cmd->header);
2231 kfree(cmd);
2232
2233 return rc;
2234 }
2235
2236 /*
2237 * CMD_SET_RF_CHANNEL.
2238 */
2239 struct mwl8k_cmd_set_rf_channel {
2240 struct mwl8k_cmd_pkt header;
2241 __le16 action;
2242 __u8 current_channel;
2243 __le32 channel_flags;
2244 } __packed;
2245
2246 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2247 struct ieee80211_conf *conf)
2248 {
2249 struct ieee80211_channel *channel = conf->channel;
2250 struct mwl8k_cmd_set_rf_channel *cmd;
2251 int rc;
2252
2253 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2254 if (cmd == NULL)
2255 return -ENOMEM;
2256
2257 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2258 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2259 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2260 cmd->current_channel = channel->hw_value;
2261
2262 if (channel->band == IEEE80211_BAND_2GHZ)
2263 cmd->channel_flags |= cpu_to_le32(0x00000001);
2264 else if (channel->band == IEEE80211_BAND_5GHZ)
2265 cmd->channel_flags |= cpu_to_le32(0x00000004);
2266
2267 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2268 conf->channel_type == NL80211_CHAN_HT20)
2269 cmd->channel_flags |= cpu_to_le32(0x00000080);
2270 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2271 cmd->channel_flags |= cpu_to_le32(0x000001900);
2272 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2273 cmd->channel_flags |= cpu_to_le32(0x000000900);
2274
2275 rc = mwl8k_post_cmd(hw, &cmd->header);
2276 kfree(cmd);
2277
2278 return rc;
2279 }
2280
2281 /*
2282 * CMD_SET_AID.
2283 */
2284 #define MWL8K_FRAME_PROT_DISABLED 0x00
2285 #define MWL8K_FRAME_PROT_11G 0x07
2286 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2287 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2288
2289 struct mwl8k_cmd_update_set_aid {
2290 struct mwl8k_cmd_pkt header;
2291 __le16 aid;
2292
2293 /* AP's MAC address (BSSID) */
2294 __u8 bssid[ETH_ALEN];
2295 __le16 protection_mode;
2296 __u8 supp_rates[14];
2297 } __packed;
2298
2299 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2300 {
2301 int i;
2302 int j;
2303
2304 /*
2305 * Clear nonstandard rates 4 and 13.
2306 */
2307 mask &= 0x1fef;
2308
2309 for (i = 0, j = 0; i < 14; i++) {
2310 if (mask & (1 << i))
2311 rates[j++] = mwl8k_rates_24[i].hw_value;
2312 }
2313 }
2314
2315 static int
2316 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2317 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2318 {
2319 struct mwl8k_cmd_update_set_aid *cmd;
2320 u16 prot_mode;
2321 int rc;
2322
2323 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2324 if (cmd == NULL)
2325 return -ENOMEM;
2326
2327 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2328 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2329 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2330 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2331
2332 if (vif->bss_conf.use_cts_prot) {
2333 prot_mode = MWL8K_FRAME_PROT_11G;
2334 } else {
2335 switch (vif->bss_conf.ht_operation_mode &
2336 IEEE80211_HT_OP_MODE_PROTECTION) {
2337 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2338 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2339 break;
2340 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2341 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2342 break;
2343 default:
2344 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2345 break;
2346 }
2347 }
2348 cmd->protection_mode = cpu_to_le16(prot_mode);
2349
2350 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2351
2352 rc = mwl8k_post_cmd(hw, &cmd->header);
2353 kfree(cmd);
2354
2355 return rc;
2356 }
2357
2358 /*
2359 * CMD_SET_RATE.
2360 */
2361 struct mwl8k_cmd_set_rate {
2362 struct mwl8k_cmd_pkt header;
2363 __u8 legacy_rates[14];
2364
2365 /* Bitmap for supported MCS codes. */
2366 __u8 mcs_set[16];
2367 __u8 reserved[16];
2368 } __packed;
2369
2370 static int
2371 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2372 u32 legacy_rate_mask, u8 *mcs_rates)
2373 {
2374 struct mwl8k_cmd_set_rate *cmd;
2375 int rc;
2376
2377 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2378 if (cmd == NULL)
2379 return -ENOMEM;
2380
2381 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2382 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2383 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2384 memcpy(cmd->mcs_set, mcs_rates, 16);
2385
2386 rc = mwl8k_post_cmd(hw, &cmd->header);
2387 kfree(cmd);
2388
2389 return rc;
2390 }
2391
2392 /*
2393 * CMD_FINALIZE_JOIN.
2394 */
2395 #define MWL8K_FJ_BEACON_MAXLEN 128
2396
2397 struct mwl8k_cmd_finalize_join {
2398 struct mwl8k_cmd_pkt header;
2399 __le32 sleep_interval; /* Number of beacon periods to sleep */
2400 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2401 } __packed;
2402
2403 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2404 int framelen, int dtim)
2405 {
2406 struct mwl8k_cmd_finalize_join *cmd;
2407 struct ieee80211_mgmt *payload = frame;
2408 int payload_len;
2409 int rc;
2410
2411 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2412 if (cmd == NULL)
2413 return -ENOMEM;
2414
2415 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2416 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2417 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2418
2419 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2420 if (payload_len < 0)
2421 payload_len = 0;
2422 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2423 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2424
2425 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2426
2427 rc = mwl8k_post_cmd(hw, &cmd->header);
2428 kfree(cmd);
2429
2430 return rc;
2431 }
2432
2433 /*
2434 * CMD_SET_RTS_THRESHOLD.
2435 */
2436 struct mwl8k_cmd_set_rts_threshold {
2437 struct mwl8k_cmd_pkt header;
2438 __le16 action;
2439 __le16 threshold;
2440 } __packed;
2441
2442 static int
2443 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2444 {
2445 struct mwl8k_cmd_set_rts_threshold *cmd;
2446 int rc;
2447
2448 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2449 if (cmd == NULL)
2450 return -ENOMEM;
2451
2452 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2453 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2454 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2455 cmd->threshold = cpu_to_le16(rts_thresh);
2456
2457 rc = mwl8k_post_cmd(hw, &cmd->header);
2458 kfree(cmd);
2459
2460 return rc;
2461 }
2462
2463 /*
2464 * CMD_SET_SLOT.
2465 */
2466 struct mwl8k_cmd_set_slot {
2467 struct mwl8k_cmd_pkt header;
2468 __le16 action;
2469 __u8 short_slot;
2470 } __packed;
2471
2472 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2473 {
2474 struct mwl8k_cmd_set_slot *cmd;
2475 int rc;
2476
2477 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2478 if (cmd == NULL)
2479 return -ENOMEM;
2480
2481 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2482 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2483 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2484 cmd->short_slot = short_slot_time;
2485
2486 rc = mwl8k_post_cmd(hw, &cmd->header);
2487 kfree(cmd);
2488
2489 return rc;
2490 }
2491
2492 /*
2493 * CMD_SET_EDCA_PARAMS.
2494 */
2495 struct mwl8k_cmd_set_edca_params {
2496 struct mwl8k_cmd_pkt header;
2497
2498 /* See MWL8K_SET_EDCA_XXX below */
2499 __le16 action;
2500
2501 /* TX opportunity in units of 32 us */
2502 __le16 txop;
2503
2504 union {
2505 struct {
2506 /* Log exponent of max contention period: 0...15 */
2507 __le32 log_cw_max;
2508
2509 /* Log exponent of min contention period: 0...15 */
2510 __le32 log_cw_min;
2511
2512 /* Adaptive interframe spacing in units of 32us */
2513 __u8 aifs;
2514
2515 /* TX queue to configure */
2516 __u8 txq;
2517 } ap;
2518 struct {
2519 /* Log exponent of max contention period: 0...15 */
2520 __u8 log_cw_max;
2521
2522 /* Log exponent of min contention period: 0...15 */
2523 __u8 log_cw_min;
2524
2525 /* Adaptive interframe spacing in units of 32us */
2526 __u8 aifs;
2527
2528 /* TX queue to configure */
2529 __u8 txq;
2530 } sta;
2531 };
2532 } __packed;
2533
2534 #define MWL8K_SET_EDCA_CW 0x01
2535 #define MWL8K_SET_EDCA_TXOP 0x02
2536 #define MWL8K_SET_EDCA_AIFS 0x04
2537
2538 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2539 MWL8K_SET_EDCA_TXOP | \
2540 MWL8K_SET_EDCA_AIFS)
2541
2542 static int
2543 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2544 __u16 cw_min, __u16 cw_max,
2545 __u8 aifs, __u16 txop)
2546 {
2547 struct mwl8k_priv *priv = hw->priv;
2548 struct mwl8k_cmd_set_edca_params *cmd;
2549 int rc;
2550
2551 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2552 if (cmd == NULL)
2553 return -ENOMEM;
2554
2555 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2556 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2557 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2558 cmd->txop = cpu_to_le16(txop);
2559 if (priv->ap_fw) {
2560 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2561 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2562 cmd->ap.aifs = aifs;
2563 cmd->ap.txq = qnum;
2564 } else {
2565 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2566 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2567 cmd->sta.aifs = aifs;
2568 cmd->sta.txq = qnum;
2569 }
2570
2571 rc = mwl8k_post_cmd(hw, &cmd->header);
2572 kfree(cmd);
2573
2574 return rc;
2575 }
2576
2577 /*
2578 * CMD_SET_WMM_MODE.
2579 */
2580 struct mwl8k_cmd_set_wmm_mode {
2581 struct mwl8k_cmd_pkt header;
2582 __le16 action;
2583 } __packed;
2584
2585 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2586 {
2587 struct mwl8k_priv *priv = hw->priv;
2588 struct mwl8k_cmd_set_wmm_mode *cmd;
2589 int rc;
2590
2591 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2592 if (cmd == NULL)
2593 return -ENOMEM;
2594
2595 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2596 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2597 cmd->action = cpu_to_le16(!!enable);
2598
2599 rc = mwl8k_post_cmd(hw, &cmd->header);
2600 kfree(cmd);
2601
2602 if (!rc)
2603 priv->wmm_enabled = enable;
2604
2605 return rc;
2606 }
2607
2608 /*
2609 * CMD_MIMO_CONFIG.
2610 */
2611 struct mwl8k_cmd_mimo_config {
2612 struct mwl8k_cmd_pkt header;
2613 __le32 action;
2614 __u8 rx_antenna_map;
2615 __u8 tx_antenna_map;
2616 } __packed;
2617
2618 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2619 {
2620 struct mwl8k_cmd_mimo_config *cmd;
2621 int rc;
2622
2623 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2624 if (cmd == NULL)
2625 return -ENOMEM;
2626
2627 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2628 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2629 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2630 cmd->rx_antenna_map = rx;
2631 cmd->tx_antenna_map = tx;
2632
2633 rc = mwl8k_post_cmd(hw, &cmd->header);
2634 kfree(cmd);
2635
2636 return rc;
2637 }
2638
2639 /*
2640 * CMD_USE_FIXED_RATE (STA version).
2641 */
2642 struct mwl8k_cmd_use_fixed_rate_sta {
2643 struct mwl8k_cmd_pkt header;
2644 __le32 action;
2645 __le32 allow_rate_drop;
2646 __le32 num_rates;
2647 struct {
2648 __le32 is_ht_rate;
2649 __le32 enable_retry;
2650 __le32 rate;
2651 __le32 retry_count;
2652 } rate_entry[8];
2653 __le32 rate_type;
2654 __le32 reserved1;
2655 __le32 reserved2;
2656 } __packed;
2657
2658 #define MWL8K_USE_AUTO_RATE 0x0002
2659 #define MWL8K_UCAST_RATE 0
2660
2661 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2662 {
2663 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2664 int rc;
2665
2666 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2667 if (cmd == NULL)
2668 return -ENOMEM;
2669
2670 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2671 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2672 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2673 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2674
2675 rc = mwl8k_post_cmd(hw, &cmd->header);
2676 kfree(cmd);
2677
2678 return rc;
2679 }
2680
2681 /*
2682 * CMD_USE_FIXED_RATE (AP version).
2683 */
2684 struct mwl8k_cmd_use_fixed_rate_ap {
2685 struct mwl8k_cmd_pkt header;
2686 __le32 action;
2687 __le32 allow_rate_drop;
2688 __le32 num_rates;
2689 struct mwl8k_rate_entry_ap {
2690 __le32 is_ht_rate;
2691 __le32 enable_retry;
2692 __le32 rate;
2693 __le32 retry_count;
2694 } rate_entry[4];
2695 u8 multicast_rate;
2696 u8 multicast_rate_type;
2697 u8 management_rate;
2698 } __packed;
2699
2700 static int
2701 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2702 {
2703 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2704 int rc;
2705
2706 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2707 if (cmd == NULL)
2708 return -ENOMEM;
2709
2710 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2711 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2712 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2713 cmd->multicast_rate = mcast;
2714 cmd->management_rate = mgmt;
2715
2716 rc = mwl8k_post_cmd(hw, &cmd->header);
2717 kfree(cmd);
2718
2719 return rc;
2720 }
2721
2722 /*
2723 * CMD_ENABLE_SNIFFER.
2724 */
2725 struct mwl8k_cmd_enable_sniffer {
2726 struct mwl8k_cmd_pkt header;
2727 __le32 action;
2728 } __packed;
2729
2730 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2731 {
2732 struct mwl8k_cmd_enable_sniffer *cmd;
2733 int rc;
2734
2735 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2736 if (cmd == NULL)
2737 return -ENOMEM;
2738
2739 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2740 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2741 cmd->action = cpu_to_le32(!!enable);
2742
2743 rc = mwl8k_post_cmd(hw, &cmd->header);
2744 kfree(cmd);
2745
2746 return rc;
2747 }
2748
2749 /*
2750 * CMD_SET_MAC_ADDR.
2751 */
2752 struct mwl8k_cmd_set_mac_addr {
2753 struct mwl8k_cmd_pkt header;
2754 union {
2755 struct {
2756 __le16 mac_type;
2757 __u8 mac_addr[ETH_ALEN];
2758 } mbss;
2759 __u8 mac_addr[ETH_ALEN];
2760 };
2761 } __packed;
2762
2763 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2764 #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
2765 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2766 #define MWL8K_MAC_TYPE_SECONDARY_AP 3
2767
2768 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
2769 struct ieee80211_vif *vif, u8 *mac)
2770 {
2771 struct mwl8k_priv *priv = hw->priv;
2772 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2773 struct mwl8k_cmd_set_mac_addr *cmd;
2774 int mac_type;
2775 int rc;
2776
2777 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2778 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
2779 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
2780 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
2781 else
2782 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
2783 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
2784 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
2785 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2786 else
2787 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
2788 }
2789
2790 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2791 if (cmd == NULL)
2792 return -ENOMEM;
2793
2794 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2795 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2796 if (priv->ap_fw) {
2797 cmd->mbss.mac_type = cpu_to_le16(mac_type);
2798 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2799 } else {
2800 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2801 }
2802
2803 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2804 kfree(cmd);
2805
2806 return rc;
2807 }
2808
2809 /*
2810 * CMD_SET_RATEADAPT_MODE.
2811 */
2812 struct mwl8k_cmd_set_rate_adapt_mode {
2813 struct mwl8k_cmd_pkt header;
2814 __le16 action;
2815 __le16 mode;
2816 } __packed;
2817
2818 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2819 {
2820 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2821 int rc;
2822
2823 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2824 if (cmd == NULL)
2825 return -ENOMEM;
2826
2827 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2828 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2829 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2830 cmd->mode = cpu_to_le16(mode);
2831
2832 rc = mwl8k_post_cmd(hw, &cmd->header);
2833 kfree(cmd);
2834
2835 return rc;
2836 }
2837
2838 /*
2839 * CMD_BSS_START.
2840 */
2841 struct mwl8k_cmd_bss_start {
2842 struct mwl8k_cmd_pkt header;
2843 __le32 enable;
2844 } __packed;
2845
2846 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
2847 struct ieee80211_vif *vif, int enable)
2848 {
2849 struct mwl8k_cmd_bss_start *cmd;
2850 int rc;
2851
2852 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2853 if (cmd == NULL)
2854 return -ENOMEM;
2855
2856 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2857 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2858 cmd->enable = cpu_to_le32(enable);
2859
2860 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2861 kfree(cmd);
2862
2863 return rc;
2864 }
2865
2866 /*
2867 * CMD_SET_NEW_STN.
2868 */
2869 struct mwl8k_cmd_set_new_stn {
2870 struct mwl8k_cmd_pkt header;
2871 __le16 aid;
2872 __u8 mac_addr[6];
2873 __le16 stn_id;
2874 __le16 action;
2875 __le16 rsvd;
2876 __le32 legacy_rates;
2877 __u8 ht_rates[4];
2878 __le16 cap_info;
2879 __le16 ht_capabilities_info;
2880 __u8 mac_ht_param_info;
2881 __u8 rev;
2882 __u8 control_channel;
2883 __u8 add_channel;
2884 __le16 op_mode;
2885 __le16 stbc;
2886 __u8 add_qos_info;
2887 __u8 is_qos_sta;
2888 __le32 fw_sta_ptr;
2889 } __packed;
2890
2891 #define MWL8K_STA_ACTION_ADD 0
2892 #define MWL8K_STA_ACTION_REMOVE 2
2893
2894 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
2895 struct ieee80211_vif *vif,
2896 struct ieee80211_sta *sta)
2897 {
2898 struct mwl8k_cmd_set_new_stn *cmd;
2899 u32 rates;
2900 int rc;
2901
2902 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2903 if (cmd == NULL)
2904 return -ENOMEM;
2905
2906 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2907 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2908 cmd->aid = cpu_to_le16(sta->aid);
2909 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
2910 cmd->stn_id = cpu_to_le16(sta->aid);
2911 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
2912 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
2913 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
2914 else
2915 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
2916 cmd->legacy_rates = cpu_to_le32(rates);
2917 if (sta->ht_cap.ht_supported) {
2918 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
2919 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
2920 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
2921 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
2922 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
2923 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
2924 ((sta->ht_cap.ampdu_density & 7) << 2);
2925 cmd->is_qos_sta = 1;
2926 }
2927
2928 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2929 kfree(cmd);
2930
2931 return rc;
2932 }
2933
2934 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
2935 struct ieee80211_vif *vif)
2936 {
2937 struct mwl8k_cmd_set_new_stn *cmd;
2938 int rc;
2939
2940 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2941 if (cmd == NULL)
2942 return -ENOMEM;
2943
2944 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2945 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2946 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
2947
2948 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2949 kfree(cmd);
2950
2951 return rc;
2952 }
2953
2954 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
2955 struct ieee80211_vif *vif, u8 *addr)
2956 {
2957 struct mwl8k_cmd_set_new_stn *cmd;
2958 int rc;
2959
2960 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2961 if (cmd == NULL)
2962 return -ENOMEM;
2963
2964 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2965 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2966 memcpy(cmd->mac_addr, addr, ETH_ALEN);
2967 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
2968
2969 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2970 kfree(cmd);
2971
2972 return rc;
2973 }
2974
2975 /*
2976 * CMD_UPDATE_STADB.
2977 */
2978 struct ewc_ht_info {
2979 __le16 control1;
2980 __le16 control2;
2981 __le16 control3;
2982 } __packed;
2983
2984 struct peer_capability_info {
2985 /* Peer type - AP vs. STA. */
2986 __u8 peer_type;
2987
2988 /* Basic 802.11 capabilities from assoc resp. */
2989 __le16 basic_caps;
2990
2991 /* Set if peer supports 802.11n high throughput (HT). */
2992 __u8 ht_support;
2993
2994 /* Valid if HT is supported. */
2995 __le16 ht_caps;
2996 __u8 extended_ht_caps;
2997 struct ewc_ht_info ewc_info;
2998
2999 /* Legacy rate table. Intersection of our rates and peer rates. */
3000 __u8 legacy_rates[12];
3001
3002 /* HT rate table. Intersection of our rates and peer rates. */
3003 __u8 ht_rates[16];
3004 __u8 pad[16];
3005
3006 /* If set, interoperability mode, no proprietary extensions. */
3007 __u8 interop;
3008 __u8 pad2;
3009 __u8 station_id;
3010 __le16 amsdu_enabled;
3011 } __packed;
3012
3013 struct mwl8k_cmd_update_stadb {
3014 struct mwl8k_cmd_pkt header;
3015
3016 /* See STADB_ACTION_TYPE */
3017 __le32 action;
3018
3019 /* Peer MAC address */
3020 __u8 peer_addr[ETH_ALEN];
3021
3022 __le32 reserved;
3023
3024 /* Peer info - valid during add/update. */
3025 struct peer_capability_info peer_info;
3026 } __packed;
3027
3028 #define MWL8K_STA_DB_MODIFY_ENTRY 1
3029 #define MWL8K_STA_DB_DEL_ENTRY 2
3030
3031 /* Peer Entry flags - used to define the type of the peer node */
3032 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
3033
3034 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
3035 struct ieee80211_vif *vif,
3036 struct ieee80211_sta *sta)
3037 {
3038 struct mwl8k_cmd_update_stadb *cmd;
3039 struct peer_capability_info *p;
3040 u32 rates;
3041 int rc;
3042
3043 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3044 if (cmd == NULL)
3045 return -ENOMEM;
3046
3047 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3048 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3049 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
3050 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
3051
3052 p = &cmd->peer_info;
3053 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
3054 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
3055 p->ht_support = sta->ht_cap.ht_supported;
3056 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
3057 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
3058 ((sta->ht_cap.ampdu_density & 7) << 2);
3059 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3060 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3061 else
3062 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3063 legacy_rate_mask_to_array(p->legacy_rates, rates);
3064 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
3065 p->interop = 1;
3066 p->amsdu_enabled = 0;
3067
3068 rc = mwl8k_post_cmd(hw, &cmd->header);
3069 kfree(cmd);
3070
3071 return rc ? rc : p->station_id;
3072 }
3073
3074 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
3075 struct ieee80211_vif *vif, u8 *addr)
3076 {
3077 struct mwl8k_cmd_update_stadb *cmd;
3078 int rc;
3079
3080 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3081 if (cmd == NULL)
3082 return -ENOMEM;
3083
3084 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3085 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3086 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
3087 memcpy(cmd->peer_addr, addr, ETH_ALEN);
3088
3089 rc = mwl8k_post_cmd(hw, &cmd->header);
3090 kfree(cmd);
3091
3092 return rc;
3093 }
3094
3095
3096 /*
3097 * Interrupt handling.
3098 */
3099 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
3100 {
3101 struct ieee80211_hw *hw = dev_id;
3102 struct mwl8k_priv *priv = hw->priv;
3103 u32 status;
3104
3105 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3106 if (!status)
3107 return IRQ_NONE;
3108
3109 if (status & MWL8K_A2H_INT_TX_DONE) {
3110 status &= ~MWL8K_A2H_INT_TX_DONE;
3111 tasklet_schedule(&priv->poll_tx_task);
3112 }
3113
3114 if (status & MWL8K_A2H_INT_RX_READY) {
3115 status &= ~MWL8K_A2H_INT_RX_READY;
3116 tasklet_schedule(&priv->poll_rx_task);
3117 }
3118
3119 if (status)
3120 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3121
3122 if (status & MWL8K_A2H_INT_OPC_DONE) {
3123 if (priv->hostcmd_wait != NULL)
3124 complete(priv->hostcmd_wait);
3125 }
3126
3127 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
3128 if (!mutex_is_locked(&priv->fw_mutex) &&
3129 priv->radio_on && priv->pending_tx_pkts)
3130 mwl8k_tx_start(priv);
3131 }
3132
3133 return IRQ_HANDLED;
3134 }
3135
3136 static void mwl8k_tx_poll(unsigned long data)
3137 {
3138 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3139 struct mwl8k_priv *priv = hw->priv;
3140 int limit;
3141 int i;
3142
3143 limit = 32;
3144
3145 spin_lock_bh(&priv->tx_lock);
3146
3147 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3148 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3149
3150 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3151 complete(priv->tx_wait);
3152 priv->tx_wait = NULL;
3153 }
3154
3155 spin_unlock_bh(&priv->tx_lock);
3156
3157 if (limit) {
3158 writel(~MWL8K_A2H_INT_TX_DONE,
3159 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3160 } else {
3161 tasklet_schedule(&priv->poll_tx_task);
3162 }
3163 }
3164
3165 static void mwl8k_rx_poll(unsigned long data)
3166 {
3167 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3168 struct mwl8k_priv *priv = hw->priv;
3169 int limit;
3170
3171 limit = 32;
3172 limit -= rxq_process(hw, 0, limit);
3173 limit -= rxq_refill(hw, 0, limit);
3174
3175 if (limit) {
3176 writel(~MWL8K_A2H_INT_RX_READY,
3177 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3178 } else {
3179 tasklet_schedule(&priv->poll_rx_task);
3180 }
3181 }
3182
3183
3184 /*
3185 * Core driver operations.
3186 */
3187 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3188 {
3189 struct mwl8k_priv *priv = hw->priv;
3190 int index = skb_get_queue_mapping(skb);
3191 int rc;
3192
3193 if (!priv->radio_on) {
3194 wiphy_debug(hw->wiphy,
3195 "dropped TX frame since radio disabled\n");
3196 dev_kfree_skb(skb);
3197 return NETDEV_TX_OK;
3198 }
3199
3200 rc = mwl8k_txq_xmit(hw, index, skb);
3201
3202 return rc;
3203 }
3204
3205 static int mwl8k_start(struct ieee80211_hw *hw)
3206 {
3207 struct mwl8k_priv *priv = hw->priv;
3208 int rc;
3209
3210 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3211 IRQF_SHARED, MWL8K_NAME, hw);
3212 if (rc) {
3213 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
3214 return -EIO;
3215 }
3216
3217 /* Enable TX reclaim and RX tasklets. */
3218 tasklet_enable(&priv->poll_tx_task);
3219 tasklet_enable(&priv->poll_rx_task);
3220
3221 /* Enable interrupts */
3222 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3223
3224 rc = mwl8k_fw_lock(hw);
3225 if (!rc) {
3226 rc = mwl8k_cmd_radio_enable(hw);
3227
3228 if (!priv->ap_fw) {
3229 if (!rc)
3230 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3231
3232 if (!rc)
3233 rc = mwl8k_cmd_set_pre_scan(hw);
3234
3235 if (!rc)
3236 rc = mwl8k_cmd_set_post_scan(hw,
3237 "\x00\x00\x00\x00\x00\x00");
3238 }
3239
3240 if (!rc)
3241 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3242
3243 if (!rc)
3244 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3245
3246 mwl8k_fw_unlock(hw);
3247 }
3248
3249 if (rc) {
3250 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3251 free_irq(priv->pdev->irq, hw);
3252 tasklet_disable(&priv->poll_tx_task);
3253 tasklet_disable(&priv->poll_rx_task);
3254 }
3255
3256 return rc;
3257 }
3258
3259 static void mwl8k_stop(struct ieee80211_hw *hw)
3260 {
3261 struct mwl8k_priv *priv = hw->priv;
3262 int i;
3263
3264 mwl8k_cmd_radio_disable(hw);
3265
3266 ieee80211_stop_queues(hw);
3267
3268 /* Disable interrupts */
3269 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3270 free_irq(priv->pdev->irq, hw);
3271
3272 /* Stop finalize join worker */
3273 cancel_work_sync(&priv->finalize_join_worker);
3274 if (priv->beacon_skb != NULL)
3275 dev_kfree_skb(priv->beacon_skb);
3276
3277 /* Stop TX reclaim and RX tasklets. */
3278 tasklet_disable(&priv->poll_tx_task);
3279 tasklet_disable(&priv->poll_rx_task);
3280
3281 /* Return all skbs to mac80211 */
3282 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3283 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3284 }
3285
3286 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3287 struct ieee80211_vif *vif)
3288 {
3289 struct mwl8k_priv *priv = hw->priv;
3290 struct mwl8k_vif *mwl8k_vif;
3291 u32 macids_supported;
3292 int macid;
3293
3294 /*
3295 * Reject interface creation if sniffer mode is active, as
3296 * STA operation is mutually exclusive with hardware sniffer
3297 * mode. (Sniffer mode is only used on STA firmware.)
3298 */
3299 if (priv->sniffer_enabled) {
3300 wiphy_info(hw->wiphy,
3301 "unable to create STA interface because sniffer mode is enabled\n");
3302 return -EINVAL;
3303 }
3304
3305
3306 switch (vif->type) {
3307 case NL80211_IFTYPE_AP:
3308 macids_supported = priv->ap_macids_supported;
3309 break;
3310 case NL80211_IFTYPE_STATION:
3311 macids_supported = priv->sta_macids_supported;
3312 break;
3313 default:
3314 return -EINVAL;
3315 }
3316
3317 macid = ffs(macids_supported & ~priv->macids_used);
3318 if (!macid--)
3319 return -EBUSY;
3320
3321 /* Setup driver private area. */
3322 mwl8k_vif = MWL8K_VIF(vif);
3323 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3324 mwl8k_vif->vif = vif;
3325 mwl8k_vif->macid = macid;
3326 mwl8k_vif->seqno = 0;
3327
3328 /* Set the mac address. */
3329 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
3330
3331 if (priv->ap_fw)
3332 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3333
3334 priv->macids_used |= 1 << mwl8k_vif->macid;
3335 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
3336
3337 return 0;
3338 }
3339
3340 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3341 struct ieee80211_vif *vif)
3342 {
3343 struct mwl8k_priv *priv = hw->priv;
3344 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3345
3346 if (priv->ap_fw)
3347 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3348
3349 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
3350
3351 priv->macids_used &= ~(1 << mwl8k_vif->macid);
3352 list_del(&mwl8k_vif->list);
3353 }
3354
3355 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3356 {
3357 struct ieee80211_conf *conf = &hw->conf;
3358 struct mwl8k_priv *priv = hw->priv;
3359 int rc;
3360
3361 if (conf->flags & IEEE80211_CONF_IDLE) {
3362 mwl8k_cmd_radio_disable(hw);
3363 return 0;
3364 }
3365
3366 rc = mwl8k_fw_lock(hw);
3367 if (rc)
3368 return rc;
3369
3370 rc = mwl8k_cmd_radio_enable(hw);
3371 if (rc)
3372 goto out;
3373
3374 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3375 if (rc)
3376 goto out;
3377
3378 if (conf->power_level > 18)
3379 conf->power_level = 18;
3380 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3381 if (rc)
3382 goto out;
3383
3384 if (priv->ap_fw) {
3385 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3386 if (!rc)
3387 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3388 } else {
3389 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3390 }
3391
3392 out:
3393 mwl8k_fw_unlock(hw);
3394
3395 return rc;
3396 }
3397
3398 static void
3399 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3400 struct ieee80211_bss_conf *info, u32 changed)
3401 {
3402 struct mwl8k_priv *priv = hw->priv;
3403 u32 ap_legacy_rates;
3404 u8 ap_mcs_rates[16];
3405 int rc;
3406
3407 if (mwl8k_fw_lock(hw))
3408 return;
3409
3410 /*
3411 * No need to capture a beacon if we're no longer associated.
3412 */
3413 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3414 priv->capture_beacon = false;
3415
3416 /*
3417 * Get the AP's legacy and MCS rates.
3418 */
3419 if (vif->bss_conf.assoc) {
3420 struct ieee80211_sta *ap;
3421
3422 rcu_read_lock();
3423
3424 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3425 if (ap == NULL) {
3426 rcu_read_unlock();
3427 goto out;
3428 }
3429
3430 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
3431 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3432 } else {
3433 ap_legacy_rates =
3434 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3435 }
3436 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3437
3438 rcu_read_unlock();
3439 }
3440
3441 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3442 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3443 if (rc)
3444 goto out;
3445
3446 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3447 if (rc)
3448 goto out;
3449 }
3450
3451 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3452 rc = mwl8k_set_radio_preamble(hw,
3453 vif->bss_conf.use_short_preamble);
3454 if (rc)
3455 goto out;
3456 }
3457
3458 if (changed & BSS_CHANGED_ERP_SLOT) {
3459 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3460 if (rc)
3461 goto out;
3462 }
3463
3464 if (vif->bss_conf.assoc &&
3465 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
3466 BSS_CHANGED_HT))) {
3467 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3468 if (rc)
3469 goto out;
3470 }
3471
3472 if (vif->bss_conf.assoc &&
3473 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3474 /*
3475 * Finalize the join. Tell rx handler to process
3476 * next beacon from our BSSID.
3477 */
3478 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3479 priv->capture_beacon = true;
3480 }
3481
3482 out:
3483 mwl8k_fw_unlock(hw);
3484 }
3485
3486 static void
3487 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3488 struct ieee80211_bss_conf *info, u32 changed)
3489 {
3490 int rc;
3491
3492 if (mwl8k_fw_lock(hw))
3493 return;
3494
3495 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3496 rc = mwl8k_set_radio_preamble(hw,
3497 vif->bss_conf.use_short_preamble);
3498 if (rc)
3499 goto out;
3500 }
3501
3502 if (changed & BSS_CHANGED_BASIC_RATES) {
3503 int idx;
3504 int rate;
3505
3506 /*
3507 * Use lowest supported basic rate for multicasts
3508 * and management frames (such as probe responses --
3509 * beacons will always go out at 1 Mb/s).
3510 */
3511 idx = ffs(vif->bss_conf.basic_rates);
3512 if (idx)
3513 idx--;
3514
3515 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3516 rate = mwl8k_rates_24[idx].hw_value;
3517 else
3518 rate = mwl8k_rates_50[idx].hw_value;
3519
3520 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3521 }
3522
3523 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3524 struct sk_buff *skb;
3525
3526 skb = ieee80211_beacon_get(hw, vif);
3527 if (skb != NULL) {
3528 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
3529 kfree_skb(skb);
3530 }
3531 }
3532
3533 if (changed & BSS_CHANGED_BEACON_ENABLED)
3534 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
3535
3536 out:
3537 mwl8k_fw_unlock(hw);
3538 }
3539
3540 static void
3541 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3542 struct ieee80211_bss_conf *info, u32 changed)
3543 {
3544 struct mwl8k_priv *priv = hw->priv;
3545
3546 if (!priv->ap_fw)
3547 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3548 else
3549 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3550 }
3551
3552 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3553 struct netdev_hw_addr_list *mc_list)
3554 {
3555 struct mwl8k_cmd_pkt *cmd;
3556
3557 /*
3558 * Synthesize and return a command packet that programs the
3559 * hardware multicast address filter. At this point we don't
3560 * know whether FIF_ALLMULTI is being requested, but if it is,
3561 * we'll end up throwing this packet away and creating a new
3562 * one in mwl8k_configure_filter().
3563 */
3564 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
3565
3566 return (unsigned long)cmd;
3567 }
3568
3569 static int
3570 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3571 unsigned int changed_flags,
3572 unsigned int *total_flags)
3573 {
3574 struct mwl8k_priv *priv = hw->priv;
3575
3576 /*
3577 * Hardware sniffer mode is mutually exclusive with STA
3578 * operation, so refuse to enable sniffer mode if a STA
3579 * interface is active.
3580 */
3581 if (!list_empty(&priv->vif_list)) {
3582 if (net_ratelimit())
3583 wiphy_info(hw->wiphy,
3584 "not enabling sniffer mode because STA interface is active\n");
3585 return 0;
3586 }
3587
3588 if (!priv->sniffer_enabled) {
3589 if (mwl8k_cmd_enable_sniffer(hw, 1))
3590 return 0;
3591 priv->sniffer_enabled = true;
3592 }
3593
3594 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3595 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3596 FIF_OTHER_BSS;
3597
3598 return 1;
3599 }
3600
3601 static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
3602 {
3603 if (!list_empty(&priv->vif_list))
3604 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
3605
3606 return NULL;
3607 }
3608
3609 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3610 unsigned int changed_flags,
3611 unsigned int *total_flags,
3612 u64 multicast)
3613 {
3614 struct mwl8k_priv *priv = hw->priv;
3615 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3616
3617 /*
3618 * AP firmware doesn't allow fine-grained control over
3619 * the receive filter.
3620 */
3621 if (priv->ap_fw) {
3622 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3623 kfree(cmd);
3624 return;
3625 }
3626
3627 /*
3628 * Enable hardware sniffer mode if FIF_CONTROL or
3629 * FIF_OTHER_BSS is requested.
3630 */
3631 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3632 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3633 kfree(cmd);
3634 return;
3635 }
3636
3637 /* Clear unsupported feature flags */
3638 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3639
3640 if (mwl8k_fw_lock(hw)) {
3641 kfree(cmd);
3642 return;
3643 }
3644
3645 if (priv->sniffer_enabled) {
3646 mwl8k_cmd_enable_sniffer(hw, 0);
3647 priv->sniffer_enabled = false;
3648 }
3649
3650 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3651 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3652 /*
3653 * Disable the BSS filter.
3654 */
3655 mwl8k_cmd_set_pre_scan(hw);
3656 } else {
3657 struct mwl8k_vif *mwl8k_vif;
3658 const u8 *bssid;
3659
3660 /*
3661 * Enable the BSS filter.
3662 *
3663 * If there is an active STA interface, use that
3664 * interface's BSSID, otherwise use a dummy one
3665 * (where the OUI part needs to be nonzero for
3666 * the BSSID to be accepted by POST_SCAN).
3667 */
3668 mwl8k_vif = mwl8k_first_vif(priv);
3669 if (mwl8k_vif != NULL)
3670 bssid = mwl8k_vif->vif->bss_conf.bssid;
3671 else
3672 bssid = "\x01\x00\x00\x00\x00\x00";
3673
3674 mwl8k_cmd_set_post_scan(hw, bssid);
3675 }
3676 }
3677
3678 /*
3679 * If FIF_ALLMULTI is being requested, throw away the command
3680 * packet that ->prepare_multicast() built and replace it with
3681 * a command packet that enables reception of all multicast
3682 * packets.
3683 */
3684 if (*total_flags & FIF_ALLMULTI) {
3685 kfree(cmd);
3686 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
3687 }
3688
3689 if (cmd != NULL) {
3690 mwl8k_post_cmd(hw, cmd);
3691 kfree(cmd);
3692 }
3693
3694 mwl8k_fw_unlock(hw);
3695 }
3696
3697 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3698 {
3699 return mwl8k_cmd_set_rts_threshold(hw, value);
3700 }
3701
3702 static int mwl8k_sta_remove(struct ieee80211_hw *hw,
3703 struct ieee80211_vif *vif,
3704 struct ieee80211_sta *sta)
3705 {
3706 struct mwl8k_priv *priv = hw->priv;
3707
3708 if (priv->ap_fw)
3709 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
3710 else
3711 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
3712 }
3713
3714 static int mwl8k_sta_add(struct ieee80211_hw *hw,
3715 struct ieee80211_vif *vif,
3716 struct ieee80211_sta *sta)
3717 {
3718 struct mwl8k_priv *priv = hw->priv;
3719 int ret;
3720
3721 if (!priv->ap_fw) {
3722 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
3723 if (ret >= 0) {
3724 MWL8K_STA(sta)->peer_id = ret;
3725 return 0;
3726 }
3727
3728 return ret;
3729 }
3730
3731 return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
3732 }
3733
3734 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3735 const struct ieee80211_tx_queue_params *params)
3736 {
3737 struct mwl8k_priv *priv = hw->priv;
3738 int rc;
3739
3740 rc = mwl8k_fw_lock(hw);
3741 if (!rc) {
3742 if (!priv->wmm_enabled)
3743 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3744
3745 if (!rc)
3746 rc = mwl8k_cmd_set_edca_params(hw, queue,
3747 params->cw_min,
3748 params->cw_max,
3749 params->aifs,
3750 params->txop);
3751
3752 mwl8k_fw_unlock(hw);
3753 }
3754
3755 return rc;
3756 }
3757
3758 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3759 struct ieee80211_low_level_stats *stats)
3760 {
3761 return mwl8k_cmd_get_stat(hw, stats);
3762 }
3763
3764 static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
3765 struct survey_info *survey)
3766 {
3767 struct mwl8k_priv *priv = hw->priv;
3768 struct ieee80211_conf *conf = &hw->conf;
3769
3770 if (idx != 0)
3771 return -ENOENT;
3772
3773 survey->channel = conf->channel;
3774 survey->filled = SURVEY_INFO_NOISE_DBM;
3775 survey->noise = priv->noise;
3776
3777 return 0;
3778 }
3779
3780 static int
3781 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3782 enum ieee80211_ampdu_mlme_action action,
3783 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3784 {
3785 switch (action) {
3786 case IEEE80211_AMPDU_RX_START:
3787 case IEEE80211_AMPDU_RX_STOP:
3788 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3789 return -ENOTSUPP;
3790 return 0;
3791 default:
3792 return -ENOTSUPP;
3793 }
3794 }
3795
3796 static const struct ieee80211_ops mwl8k_ops = {
3797 .tx = mwl8k_tx,
3798 .start = mwl8k_start,
3799 .stop = mwl8k_stop,
3800 .add_interface = mwl8k_add_interface,
3801 .remove_interface = mwl8k_remove_interface,
3802 .config = mwl8k_config,
3803 .bss_info_changed = mwl8k_bss_info_changed,
3804 .prepare_multicast = mwl8k_prepare_multicast,
3805 .configure_filter = mwl8k_configure_filter,
3806 .set_rts_threshold = mwl8k_set_rts_threshold,
3807 .sta_add = mwl8k_sta_add,
3808 .sta_remove = mwl8k_sta_remove,
3809 .conf_tx = mwl8k_conf_tx,
3810 .get_stats = mwl8k_get_stats,
3811 .get_survey = mwl8k_get_survey,
3812 .ampdu_action = mwl8k_ampdu_action,
3813 };
3814
3815 static void mwl8k_finalize_join_worker(struct work_struct *work)
3816 {
3817 struct mwl8k_priv *priv =
3818 container_of(work, struct mwl8k_priv, finalize_join_worker);
3819 struct sk_buff *skb = priv->beacon_skb;
3820 struct ieee80211_mgmt *mgmt = (void *)skb->data;
3821 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
3822 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
3823 mgmt->u.beacon.variable, len);
3824 int dtim_period = 1;
3825
3826 if (tim && tim[1] >= 2)
3827 dtim_period = tim[3];
3828
3829 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
3830
3831 dev_kfree_skb(skb);
3832 priv->beacon_skb = NULL;
3833 }
3834
3835 enum {
3836 MWL8363 = 0,
3837 MWL8687,
3838 MWL8366,
3839 };
3840
3841 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3842 [MWL8363] = {
3843 .part_name = "88w8363",
3844 .helper_image = "mwl8k/helper_8363.fw",
3845 .fw_image = "mwl8k/fmimage_8363.fw",
3846 },
3847 [MWL8687] = {
3848 .part_name = "88w8687",
3849 .helper_image = "mwl8k/helper_8687.fw",
3850 .fw_image = "mwl8k/fmimage_8687.fw",
3851 },
3852 [MWL8366] = {
3853 .part_name = "88w8366",
3854 .helper_image = "mwl8k/helper_8366.fw",
3855 .fw_image = "mwl8k/fmimage_8366.fw",
3856 .ap_rxd_ops = &rxd_8366_ap_ops,
3857 },
3858 };
3859
3860 MODULE_FIRMWARE("mwl8k/helper_8363.fw");
3861 MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
3862 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
3863 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
3864 MODULE_FIRMWARE("mwl8k/helper_8366.fw");
3865 MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
3866
3867 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3868 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
3869 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3870 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3871 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3872 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3873 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3874 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
3875 { },
3876 };
3877 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3878
3879 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3880 const struct pci_device_id *id)
3881 {
3882 static int printed_version = 0;
3883 struct ieee80211_hw *hw;
3884 struct mwl8k_priv *priv;
3885 int rc;
3886 int i;
3887
3888 if (!printed_version) {
3889 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3890 printed_version = 1;
3891 }
3892
3893
3894 rc = pci_enable_device(pdev);
3895 if (rc) {
3896 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3897 MWL8K_NAME);
3898 return rc;
3899 }
3900
3901 rc = pci_request_regions(pdev, MWL8K_NAME);
3902 if (rc) {
3903 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3904 MWL8K_NAME);
3905 goto err_disable_device;
3906 }
3907
3908 pci_set_master(pdev);
3909
3910
3911 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3912 if (hw == NULL) {
3913 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3914 rc = -ENOMEM;
3915 goto err_free_reg;
3916 }
3917
3918 SET_IEEE80211_DEV(hw, &pdev->dev);
3919 pci_set_drvdata(pdev, hw);
3920
3921 priv = hw->priv;
3922 priv->hw = hw;
3923 priv->pdev = pdev;
3924 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3925
3926
3927 priv->sram = pci_iomap(pdev, 0, 0x10000);
3928 if (priv->sram == NULL) {
3929 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
3930 goto err_iounmap;
3931 }
3932
3933 /*
3934 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3935 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3936 */
3937 priv->regs = pci_iomap(pdev, 1, 0x10000);
3938 if (priv->regs == NULL) {
3939 priv->regs = pci_iomap(pdev, 2, 0x10000);
3940 if (priv->regs == NULL) {
3941 wiphy_err(hw->wiphy, "Cannot map device registers\n");
3942 goto err_iounmap;
3943 }
3944 }
3945
3946
3947 /* Reset firmware and hardware */
3948 mwl8k_hw_reset(priv);
3949
3950 /* Ask userland hotplug daemon for the device firmware */
3951 rc = mwl8k_request_firmware(priv);
3952 if (rc) {
3953 wiphy_err(hw->wiphy, "Firmware files not found\n");
3954 goto err_stop_firmware;
3955 }
3956
3957 /* Load firmware into hardware */
3958 rc = mwl8k_load_firmware(hw);
3959 if (rc) {
3960 wiphy_err(hw->wiphy, "Cannot start firmware\n");
3961 goto err_stop_firmware;
3962 }
3963
3964 /* Reclaim memory once firmware is successfully loaded */
3965 mwl8k_release_firmware(priv);
3966
3967
3968 if (priv->ap_fw) {
3969 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3970 if (priv->rxd_ops == NULL) {
3971 wiphy_err(hw->wiphy,
3972 "Driver does not have AP firmware image support for this hardware\n");
3973 goto err_stop_firmware;
3974 }
3975 } else {
3976 priv->rxd_ops = &rxd_sta_ops;
3977 }
3978
3979 priv->sniffer_enabled = false;
3980 priv->wmm_enabled = false;
3981 priv->pending_tx_pkts = 0;
3982
3983
3984 /*
3985 * Extra headroom is the size of the required DMA header
3986 * minus the size of the smallest 802.11 frame (CTS frame).
3987 */
3988 hw->extra_tx_headroom =
3989 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3990
3991 hw->channel_change_time = 10;
3992
3993 hw->queues = MWL8K_TX_QUEUES;
3994
3995 /* Set rssi values to dBm */
3996 hw->flags |= IEEE80211_HW_SIGNAL_DBM;
3997 hw->vif_data_size = sizeof(struct mwl8k_vif);
3998 hw->sta_data_size = sizeof(struct mwl8k_sta);
3999
4000 priv->macids_used = 0;
4001 INIT_LIST_HEAD(&priv->vif_list);
4002
4003 /* Set default radio state and preamble */
4004 priv->radio_on = 0;
4005 priv->radio_short_preamble = 0;
4006
4007 /* Finalize join worker */
4008 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
4009
4010 /* TX reclaim and RX tasklets. */
4011 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
4012 tasklet_disable(&priv->poll_tx_task);
4013 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
4014 tasklet_disable(&priv->poll_rx_task);
4015
4016 /* Power management cookie */
4017 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
4018 if (priv->cookie == NULL)
4019 goto err_stop_firmware;
4020
4021 rc = mwl8k_rxq_init(hw, 0);
4022 if (rc)
4023 goto err_free_cookie;
4024 rxq_refill(hw, 0, INT_MAX);
4025
4026 mutex_init(&priv->fw_mutex);
4027 priv->fw_mutex_owner = NULL;
4028 priv->fw_mutex_depth = 0;
4029 priv->hostcmd_wait = NULL;
4030
4031 spin_lock_init(&priv->tx_lock);
4032
4033 priv->tx_wait = NULL;
4034
4035 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4036 rc = mwl8k_txq_init(hw, i);
4037 if (rc)
4038 goto err_free_queues;
4039 }
4040
4041 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4042 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4043 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
4044 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
4045 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
4046
4047 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
4048 IRQF_SHARED, MWL8K_NAME, hw);
4049 if (rc) {
4050 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
4051 goto err_free_queues;
4052 }
4053
4054 /*
4055 * Temporarily enable interrupts. Initial firmware host
4056 * commands use interrupts and avoid polling. Disable
4057 * interrupts when done.
4058 */
4059 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4060
4061 /* Get config data, mac addrs etc */
4062 if (priv->ap_fw) {
4063 rc = mwl8k_cmd_get_hw_spec_ap(hw);
4064 if (!rc)
4065 rc = mwl8k_cmd_set_hw_spec(hw);
4066 } else {
4067 rc = mwl8k_cmd_get_hw_spec_sta(hw);
4068 }
4069 if (rc) {
4070 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
4071 goto err_free_irq;
4072 }
4073
4074 hw->wiphy->interface_modes = 0;
4075 if (priv->ap_macids_supported)
4076 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
4077 if (priv->sta_macids_supported)
4078 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
4079
4080
4081 /* Turn radio off */
4082 rc = mwl8k_cmd_radio_disable(hw);
4083 if (rc) {
4084 wiphy_err(hw->wiphy, "Cannot disable\n");
4085 goto err_free_irq;
4086 }
4087
4088 /* Clear MAC address */
4089 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
4090 if (rc) {
4091 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
4092 goto err_free_irq;
4093 }
4094
4095 /* Disable interrupts */
4096 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4097 free_irq(priv->pdev->irq, hw);
4098
4099 rc = ieee80211_register_hw(hw);
4100 if (rc) {
4101 wiphy_err(hw->wiphy, "Cannot register device\n");
4102 goto err_free_queues;
4103 }
4104
4105 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
4106 priv->device_info->part_name,
4107 priv->hw_rev, hw->wiphy->perm_addr,
4108 priv->ap_fw ? "AP" : "STA",
4109 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
4110 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
4111
4112 return 0;
4113
4114 err_free_irq:
4115 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4116 free_irq(priv->pdev->irq, hw);
4117
4118 err_free_queues:
4119 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4120 mwl8k_txq_deinit(hw, i);
4121 mwl8k_rxq_deinit(hw, 0);
4122
4123 err_free_cookie:
4124 if (priv->cookie != NULL)
4125 pci_free_consistent(priv->pdev, 4,
4126 priv->cookie, priv->cookie_dma);
4127
4128 err_stop_firmware:
4129 mwl8k_hw_reset(priv);
4130 mwl8k_release_firmware(priv);
4131
4132 err_iounmap:
4133 if (priv->regs != NULL)
4134 pci_iounmap(pdev, priv->regs);
4135
4136 if (priv->sram != NULL)
4137 pci_iounmap(pdev, priv->sram);
4138
4139 pci_set_drvdata(pdev, NULL);
4140 ieee80211_free_hw(hw);
4141
4142 err_free_reg:
4143 pci_release_regions(pdev);
4144
4145 err_disable_device:
4146 pci_disable_device(pdev);
4147
4148 return rc;
4149 }
4150
4151 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
4152 {
4153 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4154 }
4155
4156 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4157 {
4158 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4159 struct mwl8k_priv *priv;
4160 int i;
4161
4162 if (hw == NULL)
4163 return;
4164 priv = hw->priv;
4165
4166 ieee80211_stop_queues(hw);
4167
4168 ieee80211_unregister_hw(hw);
4169
4170 /* Remove TX reclaim and RX tasklets. */
4171 tasklet_kill(&priv->poll_tx_task);
4172 tasklet_kill(&priv->poll_rx_task);
4173
4174 /* Stop hardware */
4175 mwl8k_hw_reset(priv);
4176
4177 /* Return all skbs to mac80211 */
4178 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4179 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4180
4181 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4182 mwl8k_txq_deinit(hw, i);
4183
4184 mwl8k_rxq_deinit(hw, 0);
4185
4186 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4187
4188 pci_iounmap(pdev, priv->regs);
4189 pci_iounmap(pdev, priv->sram);
4190 pci_set_drvdata(pdev, NULL);
4191 ieee80211_free_hw(hw);
4192 pci_release_regions(pdev);
4193 pci_disable_device(pdev);
4194 }
4195
4196 static struct pci_driver mwl8k_driver = {
4197 .name = MWL8K_NAME,
4198 .id_table = mwl8k_pci_id_table,
4199 .probe = mwl8k_probe,
4200 .remove = __devexit_p(mwl8k_remove),
4201 .shutdown = __devexit_p(mwl8k_shutdown),
4202 };
4203
4204 static int __init mwl8k_init(void)
4205 {
4206 return pci_register_driver(&mwl8k_driver);
4207 }
4208
4209 static void __exit mwl8k_exit(void)
4210 {
4211 pci_unregister_driver(&mwl8k_driver);
4212 }
4213
4214 module_init(mwl8k_init);
4215 module_exit(mwl8k_exit);
4216
4217 MODULE_DESCRIPTION(MWL8K_DESC);
4218 MODULE_VERSION(MWL8K_VERSION);
4219 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4220 MODULE_LICENSE("GPL");
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