iwl3945: sync tx queue data structure with iwlagn
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
blob53e274a5f4feab709ff40a6502e598ab803d3902
1 /******************************************************************************
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
47 #include <asm/div64.h>
49 #define DRV_NAME "iwl3945"
51 #include "iwl-fh.h"
52 #include "iwl-3945-fh.h"
53 #include "iwl-commands.h"
54 #include "iwl-3945.h"
55 #include "iwl-helpers.h"
56 #include "iwl-core.h"
57 #include "iwl-dev.h"
59 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
60 struct iwl_tx_queue *txq);
63 * module name, copyright, version, etc.
66 #define DRV_DESCRIPTION \
67 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
69 #ifdef CONFIG_IWL3945_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
75 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
76 #define VS "s"
77 #else
78 #define VS
79 #endif
81 #define IWL39_VERSION "1.2.26k" VD VS
82 #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
83 #define DRV_AUTHOR "<ilw@linux.intel.com>"
84 #define DRV_VERSION IWL39_VERSION
87 MODULE_DESCRIPTION(DRV_DESCRIPTION);
88 MODULE_VERSION(DRV_VERSION);
89 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
90 MODULE_LICENSE("GPL");
92 /* module parameters */
93 struct iwl_mod_params iwl3945_mod_params = {
94 .num_of_queues = IWL39_MAX_NUM_QUEUES,
95 /* the rest are 0 by default */
98 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
99 * DMA services
101 * Theory of operation
103 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
104 * of buffer descriptors, each of which points to one or more data buffers for
105 * the device to read from or fill. Driver and device exchange status of each
106 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
107 * entries in each circular buffer, to protect against confusing empty and full
108 * queue states.
110 * The device reads or writes the data in the queues via the device's several
111 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
113 * For Tx queue, there are low mark and high mark limits. If, after queuing
114 * the packet for Tx, free space become < low mark, Tx queue stopped. When
115 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
116 * Tx queue resumed.
118 * The 3945 operates with six queues: One receive queue, one transmit queue
119 * (#4) for sending commands to the device firmware, and four transmit queues
120 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
121 ***************************************************/
123 int iwl3945_x2_queue_used(const struct iwl_queue *q, int i)
125 return q->write_ptr > q->read_ptr ?
126 (i >= q->read_ptr && i < q->write_ptr) :
127 !(i < q->read_ptr && i >= q->write_ptr);
131 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
133 static int iwl3945_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
134 int count, int slots_num, u32 id)
136 q->n_bd = count;
137 q->n_window = slots_num;
138 q->id = id;
140 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
141 * and iwl_queue_dec_wrap are broken. */
142 BUG_ON(!is_power_of_2(count));
144 /* slots_num must be power-of-two size, otherwise
145 * get_cmd_index is broken. */
146 BUG_ON(!is_power_of_2(slots_num));
148 q->low_mark = q->n_window / 4;
149 if (q->low_mark < 4)
150 q->low_mark = 4;
152 q->high_mark = q->n_window / 8;
153 if (q->high_mark < 2)
154 q->high_mark = 2;
156 q->write_ptr = q->read_ptr = 0;
158 return 0;
162 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
164 static int iwl3945_tx_queue_alloc(struct iwl_priv *priv,
165 struct iwl_tx_queue *txq, u32 id)
167 struct pci_dev *dev = priv->pci_dev;
169 /* Driver private data, only for Tx (not command) queues,
170 * not shared with device. */
171 if (id != IWL_CMD_QUEUE_NUM) {
172 txq->txb = kmalloc(sizeof(txq->txb[0]) *
173 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
174 if (!txq->txb) {
175 IWL_ERR(priv, "kmalloc for auxiliary BD "
176 "structures failed\n");
177 goto error;
179 } else
180 txq->txb = NULL;
182 /* Circular buffer of transmit frame descriptors (TFDs),
183 * shared with device */
184 txq->tfds39 = pci_alloc_consistent(dev,
185 sizeof(txq->tfds39[0]) * TFD_QUEUE_SIZE_MAX,
186 &txq->q.dma_addr);
188 if (!txq->tfds39) {
189 IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n",
190 sizeof(txq->tfds39[0]) * TFD_QUEUE_SIZE_MAX);
191 goto error;
193 txq->q.id = id;
195 return 0;
197 error:
198 kfree(txq->txb);
199 txq->txb = NULL;
201 return -ENOMEM;
205 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
207 int iwl3945_tx_queue_init(struct iwl_priv *priv,
208 struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
210 int len, i;
211 int rc = 0;
214 * Alloc buffer array for commands (Tx or other types of commands).
215 * For the command queue (#4), allocate command space + one big
216 * command for scan, since scan command is very huge; the system will
217 * not have two scans at the same time, so only one is needed.
218 * For data Tx queues (all other queues), no super-size command
219 * space is needed.
221 len = sizeof(struct iwl_cmd);
222 for (i = 0; i <= slots_num; i++) {
223 if (i == slots_num) {
224 if (txq_id == IWL_CMD_QUEUE_NUM)
225 len += IWL_MAX_SCAN_SIZE;
226 else
227 continue;
230 txq->cmd[i] = kmalloc(len, GFP_KERNEL);
231 if (!txq->cmd[i])
232 goto err;
235 /* Alloc driver data array and TFD circular buffer */
236 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
237 if (rc)
238 goto err;
240 txq->need_update = 0;
242 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
243 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
244 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
246 /* Initialize queue high/low-water, head/tail indexes */
247 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
249 /* Tell device where to find queue, enable DMA channel. */
250 iwl3945_hw_tx_queue_init(priv, txq);
252 return 0;
253 err:
254 for (i = 0; i < slots_num; i++) {
255 kfree(txq->cmd[i]);
256 txq->cmd[i] = NULL;
259 if (txq_id == IWL_CMD_QUEUE_NUM) {
260 kfree(txq->cmd[slots_num]);
261 txq->cmd[slots_num] = NULL;
263 return -ENOMEM;
267 * iwl3945_tx_queue_free - Deallocate DMA queue.
268 * @txq: Transmit queue to deallocate.
270 * Empty queue by removing and destroying all BD's.
271 * Free all buffers.
272 * 0-fill, but do not free "txq" descriptor structure.
274 void iwl3945_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
276 struct iwl_queue *q = &txq->q;
277 struct pci_dev *dev = priv->pci_dev;
278 int len, i;
280 if (q->n_bd == 0)
281 return;
283 /* first, empty all BD's */
284 for (; q->write_ptr != q->read_ptr;
285 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
286 iwl3945_hw_txq_free_tfd(priv, txq);
288 len = sizeof(struct iwl_cmd) * q->n_window;
289 if (q->id == IWL_CMD_QUEUE_NUM)
290 len += IWL_MAX_SCAN_SIZE;
292 /* De-alloc array of command/tx buffers */
293 for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
294 kfree(txq->cmd[i]);
296 /* De-alloc circular buffer of TFDs */
297 if (txq->q.n_bd)
298 pci_free_consistent(dev, sizeof(struct iwl3945_tfd) *
299 txq->q.n_bd, txq->tfds39, txq->q.dma_addr);
301 /* De-alloc array of per-TFD driver data */
302 kfree(txq->txb);
303 txq->txb = NULL;
305 /* 0-fill queue descriptor structure */
306 memset(txq, 0, sizeof(*txq));
309 /*************** STATION TABLE MANAGEMENT ****
310 * mac80211 should be examined to determine if sta_info is duplicating
311 * the functionality provided here
314 /**************************************************************/
315 #if 0 /* temporary disable till we add real remove station */
317 * iwl3945_remove_station - Remove driver's knowledge of station.
319 * NOTE: This does not remove station from device's station table.
321 static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
323 int index = IWL_INVALID_STATION;
324 int i;
325 unsigned long flags;
327 spin_lock_irqsave(&priv->sta_lock, flags);
329 if (is_ap)
330 index = IWL_AP_ID;
331 else if (is_broadcast_ether_addr(addr))
332 index = priv->hw_params.bcast_sta_id;
333 else
334 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
335 if (priv->stations_39[i].used &&
336 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
337 addr)) {
338 index = i;
339 break;
342 if (unlikely(index == IWL_INVALID_STATION))
343 goto out;
345 if (priv->stations_39[index].used) {
346 priv->stations_39[index].used = 0;
347 priv->num_stations--;
350 BUG_ON(priv->num_stations < 0);
352 out:
353 spin_unlock_irqrestore(&priv->sta_lock, flags);
354 return 0;
356 #endif
359 * iwl3945_clear_stations_table - Clear the driver's station table
361 * NOTE: This does not clear or otherwise alter the device's station table.
363 static void iwl3945_clear_stations_table(struct iwl_priv *priv)
365 unsigned long flags;
367 spin_lock_irqsave(&priv->sta_lock, flags);
369 priv->num_stations = 0;
370 memset(priv->stations_39, 0, sizeof(priv->stations_39));
372 spin_unlock_irqrestore(&priv->sta_lock, flags);
376 * iwl3945_add_station - Add station to station tables in driver and device
378 u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
380 int i;
381 int index = IWL_INVALID_STATION;
382 struct iwl3945_station_entry *station;
383 unsigned long flags_spin;
384 u8 rate;
386 spin_lock_irqsave(&priv->sta_lock, flags_spin);
387 if (is_ap)
388 index = IWL_AP_ID;
389 else if (is_broadcast_ether_addr(addr))
390 index = priv->hw_params.bcast_sta_id;
391 else
392 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
393 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
394 addr)) {
395 index = i;
396 break;
399 if (!priv->stations_39[i].used &&
400 index == IWL_INVALID_STATION)
401 index = i;
404 /* These two conditions has the same outcome but keep them separate
405 since they have different meaning */
406 if (unlikely(index == IWL_INVALID_STATION)) {
407 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
408 return index;
411 if (priv->stations_39[index].used &&
412 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
413 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
414 return index;
417 IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
418 station = &priv->stations_39[index];
419 station->used = 1;
420 priv->num_stations++;
422 /* Set up the REPLY_ADD_STA command to send to device */
423 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
424 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
425 station->sta.mode = 0;
426 station->sta.sta.sta_id = index;
427 station->sta.station_flags = 0;
429 if (priv->band == IEEE80211_BAND_5GHZ)
430 rate = IWL_RATE_6M_PLCP;
431 else
432 rate = IWL_RATE_1M_PLCP;
434 /* Turn on both antennas for the station... */
435 station->sta.rate_n_flags =
436 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
438 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
440 /* Add station to device's station table */
441 iwl3945_send_add_station(priv, &station->sta, flags);
442 return index;
447 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
449 #define IWL_CMD(x) case x: return #x
450 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
453 * iwl3945_enqueue_hcmd - enqueue a uCode command
454 * @priv: device private data point
455 * @cmd: a point to the ucode command structure
457 * The function returns < 0 values to indicate the operation is
458 * failed. On success, it turns the index (> 0) of command in the
459 * command queue.
461 static int iwl3945_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
463 struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
464 struct iwl_queue *q = &txq->q;
465 struct iwl3945_tfd *tfd;
466 struct iwl_cmd *out_cmd;
467 u32 idx;
468 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
469 dma_addr_t phys_addr;
470 int pad;
471 int ret, len;
472 unsigned long flags;
474 /* If any of the command structures end up being larger than
475 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
476 * we will need to increase the size of the TFD entries */
477 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
478 !(cmd->meta.flags & CMD_SIZE_HUGE));
481 if (iwl_is_rfkill(priv)) {
482 IWL_DEBUG_INFO("Not sending command - RF KILL");
483 return -EIO;
486 if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
487 IWL_ERR(priv, "No space for Tx\n");
488 return -ENOSPC;
491 spin_lock_irqsave(&priv->hcmd_lock, flags);
493 tfd = &txq->tfds39[q->write_ptr];
494 memset(tfd, 0, sizeof(*tfd));
496 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
497 out_cmd = txq->cmd[idx];
499 out_cmd->hdr.cmd = cmd->id;
500 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
501 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
503 /* At this point, the out_cmd now has all of the incoming cmd
504 * information */
506 out_cmd->hdr.flags = 0;
507 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
508 INDEX_TO_SEQ(q->write_ptr));
509 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
510 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
512 len = (idx == TFD_CMD_SLOTS) ?
513 IWL_MAX_SCAN_SIZE : sizeof(struct iwl_cmd);
515 phys_addr = pci_map_single(priv->pci_dev, out_cmd,
516 len, PCI_DMA_TODEVICE);
517 pci_unmap_addr_set(&out_cmd->meta, mapping, phys_addr);
518 pci_unmap_len_set(&out_cmd->meta, len, len);
519 phys_addr += offsetof(struct iwl_cmd, hdr);
521 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
523 pad = U32_PAD(cmd->len);
524 tfd->control_flags |= cpu_to_le32(TFD_CTL_PAD_SET(pad));
526 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
527 "%d bytes at %d[%d]:%d\n",
528 get_cmd_string(out_cmd->hdr.cmd),
529 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
530 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
532 txq->need_update = 1;
534 /* Increment and update queue's write index */
535 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
536 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
538 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
539 return ret ? ret : idx;
542 static int iwl3945_send_cmd_async(struct iwl_priv *priv,
543 struct iwl_host_cmd *cmd)
545 int ret;
547 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
549 /* An asynchronous command can not expect an SKB to be set. */
550 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
552 /* An asynchronous command MUST have a callback. */
553 BUG_ON(!cmd->meta.u.callback);
555 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
556 return -EBUSY;
558 ret = iwl3945_enqueue_hcmd(priv, cmd);
559 if (ret < 0) {
560 IWL_ERR(priv,
561 "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
562 get_cmd_string(cmd->id), ret);
563 return ret;
565 return 0;
568 static int iwl3945_send_cmd_sync(struct iwl_priv *priv,
569 struct iwl_host_cmd *cmd)
571 int cmd_idx;
572 int ret;
574 BUG_ON(cmd->meta.flags & CMD_ASYNC);
576 /* A synchronous command can not have a callback set. */
577 BUG_ON(cmd->meta.u.callback != NULL);
579 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
580 IWL_ERR(priv,
581 "Error sending %s: Already sending a host command\n",
582 get_cmd_string(cmd->id));
583 ret = -EBUSY;
584 goto out;
587 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
589 if (cmd->meta.flags & CMD_WANT_SKB)
590 cmd->meta.source = &cmd->meta;
592 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
593 if (cmd_idx < 0) {
594 ret = cmd_idx;
595 IWL_ERR(priv,
596 "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
597 get_cmd_string(cmd->id), ret);
598 goto out;
601 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
602 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
603 HOST_COMPLETE_TIMEOUT);
604 if (!ret) {
605 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
606 IWL_ERR(priv, "Error sending %s: time out after %dms\n",
607 get_cmd_string(cmd->id),
608 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
610 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
611 ret = -ETIMEDOUT;
612 goto cancel;
616 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
617 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
618 get_cmd_string(cmd->id));
619 ret = -ECANCELED;
620 goto fail;
622 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
623 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
624 get_cmd_string(cmd->id));
625 ret = -EIO;
626 goto fail;
628 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
629 IWL_ERR(priv, "Error: Response NULL in '%s'\n",
630 get_cmd_string(cmd->id));
631 ret = -EIO;
632 goto cancel;
635 ret = 0;
636 goto out;
638 cancel:
639 if (cmd->meta.flags & CMD_WANT_SKB) {
640 struct iwl_cmd *qcmd;
642 /* Cancel the CMD_WANT_SKB flag for the cmd in the
643 * TX cmd queue. Otherwise in case the cmd comes
644 * in later, it will possibly set an invalid
645 * address (cmd->meta.source). */
646 qcmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
647 qcmd->meta.flags &= ~CMD_WANT_SKB;
649 fail:
650 if (cmd->meta.u.skb) {
651 dev_kfree_skb_any(cmd->meta.u.skb);
652 cmd->meta.u.skb = NULL;
654 out:
655 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
656 return ret;
659 int iwl3945_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
661 if (cmd->meta.flags & CMD_ASYNC)
662 return iwl3945_send_cmd_async(priv, cmd);
664 return iwl3945_send_cmd_sync(priv, cmd);
667 int iwl3945_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
669 struct iwl_host_cmd cmd = {
670 .id = id,
671 .len = len,
672 .data = data,
675 return iwl3945_send_cmd_sync(priv, &cmd);
678 static int __must_check iwl3945_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
680 struct iwl_host_cmd cmd = {
681 .id = id,
682 .len = sizeof(val),
683 .data = &val,
686 return iwl3945_send_cmd_sync(priv, &cmd);
689 int iwl3945_send_statistics_request(struct iwl_priv *priv)
691 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
695 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
696 * @band: 2.4 or 5 GHz band
697 * @channel: Any channel valid for the requested band
699 * In addition to setting the staging RXON, priv->band is also set.
701 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
702 * in the staging RXON flag structure based on the band
704 static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
705 enum ieee80211_band band,
706 u16 channel)
708 if (!iwl3945_get_channel_info(priv, band, channel)) {
709 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
710 channel, band);
711 return -EINVAL;
714 if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
715 (priv->band == band))
716 return 0;
718 priv->staging39_rxon.channel = cpu_to_le16(channel);
719 if (band == IEEE80211_BAND_5GHZ)
720 priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
721 else
722 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
724 priv->band = band;
726 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
728 return 0;
732 * iwl3945_check_rxon_cmd - validate RXON structure is valid
734 * NOTE: This is really only useful during development and can eventually
735 * be #ifdef'd out once the driver is stable and folks aren't actively
736 * making changes
738 static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
740 int error = 0;
741 int counter = 1;
742 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
744 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
745 error |= le32_to_cpu(rxon->flags &
746 (RXON_FLG_TGJ_NARROW_BAND_MSK |
747 RXON_FLG_RADAR_DETECT_MSK));
748 if (error)
749 IWL_WARN(priv, "check 24G fields %d | %d\n",
750 counter++, error);
751 } else {
752 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
753 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
754 if (error)
755 IWL_WARN(priv, "check 52 fields %d | %d\n",
756 counter++, error);
757 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
758 if (error)
759 IWL_WARN(priv, "check 52 CCK %d | %d\n",
760 counter++, error);
762 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
763 if (error)
764 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
766 /* make sure basic rates 6Mbps and 1Mbps are supported */
767 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
768 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
769 if (error)
770 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
772 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
773 if (error)
774 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
776 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
777 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
778 if (error)
779 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
780 counter++, error);
782 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
783 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
784 if (error)
785 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
786 counter++, error);
788 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
789 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
790 if (error)
791 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
792 counter++, error);
794 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
795 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
796 RXON_FLG_ANT_A_MSK)) == 0);
797 if (error)
798 IWL_WARN(priv, "check antenna %d %d\n", counter++, error);
800 if (error)
801 IWL_WARN(priv, "Tuning to channel %d\n",
802 le16_to_cpu(rxon->channel));
804 if (error) {
805 IWL_ERR(priv, "Not a valid rxon_assoc_cmd field values\n");
806 return -1;
808 return 0;
812 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
813 * @priv: staging_rxon is compared to active_rxon
815 * If the RXON structure is changing enough to require a new tune,
816 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
817 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
819 static int iwl3945_full_rxon_required(struct iwl_priv *priv)
822 /* These items are only settable from the full RXON command */
823 if (!(iwl3945_is_associated(priv)) ||
824 compare_ether_addr(priv->staging39_rxon.bssid_addr,
825 priv->active39_rxon.bssid_addr) ||
826 compare_ether_addr(priv->staging39_rxon.node_addr,
827 priv->active39_rxon.node_addr) ||
828 compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
829 priv->active39_rxon.wlap_bssid_addr) ||
830 (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
831 (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
832 (priv->staging39_rxon.air_propagation !=
833 priv->active39_rxon.air_propagation) ||
834 (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
835 return 1;
837 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
838 * be updated with the RXON_ASSOC command -- however only some
839 * flag transitions are allowed using RXON_ASSOC */
841 /* Check if we are not switching bands */
842 if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
843 (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
844 return 1;
846 /* Check if we are switching association toggle */
847 if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
848 (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
849 return 1;
851 return 0;
854 static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
856 int rc = 0;
857 struct iwl_rx_packet *res = NULL;
858 struct iwl3945_rxon_assoc_cmd rxon_assoc;
859 struct iwl_host_cmd cmd = {
860 .id = REPLY_RXON_ASSOC,
861 .len = sizeof(rxon_assoc),
862 .meta.flags = CMD_WANT_SKB,
863 .data = &rxon_assoc,
865 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
866 const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
868 if ((rxon1->flags == rxon2->flags) &&
869 (rxon1->filter_flags == rxon2->filter_flags) &&
870 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
871 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
872 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
873 return 0;
876 rxon_assoc.flags = priv->staging39_rxon.flags;
877 rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
878 rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
879 rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
880 rxon_assoc.reserved = 0;
882 rc = iwl3945_send_cmd_sync(priv, &cmd);
883 if (rc)
884 return rc;
886 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
887 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
888 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
889 rc = -EIO;
892 priv->alloc_rxb_skb--;
893 dev_kfree_skb_any(cmd.meta.u.skb);
895 return rc;
899 * iwl3945_commit_rxon - commit staging_rxon to hardware
901 * The RXON command in staging_rxon is committed to the hardware and
902 * the active_rxon structure is updated with the new data. This
903 * function correctly transitions out of the RXON_ASSOC_MSK state if
904 * a HW tune is required based on the RXON structure changes.
906 static int iwl3945_commit_rxon(struct iwl_priv *priv)
908 /* cast away the const for active_rxon in this function */
909 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
910 int rc = 0;
912 if (!iwl_is_alive(priv))
913 return -1;
915 /* always get timestamp with Rx frame */
916 priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
918 /* select antenna */
919 priv->staging39_rxon.flags &=
920 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
921 priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
923 rc = iwl3945_check_rxon_cmd(priv);
924 if (rc) {
925 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
926 return -EINVAL;
929 /* If we don't need to send a full RXON, we can use
930 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
931 * and other flags for the current radio configuration. */
932 if (!iwl3945_full_rxon_required(priv)) {
933 rc = iwl3945_send_rxon_assoc(priv);
934 if (rc) {
935 IWL_ERR(priv, "Error setting RXON_ASSOC "
936 "configuration (%d).\n", rc);
937 return rc;
940 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
942 return 0;
945 /* If we are currently associated and the new config requires
946 * an RXON_ASSOC and the new config wants the associated mask enabled,
947 * we must clear the associated from the active configuration
948 * before we apply the new config */
949 if (iwl3945_is_associated(priv) &&
950 (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
951 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
952 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
954 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
955 sizeof(struct iwl3945_rxon_cmd),
956 &priv->active39_rxon);
958 /* If the mask clearing failed then we set
959 * active_rxon back to what it was previously */
960 if (rc) {
961 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
962 IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
963 "configuration (%d).\n", rc);
964 return rc;
968 IWL_DEBUG_INFO("Sending RXON\n"
969 "* with%s RXON_FILTER_ASSOC_MSK\n"
970 "* channel = %d\n"
971 "* bssid = %pM\n",
972 ((priv->staging39_rxon.filter_flags &
973 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
974 le16_to_cpu(priv->staging39_rxon.channel),
975 priv->staging_rxon.bssid_addr);
977 /* Apply the new configuration */
978 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
979 sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
980 if (rc) {
981 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
982 return rc;
985 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
987 iwl3945_clear_stations_table(priv);
989 /* If we issue a new RXON command which required a tune then we must
990 * send a new TXPOWER command or we won't be able to Tx any frames */
991 rc = iwl3945_hw_reg_send_txpower(priv);
992 if (rc) {
993 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
994 return rc;
997 /* Add the broadcast address so we can send broadcast frames */
998 if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
999 IWL_INVALID_STATION) {
1000 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
1001 return -EIO;
1004 /* If we have set the ASSOC_MSK and we are in BSS mode then
1005 * add the IWL_AP_ID to the station rate table */
1006 if (iwl3945_is_associated(priv) &&
1007 (priv->iw_mode == NL80211_IFTYPE_STATION))
1008 if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
1009 == IWL_INVALID_STATION) {
1010 IWL_ERR(priv, "Error adding AP address for transmit\n");
1011 return -EIO;
1014 /* Init the hardware's rate fallback order based on the band */
1015 rc = iwl3945_init_hw_rate_table(priv);
1016 if (rc) {
1017 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
1018 return -EIO;
1021 return 0;
1024 static int iwl3945_send_bt_config(struct iwl_priv *priv)
1026 struct iwl_bt_cmd bt_cmd = {
1027 .flags = 3,
1028 .lead_time = 0xAA,
1029 .max_kill = 1,
1030 .kill_ack_mask = 0,
1031 .kill_cts_mask = 0,
1034 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1035 sizeof(bt_cmd), &bt_cmd);
1038 static int iwl3945_send_scan_abort(struct iwl_priv *priv)
1040 int rc = 0;
1041 struct iwl_rx_packet *res;
1042 struct iwl_host_cmd cmd = {
1043 .id = REPLY_SCAN_ABORT_CMD,
1044 .meta.flags = CMD_WANT_SKB,
1047 /* If there isn't a scan actively going on in the hardware
1048 * then we are in between scan bands and not actually
1049 * actively scanning, so don't send the abort command */
1050 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1051 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1052 return 0;
1055 rc = iwl3945_send_cmd_sync(priv, &cmd);
1056 if (rc) {
1057 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1058 return rc;
1061 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1062 if (res->u.status != CAN_ABORT_STATUS) {
1063 /* The scan abort will return 1 for success or
1064 * 2 for "failure". A failure condition can be
1065 * due to simply not being in an active scan which
1066 * can occur if we send the scan abort before we
1067 * the microcode has notified us that a scan is
1068 * completed. */
1069 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1070 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1071 clear_bit(STATUS_SCAN_HW, &priv->status);
1074 dev_kfree_skb_any(cmd.meta.u.skb);
1076 return rc;
1079 static int iwl3945_card_state_sync_callback(struct iwl_priv *priv,
1080 struct iwl_cmd *cmd,
1081 struct sk_buff *skb)
1083 return 1;
1087 * CARD_STATE_CMD
1089 * Use: Sets the device's internal card state to enable, disable, or halt
1091 * When in the 'enable' state the card operates as normal.
1092 * When in the 'disable' state, the card enters into a low power mode.
1093 * When in the 'halt' state, the card is shut down and must be fully
1094 * restarted to come back on.
1096 static int iwl3945_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
1098 struct iwl_host_cmd cmd = {
1099 .id = REPLY_CARD_STATE_CMD,
1100 .len = sizeof(u32),
1101 .data = &flags,
1102 .meta.flags = meta_flag,
1105 if (meta_flag & CMD_ASYNC)
1106 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1108 return iwl3945_send_cmd(priv, &cmd);
1111 static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
1112 struct iwl_cmd *cmd, struct sk_buff *skb)
1114 struct iwl_rx_packet *res = NULL;
1116 if (!skb) {
1117 IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n");
1118 return 1;
1121 res = (struct iwl_rx_packet *)skb->data;
1122 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1123 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
1124 res->hdr.flags);
1125 return 1;
1128 switch (res->u.add_sta.status) {
1129 case ADD_STA_SUCCESS_MSK:
1130 break;
1131 default:
1132 break;
1135 /* We didn't cache the SKB; let the caller free it */
1136 return 1;
1139 int iwl3945_send_add_station(struct iwl_priv *priv,
1140 struct iwl3945_addsta_cmd *sta, u8 flags)
1142 struct iwl_rx_packet *res = NULL;
1143 int rc = 0;
1144 struct iwl_host_cmd cmd = {
1145 .id = REPLY_ADD_STA,
1146 .len = sizeof(struct iwl3945_addsta_cmd),
1147 .meta.flags = flags,
1148 .data = sta,
1151 if (flags & CMD_ASYNC)
1152 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1153 else
1154 cmd.meta.flags |= CMD_WANT_SKB;
1156 rc = iwl3945_send_cmd(priv, &cmd);
1158 if (rc || (flags & CMD_ASYNC))
1159 return rc;
1161 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1162 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1163 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
1164 res->hdr.flags);
1165 rc = -EIO;
1168 if (rc == 0) {
1169 switch (res->u.add_sta.status) {
1170 case ADD_STA_SUCCESS_MSK:
1171 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1172 break;
1173 default:
1174 rc = -EIO;
1175 IWL_WARN(priv, "REPLY_ADD_STA failed\n");
1176 break;
1180 priv->alloc_rxb_skb--;
1181 dev_kfree_skb_any(cmd.meta.u.skb);
1183 return rc;
1186 static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
1187 struct ieee80211_key_conf *keyconf,
1188 u8 sta_id)
1190 unsigned long flags;
1191 __le16 key_flags = 0;
1193 switch (keyconf->alg) {
1194 case ALG_CCMP:
1195 key_flags |= STA_KEY_FLG_CCMP;
1196 key_flags |= cpu_to_le16(
1197 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1198 key_flags &= ~STA_KEY_FLG_INVALID;
1199 break;
1200 case ALG_TKIP:
1201 case ALG_WEP:
1202 default:
1203 return -EINVAL;
1205 spin_lock_irqsave(&priv->sta_lock, flags);
1206 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
1207 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
1208 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
1209 keyconf->keylen);
1211 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
1212 keyconf->keylen);
1213 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
1214 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1215 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1217 spin_unlock_irqrestore(&priv->sta_lock, flags);
1219 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1220 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1221 return 0;
1224 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
1226 unsigned long flags;
1228 spin_lock_irqsave(&priv->sta_lock, flags);
1229 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1230 memset(&priv->stations_39[sta_id].sta.key, 0,
1231 sizeof(struct iwl4965_keyinfo));
1232 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1233 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1234 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1235 spin_unlock_irqrestore(&priv->sta_lock, flags);
1237 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1238 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1239 return 0;
1242 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
1244 struct list_head *element;
1246 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1247 priv->frames_count);
1249 while (!list_empty(&priv->free_frames)) {
1250 element = priv->free_frames.next;
1251 list_del(element);
1252 kfree(list_entry(element, struct iwl3945_frame, list));
1253 priv->frames_count--;
1256 if (priv->frames_count) {
1257 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
1258 priv->frames_count);
1259 priv->frames_count = 0;
1263 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
1265 struct iwl3945_frame *frame;
1266 struct list_head *element;
1267 if (list_empty(&priv->free_frames)) {
1268 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1269 if (!frame) {
1270 IWL_ERR(priv, "Could not allocate frame!\n");
1271 return NULL;
1274 priv->frames_count++;
1275 return frame;
1278 element = priv->free_frames.next;
1279 list_del(element);
1280 return list_entry(element, struct iwl3945_frame, list);
1283 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
1285 memset(frame, 0, sizeof(*frame));
1286 list_add(&frame->list, &priv->free_frames);
1289 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
1290 struct ieee80211_hdr *hdr,
1291 int left)
1294 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1295 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
1296 (priv->iw_mode != NL80211_IFTYPE_AP)))
1297 return 0;
1299 if (priv->ibss_beacon->len > left)
1300 return 0;
1302 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1304 return priv->ibss_beacon->len;
1307 static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
1309 u8 i;
1310 int rate_mask;
1312 /* Set rate mask*/
1313 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1314 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
1315 else
1316 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
1318 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1319 i = iwl3945_rates[i].next_ieee) {
1320 if (rate_mask & (1 << i))
1321 return iwl3945_rates[i].plcp;
1324 /* No valid rate was found. Assign the lowest one */
1325 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1326 return IWL_RATE_1M_PLCP;
1327 else
1328 return IWL_RATE_6M_PLCP;
1331 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
1333 struct iwl3945_frame *frame;
1334 unsigned int frame_size;
1335 int rc;
1336 u8 rate;
1338 frame = iwl3945_get_free_frame(priv);
1340 if (!frame) {
1341 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
1342 "command.\n");
1343 return -ENOMEM;
1346 rate = iwl3945_rate_get_lowest_plcp(priv);
1348 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1350 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1351 &frame->u.cmd[0]);
1353 iwl3945_free_frame(priv, frame);
1355 return rc;
1358 /******************************************************************************
1360 * EEPROM related functions
1362 ******************************************************************************/
1364 static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
1366 memcpy(mac, priv->eeprom39.mac_address, 6);
1370 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1371 * embedded controller) as EEPROM reader; each read is a series of pulses
1372 * to/from the EEPROM chip, not a single event, so even reads could conflict
1373 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1374 * simply claims ownership, which should be safe when this function is called
1375 * (i.e. before loading uCode!).
1377 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
1379 _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1380 return 0;
1384 * iwl3945_eeprom_init - read EEPROM contents
1386 * Load the EEPROM contents from adapter into priv->eeprom39
1388 * NOTE: This routine uses the non-debug IO access functions.
1390 int iwl3945_eeprom_init(struct iwl_priv *priv)
1392 u16 *e = (u16 *)&priv->eeprom39;
1393 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
1394 int sz = sizeof(priv->eeprom39);
1395 int ret;
1396 u16 addr;
1398 /* The EEPROM structure has several padding buffers within it
1399 * and when adding new EEPROM maps is subject to programmer errors
1400 * which may be very difficult to identify without explicitly
1401 * checking the resulting size of the eeprom map. */
1402 BUILD_BUG_ON(sizeof(priv->eeprom39) != IWL_EEPROM_IMAGE_SIZE);
1404 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1405 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
1406 return -ENOENT;
1409 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1410 ret = iwl3945_eeprom_acquire_semaphore(priv);
1411 if (ret < 0) {
1412 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
1413 return -ENOENT;
1416 /* eeprom is an array of 16bit values */
1417 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1418 u32 r;
1420 _iwl_write32(priv, CSR_EEPROM_REG,
1421 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
1422 _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1423 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
1424 CSR_EEPROM_REG_READ_VALID_MSK,
1425 IWL_EEPROM_ACCESS_TIMEOUT);
1426 if (ret < 0) {
1427 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
1428 return ret;
1431 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
1432 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1435 return 0;
1438 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
1440 if (priv->shared_virt)
1441 pci_free_consistent(priv->pci_dev,
1442 sizeof(struct iwl3945_shared),
1443 priv->shared_virt,
1444 priv->shared_phys);
1448 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1450 * return : set the bit for each supported rate insert in ie
1452 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1453 u16 basic_rate, int *left)
1455 u16 ret_rates = 0, bit;
1456 int i;
1457 u8 *cnt = ie;
1458 u8 *rates = ie + 1;
1460 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1461 if (bit & supported_rate) {
1462 ret_rates |= bit;
1463 rates[*cnt] = iwl3945_rates[i].ieee |
1464 ((bit & basic_rate) ? 0x80 : 0x00);
1465 (*cnt)++;
1466 (*left)--;
1467 if ((*left <= 0) ||
1468 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1469 break;
1473 return ret_rates;
1477 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1479 static u16 iwl3945_fill_probe_req(struct iwl_priv *priv,
1480 struct ieee80211_mgmt *frame,
1481 int left)
1483 int len = 0;
1484 u8 *pos = NULL;
1485 u16 active_rates, ret_rates, cck_rates;
1487 /* Make sure there is enough space for the probe request,
1488 * two mandatory IEs and the data */
1489 left -= 24;
1490 if (left < 0)
1491 return 0;
1492 len += 24;
1494 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1495 memcpy(frame->da, iwl_bcast_addr, ETH_ALEN);
1496 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1497 memcpy(frame->bssid, iwl_bcast_addr, ETH_ALEN);
1498 frame->seq_ctrl = 0;
1500 /* fill in our indirect SSID IE */
1501 /* ...next IE... */
1503 left -= 2;
1504 if (left < 0)
1505 return 0;
1506 len += 2;
1507 pos = &(frame->u.probe_req.variable[0]);
1508 *pos++ = WLAN_EID_SSID;
1509 *pos++ = 0;
1511 /* fill in supported rate */
1512 /* ...next IE... */
1513 left -= 2;
1514 if (left < 0)
1515 return 0;
1517 /* ... fill it in... */
1518 *pos++ = WLAN_EID_SUPP_RATES;
1519 *pos = 0;
1521 priv->active_rate = priv->rates_mask;
1522 active_rates = priv->active_rate;
1523 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1525 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1526 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1527 priv->active_rate_basic, &left);
1528 active_rates &= ~ret_rates;
1530 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1531 priv->active_rate_basic, &left);
1532 active_rates &= ~ret_rates;
1534 len += 2 + *pos;
1535 pos += (*pos) + 1;
1536 if (active_rates == 0)
1537 goto fill_end;
1539 /* fill in supported extended rate */
1540 /* ...next IE... */
1541 left -= 2;
1542 if (left < 0)
1543 return 0;
1544 /* ... fill it in... */
1545 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1546 *pos = 0;
1547 iwl3945_supported_rate_to_ie(pos, active_rates,
1548 priv->active_rate_basic, &left);
1549 if (*pos > 0)
1550 len += 2 + *pos;
1552 fill_end:
1553 return (u16)len;
1557 * QoS support
1559 static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
1560 struct iwl_qosparam_cmd *qos)
1563 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1564 sizeof(struct iwl_qosparam_cmd), qos);
1567 static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
1569 unsigned long flags;
1571 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1572 return;
1574 spin_lock_irqsave(&priv->lock, flags);
1575 priv->qos_data.def_qos_parm.qos_flags = 0;
1577 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1578 !priv->qos_data.qos_cap.q_AP.txop_request)
1579 priv->qos_data.def_qos_parm.qos_flags |=
1580 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1582 if (priv->qos_data.qos_active)
1583 priv->qos_data.def_qos_parm.qos_flags |=
1584 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1586 spin_unlock_irqrestore(&priv->lock, flags);
1588 if (force || iwl3945_is_associated(priv)) {
1589 IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
1590 priv->qos_data.qos_active);
1592 iwl3945_send_qos_params_command(priv,
1593 &(priv->qos_data.def_qos_parm));
1598 * Power management (not Tx power!) functions
1600 #define MSEC_TO_USEC 1024
1603 #define NOSLP __constant_cpu_to_le16(0), 0, 0
1604 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1605 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1606 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1607 __constant_cpu_to_le32(X1), \
1608 __constant_cpu_to_le32(X2), \
1609 __constant_cpu_to_le32(X3), \
1610 __constant_cpu_to_le32(X4)}
1612 /* default power management (not Tx power) table values */
1613 /* for TIM 0-10 */
1614 static struct iwl_power_vec_entry range_0[IWL39_POWER_AC] = {
1615 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1616 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1617 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1618 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1619 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1620 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1623 /* for TIM > 10 */
1624 static struct iwl_power_vec_entry range_1[IWL39_POWER_AC] = {
1625 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1626 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1627 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1628 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1629 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1630 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1631 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1632 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1633 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1634 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1637 int iwl3945_power_init_handle(struct iwl_priv *priv)
1639 int rc = 0, i;
1640 struct iwl3945_power_mgr *pow_data;
1641 int size = sizeof(struct iwl_power_vec_entry) * IWL39_POWER_AC;
1642 u16 pci_pm;
1644 IWL_DEBUG_POWER("Initialize power \n");
1646 pow_data = &(priv->power_data_39);
1648 memset(pow_data, 0, sizeof(*pow_data));
1650 pow_data->active_index = IWL_POWER_RANGE_0;
1651 pow_data->dtim_val = 0xffff;
1653 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1654 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1656 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1657 if (rc != 0)
1658 return 0;
1659 else {
1660 struct iwl_powertable_cmd *cmd;
1662 IWL_DEBUG_POWER("adjust power command flags\n");
1664 for (i = 0; i < IWL39_POWER_AC; i++) {
1665 cmd = &pow_data->pwr_range_0[i].cmd;
1667 if (pci_pm & 0x1)
1668 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1669 else
1670 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1673 return rc;
1676 static int iwl3945_update_power_cmd(struct iwl_priv *priv,
1677 struct iwl_powertable_cmd *cmd, u32 mode)
1679 int rc = 0, i;
1680 u8 skip;
1681 u32 max_sleep = 0;
1682 struct iwl_power_vec_entry *range;
1683 u8 period = 0;
1684 struct iwl3945_power_mgr *pow_data;
1686 if (mode > IWL_POWER_INDEX_5) {
1687 IWL_DEBUG_POWER("Error invalid power mode \n");
1688 return -1;
1690 pow_data = &(priv->power_data_39);
1692 if (pow_data->active_index == IWL_POWER_RANGE_0)
1693 range = &pow_data->pwr_range_0[0];
1694 else
1695 range = &pow_data->pwr_range_1[1];
1697 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1699 #ifdef IWL_MAC80211_DISABLE
1700 if (priv->assoc_network != NULL) {
1701 unsigned long flags;
1703 period = priv->assoc_network->tim.tim_period;
1705 #endif /*IWL_MAC80211_DISABLE */
1706 skip = range[mode].no_dtim;
1708 if (period == 0) {
1709 period = 1;
1710 skip = 0;
1713 if (skip == 0) {
1714 max_sleep = period;
1715 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1716 } else {
1717 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1718 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1719 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1722 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1723 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1724 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1727 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1728 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1729 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1730 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1731 le32_to_cpu(cmd->sleep_interval[0]),
1732 le32_to_cpu(cmd->sleep_interval[1]),
1733 le32_to_cpu(cmd->sleep_interval[2]),
1734 le32_to_cpu(cmd->sleep_interval[3]),
1735 le32_to_cpu(cmd->sleep_interval[4]));
1737 return rc;
1740 static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
1742 u32 uninitialized_var(final_mode);
1743 int rc;
1744 struct iwl_powertable_cmd cmd;
1746 /* If on battery, set to 3,
1747 * if plugged into AC power, set to CAM ("continuously aware mode"),
1748 * else user level */
1749 switch (mode) {
1750 case IWL39_POWER_BATTERY:
1751 final_mode = IWL_POWER_INDEX_3;
1752 break;
1753 case IWL39_POWER_AC:
1754 final_mode = IWL_POWER_MODE_CAM;
1755 break;
1756 default:
1757 final_mode = mode;
1758 break;
1761 iwl3945_update_power_cmd(priv, &cmd, final_mode);
1763 /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
1764 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD,
1765 sizeof(struct iwl3945_powertable_cmd), &cmd);
1767 if (final_mode == IWL_POWER_MODE_CAM)
1768 clear_bit(STATUS_POWER_PMI, &priv->status);
1769 else
1770 set_bit(STATUS_POWER_PMI, &priv->status);
1772 return rc;
1776 * iwl3945_scan_cancel - Cancel any currently executing HW scan
1778 * NOTE: priv->mutex is not required before calling this function
1780 static int iwl3945_scan_cancel(struct iwl_priv *priv)
1782 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1783 clear_bit(STATUS_SCANNING, &priv->status);
1784 return 0;
1787 if (test_bit(STATUS_SCANNING, &priv->status)) {
1788 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1789 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1790 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1791 queue_work(priv->workqueue, &priv->abort_scan);
1793 } else
1794 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1796 return test_bit(STATUS_SCANNING, &priv->status);
1799 return 0;
1803 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
1804 * @ms: amount of time to wait (in milliseconds) for scan to abort
1806 * NOTE: priv->mutex must be held before calling this function
1808 static int iwl3945_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
1810 unsigned long now = jiffies;
1811 int ret;
1813 ret = iwl3945_scan_cancel(priv);
1814 if (ret && ms) {
1815 mutex_unlock(&priv->mutex);
1816 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
1817 test_bit(STATUS_SCANNING, &priv->status))
1818 msleep(1);
1819 mutex_lock(&priv->mutex);
1821 return test_bit(STATUS_SCANNING, &priv->status);
1824 return ret;
1827 #define MAX_UCODE_BEACON_INTERVAL 1024
1828 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
1830 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
1832 u16 new_val = 0;
1833 u16 beacon_factor = 0;
1835 beacon_factor =
1836 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1837 / MAX_UCODE_BEACON_INTERVAL;
1838 new_val = beacon_val / beacon_factor;
1840 return cpu_to_le16(new_val);
1843 static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
1845 u64 interval_tm_unit;
1846 u64 tsf, result;
1847 unsigned long flags;
1848 struct ieee80211_conf *conf = NULL;
1849 u16 beacon_int = 0;
1851 conf = ieee80211_get_hw_conf(priv->hw);
1853 spin_lock_irqsave(&priv->lock, flags);
1854 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
1855 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1857 tsf = priv->timestamp;
1859 beacon_int = priv->beacon_int;
1860 spin_unlock_irqrestore(&priv->lock, flags);
1862 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
1863 if (beacon_int == 0) {
1864 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1865 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1866 } else {
1867 priv->rxon_timing.beacon_interval =
1868 cpu_to_le16(beacon_int);
1869 priv->rxon_timing.beacon_interval =
1870 iwl3945_adjust_beacon_interval(
1871 le16_to_cpu(priv->rxon_timing.beacon_interval));
1874 priv->rxon_timing.atim_window = 0;
1875 } else {
1876 priv->rxon_timing.beacon_interval =
1877 iwl3945_adjust_beacon_interval(conf->beacon_int);
1878 /* TODO: we need to get atim_window from upper stack
1879 * for now we set to 0 */
1880 priv->rxon_timing.atim_window = 0;
1883 interval_tm_unit =
1884 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
1885 result = do_div(tsf, interval_tm_unit);
1886 priv->rxon_timing.beacon_init_val =
1887 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
1889 IWL_DEBUG_ASSOC
1890 ("beacon interval %d beacon timer %d beacon tim %d\n",
1891 le16_to_cpu(priv->rxon_timing.beacon_interval),
1892 le32_to_cpu(priv->rxon_timing.beacon_init_val),
1893 le16_to_cpu(priv->rxon_timing.atim_window));
1896 static int iwl3945_scan_initiate(struct iwl_priv *priv)
1898 if (!iwl_is_ready_rf(priv)) {
1899 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
1900 return -EIO;
1903 if (test_bit(STATUS_SCANNING, &priv->status)) {
1904 IWL_DEBUG_SCAN("Scan already in progress.\n");
1905 return -EAGAIN;
1908 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1909 IWL_DEBUG_SCAN("Scan request while abort pending. "
1910 "Queuing.\n");
1911 return -EAGAIN;
1914 IWL_DEBUG_INFO("Starting scan...\n");
1915 if (priv->cfg->sku & IWL_SKU_G)
1916 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
1917 if (priv->cfg->sku & IWL_SKU_A)
1918 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
1919 set_bit(STATUS_SCANNING, &priv->status);
1920 priv->scan_start = jiffies;
1921 priv->scan_pass_start = priv->scan_start;
1923 queue_work(priv->workqueue, &priv->request_scan);
1925 return 0;
1928 static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
1930 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
1932 if (hw_decrypt)
1933 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
1934 else
1935 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
1937 return 0;
1940 static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
1941 enum ieee80211_band band)
1943 if (band == IEEE80211_BAND_5GHZ) {
1944 priv->staging39_rxon.flags &=
1945 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1946 | RXON_FLG_CCK_MSK);
1947 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1948 } else {
1949 /* Copied from iwl3945_bg_post_associate() */
1950 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1951 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1952 else
1953 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1955 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1956 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1958 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1959 priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1960 priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
1965 * initialize rxon structure with default values from eeprom
1967 static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
1968 int mode)
1970 const struct iwl_channel_info *ch_info;
1972 memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
1974 switch (mode) {
1975 case NL80211_IFTYPE_AP:
1976 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
1977 break;
1979 case NL80211_IFTYPE_STATION:
1980 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
1981 priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1982 break;
1984 case NL80211_IFTYPE_ADHOC:
1985 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1986 priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1987 priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1988 RXON_FILTER_ACCEPT_GRP_MSK;
1989 break;
1991 case NL80211_IFTYPE_MONITOR:
1992 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
1993 priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
1994 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
1995 break;
1996 default:
1997 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1998 break;
2001 #if 0
2002 /* TODO: Figure out when short_preamble would be set and cache from
2003 * that */
2004 if (!hw_to_local(priv->hw)->short_preamble)
2005 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2006 else
2007 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2008 #endif
2010 ch_info = iwl3945_get_channel_info(priv, priv->band,
2011 le16_to_cpu(priv->active39_rxon.channel));
2013 if (!ch_info)
2014 ch_info = &priv->channel_info[0];
2017 * in some case A channels are all non IBSS
2018 * in this case force B/G channel
2020 if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
2021 ch_info = &priv->channel_info[0];
2023 priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
2024 if (is_channel_a_band(ch_info))
2025 priv->band = IEEE80211_BAND_5GHZ;
2026 else
2027 priv->band = IEEE80211_BAND_2GHZ;
2029 iwl3945_set_flags_for_phymode(priv, priv->band);
2031 priv->staging39_rxon.ofdm_basic_rates =
2032 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2033 priv->staging39_rxon.cck_basic_rates =
2034 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2037 static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
2039 if (mode == NL80211_IFTYPE_ADHOC) {
2040 const struct iwl_channel_info *ch_info;
2042 ch_info = iwl3945_get_channel_info(priv,
2043 priv->band,
2044 le16_to_cpu(priv->staging39_rxon.channel));
2046 if (!ch_info || !is_channel_ibss(ch_info)) {
2047 IWL_ERR(priv, "channel %d not IBSS channel\n",
2048 le16_to_cpu(priv->staging39_rxon.channel));
2049 return -EINVAL;
2053 iwl3945_connection_init_rx_config(priv, mode);
2054 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2056 iwl3945_clear_stations_table(priv);
2058 /* don't commit rxon if rf-kill is on*/
2059 if (!iwl_is_ready_rf(priv))
2060 return -EAGAIN;
2062 cancel_delayed_work(&priv->scan_check);
2063 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2064 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2065 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2066 return -EAGAIN;
2069 iwl3945_commit_rxon(priv);
2071 return 0;
2074 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
2075 struct ieee80211_tx_info *info,
2076 struct iwl_cmd *cmd,
2077 struct sk_buff *skb_frag,
2078 int last_frag)
2080 struct iwl3945_hw_key *keyinfo =
2081 &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
2083 switch (keyinfo->alg) {
2084 case ALG_CCMP:
2085 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2086 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2087 IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
2088 break;
2090 case ALG_TKIP:
2091 #if 0
2092 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2094 if (last_frag)
2095 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2097 else
2098 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2099 #endif
2100 break;
2102 case ALG_WEP:
2103 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2104 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2106 if (keyinfo->keylen == 13)
2107 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2109 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2111 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2112 "with key %d\n", info->control.hw_key->hw_key_idx);
2113 break;
2115 default:
2116 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
2117 break;
2122 * handle build REPLY_TX command notification.
2124 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
2125 struct iwl_cmd *cmd,
2126 struct ieee80211_tx_info *info,
2127 struct ieee80211_hdr *hdr,
2128 int is_unicast, u8 std_id)
2130 __le16 fc = hdr->frame_control;
2131 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2132 u8 rc_flags = info->control.rates[0].flags;
2134 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2135 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
2136 tx_flags |= TX_CMD_FLG_ACK_MSK;
2137 if (ieee80211_is_mgmt(fc))
2138 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2139 if (ieee80211_is_probe_resp(fc) &&
2140 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2141 tx_flags |= TX_CMD_FLG_TSF_MSK;
2142 } else {
2143 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2144 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2147 cmd->cmd.tx.sta_id = std_id;
2148 if (ieee80211_has_morefrags(fc))
2149 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2151 if (ieee80211_is_data_qos(fc)) {
2152 u8 *qc = ieee80211_get_qos_ctl(hdr);
2153 cmd->cmd.tx.tid_tspec = qc[0] & 0xf;
2154 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2155 } else {
2156 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2159 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
2160 tx_flags |= TX_CMD_FLG_RTS_MSK;
2161 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2162 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
2163 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2164 tx_flags |= TX_CMD_FLG_CTS_MSK;
2167 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2168 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2170 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2171 if (ieee80211_is_mgmt(fc)) {
2172 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
2173 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2174 else
2175 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2176 } else {
2177 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2178 #ifdef CONFIG_IWL3945_LEDS
2179 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2180 #endif
2183 cmd->cmd.tx.driver_txop = 0;
2184 cmd->cmd.tx.tx_flags = tx_flags;
2185 cmd->cmd.tx.next_frame_len = 0;
2189 * iwl3945_get_sta_id - Find station's index within station table
2191 static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
2193 int sta_id;
2194 u16 fc = le16_to_cpu(hdr->frame_control);
2196 /* If this frame is broadcast or management, use broadcast station id */
2197 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2198 is_multicast_ether_addr(hdr->addr1))
2199 return priv->hw_params.bcast_sta_id;
2201 switch (priv->iw_mode) {
2203 /* If we are a client station in a BSS network, use the special
2204 * AP station entry (that's the only station we communicate with) */
2205 case NL80211_IFTYPE_STATION:
2206 return IWL_AP_ID;
2208 /* If we are an AP, then find the station, or use BCAST */
2209 case NL80211_IFTYPE_AP:
2210 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2211 if (sta_id != IWL_INVALID_STATION)
2212 return sta_id;
2213 return priv->hw_params.bcast_sta_id;
2215 /* If this frame is going out to an IBSS network, find the station,
2216 * or create a new station table entry */
2217 case NL80211_IFTYPE_ADHOC: {
2218 /* Create new station table entry */
2219 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2220 if (sta_id != IWL_INVALID_STATION)
2221 return sta_id;
2223 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2225 if (sta_id != IWL_INVALID_STATION)
2226 return sta_id;
2228 IWL_DEBUG_DROP("Station %pM not in station map. "
2229 "Defaulting to broadcast...\n",
2230 hdr->addr1);
2231 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2232 return priv->hw_params.bcast_sta_id;
2234 /* If we are in monitor mode, use BCAST. This is required for
2235 * packet injection. */
2236 case NL80211_IFTYPE_MONITOR:
2237 return priv->hw_params.bcast_sta_id;
2239 default:
2240 IWL_WARN(priv, "Unknown mode of operation: %d\n",
2241 priv->iw_mode);
2242 return priv->hw_params.bcast_sta_id;
2247 * start REPLY_TX command process
2249 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
2251 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2252 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2253 struct iwl3945_tfd *tfd;
2254 int txq_id = skb_get_queue_mapping(skb);
2255 struct iwl_tx_queue *txq = NULL;
2256 struct iwl_queue *q = NULL;
2257 dma_addr_t phys_addr;
2258 dma_addr_t txcmd_phys;
2259 struct iwl_cmd *out_cmd = NULL;
2260 u16 len, idx, len_org, hdr_len;
2261 u8 id;
2262 u8 unicast;
2263 u8 sta_id;
2264 u8 tid = 0;
2265 u16 seq_number = 0;
2266 __le16 fc;
2267 u8 wait_write_ptr = 0;
2268 u8 *qc = NULL;
2269 unsigned long flags;
2270 int rc;
2272 spin_lock_irqsave(&priv->lock, flags);
2273 if (iwl_is_rfkill(priv)) {
2274 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2275 goto drop_unlock;
2278 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
2279 IWL_ERR(priv, "ERROR: No TX rate available.\n");
2280 goto drop_unlock;
2283 unicast = !is_multicast_ether_addr(hdr->addr1);
2284 id = 0;
2286 fc = hdr->frame_control;
2288 #ifdef CONFIG_IWL3945_DEBUG
2289 if (ieee80211_is_auth(fc))
2290 IWL_DEBUG_TX("Sending AUTH frame\n");
2291 else if (ieee80211_is_assoc_req(fc))
2292 IWL_DEBUG_TX("Sending ASSOC frame\n");
2293 else if (ieee80211_is_reassoc_req(fc))
2294 IWL_DEBUG_TX("Sending REASSOC frame\n");
2295 #endif
2297 /* drop all data frame if we are not associated */
2298 if (ieee80211_is_data(fc) &&
2299 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
2300 (!iwl3945_is_associated(priv) ||
2301 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
2302 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2303 goto drop_unlock;
2306 spin_unlock_irqrestore(&priv->lock, flags);
2308 hdr_len = ieee80211_hdrlen(fc);
2310 /* Find (or create) index into station table for destination station */
2311 sta_id = iwl3945_get_sta_id(priv, hdr);
2312 if (sta_id == IWL_INVALID_STATION) {
2313 IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
2314 hdr->addr1);
2315 goto drop;
2318 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2320 if (ieee80211_is_data_qos(fc)) {
2321 qc = ieee80211_get_qos_ctl(hdr);
2322 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
2323 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
2324 IEEE80211_SCTL_SEQ;
2325 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2326 (hdr->seq_ctrl &
2327 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2328 seq_number += 0x10;
2331 /* Descriptor for chosen Tx queue */
2332 txq = &priv->txq[txq_id];
2333 q = &txq->q;
2335 spin_lock_irqsave(&priv->lock, flags);
2337 /* Set up first empty TFD within this queue's circular TFD buffer */
2338 tfd = &txq->tfds39[q->write_ptr];
2339 memset(tfd, 0, sizeof(*tfd));
2340 idx = get_cmd_index(q, q->write_ptr, 0);
2342 /* Set up driver data for this TFD */
2343 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
2344 txq->txb[q->write_ptr].skb[0] = skb;
2346 /* Init first empty entry in queue's array of Tx/cmd buffers */
2347 out_cmd = txq->cmd[idx];
2348 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2349 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2352 * Set up the Tx-command (not MAC!) header.
2353 * Store the chosen Tx queue and TFD index within the sequence field;
2354 * after Tx, uCode's Tx response will return this value so driver can
2355 * locate the frame within the tx queue and do post-tx processing.
2357 out_cmd->hdr.cmd = REPLY_TX;
2358 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2359 INDEX_TO_SEQ(q->write_ptr)));
2361 /* Copy MAC header from skb into command buffer */
2362 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2365 * Use the first empty entry in this queue's command buffer array
2366 * to contain the Tx command and MAC header concatenated together
2367 * (payload data will be in another buffer).
2368 * Size of this varies, due to varying MAC header length.
2369 * If end is not dword aligned, we'll have 2 extra bytes at the end
2370 * of the MAC header (device reads on dword boundaries).
2371 * We'll tell device about this padding later.
2373 len = sizeof(struct iwl3945_tx_cmd) +
2374 sizeof(struct iwl_cmd_header) + hdr_len;
2376 len_org = len;
2377 len = (len + 3) & ~3;
2379 if (len_org != len)
2380 len_org = 1;
2381 else
2382 len_org = 0;
2384 /* Physical address of this Tx command's header (not MAC header!),
2385 * within command buffer array. */
2386 txcmd_phys = pci_map_single(priv->pci_dev,
2387 out_cmd, sizeof(struct iwl_cmd),
2388 PCI_DMA_TODEVICE);
2389 pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
2390 pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
2391 /* Add buffer containing Tx command and MAC(!) header to TFD's
2392 * first entry */
2393 txcmd_phys += offsetof(struct iwl_cmd, hdr);
2395 /* Add buffer containing Tx command and MAC(!) header to TFD's
2396 * first entry */
2397 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2399 if (info->control.hw_key)
2400 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
2402 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2403 * if any (802.11 null frames have no payload). */
2404 len = skb->len - hdr_len;
2405 if (len) {
2406 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2407 len, PCI_DMA_TODEVICE);
2408 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2411 if (!len)
2412 /* If there is no payload, then we use only one Tx buffer */
2413 tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(1));
2414 else
2415 /* Else use 2 buffers.
2416 * Tell 3945 about any padding after MAC header */
2417 tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(2) |
2418 TFD_CTL_PAD_SET(U32_PAD(len)));
2420 /* Total # bytes to be transmitted */
2421 len = (u16)skb->len;
2422 out_cmd->cmd.tx.len = cpu_to_le16(len);
2424 /* TODO need this for burst mode later on */
2425 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id);
2427 /* set is_hcca to 0; it probably will never be implemented */
2428 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
2430 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2431 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2433 if (!ieee80211_has_morefrags(hdr->frame_control)) {
2434 txq->need_update = 1;
2435 if (qc)
2436 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
2437 } else {
2438 wait_write_ptr = 1;
2439 txq->need_update = 0;
2442 iwl_print_hex_dump(priv, IWL_DL_TX, out_cmd->cmd.payload,
2443 sizeof(out_cmd->cmd.tx));
2445 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2446 ieee80211_hdrlen(fc));
2448 /* Tell device the write index *just past* this latest filled TFD */
2449 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2450 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2451 spin_unlock_irqrestore(&priv->lock, flags);
2453 if (rc)
2454 return rc;
2456 if ((iwl_queue_space(q) < q->high_mark)
2457 && priv->mac80211_registered) {
2458 if (wait_write_ptr) {
2459 spin_lock_irqsave(&priv->lock, flags);
2460 txq->need_update = 1;
2461 iwl3945_tx_queue_update_write_ptr(priv, txq);
2462 spin_unlock_irqrestore(&priv->lock, flags);
2465 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
2468 return 0;
2470 drop_unlock:
2471 spin_unlock_irqrestore(&priv->lock, flags);
2472 drop:
2473 return -1;
2476 static void iwl3945_set_rate(struct iwl_priv *priv)
2478 const struct ieee80211_supported_band *sband = NULL;
2479 struct ieee80211_rate *rate;
2480 int i;
2482 sband = iwl_get_hw_mode(priv, priv->band);
2483 if (!sband) {
2484 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
2485 return;
2488 priv->active_rate = 0;
2489 priv->active_rate_basic = 0;
2491 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2492 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2494 for (i = 0; i < sband->n_bitrates; i++) {
2495 rate = &sband->bitrates[i];
2496 if ((rate->hw_value < IWL_RATE_COUNT) &&
2497 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2498 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2499 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2500 priv->active_rate |= (1 << rate->hw_value);
2504 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2505 priv->active_rate, priv->active_rate_basic);
2508 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2509 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2510 * OFDM
2512 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2513 priv->staging39_rxon.cck_basic_rates =
2514 ((priv->active_rate_basic &
2515 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2516 else
2517 priv->staging39_rxon.cck_basic_rates =
2518 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2520 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2521 priv->staging39_rxon.ofdm_basic_rates =
2522 ((priv->active_rate_basic &
2523 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2524 IWL_FIRST_OFDM_RATE) & 0xFF;
2525 else
2526 priv->staging39_rxon.ofdm_basic_rates =
2527 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2530 static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
2532 unsigned long flags;
2534 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2535 return;
2537 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2538 disable_radio ? "OFF" : "ON");
2540 if (disable_radio) {
2541 iwl3945_scan_cancel(priv);
2542 /* FIXME: This is a workaround for AP */
2543 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2544 spin_lock_irqsave(&priv->lock, flags);
2545 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
2546 CSR_UCODE_SW_BIT_RFKILL);
2547 spin_unlock_irqrestore(&priv->lock, flags);
2548 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2549 set_bit(STATUS_RF_KILL_SW, &priv->status);
2551 return;
2554 spin_lock_irqsave(&priv->lock, flags);
2555 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2557 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2558 spin_unlock_irqrestore(&priv->lock, flags);
2560 /* wake up ucode */
2561 msleep(10);
2563 spin_lock_irqsave(&priv->lock, flags);
2564 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2565 if (!iwl_grab_nic_access(priv))
2566 iwl_release_nic_access(priv);
2567 spin_unlock_irqrestore(&priv->lock, flags);
2569 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2570 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2571 "disabled by HW switch\n");
2572 return;
2575 if (priv->is_open)
2576 queue_work(priv->workqueue, &priv->restart);
2577 return;
2580 void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
2581 u32 decrypt_res, struct ieee80211_rx_status *stats)
2583 u16 fc =
2584 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2586 if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2587 return;
2589 if (!(fc & IEEE80211_FCTL_PROTECTED))
2590 return;
2592 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2593 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2594 case RX_RES_STATUS_SEC_TYPE_TKIP:
2595 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2596 RX_RES_STATUS_BAD_ICV_MIC)
2597 stats->flag |= RX_FLAG_MMIC_ERROR;
2598 case RX_RES_STATUS_SEC_TYPE_WEP:
2599 case RX_RES_STATUS_SEC_TYPE_CCMP:
2600 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2601 RX_RES_STATUS_DECRYPT_OK) {
2602 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2603 stats->flag |= RX_FLAG_DECRYPTED;
2605 break;
2607 default:
2608 break;
2612 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2614 #include "iwl-spectrum.h"
2616 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
2617 #define BEACON_TIME_MASK_HIGH 0xFF000000
2618 #define TIME_UNIT 1024
2621 * extended beacon time format
2622 * time in usec will be changed into a 32-bit value in 8:24 format
2623 * the high 1 byte is the beacon counts
2624 * the lower 3 bytes is the time in usec within one beacon interval
2627 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
2629 u32 quot;
2630 u32 rem;
2631 u32 interval = beacon_interval * 1024;
2633 if (!interval || !usec)
2634 return 0;
2636 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2637 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2639 return (quot << 24) + rem;
2642 /* base is usually what we get from ucode with each received frame,
2643 * the same as HW timer counter counting down
2646 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
2648 u32 base_low = base & BEACON_TIME_MASK_LOW;
2649 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2650 u32 interval = beacon_interval * TIME_UNIT;
2651 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2652 (addon & BEACON_TIME_MASK_HIGH);
2654 if (base_low > addon_low)
2655 res += base_low - addon_low;
2656 else if (base_low < addon_low) {
2657 res += interval + base_low - addon_low;
2658 res += (1 << 24);
2659 } else
2660 res += (1 << 24);
2662 return cpu_to_le32(res);
2665 static int iwl3945_get_measurement(struct iwl_priv *priv,
2666 struct ieee80211_measurement_params *params,
2667 u8 type)
2669 struct iwl_spectrum_cmd spectrum;
2670 struct iwl_rx_packet *res;
2671 struct iwl_host_cmd cmd = {
2672 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2673 .data = (void *)&spectrum,
2674 .meta.flags = CMD_WANT_SKB,
2676 u32 add_time = le64_to_cpu(params->start_time);
2677 int rc;
2678 int spectrum_resp_status;
2679 int duration = le16_to_cpu(params->duration);
2681 if (iwl3945_is_associated(priv))
2682 add_time =
2683 iwl3945_usecs_to_beacons(
2684 le64_to_cpu(params->start_time) - priv->last_tsf,
2685 le16_to_cpu(priv->rxon_timing.beacon_interval));
2687 memset(&spectrum, 0, sizeof(spectrum));
2689 spectrum.channel_count = cpu_to_le16(1);
2690 spectrum.flags =
2691 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2692 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2693 cmd.len = sizeof(spectrum);
2694 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2696 if (iwl3945_is_associated(priv))
2697 spectrum.start_time =
2698 iwl3945_add_beacon_time(priv->last_beacon_time,
2699 add_time,
2700 le16_to_cpu(priv->rxon_timing.beacon_interval));
2701 else
2702 spectrum.start_time = 0;
2704 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2705 spectrum.channels[0].channel = params->channel;
2706 spectrum.channels[0].type = type;
2707 if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
2708 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2709 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2711 rc = iwl3945_send_cmd_sync(priv, &cmd);
2712 if (rc)
2713 return rc;
2715 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
2716 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2717 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
2718 rc = -EIO;
2721 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2722 switch (spectrum_resp_status) {
2723 case 0: /* Command will be handled */
2724 if (res->u.spectrum.id != 0xff) {
2725 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
2726 res->u.spectrum.id);
2727 priv->measurement_status &= ~MEASUREMENT_READY;
2729 priv->measurement_status |= MEASUREMENT_ACTIVE;
2730 rc = 0;
2731 break;
2733 case 1: /* Command will not be handled */
2734 rc = -EAGAIN;
2735 break;
2738 dev_kfree_skb_any(cmd.meta.u.skb);
2740 return rc;
2742 #endif
2744 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
2745 struct iwl_rx_mem_buffer *rxb)
2747 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2748 struct iwl_alive_resp *palive;
2749 struct delayed_work *pwork;
2751 palive = &pkt->u.alive_frame;
2753 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2754 "0x%01X 0x%01X\n",
2755 palive->is_valid, palive->ver_type,
2756 palive->ver_subtype);
2758 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2759 IWL_DEBUG_INFO("Initialization Alive received.\n");
2760 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
2761 sizeof(struct iwl_alive_resp));
2762 pwork = &priv->init_alive_start;
2763 } else {
2764 IWL_DEBUG_INFO("Runtime Alive received.\n");
2765 memcpy(&priv->card_alive, &pkt->u.alive_frame,
2766 sizeof(struct iwl_alive_resp));
2767 pwork = &priv->alive_start;
2768 iwl3945_disable_events(priv);
2771 /* We delay the ALIVE response by 5ms to
2772 * give the HW RF Kill time to activate... */
2773 if (palive->is_valid == UCODE_VALID_OK)
2774 queue_delayed_work(priv->workqueue, pwork,
2775 msecs_to_jiffies(5));
2776 else
2777 IWL_WARN(priv, "uCode did not respond OK.\n");
2780 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
2781 struct iwl_rx_mem_buffer *rxb)
2783 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2785 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2786 return;
2789 static void iwl3945_rx_reply_error(struct iwl_priv *priv,
2790 struct iwl_rx_mem_buffer *rxb)
2792 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2794 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2795 "seq 0x%04X ser 0x%08X\n",
2796 le32_to_cpu(pkt->u.err_resp.error_type),
2797 get_cmd_string(pkt->u.err_resp.cmd_id),
2798 pkt->u.err_resp.cmd_id,
2799 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2800 le32_to_cpu(pkt->u.err_resp.error_info));
2803 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2805 static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
2807 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2808 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
2809 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
2810 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
2811 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
2812 rxon->channel = csa->channel;
2813 priv->staging39_rxon.channel = csa->channel;
2816 static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
2817 struct iwl_rx_mem_buffer *rxb)
2819 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2820 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2821 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
2823 if (!report->state) {
2824 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
2825 "Spectrum Measure Notification: Start\n");
2826 return;
2829 memcpy(&priv->measure_report, report, sizeof(*report));
2830 priv->measurement_status |= MEASUREMENT_READY;
2831 #endif
2834 static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
2835 struct iwl_rx_mem_buffer *rxb)
2837 #ifdef CONFIG_IWL3945_DEBUG
2838 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2839 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2840 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
2841 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2842 #endif
2845 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2846 struct iwl_rx_mem_buffer *rxb)
2848 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2849 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
2850 "notification for %s:\n",
2851 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2852 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
2853 le32_to_cpu(pkt->len));
2856 static void iwl3945_bg_beacon_update(struct work_struct *work)
2858 struct iwl_priv *priv =
2859 container_of(work, struct iwl_priv, beacon_update);
2860 struct sk_buff *beacon;
2862 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
2863 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
2865 if (!beacon) {
2866 IWL_ERR(priv, "update beacon failed\n");
2867 return;
2870 mutex_lock(&priv->mutex);
2871 /* new beacon skb is allocated every time; dispose previous.*/
2872 if (priv->ibss_beacon)
2873 dev_kfree_skb(priv->ibss_beacon);
2875 priv->ibss_beacon = beacon;
2876 mutex_unlock(&priv->mutex);
2878 iwl3945_send_beacon_cmd(priv);
2881 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
2882 struct iwl_rx_mem_buffer *rxb)
2884 #ifdef CONFIG_IWL3945_DEBUG
2885 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2886 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
2887 u8 rate = beacon->beacon_notify_hdr.rate;
2889 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
2890 "tsf %d %d rate %d\n",
2891 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
2892 beacon->beacon_notify_hdr.failure_frame,
2893 le32_to_cpu(beacon->ibss_mgr_status),
2894 le32_to_cpu(beacon->high_tsf),
2895 le32_to_cpu(beacon->low_tsf), rate);
2896 #endif
2898 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
2899 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
2900 queue_work(priv->workqueue, &priv->beacon_update);
2903 /* Service response to REPLY_SCAN_CMD (0x80) */
2904 static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
2905 struct iwl_rx_mem_buffer *rxb)
2907 #ifdef CONFIG_IWL3945_DEBUG
2908 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2909 struct iwl_scanreq_notification *notif =
2910 (struct iwl_scanreq_notification *)pkt->u.raw;
2912 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
2913 #endif
2916 /* Service SCAN_START_NOTIFICATION (0x82) */
2917 static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
2918 struct iwl_rx_mem_buffer *rxb)
2920 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2921 struct iwl_scanstart_notification *notif =
2922 (struct iwl_scanstart_notification *)pkt->u.raw;
2923 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
2924 IWL_DEBUG_SCAN("Scan start: "
2925 "%d [802.11%s] "
2926 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
2927 notif->channel,
2928 notif->band ? "bg" : "a",
2929 notif->tsf_high,
2930 notif->tsf_low, notif->status, notif->beacon_timer);
2933 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
2934 static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
2935 struct iwl_rx_mem_buffer *rxb)
2937 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2938 struct iwl_scanresults_notification *notif =
2939 (struct iwl_scanresults_notification *)pkt->u.raw;
2941 IWL_DEBUG_SCAN("Scan ch.res: "
2942 "%d [802.11%s] "
2943 "(TSF: 0x%08X:%08X) - %d "
2944 "elapsed=%lu usec (%dms since last)\n",
2945 notif->channel,
2946 notif->band ? "bg" : "a",
2947 le32_to_cpu(notif->tsf_high),
2948 le32_to_cpu(notif->tsf_low),
2949 le32_to_cpu(notif->statistics[0]),
2950 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
2951 jiffies_to_msecs(elapsed_jiffies
2952 (priv->last_scan_jiffies, jiffies)));
2954 priv->last_scan_jiffies = jiffies;
2955 priv->next_scan_jiffies = 0;
2958 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
2959 static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
2960 struct iwl_rx_mem_buffer *rxb)
2962 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2963 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
2965 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
2966 scan_notif->scanned_channels,
2967 scan_notif->tsf_low,
2968 scan_notif->tsf_high, scan_notif->status);
2970 /* The HW is no longer scanning */
2971 clear_bit(STATUS_SCAN_HW, &priv->status);
2973 /* The scan completion notification came in, so kill that timer... */
2974 cancel_delayed_work(&priv->scan_check);
2976 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
2977 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
2978 "2.4" : "5.2",
2979 jiffies_to_msecs(elapsed_jiffies
2980 (priv->scan_pass_start, jiffies)));
2982 /* Remove this scanned band from the list of pending
2983 * bands to scan, band G precedes A in order of scanning
2984 * as seen in iwl3945_bg_request_scan */
2985 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
2986 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
2987 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
2988 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
2990 /* If a request to abort was given, or the scan did not succeed
2991 * then we reset the scan state machine and terminate,
2992 * re-queuing another scan if one has been requested */
2993 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2994 IWL_DEBUG_INFO("Aborted scan completed.\n");
2995 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
2996 } else {
2997 /* If there are more bands on this scan pass reschedule */
2998 if (priv->scan_bands > 0)
2999 goto reschedule;
3002 priv->last_scan_jiffies = jiffies;
3003 priv->next_scan_jiffies = 0;
3004 IWL_DEBUG_INFO("Setting scan to off\n");
3006 clear_bit(STATUS_SCANNING, &priv->status);
3008 IWL_DEBUG_INFO("Scan took %dms\n",
3009 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3011 queue_work(priv->workqueue, &priv->scan_completed);
3013 return;
3015 reschedule:
3016 priv->scan_pass_start = jiffies;
3017 queue_work(priv->workqueue, &priv->request_scan);
3020 /* Handle notification from uCode that card's power state is changing
3021 * due to software, hardware, or critical temperature RFKILL */
3022 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
3023 struct iwl_rx_mem_buffer *rxb)
3025 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3026 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3027 unsigned long status = priv->status;
3029 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3030 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3031 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3033 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
3034 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3036 if (flags & HW_CARD_DISABLED)
3037 set_bit(STATUS_RF_KILL_HW, &priv->status);
3038 else
3039 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3042 if (flags & SW_CARD_DISABLED)
3043 set_bit(STATUS_RF_KILL_SW, &priv->status);
3044 else
3045 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3047 iwl3945_scan_cancel(priv);
3049 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3050 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3051 (test_bit(STATUS_RF_KILL_SW, &status) !=
3052 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3053 queue_work(priv->workqueue, &priv->rf_kill);
3054 else
3055 wake_up_interruptible(&priv->wait_command_queue);
3059 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3061 * Setup the RX handlers for each of the reply types sent from the uCode
3062 * to the host.
3064 * This function chains into the hardware specific files for them to setup
3065 * any hardware specific handlers as well.
3067 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
3069 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3070 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3071 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3072 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3073 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3074 iwl3945_rx_spectrum_measure_notif;
3075 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3076 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3077 iwl3945_rx_pm_debug_statistics_notif;
3078 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3081 * The same handler is used for both the REPLY to a discrete
3082 * statistics request from the host as well as for the periodic
3083 * statistics notifications (after received beacons) from the uCode.
3085 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3086 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3088 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3089 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3090 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3091 iwl3945_rx_scan_results_notif;
3092 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3093 iwl3945_rx_scan_complete_notif;
3094 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3096 /* Set up hardware specific Rx handlers */
3097 iwl3945_hw_rx_handler_setup(priv);
3101 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3102 * When FW advances 'R' index, all entries between old and new 'R' index
3103 * need to be reclaimed.
3105 static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
3106 int txq_id, int index)
3108 struct iwl_tx_queue *txq = &priv->txq[txq_id];
3109 struct iwl_queue *q = &txq->q;
3110 int nfreed = 0;
3112 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3113 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
3114 "is out of range [0-%d] %d %d.\n", txq_id,
3115 index, q->n_bd, q->write_ptr, q->read_ptr);
3116 return;
3119 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3120 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3121 if (nfreed > 1) {
3122 IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
3123 q->write_ptr, q->read_ptr);
3124 queue_work(priv->workqueue, &priv->restart);
3125 break;
3127 nfreed++;
3133 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3134 * @rxb: Rx buffer to reclaim
3136 * If an Rx buffer has an async callback associated with it the callback
3137 * will be executed. The attached skb (if present) will only be freed
3138 * if the callback returns 1
3140 static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
3141 struct iwl_rx_mem_buffer *rxb)
3143 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3144 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3145 int txq_id = SEQ_TO_QUEUE(sequence);
3146 int index = SEQ_TO_INDEX(sequence);
3147 int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3148 int cmd_index;
3149 struct iwl_cmd *cmd;
3151 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3153 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3154 cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3156 /* Input error checking is done when commands are added to queue. */
3157 if (cmd->meta.flags & CMD_WANT_SKB) {
3158 cmd->meta.source->u.skb = rxb->skb;
3159 rxb->skb = NULL;
3160 } else if (cmd->meta.u.callback &&
3161 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3162 rxb->skb = NULL;
3164 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3166 if (!(cmd->meta.flags & CMD_ASYNC)) {
3167 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3168 wake_up_interruptible(&priv->wait_command_queue);
3172 /************************** RX-FUNCTIONS ****************************/
3174 * Rx theory of operation
3176 * The host allocates 32 DMA target addresses and passes the host address
3177 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3178 * 0 to 31
3180 * Rx Queue Indexes
3181 * The host/firmware share two index registers for managing the Rx buffers.
3183 * The READ index maps to the first position that the firmware may be writing
3184 * to -- the driver can read up to (but not including) this position and get
3185 * good data.
3186 * The READ index is managed by the firmware once the card is enabled.
3188 * The WRITE index maps to the last position the driver has read from -- the
3189 * position preceding WRITE is the last slot the firmware can place a packet.
3191 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3192 * WRITE = READ.
3194 * During initialization, the host sets up the READ queue position to the first
3195 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3197 * When the firmware places a packet in a buffer, it will advance the READ index
3198 * and fire the RX interrupt. The driver can then query the READ index and
3199 * process as many packets as possible, moving the WRITE index forward as it
3200 * resets the Rx queue buffers with new memory.
3202 * The management in the driver is as follows:
3203 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3204 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3205 * to replenish the iwl->rxq->rx_free.
3206 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3207 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3208 * 'processed' and 'read' driver indexes as well)
3209 * + A received packet is processed and handed to the kernel network stack,
3210 * detached from the iwl->rxq. The driver 'processed' index is updated.
3211 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3212 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3213 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3214 * were enough free buffers and RX_STALLED is set it is cleared.
3217 * Driver sequence:
3219 * iwl3945_rx_queue_alloc() Allocates rx_free
3220 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3221 * iwl3945_rx_queue_restock
3222 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3223 * queue, updates firmware pointers, and updates
3224 * the WRITE index. If insufficient rx_free buffers
3225 * are available, schedules iwl3945_rx_replenish
3227 * -- enable interrupts --
3228 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
3229 * READ INDEX, detaching the SKB from the pool.
3230 * Moves the packet buffer from queue to rx_used.
3231 * Calls iwl3945_rx_queue_restock to refill any empty
3232 * slots.
3233 * ...
3238 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3240 static int iwl3945_rx_queue_space(const struct iwl_rx_queue *q)
3242 int s = q->read - q->write;
3243 if (s <= 0)
3244 s += RX_QUEUE_SIZE;
3245 /* keep some buffer to not confuse full and empty queue */
3246 s -= 2;
3247 if (s < 0)
3248 s = 0;
3249 return s;
3253 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3255 int iwl3945_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
3257 u32 reg = 0;
3258 int rc = 0;
3259 unsigned long flags;
3261 spin_lock_irqsave(&q->lock, flags);
3263 if (q->need_update == 0)
3264 goto exit_unlock;
3266 /* If power-saving is in use, make sure device is awake */
3267 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3268 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3270 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3271 iwl_set_bit(priv, CSR_GP_CNTRL,
3272 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3273 goto exit_unlock;
3276 rc = iwl_grab_nic_access(priv);
3277 if (rc)
3278 goto exit_unlock;
3280 /* Device expects a multiple of 8 */
3281 iwl_write_direct32(priv, FH39_RSCSR_CHNL0_WPTR,
3282 q->write & ~0x7);
3283 iwl_release_nic_access(priv);
3285 /* Else device is assumed to be awake */
3286 } else
3287 /* Device expects a multiple of 8 */
3288 iwl_write32(priv, FH39_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3291 q->need_update = 0;
3293 exit_unlock:
3294 spin_unlock_irqrestore(&q->lock, flags);
3295 return rc;
3299 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3301 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
3302 dma_addr_t dma_addr)
3304 return cpu_to_le32((u32)dma_addr);
3308 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3310 * If there are slots in the RX queue that need to be restocked,
3311 * and we have free pre-allocated buffers, fill the ranks as much
3312 * as we can, pulling from rx_free.
3314 * This moves the 'write' index forward to catch up with 'processed', and
3315 * also updates the memory address in the firmware to reference the new
3316 * target buffer.
3318 static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
3320 struct iwl_rx_queue *rxq = &priv->rxq;
3321 struct list_head *element;
3322 struct iwl_rx_mem_buffer *rxb;
3323 unsigned long flags;
3324 int write, rc;
3326 spin_lock_irqsave(&rxq->lock, flags);
3327 write = rxq->write & ~0x7;
3328 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3329 /* Get next free Rx buffer, remove from free list */
3330 element = rxq->rx_free.next;
3331 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3332 list_del(element);
3334 /* Point to Rx buffer via next RBD in circular buffer */
3335 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
3336 rxq->queue[rxq->write] = rxb;
3337 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3338 rxq->free_count--;
3340 spin_unlock_irqrestore(&rxq->lock, flags);
3341 /* If the pre-allocated buffer pool is dropping low, schedule to
3342 * refill it */
3343 if (rxq->free_count <= RX_LOW_WATERMARK)
3344 queue_work(priv->workqueue, &priv->rx_replenish);
3347 /* If we've added more space for the firmware to place data, tell it.
3348 * Increment device's write pointer in multiples of 8. */
3349 if ((write != (rxq->write & ~0x7))
3350 || (abs(rxq->write - rxq->read) > 7)) {
3351 spin_lock_irqsave(&rxq->lock, flags);
3352 rxq->need_update = 1;
3353 spin_unlock_irqrestore(&rxq->lock, flags);
3354 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
3355 if (rc)
3356 return rc;
3359 return 0;
3363 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3365 * When moving to rx_free an SKB is allocated for the slot.
3367 * Also restock the Rx queue via iwl3945_rx_queue_restock.
3368 * This is called as a scheduled work item (except for during initialization)
3370 static void iwl3945_rx_allocate(struct iwl_priv *priv)
3372 struct iwl_rx_queue *rxq = &priv->rxq;
3373 struct list_head *element;
3374 struct iwl_rx_mem_buffer *rxb;
3375 unsigned long flags;
3376 spin_lock_irqsave(&rxq->lock, flags);
3377 while (!list_empty(&rxq->rx_used)) {
3378 element = rxq->rx_used.next;
3379 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3381 /* Alloc a new receive buffer */
3382 rxb->skb =
3383 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3384 if (!rxb->skb) {
3385 if (net_ratelimit())
3386 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
3387 /* We don't reschedule replenish work here -- we will
3388 * call the restock method and if it still needs
3389 * more buffers it will schedule replenish */
3390 break;
3393 /* If radiotap head is required, reserve some headroom here.
3394 * The physical head count is a variable rx_stats->phy_count.
3395 * We reserve 4 bytes here. Plus these extra bytes, the
3396 * headroom of the physical head should be enough for the
3397 * radiotap head that iwl3945 supported. See iwl3945_rt.
3399 skb_reserve(rxb->skb, 4);
3401 priv->alloc_rxb_skb++;
3402 list_del(element);
3404 /* Get physical address of RB/SKB */
3405 rxb->real_dma_addr =
3406 pci_map_single(priv->pci_dev, rxb->skb->data,
3407 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3408 list_add_tail(&rxb->list, &rxq->rx_free);
3409 rxq->free_count++;
3411 spin_unlock_irqrestore(&rxq->lock, flags);
3415 * this should be called while priv->lock is locked
3417 static void __iwl3945_rx_replenish(void *data)
3419 struct iwl_priv *priv = data;
3421 iwl3945_rx_allocate(priv);
3422 iwl3945_rx_queue_restock(priv);
3426 void iwl3945_rx_replenish(void *data)
3428 struct iwl_priv *priv = data;
3429 unsigned long flags;
3431 iwl3945_rx_allocate(priv);
3433 spin_lock_irqsave(&priv->lock, flags);
3434 iwl3945_rx_queue_restock(priv);
3435 spin_unlock_irqrestore(&priv->lock, flags);
3438 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
3439 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
3440 * This free routine walks the list of POOL entries and if SKB is set to
3441 * non NULL it is unmapped and freed
3443 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
3445 int i;
3446 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3447 if (rxq->pool[i].skb != NULL) {
3448 pci_unmap_single(priv->pci_dev,
3449 rxq->pool[i].real_dma_addr,
3450 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3451 dev_kfree_skb(rxq->pool[i].skb);
3455 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3456 rxq->dma_addr);
3457 rxq->bd = NULL;
3460 int iwl3945_rx_queue_alloc(struct iwl_priv *priv)
3462 struct iwl_rx_queue *rxq = &priv->rxq;
3463 struct pci_dev *dev = priv->pci_dev;
3464 int i;
3466 spin_lock_init(&rxq->lock);
3467 INIT_LIST_HEAD(&rxq->rx_free);
3468 INIT_LIST_HEAD(&rxq->rx_used);
3470 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
3471 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3472 if (!rxq->bd)
3473 return -ENOMEM;
3475 /* Fill the rx_used queue with _all_ of the Rx buffers */
3476 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3477 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3479 /* Set us so that we have processed and used all buffers, but have
3480 * not restocked the Rx queue with fresh buffers */
3481 rxq->read = rxq->write = 0;
3482 rxq->free_count = 0;
3483 rxq->need_update = 0;
3484 return 0;
3487 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
3489 unsigned long flags;
3490 int i;
3491 spin_lock_irqsave(&rxq->lock, flags);
3492 INIT_LIST_HEAD(&rxq->rx_free);
3493 INIT_LIST_HEAD(&rxq->rx_used);
3494 /* Fill the rx_used queue with _all_ of the Rx buffers */
3495 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3496 /* In the reset function, these buffers may have been allocated
3497 * to an SKB, so we need to unmap and free potential storage */
3498 if (rxq->pool[i].skb != NULL) {
3499 pci_unmap_single(priv->pci_dev,
3500 rxq->pool[i].real_dma_addr,
3501 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3502 priv->alloc_rxb_skb--;
3503 dev_kfree_skb(rxq->pool[i].skb);
3504 rxq->pool[i].skb = NULL;
3506 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3509 /* Set us so that we have processed and used all buffers, but have
3510 * not restocked the Rx queue with fresh buffers */
3511 rxq->read = rxq->write = 0;
3512 rxq->free_count = 0;
3513 spin_unlock_irqrestore(&rxq->lock, flags);
3516 /* Convert linear signal-to-noise ratio into dB */
3517 static u8 ratio2dB[100] = {
3518 /* 0 1 2 3 4 5 6 7 8 9 */
3519 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3520 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3521 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3522 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3523 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3524 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3525 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3526 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3527 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3528 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3531 /* Calculates a relative dB value from a ratio of linear
3532 * (i.e. not dB) signal levels.
3533 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3534 int iwl3945_calc_db_from_ratio(int sig_ratio)
3536 /* 1000:1 or higher just report as 60 dB */
3537 if (sig_ratio >= 1000)
3538 return 60;
3540 /* 100:1 or higher, divide by 10 and use table,
3541 * add 20 dB to make up for divide by 10 */
3542 if (sig_ratio >= 100)
3543 return 20 + (int)ratio2dB[sig_ratio/10];
3545 /* We shouldn't see this */
3546 if (sig_ratio < 1)
3547 return 0;
3549 /* Use table for ratios 1:1 - 99:1 */
3550 return (int)ratio2dB[sig_ratio];
3553 #define PERFECT_RSSI (-20) /* dBm */
3554 #define WORST_RSSI (-95) /* dBm */
3555 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3557 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3558 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3559 * about formulas used below. */
3560 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3562 int sig_qual;
3563 int degradation = PERFECT_RSSI - rssi_dbm;
3565 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3566 * as indicator; formula is (signal dbm - noise dbm).
3567 * SNR at or above 40 is a great signal (100%).
3568 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3569 * Weakest usable signal is usually 10 - 15 dB SNR. */
3570 if (noise_dbm) {
3571 if (rssi_dbm - noise_dbm >= 40)
3572 return 100;
3573 else if (rssi_dbm < noise_dbm)
3574 return 0;
3575 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3577 /* Else use just the signal level.
3578 * This formula is a least squares fit of data points collected and
3579 * compared with a reference system that had a percentage (%) display
3580 * for signal quality. */
3581 } else
3582 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3583 (15 * RSSI_RANGE + 62 * degradation)) /
3584 (RSSI_RANGE * RSSI_RANGE);
3586 if (sig_qual > 100)
3587 sig_qual = 100;
3588 else if (sig_qual < 1)
3589 sig_qual = 0;
3591 return sig_qual;
3595 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3597 * Uses the priv->rx_handlers callback function array to invoke
3598 * the appropriate handlers, including command responses,
3599 * frame-received notifications, and other notifications.
3601 static void iwl3945_rx_handle(struct iwl_priv *priv)
3603 struct iwl_rx_mem_buffer *rxb;
3604 struct iwl_rx_packet *pkt;
3605 struct iwl_rx_queue *rxq = &priv->rxq;
3606 u32 r, i;
3607 int reclaim;
3608 unsigned long flags;
3609 u8 fill_rx = 0;
3610 u32 count = 8;
3612 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3613 * buffer that the driver may process (last buffer filled by ucode). */
3614 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
3615 i = rxq->read;
3617 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3618 fill_rx = 1;
3619 /* Rx interrupt, but nothing sent from uCode */
3620 if (i == r)
3621 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3623 while (i != r) {
3624 rxb = rxq->queue[i];
3626 /* If an RXB doesn't have a Rx queue slot associated with it,
3627 * then a bug has been introduced in the queue refilling
3628 * routines -- catch it here */
3629 BUG_ON(rxb == NULL);
3631 rxq->queue[i] = NULL;
3633 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
3634 IWL_RX_BUF_SIZE,
3635 PCI_DMA_FROMDEVICE);
3636 pkt = (struct iwl_rx_packet *)rxb->skb->data;
3638 /* Reclaim a command buffer only if this packet is a response
3639 * to a (driver-originated) command.
3640 * If the packet (e.g. Rx frame) originated from uCode,
3641 * there is no command buffer to reclaim.
3642 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3643 * but apparently a few don't get set; catch them here. */
3644 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3645 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3646 (pkt->hdr.cmd != REPLY_TX);
3648 /* Based on type of command response or notification,
3649 * handle those that need handling via function in
3650 * rx_handlers table. See iwl3945_setup_rx_handlers() */
3651 if (priv->rx_handlers[pkt->hdr.cmd]) {
3652 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3653 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3654 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3655 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3656 } else {
3657 /* No handling needed */
3658 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3659 "r %d i %d No handler needed for %s, 0x%02x\n",
3660 r, i, get_cmd_string(pkt->hdr.cmd),
3661 pkt->hdr.cmd);
3664 if (reclaim) {
3665 /* Invoke any callbacks, transfer the skb to caller, and
3666 * fire off the (possibly) blocking iwl3945_send_cmd()
3667 * as we reclaim the driver command queue */
3668 if (rxb && rxb->skb)
3669 iwl3945_tx_cmd_complete(priv, rxb);
3670 else
3671 IWL_WARN(priv, "Claim null rxb?\n");
3674 /* For now we just don't re-use anything. We can tweak this
3675 * later to try and re-use notification packets and SKBs that
3676 * fail to Rx correctly */
3677 if (rxb->skb != NULL) {
3678 priv->alloc_rxb_skb--;
3679 dev_kfree_skb_any(rxb->skb);
3680 rxb->skb = NULL;
3683 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
3684 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3685 spin_lock_irqsave(&rxq->lock, flags);
3686 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3687 spin_unlock_irqrestore(&rxq->lock, flags);
3688 i = (i + 1) & RX_QUEUE_MASK;
3689 /* If there are a lot of unused frames,
3690 * restock the Rx queue so ucode won't assert. */
3691 if (fill_rx) {
3692 count++;
3693 if (count >= 8) {
3694 priv->rxq.read = i;
3695 __iwl3945_rx_replenish(priv);
3696 count = 0;
3701 /* Backtrack one entry */
3702 priv->rxq.read = i;
3703 iwl3945_rx_queue_restock(priv);
3707 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
3709 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
3710 struct iwl_tx_queue *txq)
3712 u32 reg = 0;
3713 int rc = 0;
3714 int txq_id = txq->q.id;
3716 if (txq->need_update == 0)
3717 return rc;
3719 /* if we're trying to save power */
3720 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3721 /* wake up nic if it's powered down ...
3722 * uCode will wake up, and interrupt us again, so next
3723 * time we'll skip this part. */
3724 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3726 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3727 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3728 iwl_set_bit(priv, CSR_GP_CNTRL,
3729 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3730 return rc;
3733 /* restore this queue's parameters in nic hardware. */
3734 rc = iwl_grab_nic_access(priv);
3735 if (rc)
3736 return rc;
3737 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
3738 txq->q.write_ptr | (txq_id << 8));
3739 iwl_release_nic_access(priv);
3741 /* else not in power-save mode, uCode will never sleep when we're
3742 * trying to tx (during RFKILL, we're not trying to tx). */
3743 } else
3744 iwl_write32(priv, HBUS_TARG_WRPTR,
3745 txq->q.write_ptr | (txq_id << 8));
3747 txq->need_update = 0;
3749 return rc;
3752 #ifdef CONFIG_IWL3945_DEBUG
3753 static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
3754 struct iwl3945_rxon_cmd *rxon)
3756 IWL_DEBUG_RADIO("RX CONFIG:\n");
3757 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
3758 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3759 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3760 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3761 le32_to_cpu(rxon->filter_flags));
3762 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3763 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3764 rxon->ofdm_basic_rates);
3765 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
3766 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
3767 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
3768 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3770 #endif
3772 static void iwl3945_enable_interrupts(struct iwl_priv *priv)
3774 IWL_DEBUG_ISR("Enabling interrupts\n");
3775 set_bit(STATUS_INT_ENABLED, &priv->status);
3776 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
3780 /* call this function to flush any scheduled tasklet */
3781 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
3783 /* wait to make sure we flush pending tasklet*/
3784 synchronize_irq(priv->pci_dev->irq);
3785 tasklet_kill(&priv->irq_tasklet);
3789 static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
3791 clear_bit(STATUS_INT_ENABLED, &priv->status);
3793 /* disable interrupts from uCode/NIC to host */
3794 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
3796 /* acknowledge/clear/reset any interrupts still pending
3797 * from uCode or flow handler (Rx/Tx DMA) */
3798 iwl_write32(priv, CSR_INT, 0xffffffff);
3799 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
3800 IWL_DEBUG_ISR("Disabled interrupts\n");
3803 static const char *desc_lookup(int i)
3805 switch (i) {
3806 case 1:
3807 return "FAIL";
3808 case 2:
3809 return "BAD_PARAM";
3810 case 3:
3811 return "BAD_CHECKSUM";
3812 case 4:
3813 return "NMI_INTERRUPT";
3814 case 5:
3815 return "SYSASSERT";
3816 case 6:
3817 return "FATAL_ERROR";
3820 return "UNKNOWN";
3823 #define ERROR_START_OFFSET (1 * sizeof(u32))
3824 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
3826 static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
3828 u32 i;
3829 u32 desc, time, count, base, data1;
3830 u32 blink1, blink2, ilink1, ilink2;
3831 int rc;
3833 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
3835 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
3836 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
3837 return;
3840 rc = iwl_grab_nic_access(priv);
3841 if (rc) {
3842 IWL_WARN(priv, "Can not read from adapter at this time.\n");
3843 return;
3846 count = iwl_read_targ_mem(priv, base);
3848 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
3849 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
3850 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
3851 priv->status, count);
3854 IWL_ERR(priv, "Desc Time asrtPC blink2 "
3855 "ilink1 nmiPC Line\n");
3856 for (i = ERROR_START_OFFSET;
3857 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
3858 i += ERROR_ELEM_SIZE) {
3859 desc = iwl_read_targ_mem(priv, base + i);
3860 time =
3861 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
3862 blink1 =
3863 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
3864 blink2 =
3865 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
3866 ilink1 =
3867 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
3868 ilink2 =
3869 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
3870 data1 =
3871 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
3873 IWL_ERR(priv,
3874 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
3875 desc_lookup(desc), desc, time, blink1, blink2,
3876 ilink1, ilink2, data1);
3879 iwl_release_nic_access(priv);
3883 #define EVENT_START_OFFSET (6 * sizeof(u32))
3886 * iwl3945_print_event_log - Dump error event log to syslog
3888 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
3890 static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
3891 u32 num_events, u32 mode)
3893 u32 i;
3894 u32 base; /* SRAM byte address of event log header */
3895 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
3896 u32 ptr; /* SRAM byte address of log data */
3897 u32 ev, time, data; /* event log data */
3899 if (num_events == 0)
3900 return;
3902 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
3904 if (mode == 0)
3905 event_size = 2 * sizeof(u32);
3906 else
3907 event_size = 3 * sizeof(u32);
3909 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
3911 /* "time" is actually "data" for mode 0 (no timestamp).
3912 * place event id # at far right for easier visual parsing. */
3913 for (i = 0; i < num_events; i++) {
3914 ev = iwl_read_targ_mem(priv, ptr);
3915 ptr += sizeof(u32);
3916 time = iwl_read_targ_mem(priv, ptr);
3917 ptr += sizeof(u32);
3918 if (mode == 0) {
3919 /* data, ev */
3920 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
3921 } else {
3922 data = iwl_read_targ_mem(priv, ptr);
3923 ptr += sizeof(u32);
3924 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
3929 static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
3931 int rc;
3932 u32 base; /* SRAM byte address of event log header */
3933 u32 capacity; /* event log capacity in # entries */
3934 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
3935 u32 num_wraps; /* # times uCode wrapped to top of log */
3936 u32 next_entry; /* index of next entry to be written by uCode */
3937 u32 size; /* # entries that we'll print */
3939 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
3940 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
3941 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
3942 return;
3945 rc = iwl_grab_nic_access(priv);
3946 if (rc) {
3947 IWL_WARN(priv, "Can not read from adapter at this time.\n");
3948 return;
3951 /* event log header */
3952 capacity = iwl_read_targ_mem(priv, base);
3953 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
3954 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
3955 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
3957 size = num_wraps ? capacity : next_entry;
3959 /* bail out if nothing in log */
3960 if (size == 0) {
3961 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
3962 iwl_release_nic_access(priv);
3963 return;
3966 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
3967 size, num_wraps);
3969 /* if uCode has wrapped back to top of log, start at the oldest entry,
3970 * i.e the next one that uCode would fill. */
3971 if (num_wraps)
3972 iwl3945_print_event_log(priv, next_entry,
3973 capacity - next_entry, mode);
3975 /* (then/else) start at top of log */
3976 iwl3945_print_event_log(priv, 0, next_entry, mode);
3978 iwl_release_nic_access(priv);
3982 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
3984 static void iwl3945_irq_handle_error(struct iwl_priv *priv)
3986 /* Set the FW error flag -- cleared on iwl3945_down */
3987 set_bit(STATUS_FW_ERROR, &priv->status);
3989 /* Cancel currently queued command. */
3990 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3992 #ifdef CONFIG_IWL3945_DEBUG
3993 if (priv->debug_level & IWL_DL_FW_ERRORS) {
3994 iwl3945_dump_nic_error_log(priv);
3995 iwl3945_dump_nic_event_log(priv);
3996 iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
3998 #endif
4000 wake_up_interruptible(&priv->wait_command_queue);
4002 /* Keep the restart process from trying to send host
4003 * commands by clearing the INIT status bit */
4004 clear_bit(STATUS_READY, &priv->status);
4006 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4007 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4008 "Restarting adapter due to uCode error.\n");
4010 if (iwl3945_is_associated(priv)) {
4011 memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
4012 sizeof(priv->recovery39_rxon));
4013 priv->error_recovering = 1;
4015 queue_work(priv->workqueue, &priv->restart);
4019 static void iwl3945_error_recovery(struct iwl_priv *priv)
4021 unsigned long flags;
4023 memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
4024 sizeof(priv->staging39_rxon));
4025 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4026 iwl3945_commit_rxon(priv);
4028 iwl3945_add_station(priv, priv->bssid, 1, 0);
4030 spin_lock_irqsave(&priv->lock, flags);
4031 priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
4032 priv->error_recovering = 0;
4033 spin_unlock_irqrestore(&priv->lock, flags);
4036 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
4038 u32 inta, handled = 0;
4039 u32 inta_fh;
4040 unsigned long flags;
4041 #ifdef CONFIG_IWL3945_DEBUG
4042 u32 inta_mask;
4043 #endif
4045 spin_lock_irqsave(&priv->lock, flags);
4047 /* Ack/clear/reset pending uCode interrupts.
4048 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4049 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4050 inta = iwl_read32(priv, CSR_INT);
4051 iwl_write32(priv, CSR_INT, inta);
4053 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4054 * Any new interrupts that happen after this, either while we're
4055 * in this tasklet, or later, will show up in next ISR/tasklet. */
4056 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4057 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4059 #ifdef CONFIG_IWL3945_DEBUG
4060 if (priv->debug_level & IWL_DL_ISR) {
4061 /* just for debug */
4062 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4063 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4064 inta, inta_mask, inta_fh);
4066 #endif
4068 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4069 * atomic, make sure that inta covers all the interrupts that
4070 * we've discovered, even if FH interrupt came in just after
4071 * reading CSR_INT. */
4072 if (inta_fh & CSR39_FH_INT_RX_MASK)
4073 inta |= CSR_INT_BIT_FH_RX;
4074 if (inta_fh & CSR39_FH_INT_TX_MASK)
4075 inta |= CSR_INT_BIT_FH_TX;
4077 /* Now service all interrupt bits discovered above. */
4078 if (inta & CSR_INT_BIT_HW_ERR) {
4079 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
4081 /* Tell the device to stop sending interrupts */
4082 iwl3945_disable_interrupts(priv);
4084 iwl3945_irq_handle_error(priv);
4086 handled |= CSR_INT_BIT_HW_ERR;
4088 spin_unlock_irqrestore(&priv->lock, flags);
4090 return;
4093 #ifdef CONFIG_IWL3945_DEBUG
4094 if (priv->debug_level & (IWL_DL_ISR)) {
4095 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4096 if (inta & CSR_INT_BIT_SCD)
4097 IWL_DEBUG_ISR("Scheduler finished to transmit "
4098 "the frame/frames.\n");
4100 /* Alive notification via Rx interrupt will do the real work */
4101 if (inta & CSR_INT_BIT_ALIVE)
4102 IWL_DEBUG_ISR("Alive interrupt\n");
4104 #endif
4105 /* Safely ignore these bits for debug checks below */
4106 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4108 /* Error detected by uCode */
4109 if (inta & CSR_INT_BIT_SW_ERR) {
4110 IWL_ERR(priv, "Microcode SW error detected. "
4111 "Restarting 0x%X.\n", inta);
4112 iwl3945_irq_handle_error(priv);
4113 handled |= CSR_INT_BIT_SW_ERR;
4116 /* uCode wakes up after power-down sleep */
4117 if (inta & CSR_INT_BIT_WAKEUP) {
4118 IWL_DEBUG_ISR("Wakeup interrupt\n");
4119 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4120 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4121 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4122 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4123 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4124 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4125 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
4127 handled |= CSR_INT_BIT_WAKEUP;
4130 /* All uCode command responses, including Tx command responses,
4131 * Rx "responses" (frame-received notification), and other
4132 * notifications from uCode come through here*/
4133 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4134 iwl3945_rx_handle(priv);
4135 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4138 if (inta & CSR_INT_BIT_FH_TX) {
4139 IWL_DEBUG_ISR("Tx interrupt\n");
4141 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4142 if (!iwl_grab_nic_access(priv)) {
4143 iwl_write_direct32(priv, FH39_TCSR_CREDIT
4144 (FH39_SRVC_CHNL), 0x0);
4145 iwl_release_nic_access(priv);
4147 handled |= CSR_INT_BIT_FH_TX;
4150 if (inta & ~handled)
4151 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
4153 if (inta & ~CSR_INI_SET_MASK) {
4154 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
4155 inta & ~CSR_INI_SET_MASK);
4156 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
4159 /* Re-enable all interrupts */
4160 /* only Re-enable if disabled by irq */
4161 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4162 iwl3945_enable_interrupts(priv);
4164 #ifdef CONFIG_IWL3945_DEBUG
4165 if (priv->debug_level & (IWL_DL_ISR)) {
4166 inta = iwl_read32(priv, CSR_INT);
4167 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4168 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4169 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4170 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4172 #endif
4173 spin_unlock_irqrestore(&priv->lock, flags);
4176 static irqreturn_t iwl3945_isr(int irq, void *data)
4178 struct iwl_priv *priv = data;
4179 u32 inta, inta_mask;
4180 u32 inta_fh;
4181 if (!priv)
4182 return IRQ_NONE;
4184 spin_lock(&priv->lock);
4186 /* Disable (but don't clear!) interrupts here to avoid
4187 * back-to-back ISRs and sporadic interrupts from our NIC.
4188 * If we have something to service, the tasklet will re-enable ints.
4189 * If we *don't* have something, we'll re-enable before leaving here. */
4190 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
4191 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
4193 /* Discover which interrupts are active/pending */
4194 inta = iwl_read32(priv, CSR_INT);
4195 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4197 /* Ignore interrupt if there's nothing in NIC to service.
4198 * This may be due to IRQ shared with another device,
4199 * or due to sporadic interrupts thrown from our NIC. */
4200 if (!inta && !inta_fh) {
4201 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4202 goto none;
4205 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4206 /* Hardware disappeared */
4207 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
4208 goto unplugged;
4211 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4212 inta, inta_mask, inta_fh);
4214 inta &= ~CSR_INT_BIT_SCD;
4216 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4217 if (likely(inta || inta_fh))
4218 tasklet_schedule(&priv->irq_tasklet);
4219 unplugged:
4220 spin_unlock(&priv->lock);
4222 return IRQ_HANDLED;
4224 none:
4225 /* re-enable interrupts here since we don't have anything to service. */
4226 /* only Re-enable if disabled by irq */
4227 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4228 iwl3945_enable_interrupts(priv);
4229 spin_unlock(&priv->lock);
4230 return IRQ_NONE;
4233 /************************** EEPROM BANDS ****************************
4235 * The iwl3945_eeprom_band definitions below provide the mapping from the
4236 * EEPROM contents to the specific channel number supported for each
4237 * band.
4239 * For example, iwl3945_priv->eeprom39.band_3_channels[4] from the band_3
4240 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4241 * The specific geography and calibration information for that channel
4242 * is contained in the eeprom map itself.
4244 * During init, we copy the eeprom information and channel map
4245 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4247 * channel_map_24/52 provides the index in the channel_info array for a
4248 * given channel. We have to have two separate maps as there is channel
4249 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4250 * band_2
4252 * A value of 0xff stored in the channel_map indicates that the channel
4253 * is not supported by the hardware at all.
4255 * A value of 0xfe in the channel_map indicates that the channel is not
4256 * valid for Tx with the current hardware. This means that
4257 * while the system can tune and receive on a given channel, it may not
4258 * be able to associate or transmit any frames on that
4259 * channel. There is no corresponding channel information for that
4260 * entry.
4262 *********************************************************************/
4264 /* 2.4 GHz */
4265 static const u8 iwl3945_eeprom_band_1[14] = {
4266 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4269 /* 5.2 GHz bands */
4270 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4271 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4274 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4275 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4278 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4279 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4282 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4283 145, 149, 153, 157, 161, 165
4286 static void iwl3945_init_band_reference(const struct iwl_priv *priv, int band,
4287 int *eeprom_ch_count,
4288 const struct iwl_eeprom_channel
4289 **eeprom_ch_info,
4290 const u8 **eeprom_ch_index)
4292 switch (band) {
4293 case 1: /* 2.4GHz band */
4294 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4295 *eeprom_ch_info = priv->eeprom39.band_1_channels;
4296 *eeprom_ch_index = iwl3945_eeprom_band_1;
4297 break;
4298 case 2: /* 4.9GHz band */
4299 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4300 *eeprom_ch_info = priv->eeprom39.band_2_channels;
4301 *eeprom_ch_index = iwl3945_eeprom_band_2;
4302 break;
4303 case 3: /* 5.2GHz band */
4304 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4305 *eeprom_ch_info = priv->eeprom39.band_3_channels;
4306 *eeprom_ch_index = iwl3945_eeprom_band_3;
4307 break;
4308 case 4: /* 5.5GHz band */
4309 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4310 *eeprom_ch_info = priv->eeprom39.band_4_channels;
4311 *eeprom_ch_index = iwl3945_eeprom_band_4;
4312 break;
4313 case 5: /* 5.7GHz band */
4314 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4315 *eeprom_ch_info = priv->eeprom39.band_5_channels;
4316 *eeprom_ch_index = iwl3945_eeprom_band_5;
4317 break;
4318 default:
4319 BUG();
4320 return;
4325 * iwl3945_get_channel_info - Find driver's private channel info
4327 * Based on band and channel number.
4329 const struct iwl_channel_info *
4330 iwl3945_get_channel_info(const struct iwl_priv *priv,
4331 enum ieee80211_band band, u16 channel)
4333 int i;
4335 switch (band) {
4336 case IEEE80211_BAND_5GHZ:
4337 for (i = 14; i < priv->channel_count; i++) {
4338 if (priv->channel_info[i].channel == channel)
4339 return &priv->channel_info[i];
4341 break;
4343 case IEEE80211_BAND_2GHZ:
4344 if (channel >= 1 && channel <= 14)
4345 return &priv->channel_info[channel - 1];
4346 break;
4347 case IEEE80211_NUM_BANDS:
4348 WARN_ON(1);
4351 return NULL;
4354 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4355 ? # x " " : "")
4358 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4360 static int iwl3945_init_channel_map(struct iwl_priv *priv)
4362 int eeprom_ch_count = 0;
4363 const u8 *eeprom_ch_index = NULL;
4364 const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
4365 int band, ch;
4366 struct iwl_channel_info *ch_info;
4368 if (priv->channel_count) {
4369 IWL_DEBUG_INFO("Channel map already initialized.\n");
4370 return 0;
4373 if (priv->eeprom39.version < 0x2f) {
4374 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
4375 priv->eeprom39.version);
4376 return -EINVAL;
4379 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4381 priv->channel_count =
4382 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4383 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4384 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4385 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4386 ARRAY_SIZE(iwl3945_eeprom_band_5);
4388 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4390 priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
4391 priv->channel_count, GFP_KERNEL);
4392 if (!priv->channel_info) {
4393 IWL_ERR(priv, "Could not allocate channel_info\n");
4394 priv->channel_count = 0;
4395 return -ENOMEM;
4398 ch_info = priv->channel_info;
4400 /* Loop through the 5 EEPROM bands adding them in order to the
4401 * channel map we maintain (that contains additional information than
4402 * what just in the EEPROM) */
4403 for (band = 1; band <= 5; band++) {
4405 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4406 &eeprom_ch_info, &eeprom_ch_index);
4408 /* Loop through each band adding each of the channels */
4409 for (ch = 0; ch < eeprom_ch_count; ch++) {
4410 ch_info->channel = eeprom_ch_index[ch];
4411 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4412 IEEE80211_BAND_5GHZ;
4414 /* permanently store EEPROM's channel regulatory flags
4415 * and max power in channel info database. */
4416 ch_info->eeprom = eeprom_ch_info[ch];
4418 /* Copy the run-time flags so they are there even on
4419 * invalid channels */
4420 ch_info->flags = eeprom_ch_info[ch].flags;
4422 if (!(is_channel_valid(ch_info))) {
4423 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4424 "No traffic\n",
4425 ch_info->channel,
4426 ch_info->flags,
4427 is_channel_a_band(ch_info) ?
4428 "5.2" : "2.4");
4429 ch_info++;
4430 continue;
4433 /* Initialize regulatory-based run-time data */
4434 ch_info->max_power_avg = ch_info->curr_txpow =
4435 eeprom_ch_info[ch].max_power_avg;
4436 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4437 ch_info->min_power = 0;
4439 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
4440 " %ddBm): Ad-Hoc %ssupported\n",
4441 ch_info->channel,
4442 is_channel_a_band(ch_info) ?
4443 "5.2" : "2.4",
4444 CHECK_AND_PRINT(VALID),
4445 CHECK_AND_PRINT(IBSS),
4446 CHECK_AND_PRINT(ACTIVE),
4447 CHECK_AND_PRINT(RADAR),
4448 CHECK_AND_PRINT(WIDE),
4449 CHECK_AND_PRINT(DFS),
4450 eeprom_ch_info[ch].flags,
4451 eeprom_ch_info[ch].max_power_avg,
4452 ((eeprom_ch_info[ch].
4453 flags & EEPROM_CHANNEL_IBSS)
4454 && !(eeprom_ch_info[ch].
4455 flags & EEPROM_CHANNEL_RADAR))
4456 ? "" : "not ");
4458 /* Set the user_txpower_limit to the highest power
4459 * supported by any channel */
4460 if (eeprom_ch_info[ch].max_power_avg >
4461 priv->user_txpower_limit)
4462 priv->user_txpower_limit =
4463 eeprom_ch_info[ch].max_power_avg;
4465 ch_info++;
4469 /* Set up txpower settings in driver for all channels */
4470 if (iwl3945_txpower_set_from_eeprom(priv))
4471 return -EIO;
4473 return 0;
4477 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4479 static void iwl3945_free_channel_map(struct iwl_priv *priv)
4481 kfree(priv->channel_info);
4482 priv->channel_count = 0;
4485 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4486 * sending probe req. This should be set long enough to hear probe responses
4487 * from more than one AP. */
4488 #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
4489 #define IWL_ACTIVE_DWELL_TIME_52 (20)
4491 #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
4492 #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
4494 /* For faster active scanning, scan will move to the next channel if fewer than
4495 * PLCP_QUIET_THRESH packets are heard on this channel within
4496 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4497 * time if it's a quiet channel (nothing responded to our probe, and there's
4498 * no other traffic).
4499 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4500 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4501 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
4503 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4504 * Must be set longer than active dwell time.
4505 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4506 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4507 #define IWL_PASSIVE_DWELL_TIME_52 (10)
4508 #define IWL_PASSIVE_DWELL_BASE (100)
4509 #define IWL_CHANNEL_TUNE_TIME 5
4511 #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
4513 static inline u16 iwl3945_get_active_dwell_time(struct iwl_priv *priv,
4514 enum ieee80211_band band,
4515 u8 n_probes)
4517 if (band == IEEE80211_BAND_5GHZ)
4518 return IWL_ACTIVE_DWELL_TIME_52 +
4519 IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
4520 else
4521 return IWL_ACTIVE_DWELL_TIME_24 +
4522 IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
4525 static u16 iwl3945_get_passive_dwell_time(struct iwl_priv *priv,
4526 enum ieee80211_band band)
4528 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4529 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4530 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4532 if (iwl3945_is_associated(priv)) {
4533 /* If we're associated, we clamp the maximum passive
4534 * dwell time to be 98% of the beacon interval (minus
4535 * 2 * channel tune time) */
4536 passive = priv->beacon_int;
4537 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4538 passive = IWL_PASSIVE_DWELL_BASE;
4539 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4542 return passive;
4545 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
4546 enum ieee80211_band band,
4547 u8 is_active, u8 n_probes,
4548 struct iwl3945_scan_channel *scan_ch)
4550 const struct ieee80211_channel *channels = NULL;
4551 const struct ieee80211_supported_band *sband;
4552 const struct iwl_channel_info *ch_info;
4553 u16 passive_dwell = 0;
4554 u16 active_dwell = 0;
4555 int added, i;
4557 sband = iwl_get_hw_mode(priv, band);
4558 if (!sband)
4559 return 0;
4561 channels = sband->channels;
4563 active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
4564 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4566 if (passive_dwell <= active_dwell)
4567 passive_dwell = active_dwell + 1;
4569 for (i = 0, added = 0; i < sband->n_channels; i++) {
4570 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4571 continue;
4573 scan_ch->channel = channels[i].hw_value;
4575 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4576 if (!is_channel_valid(ch_info)) {
4577 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
4578 scan_ch->channel);
4579 continue;
4582 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4583 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4584 /* If passive , set up for auto-switch
4585 * and use long active_dwell time.
4587 if (!is_active || is_channel_passive(ch_info) ||
4588 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
4589 scan_ch->type = 0; /* passive */
4590 if (IWL_UCODE_API(priv->ucode_ver) == 1)
4591 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
4592 } else {
4593 scan_ch->type = 1; /* active */
4596 /* Set direct probe bits. These may be used both for active
4597 * scan channels (probes gets sent right away),
4598 * or for passive channels (probes get se sent only after
4599 * hearing clear Rx packet).*/
4600 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
4601 if (n_probes)
4602 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4603 } else {
4604 /* uCode v1 does not allow setting direct probe bits on
4605 * passive channel. */
4606 if ((scan_ch->type & 1) && n_probes)
4607 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4610 /* Set txpower levels to defaults */
4611 scan_ch->tpc.dsp_atten = 110;
4612 /* scan_pwr_info->tpc.dsp_atten; */
4614 /*scan_pwr_info->tpc.tx_gain; */
4615 if (band == IEEE80211_BAND_5GHZ)
4616 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4617 else {
4618 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4619 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
4620 * power level:
4621 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
4625 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4626 scan_ch->channel,
4627 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4628 (scan_ch->type & 1) ?
4629 active_dwell : passive_dwell);
4631 scan_ch++;
4632 added++;
4635 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4636 return added;
4639 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
4640 struct ieee80211_rate *rates)
4642 int i;
4644 for (i = 0; i < IWL_RATE_COUNT; i++) {
4645 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
4646 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4647 rates[i].hw_value_short = i;
4648 rates[i].flags = 0;
4649 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
4651 * If CCK != 1M then set short preamble rate flag.
4653 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
4654 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4660 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
4662 static int iwl3945_init_geos(struct iwl_priv *priv)
4664 struct iwl_channel_info *ch;
4665 struct ieee80211_supported_band *sband;
4666 struct ieee80211_channel *channels;
4667 struct ieee80211_channel *geo_ch;
4668 struct ieee80211_rate *rates;
4669 int i = 0;
4671 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4672 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
4673 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4674 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4675 return 0;
4678 channels = kzalloc(sizeof(struct ieee80211_channel) *
4679 priv->channel_count, GFP_KERNEL);
4680 if (!channels)
4681 return -ENOMEM;
4683 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
4684 GFP_KERNEL);
4685 if (!rates) {
4686 kfree(channels);
4687 return -ENOMEM;
4690 /* 5.2GHz channels start after the 2.4GHz channels */
4691 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4692 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
4693 /* just OFDM */
4694 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4695 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
4697 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4698 sband->channels = channels;
4699 /* OFDM & CCK */
4700 sband->bitrates = rates;
4701 sband->n_bitrates = IWL_RATE_COUNT;
4703 priv->ieee_channels = channels;
4704 priv->ieee_rates = rates;
4706 iwl3945_init_hw_rates(priv, rates);
4708 for (i = 0; i < priv->channel_count; i++) {
4709 ch = &priv->channel_info[i];
4711 /* FIXME: might be removed if scan is OK*/
4712 if (!is_channel_valid(ch))
4713 continue;
4715 if (is_channel_a_band(ch))
4716 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4717 else
4718 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4720 geo_ch = &sband->channels[sband->n_channels++];
4722 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
4723 geo_ch->max_power = ch->max_power_avg;
4724 geo_ch->max_antenna_gain = 0xff;
4725 geo_ch->hw_value = ch->channel;
4727 if (is_channel_valid(ch)) {
4728 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4729 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
4731 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4732 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
4734 if (ch->flags & EEPROM_CHANNEL_RADAR)
4735 geo_ch->flags |= IEEE80211_CHAN_RADAR;
4737 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4738 priv->max_channel_txpower_limit =
4739 ch->max_power_avg;
4740 } else {
4741 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
4744 /* Save flags for reg domain usage */
4745 geo_ch->orig_flags = geo_ch->flags;
4747 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4748 ch->channel, geo_ch->center_freq,
4749 is_channel_a_band(ch) ? "5.2" : "2.4",
4750 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4751 "restricted" : "valid",
4752 geo_ch->flags);
4755 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4756 priv->cfg->sku & IWL_SKU_A) {
4757 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
4758 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
4759 priv->pci_dev->device, priv->pci_dev->subsystem_device);
4760 priv->cfg->sku &= ~IWL_SKU_A;
4763 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
4764 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4765 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
4767 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4768 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4769 &priv->bands[IEEE80211_BAND_2GHZ];
4770 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4771 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4772 &priv->bands[IEEE80211_BAND_5GHZ];
4774 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4776 return 0;
4780 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
4782 static void iwl3945_free_geos(struct iwl_priv *priv)
4784 kfree(priv->ieee_channels);
4785 kfree(priv->ieee_rates);
4786 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
4789 /******************************************************************************
4791 * uCode download functions
4793 ******************************************************************************/
4795 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
4797 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4798 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4799 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4800 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
4801 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4802 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
4806 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
4807 * looking at all data.
4809 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
4811 u32 val;
4812 u32 save_len = len;
4813 int rc = 0;
4814 u32 errcnt;
4816 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4818 rc = iwl_grab_nic_access(priv);
4819 if (rc)
4820 return rc;
4822 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4823 IWL39_RTC_INST_LOWER_BOUND);
4825 errcnt = 0;
4826 for (; len > 0; len -= sizeof(u32), image++) {
4827 /* read data comes through single port, auto-incr addr */
4828 /* NOTE: Use the debugless read so we don't flood kernel log
4829 * if IWL_DL_IO is set */
4830 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4831 if (val != le32_to_cpu(*image)) {
4832 IWL_ERR(priv, "uCode INST section is invalid at "
4833 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4834 save_len - len, val, le32_to_cpu(*image));
4835 rc = -EIO;
4836 errcnt++;
4837 if (errcnt >= 20)
4838 break;
4842 iwl_release_nic_access(priv);
4844 if (!errcnt)
4845 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
4847 return rc;
4852 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
4853 * using sample data 100 bytes apart. If these sample points are good,
4854 * it's a pretty good bet that everything between them is good, too.
4856 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
4858 u32 val;
4859 int rc = 0;
4860 u32 errcnt = 0;
4861 u32 i;
4863 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4865 rc = iwl_grab_nic_access(priv);
4866 if (rc)
4867 return rc;
4869 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
4870 /* read data comes through single port, auto-incr addr */
4871 /* NOTE: Use the debugless read so we don't flood kernel log
4872 * if IWL_DL_IO is set */
4873 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4874 i + IWL39_RTC_INST_LOWER_BOUND);
4875 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4876 if (val != le32_to_cpu(*image)) {
4877 #if 0 /* Enable this if you want to see details */
4878 IWL_ERR(priv, "uCode INST section is invalid at "
4879 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4880 i, val, *image);
4881 #endif
4882 rc = -EIO;
4883 errcnt++;
4884 if (errcnt >= 3)
4885 break;
4889 iwl_release_nic_access(priv);
4891 return rc;
4896 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
4897 * and verify its contents
4899 static int iwl3945_verify_ucode(struct iwl_priv *priv)
4901 __le32 *image;
4902 u32 len;
4903 int rc = 0;
4905 /* Try bootstrap */
4906 image = (__le32 *)priv->ucode_boot.v_addr;
4907 len = priv->ucode_boot.len;
4908 rc = iwl3945_verify_inst_sparse(priv, image, len);
4909 if (rc == 0) {
4910 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
4911 return 0;
4914 /* Try initialize */
4915 image = (__le32 *)priv->ucode_init.v_addr;
4916 len = priv->ucode_init.len;
4917 rc = iwl3945_verify_inst_sparse(priv, image, len);
4918 if (rc == 0) {
4919 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
4920 return 0;
4923 /* Try runtime/protocol */
4924 image = (__le32 *)priv->ucode_code.v_addr;
4925 len = priv->ucode_code.len;
4926 rc = iwl3945_verify_inst_sparse(priv, image, len);
4927 if (rc == 0) {
4928 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
4929 return 0;
4932 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
4934 /* Since nothing seems to match, show first several data entries in
4935 * instruction SRAM, so maybe visual inspection will give a clue.
4936 * Selection of bootstrap image (vs. other images) is arbitrary. */
4937 image = (__le32 *)priv->ucode_boot.v_addr;
4938 len = priv->ucode_boot.len;
4939 rc = iwl3945_verify_inst_full(priv, image, len);
4941 return rc;
4944 static void iwl3945_nic_start(struct iwl_priv *priv)
4946 /* Remove all resets to allow NIC to operate */
4947 iwl_write32(priv, CSR_RESET, 0);
4951 * iwl3945_read_ucode - Read uCode images from disk file.
4953 * Copy into buffers for card to fetch via bus-mastering
4955 static int iwl3945_read_ucode(struct iwl_priv *priv)
4957 struct iwl_ucode *ucode;
4958 int ret = -EINVAL, index;
4959 const struct firmware *ucode_raw;
4960 /* firmware file name contains uCode/driver compatibility version */
4961 const char *name_pre = priv->cfg->fw_name_pre;
4962 const unsigned int api_max = priv->cfg->ucode_api_max;
4963 const unsigned int api_min = priv->cfg->ucode_api_min;
4964 char buf[25];
4965 u8 *src;
4966 size_t len;
4967 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
4969 /* Ask kernel firmware_class module to get the boot firmware off disk.
4970 * request_firmware() is synchronous, file is in memory on return. */
4971 for (index = api_max; index >= api_min; index--) {
4972 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
4973 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
4974 if (ret < 0) {
4975 IWL_ERR(priv, "%s firmware file req failed: %d\n",
4976 buf, ret);
4977 if (ret == -ENOENT)
4978 continue;
4979 else
4980 goto error;
4981 } else {
4982 if (index < api_max)
4983 IWL_ERR(priv, "Loaded firmware %s, "
4984 "which is deprecated. "
4985 " Please use API v%u instead.\n",
4986 buf, api_max);
4987 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
4988 buf, ucode_raw->size);
4989 break;
4993 if (ret < 0)
4994 goto error;
4996 /* Make sure that we got at least our header! */
4997 if (ucode_raw->size < sizeof(*ucode)) {
4998 IWL_ERR(priv, "File size way too small!\n");
4999 ret = -EINVAL;
5000 goto err_release;
5003 /* Data from ucode file: header followed by uCode images */
5004 ucode = (void *)ucode_raw->data;
5006 priv->ucode_ver = le32_to_cpu(ucode->ver);
5007 api_ver = IWL_UCODE_API(priv->ucode_ver);
5008 inst_size = le32_to_cpu(ucode->inst_size);
5009 data_size = le32_to_cpu(ucode->data_size);
5010 init_size = le32_to_cpu(ucode->init_size);
5011 init_data_size = le32_to_cpu(ucode->init_data_size);
5012 boot_size = le32_to_cpu(ucode->boot_size);
5014 /* api_ver should match the api version forming part of the
5015 * firmware filename ... but we don't check for that and only rely
5016 * on the API version read from firware header from here on forward */
5018 if (api_ver < api_min || api_ver > api_max) {
5019 IWL_ERR(priv, "Driver unable to support your firmware API. "
5020 "Driver supports v%u, firmware is v%u.\n",
5021 api_max, api_ver);
5022 priv->ucode_ver = 0;
5023 ret = -EINVAL;
5024 goto err_release;
5026 if (api_ver != api_max)
5027 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
5028 "got %u. New firmware can be obtained "
5029 "from http://www.intellinuxwireless.org.\n",
5030 api_max, api_ver);
5032 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
5033 IWL_UCODE_MAJOR(priv->ucode_ver),
5034 IWL_UCODE_MINOR(priv->ucode_ver),
5035 IWL_UCODE_API(priv->ucode_ver),
5036 IWL_UCODE_SERIAL(priv->ucode_ver));
5038 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
5039 priv->ucode_ver);
5040 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5041 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5042 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5043 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5044 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5047 /* Verify size of file vs. image size info in file's header */
5048 if (ucode_raw->size < sizeof(*ucode) +
5049 inst_size + data_size + init_size +
5050 init_data_size + boot_size) {
5052 IWL_DEBUG_INFO("uCode file size %d too small\n",
5053 (int)ucode_raw->size);
5054 ret = -EINVAL;
5055 goto err_release;
5058 /* Verify that uCode images will fit in card's SRAM */
5059 if (inst_size > IWL39_MAX_INST_SIZE) {
5060 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5061 inst_size);
5062 ret = -EINVAL;
5063 goto err_release;
5066 if (data_size > IWL39_MAX_DATA_SIZE) {
5067 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5068 data_size);
5069 ret = -EINVAL;
5070 goto err_release;
5072 if (init_size > IWL39_MAX_INST_SIZE) {
5073 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5074 init_size);
5075 ret = -EINVAL;
5076 goto err_release;
5078 if (init_data_size > IWL39_MAX_DATA_SIZE) {
5079 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5080 init_data_size);
5081 ret = -EINVAL;
5082 goto err_release;
5084 if (boot_size > IWL39_MAX_BSM_SIZE) {
5085 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5086 boot_size);
5087 ret = -EINVAL;
5088 goto err_release;
5091 /* Allocate ucode buffers for card's bus-master loading ... */
5093 /* Runtime instructions and 2 copies of data:
5094 * 1) unmodified from disk
5095 * 2) backup cache for save/restore during power-downs */
5096 priv->ucode_code.len = inst_size;
5097 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5099 priv->ucode_data.len = data_size;
5100 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5102 priv->ucode_data_backup.len = data_size;
5103 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5105 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5106 !priv->ucode_data_backup.v_addr)
5107 goto err_pci_alloc;
5109 /* Initialization instructions and data */
5110 if (init_size && init_data_size) {
5111 priv->ucode_init.len = init_size;
5112 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5114 priv->ucode_init_data.len = init_data_size;
5115 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5117 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5118 goto err_pci_alloc;
5121 /* Bootstrap (instructions only, no data) */
5122 if (boot_size) {
5123 priv->ucode_boot.len = boot_size;
5124 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5126 if (!priv->ucode_boot.v_addr)
5127 goto err_pci_alloc;
5130 /* Copy images into buffers for card's bus-master reads ... */
5132 /* Runtime instructions (first block of data in file) */
5133 src = &ucode->data[0];
5134 len = priv->ucode_code.len;
5135 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5136 memcpy(priv->ucode_code.v_addr, src, len);
5137 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5138 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5140 /* Runtime data (2nd block)
5141 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5142 src = &ucode->data[inst_size];
5143 len = priv->ucode_data.len;
5144 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5145 memcpy(priv->ucode_data.v_addr, src, len);
5146 memcpy(priv->ucode_data_backup.v_addr, src, len);
5148 /* Initialization instructions (3rd block) */
5149 if (init_size) {
5150 src = &ucode->data[inst_size + data_size];
5151 len = priv->ucode_init.len;
5152 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5153 len);
5154 memcpy(priv->ucode_init.v_addr, src, len);
5157 /* Initialization data (4th block) */
5158 if (init_data_size) {
5159 src = &ucode->data[inst_size + data_size + init_size];
5160 len = priv->ucode_init_data.len;
5161 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5162 (int)len);
5163 memcpy(priv->ucode_init_data.v_addr, src, len);
5166 /* Bootstrap instructions (5th block) */
5167 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5168 len = priv->ucode_boot.len;
5169 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5170 (int)len);
5171 memcpy(priv->ucode_boot.v_addr, src, len);
5173 /* We have our copies now, allow OS release its copies */
5174 release_firmware(ucode_raw);
5175 return 0;
5177 err_pci_alloc:
5178 IWL_ERR(priv, "failed to allocate pci memory\n");
5179 ret = -ENOMEM;
5180 iwl3945_dealloc_ucode_pci(priv);
5182 err_release:
5183 release_firmware(ucode_raw);
5185 error:
5186 return ret;
5191 * iwl3945_set_ucode_ptrs - Set uCode address location
5193 * Tell initialization uCode where to find runtime uCode.
5195 * BSM registers initially contain pointers to initialization uCode.
5196 * We need to replace them to load runtime uCode inst and data,
5197 * and to save runtime data when powering down.
5199 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
5201 dma_addr_t pinst;
5202 dma_addr_t pdata;
5203 int rc = 0;
5204 unsigned long flags;
5206 /* bits 31:0 for 3945 */
5207 pinst = priv->ucode_code.p_addr;
5208 pdata = priv->ucode_data_backup.p_addr;
5210 spin_lock_irqsave(&priv->lock, flags);
5211 rc = iwl_grab_nic_access(priv);
5212 if (rc) {
5213 spin_unlock_irqrestore(&priv->lock, flags);
5214 return rc;
5217 /* Tell bootstrap uCode where to find image to load */
5218 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5219 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5220 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5221 priv->ucode_data.len);
5223 /* Inst byte count must be last to set up, bit 31 signals uCode
5224 * that all new ptr/size info is in place */
5225 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5226 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5228 iwl_release_nic_access(priv);
5230 spin_unlock_irqrestore(&priv->lock, flags);
5232 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5234 return rc;
5238 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
5240 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5242 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5244 static void iwl3945_init_alive_start(struct iwl_priv *priv)
5246 /* Check alive response for "valid" sign from uCode */
5247 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5248 /* We had an error bringing up the hardware, so take it
5249 * all the way back down so we can try again */
5250 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5251 goto restart;
5254 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5255 * This is a paranoid check, because we would not have gotten the
5256 * "initialize" alive if code weren't properly loaded. */
5257 if (iwl3945_verify_ucode(priv)) {
5258 /* Runtime instruction load was bad;
5259 * take it all the way back down so we can try again */
5260 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5261 goto restart;
5264 /* Send pointers to protocol/runtime uCode image ... init code will
5265 * load and launch runtime uCode, which will send us another "Alive"
5266 * notification. */
5267 IWL_DEBUG_INFO("Initialization Alive received.\n");
5268 if (iwl3945_set_ucode_ptrs(priv)) {
5269 /* Runtime instruction load won't happen;
5270 * take it all the way back down so we can try again */
5271 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5272 goto restart;
5274 return;
5276 restart:
5277 queue_work(priv->workqueue, &priv->restart);
5281 /* temporary */
5282 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
5283 struct sk_buff *skb);
5286 * iwl3945_alive_start - called after REPLY_ALIVE notification received
5287 * from protocol/runtime uCode (initialization uCode's
5288 * Alive gets handled by iwl3945_init_alive_start()).
5290 static void iwl3945_alive_start(struct iwl_priv *priv)
5292 int rc = 0;
5293 int thermal_spin = 0;
5294 u32 rfkill;
5296 IWL_DEBUG_INFO("Runtime Alive received.\n");
5298 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5299 /* We had an error bringing up the hardware, so take it
5300 * all the way back down so we can try again */
5301 IWL_DEBUG_INFO("Alive failed.\n");
5302 goto restart;
5305 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5306 * This is a paranoid check, because we would not have gotten the
5307 * "runtime" alive if code weren't properly loaded. */
5308 if (iwl3945_verify_ucode(priv)) {
5309 /* Runtime instruction load was bad;
5310 * take it all the way back down so we can try again */
5311 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5312 goto restart;
5315 iwl3945_clear_stations_table(priv);
5317 rc = iwl_grab_nic_access(priv);
5318 if (rc) {
5319 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
5320 return;
5323 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
5324 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5325 iwl_release_nic_access(priv);
5327 if (rfkill & 0x1) {
5328 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5329 /* if RFKILL is not on, then wait for thermal
5330 * sensor in adapter to kick in */
5331 while (iwl3945_hw_get_temperature(priv) == 0) {
5332 thermal_spin++;
5333 udelay(10);
5336 if (thermal_spin)
5337 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5338 thermal_spin * 10);
5339 } else
5340 set_bit(STATUS_RF_KILL_HW, &priv->status);
5342 /* After the ALIVE response, we can send commands to 3945 uCode */
5343 set_bit(STATUS_ALIVE, &priv->status);
5345 /* Clear out the uCode error bit if it is set */
5346 clear_bit(STATUS_FW_ERROR, &priv->status);
5348 if (iwl_is_rfkill(priv))
5349 return;
5351 ieee80211_wake_queues(priv->hw);
5353 priv->active_rate = priv->rates_mask;
5354 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5356 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5358 if (iwl3945_is_associated(priv)) {
5359 struct iwl3945_rxon_cmd *active_rxon =
5360 (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
5362 memcpy(&priv->staging39_rxon, &priv->active39_rxon,
5363 sizeof(priv->staging39_rxon));
5364 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5365 } else {
5366 /* Initialize our rx_config data */
5367 iwl3945_connection_init_rx_config(priv, priv->iw_mode);
5368 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5371 /* Configure Bluetooth device coexistence support */
5372 iwl3945_send_bt_config(priv);
5374 /* Configure the adapter for unassociated operation */
5375 iwl3945_commit_rxon(priv);
5377 iwl3945_reg_txpower_periodic(priv);
5379 iwl3945_led_register(priv);
5381 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5382 set_bit(STATUS_READY, &priv->status);
5383 wake_up_interruptible(&priv->wait_command_queue);
5385 if (priv->error_recovering)
5386 iwl3945_error_recovery(priv);
5388 /* reassociate for ADHOC mode */
5389 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
5390 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
5391 priv->vif);
5392 if (beacon)
5393 iwl3945_mac_beacon_update(priv->hw, beacon);
5396 return;
5398 restart:
5399 queue_work(priv->workqueue, &priv->restart);
5402 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
5404 static void __iwl3945_down(struct iwl_priv *priv)
5406 unsigned long flags;
5407 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5408 struct ieee80211_conf *conf = NULL;
5410 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5412 conf = ieee80211_get_hw_conf(priv->hw);
5414 if (!exit_pending)
5415 set_bit(STATUS_EXIT_PENDING, &priv->status);
5417 iwl3945_led_unregister(priv);
5418 iwl3945_clear_stations_table(priv);
5420 /* Unblock any waiting calls */
5421 wake_up_interruptible_all(&priv->wait_command_queue);
5423 /* Wipe out the EXIT_PENDING status bit if we are not actually
5424 * exiting the module */
5425 if (!exit_pending)
5426 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5428 /* stop and reset the on-board processor */
5429 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5431 /* tell the device to stop sending interrupts */
5432 spin_lock_irqsave(&priv->lock, flags);
5433 iwl3945_disable_interrupts(priv);
5434 spin_unlock_irqrestore(&priv->lock, flags);
5435 iwl_synchronize_irq(priv);
5437 if (priv->mac80211_registered)
5438 ieee80211_stop_queues(priv->hw);
5440 /* If we have not previously called iwl3945_init() then
5441 * clear all bits but the RF Kill and SUSPEND bits and return */
5442 if (!iwl_is_init(priv)) {
5443 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5444 STATUS_RF_KILL_HW |
5445 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5446 STATUS_RF_KILL_SW |
5447 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5448 STATUS_GEO_CONFIGURED |
5449 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5450 STATUS_IN_SUSPEND |
5451 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5452 STATUS_EXIT_PENDING;
5453 goto exit;
5456 /* ...otherwise clear out all the status bits but the RF Kill and
5457 * SUSPEND bits and continue taking the NIC down. */
5458 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5459 STATUS_RF_KILL_HW |
5460 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5461 STATUS_RF_KILL_SW |
5462 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5463 STATUS_GEO_CONFIGURED |
5464 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5465 STATUS_IN_SUSPEND |
5466 test_bit(STATUS_FW_ERROR, &priv->status) <<
5467 STATUS_FW_ERROR |
5468 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5469 STATUS_EXIT_PENDING;
5471 spin_lock_irqsave(&priv->lock, flags);
5472 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5473 spin_unlock_irqrestore(&priv->lock, flags);
5475 iwl3945_hw_txq_ctx_stop(priv);
5476 iwl3945_hw_rxq_stop(priv);
5478 spin_lock_irqsave(&priv->lock, flags);
5479 if (!iwl_grab_nic_access(priv)) {
5480 iwl_write_prph(priv, APMG_CLK_DIS_REG,
5481 APMG_CLK_VAL_DMA_CLK_RQT);
5482 iwl_release_nic_access(priv);
5484 spin_unlock_irqrestore(&priv->lock, flags);
5486 udelay(5);
5488 priv->cfg->ops->lib->apm_ops.reset(priv);
5489 exit:
5490 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
5492 if (priv->ibss_beacon)
5493 dev_kfree_skb(priv->ibss_beacon);
5494 priv->ibss_beacon = NULL;
5496 /* clear out any free frames */
5497 iwl3945_clear_free_frames(priv);
5500 static void iwl3945_down(struct iwl_priv *priv)
5502 mutex_lock(&priv->mutex);
5503 __iwl3945_down(priv);
5504 mutex_unlock(&priv->mutex);
5506 iwl3945_cancel_deferred_work(priv);
5509 #define MAX_HW_RESTARTS 5
5511 static int __iwl3945_up(struct iwl_priv *priv)
5513 int rc, i;
5515 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5516 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
5517 return -EIO;
5520 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5521 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
5522 "parameter)\n");
5523 return -ENODEV;
5526 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5527 IWL_ERR(priv, "ucode not available for device bring up\n");
5528 return -EIO;
5531 /* If platform's RF_KILL switch is NOT set to KILL */
5532 if (iwl_read32(priv, CSR_GP_CNTRL) &
5533 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5534 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5535 else {
5536 set_bit(STATUS_RF_KILL_HW, &priv->status);
5537 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5538 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
5539 return -ENODEV;
5543 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5545 rc = iwl3945_hw_nic_init(priv);
5546 if (rc) {
5547 IWL_ERR(priv, "Unable to int nic\n");
5548 return rc;
5551 /* make sure rfkill handshake bits are cleared */
5552 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5553 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5554 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5556 /* clear (again), then enable host interrupts */
5557 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5558 iwl3945_enable_interrupts(priv);
5560 /* really make sure rfkill handshake bits are cleared */
5561 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5562 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5564 /* Copy original ucode data image from disk into backup cache.
5565 * This will be used to initialize the on-board processor's
5566 * data SRAM for a clean start when the runtime program first loads. */
5567 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5568 priv->ucode_data.len);
5570 /* We return success when we resume from suspend and rf_kill is on. */
5571 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
5572 return 0;
5574 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5576 iwl3945_clear_stations_table(priv);
5578 /* load bootstrap state machine,
5579 * load bootstrap program into processor's memory,
5580 * prepare to load the "initialize" uCode */
5581 priv->cfg->ops->lib->load_ucode(priv);
5583 if (rc) {
5584 IWL_ERR(priv,
5585 "Unable to set up bootstrap uCode: %d\n", rc);
5586 continue;
5589 /* start card; "initialize" will load runtime ucode */
5590 iwl3945_nic_start(priv);
5592 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5594 return 0;
5597 set_bit(STATUS_EXIT_PENDING, &priv->status);
5598 __iwl3945_down(priv);
5599 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5601 /* tried to restart and config the device for as long as our
5602 * patience could withstand */
5603 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
5604 return -EIO;
5608 /*****************************************************************************
5610 * Workqueue callbacks
5612 *****************************************************************************/
5614 static void iwl3945_bg_init_alive_start(struct work_struct *data)
5616 struct iwl_priv *priv =
5617 container_of(data, struct iwl_priv, init_alive_start.work);
5619 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5620 return;
5622 mutex_lock(&priv->mutex);
5623 iwl3945_init_alive_start(priv);
5624 mutex_unlock(&priv->mutex);
5627 static void iwl3945_bg_alive_start(struct work_struct *data)
5629 struct iwl_priv *priv =
5630 container_of(data, struct iwl_priv, alive_start.work);
5632 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5633 return;
5635 mutex_lock(&priv->mutex);
5636 iwl3945_alive_start(priv);
5637 mutex_unlock(&priv->mutex);
5640 static void iwl3945_bg_rf_kill(struct work_struct *work)
5642 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
5644 wake_up_interruptible(&priv->wait_command_queue);
5646 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5647 return;
5649 mutex_lock(&priv->mutex);
5651 if (!iwl_is_rfkill(priv)) {
5652 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5653 "HW and/or SW RF Kill no longer active, restarting "
5654 "device\n");
5655 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5656 queue_work(priv->workqueue, &priv->restart);
5657 } else {
5659 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5660 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5661 "disabled by SW switch\n");
5662 else
5663 IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
5664 "Kill switch must be turned off for "
5665 "wireless networking to work.\n");
5668 mutex_unlock(&priv->mutex);
5669 iwl3945_rfkill_set_hw_state(priv);
5672 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5674 static void iwl3945_bg_scan_check(struct work_struct *data)
5676 struct iwl_priv *priv =
5677 container_of(data, struct iwl_priv, scan_check.work);
5679 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5680 return;
5682 mutex_lock(&priv->mutex);
5683 if (test_bit(STATUS_SCANNING, &priv->status) ||
5684 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5685 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
5686 "Scan completion watchdog resetting adapter (%dms)\n",
5687 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
5689 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5690 iwl3945_send_scan_abort(priv);
5692 mutex_unlock(&priv->mutex);
5695 static void iwl3945_bg_request_scan(struct work_struct *data)
5697 struct iwl_priv *priv =
5698 container_of(data, struct iwl_priv, request_scan);
5699 struct iwl_host_cmd cmd = {
5700 .id = REPLY_SCAN_CMD,
5701 .len = sizeof(struct iwl3945_scan_cmd),
5702 .meta.flags = CMD_SIZE_HUGE,
5704 int rc = 0;
5705 struct iwl3945_scan_cmd *scan;
5706 struct ieee80211_conf *conf = NULL;
5707 u8 n_probes = 2;
5708 enum ieee80211_band band;
5709 DECLARE_SSID_BUF(ssid);
5711 conf = ieee80211_get_hw_conf(priv->hw);
5713 mutex_lock(&priv->mutex);
5715 if (!iwl_is_ready(priv)) {
5716 IWL_WARN(priv, "request scan called when driver not ready.\n");
5717 goto done;
5720 /* Make sure the scan wasn't canceled before this queued work
5721 * was given the chance to run... */
5722 if (!test_bit(STATUS_SCANNING, &priv->status))
5723 goto done;
5725 /* This should never be called or scheduled if there is currently
5726 * a scan active in the hardware. */
5727 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
5728 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
5729 "Ignoring second request.\n");
5730 rc = -EIO;
5731 goto done;
5734 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5735 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
5736 goto done;
5739 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5740 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
5741 goto done;
5744 if (iwl_is_rfkill(priv)) {
5745 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
5746 goto done;
5749 if (!test_bit(STATUS_READY, &priv->status)) {
5750 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
5751 goto done;
5754 if (!priv->scan_bands) {
5755 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
5756 goto done;
5759 if (!priv->scan39) {
5760 priv->scan39 = kmalloc(sizeof(struct iwl3945_scan_cmd) +
5761 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
5762 if (!priv->scan39) {
5763 rc = -ENOMEM;
5764 goto done;
5767 scan = priv->scan39;
5768 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
5770 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
5771 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
5773 if (iwl3945_is_associated(priv)) {
5774 u16 interval = 0;
5775 u32 extra;
5776 u32 suspend_time = 100;
5777 u32 scan_suspend_time = 100;
5778 unsigned long flags;
5780 IWL_DEBUG_INFO("Scanning while associated...\n");
5782 spin_lock_irqsave(&priv->lock, flags);
5783 interval = priv->beacon_int;
5784 spin_unlock_irqrestore(&priv->lock, flags);
5786 scan->suspend_time = 0;
5787 scan->max_out_time = cpu_to_le32(200 * 1024);
5788 if (!interval)
5789 interval = suspend_time;
5791 * suspend time format:
5792 * 0-19: beacon interval in usec (time before exec.)
5793 * 20-23: 0
5794 * 24-31: number of beacons (suspend between channels)
5797 extra = (suspend_time / interval) << 24;
5798 scan_suspend_time = 0xFF0FFFFF &
5799 (extra | ((suspend_time % interval) * 1024));
5801 scan->suspend_time = cpu_to_le32(scan_suspend_time);
5802 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
5803 scan_suspend_time, interval);
5806 /* We should add the ability for user to lock to PASSIVE ONLY */
5807 if (priv->one_direct_scan) {
5808 IWL_DEBUG_SCAN
5809 ("Kicking off one direct scan for '%s'\n",
5810 print_ssid(ssid, priv->direct_ssid,
5811 priv->direct_ssid_len));
5812 scan->direct_scan[0].id = WLAN_EID_SSID;
5813 scan->direct_scan[0].len = priv->direct_ssid_len;
5814 memcpy(scan->direct_scan[0].ssid,
5815 priv->direct_ssid, priv->direct_ssid_len);
5816 n_probes++;
5817 } else
5818 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
5820 /* We don't build a direct scan probe request; the uCode will do
5821 * that based on the direct_mask added to each channel entry */
5822 scan->tx_cmd.len = cpu_to_le16(
5823 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
5824 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
5825 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
5826 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
5827 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
5829 /* flags + rate selection */
5831 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
5832 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
5833 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
5834 scan->good_CRC_th = 0;
5835 band = IEEE80211_BAND_2GHZ;
5836 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
5837 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
5838 scan->good_CRC_th = IWL_GOOD_CRC_TH;
5839 band = IEEE80211_BAND_5GHZ;
5840 } else {
5841 IWL_WARN(priv, "Invalid scan band count\n");
5842 goto done;
5845 /* select Rx antennas */
5846 scan->flags |= iwl3945_get_antenna_flags(priv);
5848 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
5849 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
5851 scan->channel_count =
5852 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
5853 n_probes,
5854 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
5856 if (scan->channel_count == 0) {
5857 IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
5858 goto done;
5861 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
5862 scan->channel_count * sizeof(struct iwl3945_scan_channel);
5863 cmd.data = scan;
5864 scan->len = cpu_to_le16(cmd.len);
5866 set_bit(STATUS_SCAN_HW, &priv->status);
5867 rc = iwl3945_send_cmd_sync(priv, &cmd);
5868 if (rc)
5869 goto done;
5871 queue_delayed_work(priv->workqueue, &priv->scan_check,
5872 IWL_SCAN_CHECK_WATCHDOG);
5874 mutex_unlock(&priv->mutex);
5875 return;
5877 done:
5878 /* can not perform scan make sure we clear scanning
5879 * bits from status so next scan request can be performed.
5880 * if we dont clear scanning status bit here all next scan
5881 * will fail
5883 clear_bit(STATUS_SCAN_HW, &priv->status);
5884 clear_bit(STATUS_SCANNING, &priv->status);
5886 /* inform mac80211 scan aborted */
5887 queue_work(priv->workqueue, &priv->scan_completed);
5888 mutex_unlock(&priv->mutex);
5891 static void iwl3945_bg_up(struct work_struct *data)
5893 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
5895 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5896 return;
5898 mutex_lock(&priv->mutex);
5899 __iwl3945_up(priv);
5900 mutex_unlock(&priv->mutex);
5901 iwl3945_rfkill_set_hw_state(priv);
5904 static void iwl3945_bg_restart(struct work_struct *data)
5906 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
5908 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5909 return;
5911 iwl3945_down(priv);
5912 queue_work(priv->workqueue, &priv->up);
5915 static void iwl3945_bg_rx_replenish(struct work_struct *data)
5917 struct iwl_priv *priv =
5918 container_of(data, struct iwl_priv, rx_replenish);
5920 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5921 return;
5923 mutex_lock(&priv->mutex);
5924 iwl3945_rx_replenish(priv);
5925 mutex_unlock(&priv->mutex);
5928 #define IWL_DELAY_NEXT_SCAN (HZ*2)
5930 static void iwl3945_post_associate(struct iwl_priv *priv)
5932 int rc = 0;
5933 struct ieee80211_conf *conf = NULL;
5935 if (priv->iw_mode == NL80211_IFTYPE_AP) {
5936 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
5937 return;
5941 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
5942 priv->assoc_id, priv->active39_rxon.bssid_addr);
5944 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5945 return;
5947 if (!priv->vif || !priv->is_open)
5948 return;
5950 iwl3945_scan_cancel_timeout(priv, 200);
5952 conf = ieee80211_get_hw_conf(priv->hw);
5954 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5955 iwl3945_commit_rxon(priv);
5957 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
5958 iwl3945_setup_rxon_timing(priv);
5959 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
5960 sizeof(priv->rxon_timing), &priv->rxon_timing);
5961 if (rc)
5962 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
5963 "Attempting to continue.\n");
5965 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5967 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
5969 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
5970 priv->assoc_id, priv->beacon_int);
5972 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
5973 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5974 else
5975 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5977 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
5978 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
5979 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
5980 else
5981 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5983 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
5984 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5988 iwl3945_commit_rxon(priv);
5990 switch (priv->iw_mode) {
5991 case NL80211_IFTYPE_STATION:
5992 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
5993 break;
5995 case NL80211_IFTYPE_ADHOC:
5997 priv->assoc_id = 1;
5998 iwl3945_add_station(priv, priv->bssid, 0, 0);
5999 iwl3945_sync_sta(priv, IWL_STA_ID,
6000 (priv->band == IEEE80211_BAND_5GHZ) ?
6001 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6002 CMD_ASYNC);
6003 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6004 iwl3945_send_beacon_cmd(priv);
6006 break;
6008 default:
6009 IWL_ERR(priv, "%s Should not be called in %d mode\n",
6010 __func__, priv->iw_mode);
6011 break;
6014 iwl3945_activate_qos(priv, 0);
6016 /* we have just associated, don't start scan too early */
6017 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6020 static void iwl3945_bg_abort_scan(struct work_struct *work)
6022 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
6024 if (!iwl_is_ready(priv))
6025 return;
6027 mutex_lock(&priv->mutex);
6029 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6030 iwl3945_send_scan_abort(priv);
6032 mutex_unlock(&priv->mutex);
6035 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
6037 static void iwl3945_bg_scan_completed(struct work_struct *work)
6039 struct iwl_priv *priv =
6040 container_of(work, struct iwl_priv, scan_completed);
6042 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6044 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6045 return;
6047 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6048 iwl3945_mac_config(priv->hw, 0);
6050 ieee80211_scan_completed(priv->hw);
6052 /* Since setting the TXPOWER may have been deferred while
6053 * performing the scan, fire one off */
6054 mutex_lock(&priv->mutex);
6055 iwl3945_hw_reg_send_txpower(priv);
6056 mutex_unlock(&priv->mutex);
6059 /*****************************************************************************
6061 * mac80211 entry point functions
6063 *****************************************************************************/
6065 #define UCODE_READY_TIMEOUT (2 * HZ)
6067 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6069 struct iwl_priv *priv = hw->priv;
6070 int ret;
6072 IWL_DEBUG_MAC80211("enter\n");
6074 if (pci_enable_device(priv->pci_dev)) {
6075 IWL_ERR(priv, "Fail to pci_enable_device\n");
6076 return -ENODEV;
6078 pci_restore_state(priv->pci_dev);
6079 pci_enable_msi(priv->pci_dev);
6081 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6082 DRV_NAME, priv);
6083 if (ret) {
6084 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
6085 goto out_disable_msi;
6088 /* we should be verifying the device is ready to be opened */
6089 mutex_lock(&priv->mutex);
6091 memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6092 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6093 * ucode filename and max sizes are card-specific. */
6095 if (!priv->ucode_code.len) {
6096 ret = iwl3945_read_ucode(priv);
6097 if (ret) {
6098 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
6099 mutex_unlock(&priv->mutex);
6100 goto out_release_irq;
6104 ret = __iwl3945_up(priv);
6106 mutex_unlock(&priv->mutex);
6108 iwl3945_rfkill_set_hw_state(priv);
6110 if (ret)
6111 goto out_release_irq;
6113 IWL_DEBUG_INFO("Start UP work.\n");
6115 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6116 return 0;
6118 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6119 * mac80211 will not be run successfully. */
6120 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6121 test_bit(STATUS_READY, &priv->status),
6122 UCODE_READY_TIMEOUT);
6123 if (!ret) {
6124 if (!test_bit(STATUS_READY, &priv->status)) {
6125 IWL_ERR(priv,
6126 "Wait for START_ALIVE timeout after %dms.\n",
6127 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6128 ret = -ETIMEDOUT;
6129 goto out_release_irq;
6133 priv->is_open = 1;
6134 IWL_DEBUG_MAC80211("leave\n");
6135 return 0;
6137 out_release_irq:
6138 free_irq(priv->pci_dev->irq, priv);
6139 out_disable_msi:
6140 pci_disable_msi(priv->pci_dev);
6141 pci_disable_device(priv->pci_dev);
6142 priv->is_open = 0;
6143 IWL_DEBUG_MAC80211("leave - failed\n");
6144 return ret;
6147 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6149 struct iwl_priv *priv = hw->priv;
6151 IWL_DEBUG_MAC80211("enter\n");
6153 if (!priv->is_open) {
6154 IWL_DEBUG_MAC80211("leave - skip\n");
6155 return;
6158 priv->is_open = 0;
6160 if (iwl_is_ready_rf(priv)) {
6161 /* stop mac, cancel any scan request and clear
6162 * RXON_FILTER_ASSOC_MSK BIT
6164 mutex_lock(&priv->mutex);
6165 iwl3945_scan_cancel_timeout(priv, 100);
6166 mutex_unlock(&priv->mutex);
6169 iwl3945_down(priv);
6171 flush_workqueue(priv->workqueue);
6172 free_irq(priv->pci_dev->irq, priv);
6173 pci_disable_msi(priv->pci_dev);
6174 pci_save_state(priv->pci_dev);
6175 pci_disable_device(priv->pci_dev);
6177 IWL_DEBUG_MAC80211("leave\n");
6180 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
6182 struct iwl_priv *priv = hw->priv;
6184 IWL_DEBUG_MAC80211("enter\n");
6186 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6187 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
6189 if (iwl3945_tx_skb(priv, skb))
6190 dev_kfree_skb_any(skb);
6192 IWL_DEBUG_MAC80211("leave\n");
6193 return NETDEV_TX_OK;
6196 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6197 struct ieee80211_if_init_conf *conf)
6199 struct iwl_priv *priv = hw->priv;
6200 unsigned long flags;
6202 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6204 if (priv->vif) {
6205 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6206 return -EOPNOTSUPP;
6209 spin_lock_irqsave(&priv->lock, flags);
6210 priv->vif = conf->vif;
6211 priv->iw_mode = conf->type;
6213 spin_unlock_irqrestore(&priv->lock, flags);
6215 mutex_lock(&priv->mutex);
6217 if (conf->mac_addr) {
6218 IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
6219 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6222 if (iwl_is_ready(priv))
6223 iwl3945_set_mode(priv, conf->type);
6225 mutex_unlock(&priv->mutex);
6227 IWL_DEBUG_MAC80211("leave\n");
6228 return 0;
6232 * iwl3945_mac_config - mac80211 config callback
6234 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6235 * be set inappropriately and the driver currently sets the hardware up to
6236 * use it whenever needed.
6238 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
6240 struct iwl_priv *priv = hw->priv;
6241 const struct iwl_channel_info *ch_info;
6242 struct ieee80211_conf *conf = &hw->conf;
6243 unsigned long flags;
6244 int ret = 0;
6246 mutex_lock(&priv->mutex);
6247 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
6249 if (!iwl_is_ready(priv)) {
6250 IWL_DEBUG_MAC80211("leave - not ready\n");
6251 ret = -EIO;
6252 goto out;
6255 if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
6256 test_bit(STATUS_SCANNING, &priv->status))) {
6257 IWL_DEBUG_MAC80211("leave - scanning\n");
6258 set_bit(STATUS_CONF_PENDING, &priv->status);
6259 mutex_unlock(&priv->mutex);
6260 return 0;
6263 spin_lock_irqsave(&priv->lock, flags);
6265 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6266 conf->channel->hw_value);
6267 if (!is_channel_valid(ch_info)) {
6268 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
6269 conf->channel->hw_value, conf->channel->band);
6270 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6271 spin_unlock_irqrestore(&priv->lock, flags);
6272 ret = -EINVAL;
6273 goto out;
6276 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
6278 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
6280 /* The list of supported rates and rate mask can be different
6281 * for each phymode; since the phymode may have changed, reset
6282 * the rate mask to what mac80211 lists */
6283 iwl3945_set_rate(priv);
6285 spin_unlock_irqrestore(&priv->lock, flags);
6287 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
6288 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
6289 iwl3945_hw_channel_switch(priv, conf->channel);
6290 goto out;
6292 #endif
6294 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
6296 if (!conf->radio_enabled) {
6297 IWL_DEBUG_MAC80211("leave - radio disabled\n");
6298 goto out;
6301 if (iwl_is_rfkill(priv)) {
6302 IWL_DEBUG_MAC80211("leave - RF kill\n");
6303 ret = -EIO;
6304 goto out;
6307 iwl3945_set_rate(priv);
6309 if (memcmp(&priv->active39_rxon,
6310 &priv->staging39_rxon, sizeof(priv->staging39_rxon)))
6311 iwl3945_commit_rxon(priv);
6312 else
6313 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6315 IWL_DEBUG_MAC80211("leave\n");
6317 out:
6318 clear_bit(STATUS_CONF_PENDING, &priv->status);
6319 mutex_unlock(&priv->mutex);
6320 return ret;
6323 static void iwl3945_config_ap(struct iwl_priv *priv)
6325 int rc = 0;
6327 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6328 return;
6330 /* The following should be done only at AP bring up */
6331 if (!(iwl3945_is_associated(priv))) {
6333 /* RXON - unassoc (to set timing command) */
6334 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6335 iwl3945_commit_rxon(priv);
6337 /* RXON Timing */
6338 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6339 iwl3945_setup_rxon_timing(priv);
6340 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6341 sizeof(priv->rxon_timing), &priv->rxon_timing);
6342 if (rc)
6343 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
6344 "Attempting to continue.\n");
6346 /* FIXME: what should be the assoc_id for AP? */
6347 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6348 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6349 priv->staging39_rxon.flags |=
6350 RXON_FLG_SHORT_PREAMBLE_MSK;
6351 else
6352 priv->staging39_rxon.flags &=
6353 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6355 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6356 if (priv->assoc_capability &
6357 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6358 priv->staging39_rxon.flags |=
6359 RXON_FLG_SHORT_SLOT_MSK;
6360 else
6361 priv->staging39_rxon.flags &=
6362 ~RXON_FLG_SHORT_SLOT_MSK;
6364 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6365 priv->staging39_rxon.flags &=
6366 ~RXON_FLG_SHORT_SLOT_MSK;
6368 /* restore RXON assoc */
6369 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6370 iwl3945_commit_rxon(priv);
6371 iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
6373 iwl3945_send_beacon_cmd(priv);
6375 /* FIXME - we need to add code here to detect a totally new
6376 * configuration, reset the AP, unassoc, rxon timing, assoc,
6377 * clear sta table, add BCAST sta... */
6380 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6381 struct ieee80211_vif *vif,
6382 struct ieee80211_if_conf *conf)
6384 struct iwl_priv *priv = hw->priv;
6385 int rc;
6387 if (conf == NULL)
6388 return -EIO;
6390 if (priv->vif != vif) {
6391 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6392 return 0;
6395 /* handle this temporarily here */
6396 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
6397 conf->changed & IEEE80211_IFCC_BEACON) {
6398 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
6399 if (!beacon)
6400 return -ENOMEM;
6401 mutex_lock(&priv->mutex);
6402 rc = iwl3945_mac_beacon_update(hw, beacon);
6403 mutex_unlock(&priv->mutex);
6404 if (rc)
6405 return rc;
6408 if (!iwl_is_alive(priv))
6409 return -EAGAIN;
6411 mutex_lock(&priv->mutex);
6413 if (conf->bssid)
6414 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
6417 * very dubious code was here; the probe filtering flag is never set:
6419 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6420 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
6423 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6424 if (!conf->bssid) {
6425 conf->bssid = priv->mac_addr;
6426 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
6427 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
6428 conf->bssid);
6430 if (priv->ibss_beacon)
6431 dev_kfree_skb(priv->ibss_beacon);
6433 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
6436 if (iwl_is_rfkill(priv))
6437 goto done;
6439 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6440 !is_multicast_ether_addr(conf->bssid)) {
6441 /* If there is currently a HW scan going on in the background
6442 * then we need to cancel it else the RXON below will fail. */
6443 if (iwl3945_scan_cancel_timeout(priv, 100)) {
6444 IWL_WARN(priv, "Aborted scan still in progress "
6445 "after 100ms\n");
6446 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6447 mutex_unlock(&priv->mutex);
6448 return -EAGAIN;
6450 memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6452 /* TODO: Audit driver for usage of these members and see
6453 * if mac80211 deprecates them (priv->bssid looks like it
6454 * shouldn't be there, but I haven't scanned the IBSS code
6455 * to verify) - jpk */
6456 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6458 if (priv->iw_mode == NL80211_IFTYPE_AP)
6459 iwl3945_config_ap(priv);
6460 else {
6461 rc = iwl3945_commit_rxon(priv);
6462 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
6463 iwl3945_add_station(priv,
6464 priv->active39_rxon.bssid_addr, 1, 0);
6467 } else {
6468 iwl3945_scan_cancel_timeout(priv, 100);
6469 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6470 iwl3945_commit_rxon(priv);
6473 done:
6474 IWL_DEBUG_MAC80211("leave\n");
6475 mutex_unlock(&priv->mutex);
6477 return 0;
6480 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
6481 unsigned int changed_flags,
6482 unsigned int *total_flags,
6483 int mc_count, struct dev_addr_list *mc_list)
6485 struct iwl_priv *priv = hw->priv;
6486 __le32 *filter_flags = &priv->staging39_rxon.filter_flags;
6488 IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
6489 changed_flags, *total_flags);
6491 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
6492 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
6493 *filter_flags |= RXON_FILTER_PROMISC_MSK;
6494 else
6495 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
6497 if (changed_flags & FIF_ALLMULTI) {
6498 if (*total_flags & FIF_ALLMULTI)
6499 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
6500 else
6501 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
6503 if (changed_flags & FIF_CONTROL) {
6504 if (*total_flags & FIF_CONTROL)
6505 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
6506 else
6507 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
6509 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
6510 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
6511 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
6512 else
6513 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
6516 /* We avoid iwl_commit_rxon here to commit the new filter flags
6517 * since mac80211 will call ieee80211_hw_config immediately.
6518 * (mc_list is not supported at this time). Otherwise, we need to
6519 * queue a background iwl_commit_rxon work.
6522 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
6523 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6526 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
6527 struct ieee80211_if_init_conf *conf)
6529 struct iwl_priv *priv = hw->priv;
6531 IWL_DEBUG_MAC80211("enter\n");
6533 mutex_lock(&priv->mutex);
6535 if (iwl_is_ready_rf(priv)) {
6536 iwl3945_scan_cancel_timeout(priv, 100);
6537 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6538 iwl3945_commit_rxon(priv);
6540 if (priv->vif == conf->vif) {
6541 priv->vif = NULL;
6542 memset(priv->bssid, 0, ETH_ALEN);
6544 mutex_unlock(&priv->mutex);
6546 IWL_DEBUG_MAC80211("leave\n");
6549 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
6551 static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
6552 struct ieee80211_vif *vif,
6553 struct ieee80211_bss_conf *bss_conf,
6554 u32 changes)
6556 struct iwl_priv *priv = hw->priv;
6558 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6560 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
6561 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6562 bss_conf->use_short_preamble);
6563 if (bss_conf->use_short_preamble)
6564 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6565 else
6566 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6569 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
6570 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
6571 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
6572 priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6573 else
6574 priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6577 if (changes & BSS_CHANGED_ASSOC) {
6578 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
6579 /* This should never happen as this function should
6580 * never be called from interrupt context. */
6581 if (WARN_ON_ONCE(in_interrupt()))
6582 return;
6583 if (bss_conf->assoc) {
6584 priv->assoc_id = bss_conf->aid;
6585 priv->beacon_int = bss_conf->beacon_int;
6586 priv->timestamp = bss_conf->timestamp;
6587 priv->assoc_capability = bss_conf->assoc_capability;
6588 priv->next_scan_jiffies = jiffies +
6589 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
6590 mutex_lock(&priv->mutex);
6591 iwl3945_post_associate(priv);
6592 mutex_unlock(&priv->mutex);
6593 } else {
6594 priv->assoc_id = 0;
6595 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6597 } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
6598 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
6599 iwl3945_send_rxon_assoc(priv);
6604 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
6606 int rc = 0;
6607 unsigned long flags;
6608 struct iwl_priv *priv = hw->priv;
6609 DECLARE_SSID_BUF(ssid_buf);
6611 IWL_DEBUG_MAC80211("enter\n");
6613 mutex_lock(&priv->mutex);
6614 spin_lock_irqsave(&priv->lock, flags);
6616 if (!iwl_is_ready_rf(priv)) {
6617 rc = -EIO;
6618 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6619 goto out_unlock;
6622 /* we don't schedule scan within next_scan_jiffies period */
6623 if (priv->next_scan_jiffies &&
6624 time_after(priv->next_scan_jiffies, jiffies)) {
6625 rc = -EAGAIN;
6626 goto out_unlock;
6628 /* if we just finished scan ask for delay for a broadcast scan */
6629 if ((len == 0) && priv->last_scan_jiffies &&
6630 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
6631 jiffies)) {
6632 rc = -EAGAIN;
6633 goto out_unlock;
6635 if (len) {
6636 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
6637 print_ssid(ssid_buf, ssid, len), (int)len);
6639 priv->one_direct_scan = 1;
6640 priv->direct_ssid_len = (u8)
6641 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6642 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
6643 } else
6644 priv->one_direct_scan = 0;
6646 rc = iwl3945_scan_initiate(priv);
6648 IWL_DEBUG_MAC80211("leave\n");
6650 out_unlock:
6651 spin_unlock_irqrestore(&priv->lock, flags);
6652 mutex_unlock(&priv->mutex);
6654 return rc;
6657 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
6658 const u8 *local_addr, const u8 *addr,
6659 struct ieee80211_key_conf *key)
6661 struct iwl_priv *priv = hw->priv;
6662 int rc = 0;
6663 u8 sta_id;
6665 IWL_DEBUG_MAC80211("enter\n");
6667 if (iwl3945_mod_params.sw_crypto) {
6668 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
6669 return -EOPNOTSUPP;
6672 if (is_zero_ether_addr(addr))
6673 /* only support pairwise keys */
6674 return -EOPNOTSUPP;
6676 sta_id = iwl3945_hw_find_station(priv, addr);
6677 if (sta_id == IWL_INVALID_STATION) {
6678 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
6679 addr);
6680 return -EINVAL;
6683 mutex_lock(&priv->mutex);
6685 iwl3945_scan_cancel_timeout(priv, 100);
6687 switch (cmd) {
6688 case SET_KEY:
6689 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
6690 if (!rc) {
6691 iwl3945_set_rxon_hwcrypto(priv, 1);
6692 iwl3945_commit_rxon(priv);
6693 key->hw_key_idx = sta_id;
6694 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
6695 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
6697 break;
6698 case DISABLE_KEY:
6699 rc = iwl3945_clear_sta_key_info(priv, sta_id);
6700 if (!rc) {
6701 iwl3945_set_rxon_hwcrypto(priv, 0);
6702 iwl3945_commit_rxon(priv);
6703 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
6705 break;
6706 default:
6707 rc = -EINVAL;
6710 IWL_DEBUG_MAC80211("leave\n");
6711 mutex_unlock(&priv->mutex);
6713 return rc;
6716 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
6717 const struct ieee80211_tx_queue_params *params)
6719 struct iwl_priv *priv = hw->priv;
6720 unsigned long flags;
6721 int q;
6723 IWL_DEBUG_MAC80211("enter\n");
6725 if (!iwl_is_ready_rf(priv)) {
6726 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6727 return -EIO;
6730 if (queue >= AC_NUM) {
6731 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
6732 return 0;
6735 q = AC_NUM - 1 - queue;
6737 spin_lock_irqsave(&priv->lock, flags);
6739 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
6740 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
6741 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
6742 priv->qos_data.def_qos_parm.ac[q].edca_txop =
6743 cpu_to_le16((params->txop * 32));
6745 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
6746 priv->qos_data.qos_active = 1;
6748 spin_unlock_irqrestore(&priv->lock, flags);
6750 mutex_lock(&priv->mutex);
6751 if (priv->iw_mode == NL80211_IFTYPE_AP)
6752 iwl3945_activate_qos(priv, 1);
6753 else if (priv->assoc_id && iwl3945_is_associated(priv))
6754 iwl3945_activate_qos(priv, 0);
6756 mutex_unlock(&priv->mutex);
6758 IWL_DEBUG_MAC80211("leave\n");
6759 return 0;
6762 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
6763 struct ieee80211_tx_queue_stats *stats)
6765 struct iwl_priv *priv = hw->priv;
6766 int i, avail;
6767 struct iwl_tx_queue *txq;
6768 struct iwl_queue *q;
6769 unsigned long flags;
6771 IWL_DEBUG_MAC80211("enter\n");
6773 if (!iwl_is_ready_rf(priv)) {
6774 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6775 return -EIO;
6778 spin_lock_irqsave(&priv->lock, flags);
6780 for (i = 0; i < AC_NUM; i++) {
6781 txq = &priv->txq[i];
6782 q = &txq->q;
6783 avail = iwl_queue_space(q);
6785 stats[i].len = q->n_window - avail;
6786 stats[i].limit = q->n_window - q->high_mark;
6787 stats[i].count = q->n_window;
6790 spin_unlock_irqrestore(&priv->lock, flags);
6792 IWL_DEBUG_MAC80211("leave\n");
6794 return 0;
6797 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
6799 struct iwl_priv *priv = hw->priv;
6800 unsigned long flags;
6802 mutex_lock(&priv->mutex);
6803 IWL_DEBUG_MAC80211("enter\n");
6805 iwl_reset_qos(priv);
6807 spin_lock_irqsave(&priv->lock, flags);
6808 priv->assoc_id = 0;
6809 priv->assoc_capability = 0;
6810 priv->call_post_assoc_from_beacon = 0;
6812 /* new association get rid of ibss beacon skb */
6813 if (priv->ibss_beacon)
6814 dev_kfree_skb(priv->ibss_beacon);
6816 priv->ibss_beacon = NULL;
6818 priv->beacon_int = priv->hw->conf.beacon_int;
6819 priv->timestamp = 0;
6820 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
6821 priv->beacon_int = 0;
6823 spin_unlock_irqrestore(&priv->lock, flags);
6825 if (!iwl_is_ready_rf(priv)) {
6826 IWL_DEBUG_MAC80211("leave - not ready\n");
6827 mutex_unlock(&priv->mutex);
6828 return;
6831 /* we are restarting association process
6832 * clear RXON_FILTER_ASSOC_MSK bit
6834 if (priv->iw_mode != NL80211_IFTYPE_AP) {
6835 iwl3945_scan_cancel_timeout(priv, 100);
6836 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6837 iwl3945_commit_rxon(priv);
6840 /* Per mac80211.h: This is only used in IBSS mode... */
6841 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
6843 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
6844 mutex_unlock(&priv->mutex);
6845 return;
6848 iwl3945_set_rate(priv);
6850 mutex_unlock(&priv->mutex);
6852 IWL_DEBUG_MAC80211("leave\n");
6856 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
6858 struct iwl_priv *priv = hw->priv;
6859 unsigned long flags;
6861 IWL_DEBUG_MAC80211("enter\n");
6863 if (!iwl_is_ready_rf(priv)) {
6864 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6865 return -EIO;
6868 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
6869 IWL_DEBUG_MAC80211("leave - not IBSS\n");
6870 return -EIO;
6873 spin_lock_irqsave(&priv->lock, flags);
6875 if (priv->ibss_beacon)
6876 dev_kfree_skb(priv->ibss_beacon);
6878 priv->ibss_beacon = skb;
6880 priv->assoc_id = 0;
6882 IWL_DEBUG_MAC80211("leave\n");
6883 spin_unlock_irqrestore(&priv->lock, flags);
6885 iwl_reset_qos(priv);
6887 iwl3945_post_associate(priv);
6890 return 0;
6893 /*****************************************************************************
6895 * sysfs attributes
6897 *****************************************************************************/
6899 #ifdef CONFIG_IWL3945_DEBUG
6902 * The following adds a new attribute to the sysfs representation
6903 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
6904 * used for controlling the debug level.
6906 * See the level definitions in iwl for details.
6908 static ssize_t show_debug_level(struct device *d,
6909 struct device_attribute *attr, char *buf)
6911 struct iwl_priv *priv = d->driver_data;
6913 return sprintf(buf, "0x%08X\n", priv->debug_level);
6915 static ssize_t store_debug_level(struct device *d,
6916 struct device_attribute *attr,
6917 const char *buf, size_t count)
6919 struct iwl_priv *priv = d->driver_data;
6920 unsigned long val;
6921 int ret;
6923 ret = strict_strtoul(buf, 0, &val);
6924 if (ret)
6925 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
6926 else
6927 priv->debug_level = val;
6929 return strnlen(buf, count);
6932 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
6933 show_debug_level, store_debug_level);
6935 #endif /* CONFIG_IWL3945_DEBUG */
6937 static ssize_t show_temperature(struct device *d,
6938 struct device_attribute *attr, char *buf)
6940 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6942 if (!iwl_is_alive(priv))
6943 return -EAGAIN;
6945 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
6948 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
6950 static ssize_t show_tx_power(struct device *d,
6951 struct device_attribute *attr, char *buf)
6953 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6954 return sprintf(buf, "%d\n", priv->user_txpower_limit);
6957 static ssize_t store_tx_power(struct device *d,
6958 struct device_attribute *attr,
6959 const char *buf, size_t count)
6961 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6962 char *p = (char *)buf;
6963 u32 val;
6965 val = simple_strtoul(p, &p, 10);
6966 if (p == buf)
6967 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
6968 else
6969 iwl3945_hw_reg_set_txpower(priv, val);
6971 return count;
6974 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
6976 static ssize_t show_flags(struct device *d,
6977 struct device_attribute *attr, char *buf)
6979 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6981 return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags);
6984 static ssize_t store_flags(struct device *d,
6985 struct device_attribute *attr,
6986 const char *buf, size_t count)
6988 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6989 u32 flags = simple_strtoul(buf, NULL, 0);
6991 mutex_lock(&priv->mutex);
6992 if (le32_to_cpu(priv->staging39_rxon.flags) != flags) {
6993 /* Cancel any currently running scans... */
6994 if (iwl3945_scan_cancel_timeout(priv, 100))
6995 IWL_WARN(priv, "Could not cancel scan.\n");
6996 else {
6997 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
6998 flags);
6999 priv->staging39_rxon.flags = cpu_to_le32(flags);
7000 iwl3945_commit_rxon(priv);
7003 mutex_unlock(&priv->mutex);
7005 return count;
7008 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7010 static ssize_t show_filter_flags(struct device *d,
7011 struct device_attribute *attr, char *buf)
7013 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7015 return sprintf(buf, "0x%04X\n",
7016 le32_to_cpu(priv->active39_rxon.filter_flags));
7019 static ssize_t store_filter_flags(struct device *d,
7020 struct device_attribute *attr,
7021 const char *buf, size_t count)
7023 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7024 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7026 mutex_lock(&priv->mutex);
7027 if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) {
7028 /* Cancel any currently running scans... */
7029 if (iwl3945_scan_cancel_timeout(priv, 100))
7030 IWL_WARN(priv, "Could not cancel scan.\n");
7031 else {
7032 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7033 "0x%04X\n", filter_flags);
7034 priv->staging39_rxon.filter_flags =
7035 cpu_to_le32(filter_flags);
7036 iwl3945_commit_rxon(priv);
7039 mutex_unlock(&priv->mutex);
7041 return count;
7044 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7045 store_filter_flags);
7047 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7049 static ssize_t show_measurement(struct device *d,
7050 struct device_attribute *attr, char *buf)
7052 struct iwl_priv *priv = dev_get_drvdata(d);
7053 struct iwl_spectrum_notification measure_report;
7054 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7055 u8 *data = (u8 *)&measure_report;
7056 unsigned long flags;
7058 spin_lock_irqsave(&priv->lock, flags);
7059 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7060 spin_unlock_irqrestore(&priv->lock, flags);
7061 return 0;
7063 memcpy(&measure_report, &priv->measure_report, size);
7064 priv->measurement_status = 0;
7065 spin_unlock_irqrestore(&priv->lock, flags);
7067 while (size && (PAGE_SIZE - len)) {
7068 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7069 PAGE_SIZE - len, 1);
7070 len = strlen(buf);
7071 if (PAGE_SIZE - len)
7072 buf[len++] = '\n';
7074 ofs += 16;
7075 size -= min(size, 16U);
7078 return len;
7081 static ssize_t store_measurement(struct device *d,
7082 struct device_attribute *attr,
7083 const char *buf, size_t count)
7085 struct iwl_priv *priv = dev_get_drvdata(d);
7086 struct ieee80211_measurement_params params = {
7087 .channel = le16_to_cpu(priv->active39_rxon.channel),
7088 .start_time = cpu_to_le64(priv->last_tsf),
7089 .duration = cpu_to_le16(1),
7091 u8 type = IWL_MEASURE_BASIC;
7092 u8 buffer[32];
7093 u8 channel;
7095 if (count) {
7096 char *p = buffer;
7097 strncpy(buffer, buf, min(sizeof(buffer), count));
7098 channel = simple_strtoul(p, NULL, 0);
7099 if (channel)
7100 params.channel = channel;
7102 p = buffer;
7103 while (*p && *p != ' ')
7104 p++;
7105 if (*p)
7106 type = simple_strtoul(p + 1, NULL, 0);
7109 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7110 "channel %d (for '%s')\n", type, params.channel, buf);
7111 iwl3945_get_measurement(priv, &params, type);
7113 return count;
7116 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7117 show_measurement, store_measurement);
7118 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7120 static ssize_t store_retry_rate(struct device *d,
7121 struct device_attribute *attr,
7122 const char *buf, size_t count)
7124 struct iwl_priv *priv = dev_get_drvdata(d);
7126 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7127 if (priv->retry_rate <= 0)
7128 priv->retry_rate = 1;
7130 return count;
7133 static ssize_t show_retry_rate(struct device *d,
7134 struct device_attribute *attr, char *buf)
7136 struct iwl_priv *priv = dev_get_drvdata(d);
7137 return sprintf(buf, "%d", priv->retry_rate);
7140 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7141 store_retry_rate);
7143 static ssize_t store_power_level(struct device *d,
7144 struct device_attribute *attr,
7145 const char *buf, size_t count)
7147 struct iwl_priv *priv = dev_get_drvdata(d);
7148 int rc;
7149 int mode;
7151 mode = simple_strtoul(buf, NULL, 0);
7152 mutex_lock(&priv->mutex);
7154 if (!iwl_is_ready(priv)) {
7155 rc = -EAGAIN;
7156 goto out;
7159 if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
7160 (mode == IWL39_POWER_AC))
7161 mode = IWL39_POWER_AC;
7162 else
7163 mode |= IWL_POWER_ENABLED;
7165 if (mode != priv->power_mode) {
7166 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7167 if (rc) {
7168 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7169 goto out;
7171 priv->power_mode = mode;
7174 rc = count;
7176 out:
7177 mutex_unlock(&priv->mutex);
7178 return rc;
7181 #define MAX_WX_STRING 80
7183 /* Values are in microsecond */
7184 static const s32 timeout_duration[] = {
7185 350000,
7186 250000,
7187 75000,
7188 37000,
7189 25000,
7191 static const s32 period_duration[] = {
7192 400000,
7193 700000,
7194 1000000,
7195 1000000,
7196 1000000
7199 static ssize_t show_power_level(struct device *d,
7200 struct device_attribute *attr, char *buf)
7202 struct iwl_priv *priv = dev_get_drvdata(d);
7203 int level = IWL_POWER_LEVEL(priv->power_mode);
7204 char *p = buf;
7206 p += sprintf(p, "%d ", level);
7207 switch (level) {
7208 case IWL_POWER_MODE_CAM:
7209 case IWL39_POWER_AC:
7210 p += sprintf(p, "(AC)");
7211 break;
7212 case IWL39_POWER_BATTERY:
7213 p += sprintf(p, "(BATTERY)");
7214 break;
7215 default:
7216 p += sprintf(p,
7217 "(Timeout %dms, Period %dms)",
7218 timeout_duration[level - 1] / 1000,
7219 period_duration[level - 1] / 1000);
7222 if (!(priv->power_mode & IWL_POWER_ENABLED))
7223 p += sprintf(p, " OFF\n");
7224 else
7225 p += sprintf(p, " \n");
7227 return p - buf + 1;
7231 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7232 store_power_level);
7234 static ssize_t show_channels(struct device *d,
7235 struct device_attribute *attr, char *buf)
7237 /* all this shit doesn't belong into sysfs anyway */
7238 return 0;
7241 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7243 static ssize_t show_statistics(struct device *d,
7244 struct device_attribute *attr, char *buf)
7246 struct iwl_priv *priv = dev_get_drvdata(d);
7247 u32 size = sizeof(struct iwl3945_notif_statistics);
7248 u32 len = 0, ofs = 0;
7249 u8 *data = (u8 *)&priv->statistics_39;
7250 int rc = 0;
7252 if (!iwl_is_alive(priv))
7253 return -EAGAIN;
7255 mutex_lock(&priv->mutex);
7256 rc = iwl3945_send_statistics_request(priv);
7257 mutex_unlock(&priv->mutex);
7259 if (rc) {
7260 len = sprintf(buf,
7261 "Error sending statistics request: 0x%08X\n", rc);
7262 return len;
7265 while (size && (PAGE_SIZE - len)) {
7266 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7267 PAGE_SIZE - len, 1);
7268 len = strlen(buf);
7269 if (PAGE_SIZE - len)
7270 buf[len++] = '\n';
7272 ofs += 16;
7273 size -= min(size, 16U);
7276 return len;
7279 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7281 static ssize_t show_antenna(struct device *d,
7282 struct device_attribute *attr, char *buf)
7284 struct iwl_priv *priv = dev_get_drvdata(d);
7286 if (!iwl_is_alive(priv))
7287 return -EAGAIN;
7289 return sprintf(buf, "%d\n", priv->antenna);
7292 static ssize_t store_antenna(struct device *d,
7293 struct device_attribute *attr,
7294 const char *buf, size_t count)
7296 int ant;
7297 struct iwl_priv *priv = dev_get_drvdata(d);
7299 if (count == 0)
7300 return 0;
7302 if (sscanf(buf, "%1i", &ant) != 1) {
7303 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7304 return count;
7307 if ((ant >= 0) && (ant <= 2)) {
7308 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7309 priv->antenna = (enum iwl3945_antenna)ant;
7310 } else
7311 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7314 return count;
7317 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7319 static ssize_t show_status(struct device *d,
7320 struct device_attribute *attr, char *buf)
7322 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7323 if (!iwl_is_alive(priv))
7324 return -EAGAIN;
7325 return sprintf(buf, "0x%08x\n", (int)priv->status);
7328 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7330 static ssize_t dump_error_log(struct device *d,
7331 struct device_attribute *attr,
7332 const char *buf, size_t count)
7334 char *p = (char *)buf;
7336 if (p[0] == '1')
7337 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
7339 return strnlen(buf, count);
7342 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7344 static ssize_t dump_event_log(struct device *d,
7345 struct device_attribute *attr,
7346 const char *buf, size_t count)
7348 char *p = (char *)buf;
7350 if (p[0] == '1')
7351 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
7353 return strnlen(buf, count);
7356 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7358 /*****************************************************************************
7360 * driver setup and tear down
7362 *****************************************************************************/
7364 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
7366 priv->workqueue = create_workqueue(DRV_NAME);
7368 init_waitqueue_head(&priv->wait_command_queue);
7370 INIT_WORK(&priv->up, iwl3945_bg_up);
7371 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7372 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7373 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7374 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7375 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7376 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7377 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7378 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7379 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7380 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
7382 iwl3945_hw_setup_deferred_work(priv);
7384 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
7385 iwl3945_irq_tasklet, (unsigned long)priv);
7388 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
7390 iwl3945_hw_cancel_deferred_work(priv);
7392 cancel_delayed_work_sync(&priv->init_alive_start);
7393 cancel_delayed_work(&priv->scan_check);
7394 cancel_delayed_work(&priv->alive_start);
7395 cancel_work_sync(&priv->beacon_update);
7398 static struct attribute *iwl3945_sysfs_entries[] = {
7399 &dev_attr_antenna.attr,
7400 &dev_attr_channels.attr,
7401 &dev_attr_dump_errors.attr,
7402 &dev_attr_dump_events.attr,
7403 &dev_attr_flags.attr,
7404 &dev_attr_filter_flags.attr,
7405 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7406 &dev_attr_measurement.attr,
7407 #endif
7408 &dev_attr_power_level.attr,
7409 &dev_attr_retry_rate.attr,
7410 &dev_attr_statistics.attr,
7411 &dev_attr_status.attr,
7412 &dev_attr_temperature.attr,
7413 &dev_attr_tx_power.attr,
7414 #ifdef CONFIG_IWL3945_DEBUG
7415 &dev_attr_debug_level.attr,
7416 #endif
7417 NULL
7420 static struct attribute_group iwl3945_attribute_group = {
7421 .name = NULL, /* put in device directory */
7422 .attrs = iwl3945_sysfs_entries,
7425 static struct ieee80211_ops iwl3945_hw_ops = {
7426 .tx = iwl3945_mac_tx,
7427 .start = iwl3945_mac_start,
7428 .stop = iwl3945_mac_stop,
7429 .add_interface = iwl3945_mac_add_interface,
7430 .remove_interface = iwl3945_mac_remove_interface,
7431 .config = iwl3945_mac_config,
7432 .config_interface = iwl3945_mac_config_interface,
7433 .configure_filter = iwl3945_configure_filter,
7434 .set_key = iwl3945_mac_set_key,
7435 .get_tx_stats = iwl3945_mac_get_tx_stats,
7436 .conf_tx = iwl3945_mac_conf_tx,
7437 .reset_tsf = iwl3945_mac_reset_tsf,
7438 .bss_info_changed = iwl3945_bss_info_changed,
7439 .hw_scan = iwl3945_mac_hw_scan
7442 int iwl3945_init_drv(struct iwl_priv *priv)
7444 int ret;
7446 priv->retry_rate = 1;
7447 priv->ibss_beacon = NULL;
7449 spin_lock_init(&priv->lock);
7450 spin_lock_init(&priv->power_data.lock);
7451 spin_lock_init(&priv->sta_lock);
7452 spin_lock_init(&priv->hcmd_lock);
7454 INIT_LIST_HEAD(&priv->free_frames);
7456 mutex_init(&priv->mutex);
7458 /* Clear the driver's (not device's) station table */
7459 iwl3945_clear_stations_table(priv);
7461 priv->data_retry_limit = -1;
7462 priv->ieee_channels = NULL;
7463 priv->ieee_rates = NULL;
7464 priv->band = IEEE80211_BAND_2GHZ;
7466 priv->iw_mode = NL80211_IFTYPE_STATION;
7468 iwl_reset_qos(priv);
7470 priv->qos_data.qos_active = 0;
7471 priv->qos_data.qos_cap.val = 0;
7473 priv->rates_mask = IWL_RATES_MASK;
7474 /* If power management is turned on, default to AC mode */
7475 priv->power_mode = IWL_POWER_AC;
7476 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
7478 ret = iwl3945_init_channel_map(priv);
7479 if (ret) {
7480 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
7481 goto err;
7484 ret = iwl3945_init_geos(priv);
7485 if (ret) {
7486 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
7487 goto err_free_channel_map;
7490 return 0;
7492 err_free_channel_map:
7493 iwl3945_free_channel_map(priv);
7494 err:
7495 return ret;
7498 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7500 int err = 0;
7501 struct iwl_priv *priv;
7502 struct ieee80211_hw *hw;
7503 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
7504 unsigned long flags;
7506 /***********************
7507 * 1. Allocating HW data
7508 * ********************/
7510 /* mac80211 allocates memory for this device instance, including
7511 * space for this driver's private structure */
7512 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
7513 if (hw == NULL) {
7514 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
7515 err = -ENOMEM;
7516 goto out;
7518 priv = hw->priv;
7519 SET_IEEE80211_DEV(hw, &pdev->dev);
7521 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
7522 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
7523 IWL_ERR(priv,
7524 "invalid queues_num, should be between %d and %d\n",
7525 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
7526 err = -EINVAL;
7527 goto out;
7531 * Disabling hardware scan means that mac80211 will perform scans
7532 * "the hard way", rather than using device's scan.
7534 if (iwl3945_mod_params.disable_hw_scan) {
7535 IWL_DEBUG_INFO("Disabling hw_scan\n");
7536 iwl3945_hw_ops.hw_scan = NULL;
7540 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7541 priv->cfg = cfg;
7542 priv->pci_dev = pdev;
7544 #ifdef CONFIG_IWL3945_DEBUG
7545 priv->debug_level = iwl3945_mod_params.debug;
7546 atomic_set(&priv->restrict_refcnt, 0);
7547 #endif
7548 hw->rate_control_algorithm = "iwl-3945-rs";
7549 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
7551 /* Select antenna (may be helpful if only one antenna is connected) */
7552 priv->antenna = (enum iwl3945_antenna)iwl3945_mod_params.antenna;
7554 /* Tell mac80211 our characteristics */
7555 hw->flags = IEEE80211_HW_SIGNAL_DBM |
7556 IEEE80211_HW_NOISE_DBM;
7558 hw->wiphy->interface_modes =
7559 BIT(NL80211_IFTYPE_STATION) |
7560 BIT(NL80211_IFTYPE_ADHOC);
7562 hw->wiphy->fw_handles_regulatory = true;
7564 /* 4 EDCA QOS priorities */
7565 hw->queues = 4;
7567 /***************************
7568 * 2. Initializing PCI bus
7569 * *************************/
7570 if (pci_enable_device(pdev)) {
7571 err = -ENODEV;
7572 goto out_ieee80211_free_hw;
7575 pci_set_master(pdev);
7577 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7578 if (!err)
7579 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7580 if (err) {
7581 IWL_WARN(priv, "No suitable DMA available.\n");
7582 goto out_pci_disable_device;
7585 pci_set_drvdata(pdev, priv);
7586 err = pci_request_regions(pdev, DRV_NAME);
7587 if (err)
7588 goto out_pci_disable_device;
7590 /***********************
7591 * 3. Read REV Register
7592 * ********************/
7593 priv->hw_base = pci_iomap(pdev, 0, 0);
7594 if (!priv->hw_base) {
7595 err = -ENODEV;
7596 goto out_pci_release_regions;
7599 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7600 (unsigned long long) pci_resource_len(pdev, 0));
7601 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7603 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7604 * PCI Tx retries from interfering with C3 CPU state */
7605 pci_write_config_byte(pdev, 0x41, 0x00);
7607 /* amp init */
7608 err = priv->cfg->ops->lib->apm_ops.init(priv);
7609 if (err < 0) {
7610 IWL_DEBUG_INFO("Failed to init APMG\n");
7611 goto out_iounmap;
7614 /***********************
7615 * 4. Read EEPROM
7616 * ********************/
7618 /* Read the EEPROM */
7619 err = iwl3945_eeprom_init(priv);
7620 if (err) {
7621 IWL_ERR(priv, "Unable to init EEPROM\n");
7622 goto out_remove_sysfs;
7624 /* MAC Address location in EEPROM same for 3945/4965 */
7625 get_eeprom_mac(priv, priv->mac_addr);
7626 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
7627 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7629 /***********************
7630 * 5. Setup HW Constants
7631 * ********************/
7632 /* Device-specific setup */
7633 if (iwl3945_hw_set_hw_params(priv)) {
7634 IWL_ERR(priv, "failed to set hw settings\n");
7635 goto out_iounmap;
7638 /***********************
7639 * 6. Setup priv
7640 * ********************/
7642 err = iwl3945_init_drv(priv);
7643 if (err) {
7644 IWL_ERR(priv, "initializing driver failed\n");
7645 goto out_free_geos;
7648 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
7649 priv->cfg->name);
7651 /***********************************
7652 * 7. Initialize Module Parameters
7653 * **********************************/
7655 /* Initialize module parameter values here */
7656 /* Disable radio (SW RF KILL) via parameter when loading driver */
7657 if (iwl3945_mod_params.disable) {
7658 set_bit(STATUS_RF_KILL_SW, &priv->status);
7659 IWL_DEBUG_INFO("Radio disabled.\n");
7663 /***********************
7664 * 8. Setup Services
7665 * ********************/
7667 spin_lock_irqsave(&priv->lock, flags);
7668 iwl3945_disable_interrupts(priv);
7669 spin_unlock_irqrestore(&priv->lock, flags);
7671 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7672 if (err) {
7673 IWL_ERR(priv, "failed to create sysfs device attributes\n");
7674 goto out_release_irq;
7677 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
7678 iwl3945_setup_deferred_work(priv);
7679 iwl3945_setup_rx_handlers(priv);
7681 /***********************
7682 * 9. Conclude
7683 * ********************/
7684 pci_save_state(pdev);
7685 pci_disable_device(pdev);
7687 /*********************************
7688 * 10. Setup and Register mac80211
7689 * *******************************/
7691 err = ieee80211_register_hw(priv->hw);
7692 if (err) {
7693 IWL_ERR(priv, "Failed to register network device: %d\n", err);
7694 goto out_remove_sysfs;
7697 priv->hw->conf.beacon_int = 100;
7698 priv->mac80211_registered = 1;
7700 err = iwl3945_rfkill_init(priv);
7701 if (err)
7702 IWL_ERR(priv, "Unable to initialize RFKILL system. "
7703 "Ignoring error: %d\n", err);
7705 return 0;
7707 out_remove_sysfs:
7708 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7709 out_free_geos:
7710 iwl3945_free_geos(priv);
7712 out_release_irq:
7713 destroy_workqueue(priv->workqueue);
7714 priv->workqueue = NULL;
7715 iwl3945_unset_hw_params(priv);
7717 out_iounmap:
7718 pci_iounmap(pdev, priv->hw_base);
7719 out_pci_release_regions:
7720 pci_release_regions(pdev);
7721 out_pci_disable_device:
7722 pci_disable_device(pdev);
7723 pci_set_drvdata(pdev, NULL);
7724 out_ieee80211_free_hw:
7725 ieee80211_free_hw(priv->hw);
7726 out:
7727 return err;
7730 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
7732 struct iwl_priv *priv = pci_get_drvdata(pdev);
7733 unsigned long flags;
7735 if (!priv)
7736 return;
7738 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
7740 set_bit(STATUS_EXIT_PENDING, &priv->status);
7742 if (priv->mac80211_registered) {
7743 ieee80211_unregister_hw(priv->hw);
7744 priv->mac80211_registered = 0;
7745 } else {
7746 iwl3945_down(priv);
7749 /* make sure we flush any pending irq or
7750 * tasklet for the driver
7752 spin_lock_irqsave(&priv->lock, flags);
7753 iwl3945_disable_interrupts(priv);
7754 spin_unlock_irqrestore(&priv->lock, flags);
7756 iwl_synchronize_irq(priv);
7758 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7760 iwl3945_rfkill_unregister(priv);
7761 iwl3945_dealloc_ucode_pci(priv);
7763 if (priv->rxq.bd)
7764 iwl3945_rx_queue_free(priv, &priv->rxq);
7765 iwl3945_hw_txq_ctx_free(priv);
7767 iwl3945_unset_hw_params(priv);
7768 iwl3945_clear_stations_table(priv);
7770 /*netif_stop_queue(dev); */
7771 flush_workqueue(priv->workqueue);
7773 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
7774 * priv->workqueue... so we can't take down the workqueue
7775 * until now... */
7776 destroy_workqueue(priv->workqueue);
7777 priv->workqueue = NULL;
7779 pci_iounmap(pdev, priv->hw_base);
7780 pci_release_regions(pdev);
7781 pci_disable_device(pdev);
7782 pci_set_drvdata(pdev, NULL);
7784 iwl3945_free_channel_map(priv);
7785 iwl3945_free_geos(priv);
7786 kfree(priv->scan39);
7787 if (priv->ibss_beacon)
7788 dev_kfree_skb(priv->ibss_beacon);
7790 ieee80211_free_hw(priv->hw);
7793 #ifdef CONFIG_PM
7795 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
7797 struct iwl_priv *priv = pci_get_drvdata(pdev);
7799 if (priv->is_open) {
7800 set_bit(STATUS_IN_SUSPEND, &priv->status);
7801 iwl3945_mac_stop(priv->hw);
7802 priv->is_open = 1;
7805 pci_set_power_state(pdev, PCI_D3hot);
7807 return 0;
7810 static int iwl3945_pci_resume(struct pci_dev *pdev)
7812 struct iwl_priv *priv = pci_get_drvdata(pdev);
7814 pci_set_power_state(pdev, PCI_D0);
7816 if (priv->is_open)
7817 iwl3945_mac_start(priv->hw);
7819 clear_bit(STATUS_IN_SUSPEND, &priv->status);
7820 return 0;
7823 #endif /* CONFIG_PM */
7825 /*************** RFKILL FUNCTIONS **********/
7826 #ifdef CONFIG_IWL3945_RFKILL
7827 /* software rf-kill from user */
7828 static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
7830 struct iwl_priv *priv = data;
7831 int err = 0;
7833 if (!priv->rfkill)
7834 return 0;
7836 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7837 return 0;
7839 IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state);
7840 mutex_lock(&priv->mutex);
7842 switch (state) {
7843 case RFKILL_STATE_UNBLOCKED:
7844 if (iwl_is_rfkill_hw(priv)) {
7845 err = -EBUSY;
7846 goto out_unlock;
7848 iwl3945_radio_kill_sw(priv, 0);
7849 break;
7850 case RFKILL_STATE_SOFT_BLOCKED:
7851 iwl3945_radio_kill_sw(priv, 1);
7852 break;
7853 default:
7854 IWL_WARN(priv, "received unexpected RFKILL state %d\n", state);
7855 break;
7857 out_unlock:
7858 mutex_unlock(&priv->mutex);
7860 return err;
7863 int iwl3945_rfkill_init(struct iwl_priv *priv)
7865 struct device *device = wiphy_dev(priv->hw->wiphy);
7866 int ret = 0;
7868 BUG_ON(device == NULL);
7870 IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
7871 priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
7872 if (!priv->rfkill) {
7873 IWL_ERR(priv, "Unable to allocate rfkill device.\n");
7874 ret = -ENOMEM;
7875 goto error;
7878 priv->rfkill->name = priv->cfg->name;
7879 priv->rfkill->data = priv;
7880 priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
7881 priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
7882 priv->rfkill->user_claim_unsupported = 1;
7884 priv->rfkill->dev.class->suspend = NULL;
7885 priv->rfkill->dev.class->resume = NULL;
7887 ret = rfkill_register(priv->rfkill);
7888 if (ret) {
7889 IWL_ERR(priv, "Unable to register rfkill: %d\n", ret);
7890 goto freed_rfkill;
7893 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
7894 return ret;
7896 freed_rfkill:
7897 if (priv->rfkill != NULL)
7898 rfkill_free(priv->rfkill);
7899 priv->rfkill = NULL;
7901 error:
7902 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
7903 return ret;
7906 void iwl3945_rfkill_unregister(struct iwl_priv *priv)
7908 if (priv->rfkill)
7909 rfkill_unregister(priv->rfkill);
7911 priv->rfkill = NULL;
7914 /* set rf-kill to the right state. */
7915 void iwl3945_rfkill_set_hw_state(struct iwl_priv *priv)
7918 if (!priv->rfkill)
7919 return;
7921 if (iwl_is_rfkill_hw(priv)) {
7922 rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
7923 return;
7926 if (!iwl_is_rfkill_sw(priv))
7927 rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
7928 else
7929 rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
7931 #endif
7933 /*****************************************************************************
7935 * driver and module entry point
7937 *****************************************************************************/
7939 static struct pci_driver iwl3945_driver = {
7940 .name = DRV_NAME,
7941 .id_table = iwl3945_hw_card_ids,
7942 .probe = iwl3945_pci_probe,
7943 .remove = __devexit_p(iwl3945_pci_remove),
7944 #ifdef CONFIG_PM
7945 .suspend = iwl3945_pci_suspend,
7946 .resume = iwl3945_pci_resume,
7947 #endif
7950 static int __init iwl3945_init(void)
7953 int ret;
7954 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
7955 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
7957 ret = iwl3945_rate_control_register();
7958 if (ret) {
7959 printk(KERN_ERR DRV_NAME
7960 "Unable to register rate control algorithm: %d\n", ret);
7961 return ret;
7964 ret = pci_register_driver(&iwl3945_driver);
7965 if (ret) {
7966 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
7967 goto error_register;
7970 return ret;
7972 error_register:
7973 iwl3945_rate_control_unregister();
7974 return ret;
7977 static void __exit iwl3945_exit(void)
7979 pci_unregister_driver(&iwl3945_driver);
7980 iwl3945_rate_control_unregister();
7983 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
7985 module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
7986 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
7987 module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
7988 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
7989 module_param_named(hwcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
7990 MODULE_PARM_DESC(hwcrypto,
7991 "using hardware crypto engine (default 0 [software])\n");
7992 module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
7993 MODULE_PARM_DESC(debug, "debug output mask");
7994 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
7995 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
7997 module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
7998 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8000 module_exit(iwl3945_exit);
8001 module_init(iwl3945_init);