1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2007-2008 Solarflare Communications Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
10 #include <linux/delay.h>
11 #include <linux/rtnetlink.h>
12 #include <linux/seq_file.h>
17 #include "falcon_hwdefs.h"
19 #include "workarounds.h"
22 /* We expect these MMDs to be in the package. SFT9001 also has a
23 * clause 22 extension MMD, but since it doesn't have all the generic
24 * MMD registers it is pointless to include it here.
26 #define TENXPRESS_REQUIRED_DEVS (MDIO_DEVS_PMAPMD | \
31 #define SFX7101_LOOPBACKS ((1 << LOOPBACK_PHYXS) | \
32 (1 << LOOPBACK_PCS) | \
33 (1 << LOOPBACK_PMAPMD) | \
34 (1 << LOOPBACK_NETWORK))
36 #define SFT9001_LOOPBACKS ((1 << LOOPBACK_GPHY) | \
37 (1 << LOOPBACK_PHYXS) | \
38 (1 << LOOPBACK_PCS) | \
39 (1 << LOOPBACK_PMAPMD) | \
40 (1 << LOOPBACK_NETWORK))
42 /* We complain if we fail to see the link partner as 10G capable this many
43 * times in a row (must be > 1 as sampling the autoneg. registers is racy)
45 #define MAX_BAD_LP_TRIES (5)
47 /* Extended control register */
48 #define PMA_PMD_XCONTROL_REG 49152
49 #define PMA_PMD_EXT_GMII_EN_LBN 1
50 #define PMA_PMD_EXT_GMII_EN_WIDTH 1
51 #define PMA_PMD_EXT_CLK_OUT_LBN 2
52 #define PMA_PMD_EXT_CLK_OUT_WIDTH 1
53 #define PMA_PMD_LNPGA_POWERDOWN_LBN 8 /* SFX7101 only */
54 #define PMA_PMD_LNPGA_POWERDOWN_WIDTH 1
55 #define PMA_PMD_EXT_CLK312_LBN 8 /* SFT9001 only */
56 #define PMA_PMD_EXT_CLK312_WIDTH 1
57 #define PMA_PMD_EXT_LPOWER_LBN 12
58 #define PMA_PMD_EXT_LPOWER_WIDTH 1
59 #define PMA_PMD_EXT_ROBUST_LBN 14
60 #define PMA_PMD_EXT_ROBUST_WIDTH 1
61 #define PMA_PMD_EXT_SSR_LBN 15
62 #define PMA_PMD_EXT_SSR_WIDTH 1
64 /* extended status register */
65 #define PMA_PMD_XSTATUS_REG 49153
66 #define PMA_PMD_XSTAT_MDIX_LBN 14
67 #define PMA_PMD_XSTAT_FLP_LBN (12)
69 /* LED control register */
70 #define PMA_PMD_LED_CTRL_REG 49159
71 #define PMA_PMA_LED_ACTIVITY_LBN (3)
73 /* LED function override register */
74 #define PMA_PMD_LED_OVERR_REG 49161
75 /* Bit positions for different LEDs (there are more but not wired on SFE4001)*/
76 #define PMA_PMD_LED_LINK_LBN (0)
77 #define PMA_PMD_LED_SPEED_LBN (2)
78 #define PMA_PMD_LED_TX_LBN (4)
79 #define PMA_PMD_LED_RX_LBN (6)
80 /* Override settings */
81 #define PMA_PMD_LED_AUTO (0) /* H/W control */
82 #define PMA_PMD_LED_ON (1)
83 #define PMA_PMD_LED_OFF (2)
84 #define PMA_PMD_LED_FLASH (3)
85 #define PMA_PMD_LED_MASK 3
86 /* All LEDs under hardware control */
87 #define PMA_PMD_LED_FULL_AUTO (0)
88 /* Green and Amber under hardware control, Red off */
89 #define PMA_PMD_LED_DEFAULT (PMA_PMD_LED_OFF << PMA_PMD_LED_RX_LBN)
91 #define PMA_PMD_SPEED_ENABLE_REG 49192
92 #define PMA_PMD_100TX_ADV_LBN 1
93 #define PMA_PMD_100TX_ADV_WIDTH 1
94 #define PMA_PMD_1000T_ADV_LBN 2
95 #define PMA_PMD_1000T_ADV_WIDTH 1
96 #define PMA_PMD_10000T_ADV_LBN 3
97 #define PMA_PMD_10000T_ADV_WIDTH 1
98 #define PMA_PMD_SPEED_LBN 4
99 #define PMA_PMD_SPEED_WIDTH 4
101 /* Cable diagnostics - SFT9001 only */
102 #define PMA_PMD_CDIAG_CTRL_REG 49213
103 #define CDIAG_CTRL_IMMED_LBN 15
104 #define CDIAG_CTRL_BRK_LINK_LBN 12
105 #define CDIAG_CTRL_IN_PROG_LBN 11
106 #define CDIAG_CTRL_LEN_UNIT_LBN 10
107 #define CDIAG_CTRL_LEN_METRES 1
108 #define PMA_PMD_CDIAG_RES_REG 49174
109 #define CDIAG_RES_A_LBN 12
110 #define CDIAG_RES_B_LBN 8
111 #define CDIAG_RES_C_LBN 4
112 #define CDIAG_RES_D_LBN 0
113 #define CDIAG_RES_WIDTH 4
114 #define CDIAG_RES_OPEN 2
115 #define CDIAG_RES_OK 1
116 #define CDIAG_RES_INVALID 0
117 /* Set of 4 registers for pairs A-D */
118 #define PMA_PMD_CDIAG_LEN_REG 49175
120 /* Serdes control registers - SFT9001 only */
121 #define PMA_PMD_CSERDES_CTRL_REG 64258
122 /* Set the 156.25 MHz output to 312.5 MHz to drive Falcon's XMAC */
123 #define PMA_PMD_CSERDES_DEFAULT 0x000f
125 /* Misc register defines - SFX7101 only */
126 #define PCS_CLOCK_CTRL_REG 55297
127 #define PLL312_RST_N_LBN 2
129 #define PCS_SOFT_RST2_REG 55302
130 #define SERDES_RST_N_LBN 13
131 #define XGXS_RST_N_LBN 12
133 #define PCS_TEST_SELECT_REG 55303 /* PRM 10.5.8 */
134 #define CLK312_EN_LBN 3
136 /* PHYXS registers */
137 #define PHYXS_XCONTROL_REG 49152
138 #define PHYXS_RESET_LBN 15
139 #define PHYXS_RESET_WIDTH 1
141 #define PHYXS_TEST1 (49162)
142 #define LOOPBACK_NEAR_LBN (8)
143 #define LOOPBACK_NEAR_WIDTH (1)
145 /* Boot status register */
146 #define PCS_BOOT_STATUS_REG 53248
147 #define PCS_BOOT_FATAL_ERROR_LBN 0
148 #define PCS_BOOT_PROGRESS_LBN 1
149 #define PCS_BOOT_PROGRESS_WIDTH 2
150 #define PCS_BOOT_PROGRESS_INIT 0
151 #define PCS_BOOT_PROGRESS_WAIT_MDIO 1
152 #define PCS_BOOT_PROGRESS_CHECKSUM 2
153 #define PCS_BOOT_PROGRESS_JUMP 3
154 #define PCS_BOOT_DOWNLOAD_WAIT_LBN 3
155 #define PCS_BOOT_CODE_STARTED_LBN 4
157 /* 100M/1G PHY registers */
158 #define GPHY_XCONTROL_REG 49152
159 #define GPHY_ISOLATE_LBN 10
160 #define GPHY_ISOLATE_WIDTH 1
161 #define GPHY_DUPLEX_LBN 8
162 #define GPHY_DUPLEX_WIDTH 1
163 #define GPHY_LOOPBACK_NEAR_LBN 14
164 #define GPHY_LOOPBACK_NEAR_WIDTH 1
166 #define C22EXT_STATUS_REG 49153
167 #define C22EXT_STATUS_LINK_LBN 2
168 #define C22EXT_STATUS_LINK_WIDTH 1
170 #define C22EXT_MSTSLV_CTRL 49161
171 #define C22EXT_MSTSLV_CTRL_ADV_1000_HD_LBN 8
172 #define C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN 9
174 #define C22EXT_MSTSLV_STATUS 49162
175 #define C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN 10
176 #define C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN 11
178 /* Time to wait between powering down the LNPGA and turning off the power
180 #define LNPGA_PDOWN_WAIT (HZ / 5)
182 struct tenxpress_phy_data
{
183 enum efx_loopback_mode loopback_mode
;
184 enum efx_phy_mode phy_mode
;
188 static ssize_t
show_phy_short_reach(struct device
*dev
,
189 struct device_attribute
*attr
, char *buf
)
191 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
194 reg
= efx_mdio_read(efx
, MDIO_MMD_PMAPMD
, MDIO_PMA_10GBT_TXPWR
);
195 return sprintf(buf
, "%d\n", !!(reg
& MDIO_PMA_10GBT_TXPWR_SHORT
));
198 static ssize_t
set_phy_short_reach(struct device
*dev
,
199 struct device_attribute
*attr
,
200 const char *buf
, size_t count
)
202 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
205 efx_mdio_set_flag(efx
, MDIO_MMD_PMAPMD
, MDIO_PMA_10GBT_TXPWR
,
206 MDIO_PMA_10GBT_TXPWR_SHORT
,
207 count
!= 0 && *buf
!= '0');
208 efx_reconfigure_port(efx
);
214 static DEVICE_ATTR(phy_short_reach
, 0644, show_phy_short_reach
,
215 set_phy_short_reach
);
217 int sft9001_wait_boot(struct efx_nic
*efx
)
219 unsigned long timeout
= jiffies
+ HZ
+ 1;
223 boot_stat
= efx_mdio_read(efx
, MDIO_MMD_PCS
,
224 PCS_BOOT_STATUS_REG
);
225 if (boot_stat
>= 0) {
226 EFX_LOG(efx
, "PHY boot status = %#x\n", boot_stat
);
228 ((1 << PCS_BOOT_FATAL_ERROR_LBN
) |
229 (3 << PCS_BOOT_PROGRESS_LBN
) |
230 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN
) |
231 (1 << PCS_BOOT_CODE_STARTED_LBN
))) {
232 case ((1 << PCS_BOOT_FATAL_ERROR_LBN
) |
233 (PCS_BOOT_PROGRESS_CHECKSUM
<<
234 PCS_BOOT_PROGRESS_LBN
)):
235 case ((1 << PCS_BOOT_FATAL_ERROR_LBN
) |
236 (PCS_BOOT_PROGRESS_INIT
<<
237 PCS_BOOT_PROGRESS_LBN
) |
238 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN
)):
240 case ((PCS_BOOT_PROGRESS_WAIT_MDIO
<<
241 PCS_BOOT_PROGRESS_LBN
) |
242 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN
)):
243 return (efx
->phy_mode
& PHY_MODE_SPECIAL
) ?
245 case ((PCS_BOOT_PROGRESS_JUMP
<<
246 PCS_BOOT_PROGRESS_LBN
) |
247 (1 << PCS_BOOT_CODE_STARTED_LBN
)):
248 case ((PCS_BOOT_PROGRESS_JUMP
<<
249 PCS_BOOT_PROGRESS_LBN
) |
250 (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN
) |
251 (1 << PCS_BOOT_CODE_STARTED_LBN
)):
252 return (efx
->phy_mode
& PHY_MODE_SPECIAL
) ?
255 if (boot_stat
& (1 << PCS_BOOT_FATAL_ERROR_LBN
))
261 if (time_after_eq(jiffies
, timeout
))
268 static int tenxpress_init(struct efx_nic
*efx
)
272 if (efx
->phy_type
== PHY_TYPE_SFX7101
) {
273 /* Enable 312.5 MHz clock */
274 efx_mdio_write(efx
, MDIO_MMD_PCS
, PCS_TEST_SELECT_REG
,
277 /* Enable 312.5 MHz clock and GMII */
278 reg
= efx_mdio_read(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_XCONTROL_REG
);
279 reg
|= ((1 << PMA_PMD_EXT_GMII_EN_LBN
) |
280 (1 << PMA_PMD_EXT_CLK_OUT_LBN
) |
281 (1 << PMA_PMD_EXT_CLK312_LBN
) |
282 (1 << PMA_PMD_EXT_ROBUST_LBN
));
284 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_XCONTROL_REG
, reg
);
285 efx_mdio_set_flag(efx
, MDIO_MMD_C22EXT
,
286 GPHY_XCONTROL_REG
, 1 << GPHY_ISOLATE_LBN
,
290 /* Set the LEDs up as: Green = Link, Amber = Link/Act, Red = Off */
291 if (efx
->phy_type
== PHY_TYPE_SFX7101
) {
292 efx_mdio_set_flag(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_LED_CTRL_REG
,
293 1 << PMA_PMA_LED_ACTIVITY_LBN
, true);
294 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_LED_OVERR_REG
,
295 PMA_PMD_LED_DEFAULT
);
301 static int tenxpress_phy_init(struct efx_nic
*efx
)
303 struct tenxpress_phy_data
*phy_data
;
307 phy_data
= kzalloc(sizeof(*phy_data
), GFP_KERNEL
);
310 efx
->phy_data
= phy_data
;
311 phy_data
->phy_mode
= efx
->phy_mode
;
313 if (!(efx
->phy_mode
& PHY_MODE_SPECIAL
)) {
314 if (efx
->phy_type
== PHY_TYPE_SFT9001A
) {
316 reg
= efx_mdio_read(efx
, MDIO_MMD_PMAPMD
,
317 PMA_PMD_XCONTROL_REG
);
318 reg
|= (1 << PMA_PMD_EXT_SSR_LBN
);
319 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
,
320 PMA_PMD_XCONTROL_REG
, reg
);
324 rc
= efx_mdio_wait_reset_mmds(efx
, TENXPRESS_REQUIRED_DEVS
);
328 rc
= efx_mdio_check_mmds(efx
, TENXPRESS_REQUIRED_DEVS
, 0);
333 rc
= tenxpress_init(efx
);
337 /* Set pause advertising */
338 old_adv
= efx_mdio_read(efx
, MDIO_MMD_AN
, MDIO_AN_ADVERTISE
);
339 adv
= ((old_adv
& ~(ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
)) |
340 mii_advertise_flowctrl(efx
->wanted_fc
));
341 if (adv
!= old_adv
) {
342 efx_mdio_write(efx
, MDIO_MMD_AN
, MDIO_AN_ADVERTISE
, adv
);
343 mdio45_nway_restart(&efx
->mdio
);
346 if (efx
->phy_type
== PHY_TYPE_SFT9001B
) {
347 rc
= device_create_file(&efx
->pci_dev
->dev
,
348 &dev_attr_phy_short_reach
);
353 schedule_timeout_uninterruptible(HZ
/ 5); /* 200ms */
355 /* Let XGXS and SerDes out of reset */
356 falcon_reset_xaui(efx
);
361 kfree(efx
->phy_data
);
362 efx
->phy_data
= NULL
;
366 /* Perform a "special software reset" on the PHY. The caller is
367 * responsible for saving and restoring the PHY hardware registers
368 * properly, and masking/unmasking LASI */
369 static int tenxpress_special_reset(struct efx_nic
*efx
)
373 /* The XGMAC clock is driven from the SFC7101/SFT9001 312MHz clock, so
374 * a special software reset can glitch the XGMAC sufficiently for stats
375 * requests to fail. */
376 efx_stats_disable(efx
);
379 reg
= efx_mdio_read(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_XCONTROL_REG
);
380 reg
|= (1 << PMA_PMD_EXT_SSR_LBN
);
381 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_XCONTROL_REG
, reg
);
385 /* Wait for the blocks to come out of reset */
386 rc
= efx_mdio_wait_reset_mmds(efx
, TENXPRESS_REQUIRED_DEVS
);
390 /* Try and reconfigure the device */
391 rc
= tenxpress_init(efx
);
395 /* Wait for the XGXS state machine to churn */
398 efx_stats_enable(efx
);
402 static void sfx7101_check_bad_lp(struct efx_nic
*efx
, bool link_ok
)
404 struct tenxpress_phy_data
*pd
= efx
->phy_data
;
411 /* Check that AN has started but not completed. */
412 reg
= efx_mdio_read(efx
, MDIO_MMD_AN
, MDIO_STAT1
);
413 if (!(reg
& MDIO_AN_STAT1_LPABLE
))
414 return; /* LP status is unknown */
415 bad_lp
= !(reg
& MDIO_AN_STAT1_COMPLETE
);
420 /* Nothing to do if all is well and was previously so. */
421 if (!pd
->bad_lp_tries
)
424 /* Use the RX (red) LED as an error indicator once we've seen AN
425 * failure several times in a row, and also log a message. */
426 if (!bad_lp
|| pd
->bad_lp_tries
== MAX_BAD_LP_TRIES
) {
427 reg
= efx_mdio_read(efx
, MDIO_MMD_PMAPMD
,
428 PMA_PMD_LED_OVERR_REG
);
429 reg
&= ~(PMA_PMD_LED_MASK
<< PMA_PMD_LED_RX_LBN
);
431 reg
|= PMA_PMD_LED_OFF
<< PMA_PMD_LED_RX_LBN
;
433 reg
|= PMA_PMD_LED_FLASH
<< PMA_PMD_LED_RX_LBN
;
434 EFX_ERR(efx
, "appears to be plugged into a port"
435 " that is not 10GBASE-T capable. The PHY"
436 " supports 10GBASE-T ONLY, so no link can"
437 " be established\n");
439 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
,
440 PMA_PMD_LED_OVERR_REG
, reg
);
441 pd
->bad_lp_tries
= bad_lp
;
445 static bool sfx7101_link_ok(struct efx_nic
*efx
)
447 return efx_mdio_links_ok(efx
,
453 static bool sft9001_link_ok(struct efx_nic
*efx
, struct ethtool_cmd
*ecmd
)
457 if (efx_phy_mode_disabled(efx
->phy_mode
))
459 else if (efx
->loopback_mode
== LOOPBACK_GPHY
)
461 else if (efx
->loopback_mode
)
462 return efx_mdio_links_ok(efx
,
466 /* We must use the same definition of link state as LASI,
467 * otherwise we can miss a link state transition
469 if (ecmd
->speed
== 10000) {
470 reg
= efx_mdio_read(efx
, MDIO_MMD_PCS
, MDIO_PCS_10GBRT_STAT1
);
471 return reg
& MDIO_PCS_10GBRT_STAT1_BLKLK
;
473 reg
= efx_mdio_read(efx
, MDIO_MMD_C22EXT
, C22EXT_STATUS_REG
);
474 return reg
& (1 << C22EXT_STATUS_LINK_LBN
);
478 static void tenxpress_ext_loopback(struct efx_nic
*efx
)
480 efx_mdio_set_flag(efx
, MDIO_MMD_PHYXS
, PHYXS_TEST1
,
481 1 << LOOPBACK_NEAR_LBN
,
482 efx
->loopback_mode
== LOOPBACK_PHYXS
);
483 if (efx
->phy_type
!= PHY_TYPE_SFX7101
)
484 efx_mdio_set_flag(efx
, MDIO_MMD_C22EXT
, GPHY_XCONTROL_REG
,
485 1 << GPHY_LOOPBACK_NEAR_LBN
,
486 efx
->loopback_mode
== LOOPBACK_GPHY
);
489 static void tenxpress_low_power(struct efx_nic
*efx
)
491 if (efx
->phy_type
== PHY_TYPE_SFX7101
)
492 efx_mdio_set_mmds_lpower(
493 efx
, !!(efx
->phy_mode
& PHY_MODE_LOW_POWER
),
494 TENXPRESS_REQUIRED_DEVS
);
497 efx
, MDIO_MMD_PMAPMD
, PMA_PMD_XCONTROL_REG
,
498 1 << PMA_PMD_EXT_LPOWER_LBN
,
499 !!(efx
->phy_mode
& PHY_MODE_LOW_POWER
));
502 static void tenxpress_phy_reconfigure(struct efx_nic
*efx
)
504 struct tenxpress_phy_data
*phy_data
= efx
->phy_data
;
505 struct ethtool_cmd ecmd
;
506 bool phy_mode_change
, loop_reset
;
508 if (efx
->phy_mode
& (PHY_MODE_OFF
| PHY_MODE_SPECIAL
)) {
509 phy_data
->phy_mode
= efx
->phy_mode
;
513 tenxpress_low_power(efx
);
515 phy_mode_change
= (efx
->phy_mode
== PHY_MODE_NORMAL
&&
516 phy_data
->phy_mode
!= PHY_MODE_NORMAL
);
517 loop_reset
= (LOOPBACK_OUT_OF(phy_data
, efx
, efx
->phy_op
->loopbacks
) ||
518 LOOPBACK_CHANGED(phy_data
, efx
, 1 << LOOPBACK_GPHY
));
520 if (loop_reset
|| phy_mode_change
) {
523 efx
->phy_op
->get_settings(efx
, &ecmd
);
525 if (loop_reset
|| phy_mode_change
) {
526 tenxpress_special_reset(efx
);
528 /* Reset XAUI if we were in 10G, and are staying
529 * in 10G. If we're moving into and out of 10G
530 * then xaui will be reset anyway */
532 falcon_reset_xaui(efx
);
535 rc
= efx
->phy_op
->set_settings(efx
, &ecmd
);
539 efx_mdio_transmit_disable(efx
);
540 efx_mdio_phy_reconfigure(efx
);
541 tenxpress_ext_loopback(efx
);
543 phy_data
->loopback_mode
= efx
->loopback_mode
;
544 phy_data
->phy_mode
= efx
->phy_mode
;
546 if (efx
->phy_type
== PHY_TYPE_SFX7101
) {
547 efx
->link_speed
= 10000;
549 efx
->link_up
= sfx7101_link_ok(efx
);
551 efx
->phy_op
->get_settings(efx
, &ecmd
);
552 efx
->link_speed
= ecmd
.speed
;
553 efx
->link_fd
= ecmd
.duplex
== DUPLEX_FULL
;
554 efx
->link_up
= sft9001_link_ok(efx
, &ecmd
);
556 efx
->link_fc
= efx_mdio_get_pause(efx
);
559 /* Poll PHY for interrupt */
560 static void tenxpress_phy_poll(struct efx_nic
*efx
)
562 struct tenxpress_phy_data
*phy_data
= efx
->phy_data
;
565 if (efx
->phy_type
== PHY_TYPE_SFX7101
) {
566 bool link_ok
= sfx7101_link_ok(efx
);
567 if (link_ok
!= efx
->link_up
) {
570 unsigned int link_fc
= efx_mdio_get_pause(efx
);
571 if (link_fc
!= efx
->link_fc
)
574 sfx7101_check_bad_lp(efx
, link_ok
);
575 } else if (efx
->loopback_mode
) {
576 bool link_ok
= sft9001_link_ok(efx
, NULL
);
577 if (link_ok
!= efx
->link_up
)
580 int status
= efx_mdio_read(efx
, MDIO_MMD_PMAPMD
,
582 if (status
& MDIO_PMA_LASI_LSALARM
)
587 falcon_sim_phy_event(efx
);
589 if (phy_data
->phy_mode
!= PHY_MODE_NORMAL
)
593 static void tenxpress_phy_fini(struct efx_nic
*efx
)
597 if (efx
->phy_type
== PHY_TYPE_SFT9001B
)
598 device_remove_file(&efx
->pci_dev
->dev
,
599 &dev_attr_phy_short_reach
);
601 if (efx
->phy_type
== PHY_TYPE_SFX7101
) {
602 /* Power down the LNPGA */
603 reg
= (1 << PMA_PMD_LNPGA_POWERDOWN_LBN
);
604 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_XCONTROL_REG
, reg
);
606 /* Waiting here ensures that the board fini, which can turn
607 * off the power to the PHY, won't get run until the LNPGA
608 * powerdown has been given long enough to complete. */
609 schedule_timeout_uninterruptible(LNPGA_PDOWN_WAIT
); /* 200 ms */
612 kfree(efx
->phy_data
);
613 efx
->phy_data
= NULL
;
617 /* Set the RX and TX LEDs and Link LED flashing. The other LEDs
618 * (which probably aren't wired anyway) are left in AUTO mode */
619 void tenxpress_phy_blink(struct efx_nic
*efx
, bool blink
)
624 reg
= (PMA_PMD_LED_FLASH
<< PMA_PMD_LED_TX_LBN
) |
625 (PMA_PMD_LED_FLASH
<< PMA_PMD_LED_RX_LBN
) |
626 (PMA_PMD_LED_FLASH
<< PMA_PMD_LED_LINK_LBN
);
628 reg
= PMA_PMD_LED_DEFAULT
;
630 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_LED_OVERR_REG
, reg
);
633 static const char *const sfx7101_test_names
[] = {
638 sfx7101_run_tests(struct efx_nic
*efx
, int *results
, unsigned flags
)
642 if (!(flags
& ETH_TEST_FL_OFFLINE
))
645 /* BIST is automatically run after a special software reset */
646 rc
= tenxpress_special_reset(efx
);
647 results
[0] = rc
? -1 : 1;
651 static const char *const sft9001_test_names
[] = {
653 "cable.pairA.status",
654 "cable.pairB.status",
655 "cable.pairC.status",
656 "cable.pairD.status",
657 "cable.pairA.length",
658 "cable.pairB.length",
659 "cable.pairC.length",
660 "cable.pairD.length",
663 static int sft9001_run_tests(struct efx_nic
*efx
, int *results
, unsigned flags
)
665 struct ethtool_cmd ecmd
;
666 int rc
= 0, rc2
, i
, ctrl_reg
, res_reg
;
668 if (flags
& ETH_TEST_FL_OFFLINE
)
669 efx
->phy_op
->get_settings(efx
, &ecmd
);
671 /* Initialise cable diagnostic results to unknown failure */
672 for (i
= 1; i
< 9; ++i
)
675 /* Run cable diagnostics; wait up to 5 seconds for them to complete.
676 * A cable fault is not a self-test failure, but a timeout is. */
677 ctrl_reg
= ((1 << CDIAG_CTRL_IMMED_LBN
) |
678 (CDIAG_CTRL_LEN_METRES
<< CDIAG_CTRL_LEN_UNIT_LBN
));
679 if (flags
& ETH_TEST_FL_OFFLINE
) {
680 /* Break the link in order to run full diagnostics. We
681 * must reset the PHY to resume normal service. */
682 ctrl_reg
|= (1 << CDIAG_CTRL_BRK_LINK_LBN
);
684 efx_mdio_write(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_CDIAG_CTRL_REG
,
687 while (efx_mdio_read(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_CDIAG_CTRL_REG
) &
688 (1 << CDIAG_CTRL_IN_PROG_LBN
)) {
695 res_reg
= efx_mdio_read(efx
, MDIO_MMD_PMAPMD
, PMA_PMD_CDIAG_RES_REG
);
696 for (i
= 0; i
< 4; i
++) {
698 (res_reg
>> (CDIAG_RES_A_LBN
- i
* CDIAG_RES_WIDTH
))
699 & ((1 << CDIAG_RES_WIDTH
) - 1);
700 int len_reg
= efx_mdio_read(efx
, MDIO_MMD_PMAPMD
,
701 PMA_PMD_CDIAG_LEN_REG
+ i
);
702 if (pair_res
== CDIAG_RES_OK
)
704 else if (pair_res
== CDIAG_RES_INVALID
)
707 results
[1 + i
] = -pair_res
;
708 if (pair_res
!= CDIAG_RES_INVALID
&&
709 pair_res
!= CDIAG_RES_OPEN
&&
711 results
[5 + i
] = len_reg
;
715 if (flags
& ETH_TEST_FL_OFFLINE
) {
716 /* Reset, running the BIST and then resuming normal service. */
717 rc2
= tenxpress_special_reset(efx
);
718 results
[0] = rc2
? -1 : 1;
722 rc2
= efx
->phy_op
->set_settings(efx
, &ecmd
);
731 tenxpress_get_settings(struct efx_nic
*efx
, struct ethtool_cmd
*ecmd
)
733 u32 adv
= 0, lpa
= 0;
736 if (efx
->phy_type
!= PHY_TYPE_SFX7101
) {
737 reg
= efx_mdio_read(efx
, MDIO_MMD_C22EXT
, C22EXT_MSTSLV_CTRL
);
738 if (reg
& (1 << C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN
))
739 adv
|= ADVERTISED_1000baseT_Full
;
740 reg
= efx_mdio_read(efx
, MDIO_MMD_C22EXT
, C22EXT_MSTSLV_STATUS
);
741 if (reg
& (1 << C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN
))
742 lpa
|= ADVERTISED_1000baseT_Half
;
743 if (reg
& (1 << C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN
))
744 lpa
|= ADVERTISED_1000baseT_Full
;
746 reg
= efx_mdio_read(efx
, MDIO_MMD_AN
, MDIO_AN_10GBT_CTRL
);
747 if (reg
& MDIO_AN_10GBT_CTRL_ADV10G
)
748 adv
|= ADVERTISED_10000baseT_Full
;
749 reg
= efx_mdio_read(efx
, MDIO_MMD_AN
, MDIO_AN_10GBT_STAT
);
750 if (reg
& MDIO_AN_10GBT_STAT_LP10G
)
751 lpa
|= ADVERTISED_10000baseT_Full
;
753 mdio45_ethtool_gset_npage(&efx
->mdio
, ecmd
, adv
, lpa
);
755 ecmd
->supported
|= SUPPORTED_Pause
| SUPPORTED_Asym_Pause
;
756 if (efx
->phy_type
!= PHY_TYPE_SFX7101
) {
757 ecmd
->supported
|= (SUPPORTED_100baseT_Full
|
758 SUPPORTED_1000baseT_Full
);
759 if (ecmd
->speed
!= SPEED_10000
) {
761 (efx_mdio_read(efx
, MDIO_MMD_PMAPMD
,
762 PMA_PMD_XSTATUS_REG
) &
763 (1 << PMA_PMD_XSTAT_MDIX_LBN
))
764 ? ETH_TP_MDI_X
: ETH_TP_MDI
;
768 /* In loopback, the PHY automatically brings up the correct interface,
769 * but doesn't advertise the correct speed. So override it */
770 if (efx
->loopback_mode
== LOOPBACK_GPHY
)
771 ecmd
->speed
= SPEED_1000
;
772 else if (LOOPBACK_MASK(efx
) & efx
->phy_op
->loopbacks
)
773 ecmd
->speed
= SPEED_10000
;
776 static int tenxpress_set_settings(struct efx_nic
*efx
, struct ethtool_cmd
*ecmd
)
781 return efx_mdio_set_settings(efx
, ecmd
);
784 static void sfx7101_set_npage_adv(struct efx_nic
*efx
, u32 advertising
)
786 efx_mdio_set_flag(efx
, MDIO_MMD_AN
, MDIO_AN_10GBT_CTRL
,
787 MDIO_AN_10GBT_CTRL_ADV10G
,
788 advertising
& ADVERTISED_10000baseT_Full
);
791 static void sft9001_set_npage_adv(struct efx_nic
*efx
, u32 advertising
)
793 efx_mdio_set_flag(efx
, MDIO_MMD_C22EXT
, C22EXT_MSTSLV_CTRL
,
794 1 << C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN
,
795 advertising
& ADVERTISED_1000baseT_Full
);
796 efx_mdio_set_flag(efx
, MDIO_MMD_AN
, MDIO_AN_10GBT_CTRL
,
797 MDIO_AN_10GBT_CTRL_ADV10G
,
798 advertising
& ADVERTISED_10000baseT_Full
);
801 struct efx_phy_operations falcon_sfx7101_phy_ops
= {
803 .init
= tenxpress_phy_init
,
804 .reconfigure
= tenxpress_phy_reconfigure
,
805 .poll
= tenxpress_phy_poll
,
806 .fini
= tenxpress_phy_fini
,
807 .clear_interrupt
= efx_port_dummy_op_void
,
808 .get_settings
= tenxpress_get_settings
,
809 .set_settings
= tenxpress_set_settings
,
810 .set_npage_adv
= sfx7101_set_npage_adv
,
811 .num_tests
= ARRAY_SIZE(sfx7101_test_names
),
812 .test_names
= sfx7101_test_names
,
813 .run_tests
= sfx7101_run_tests
,
814 .mmds
= TENXPRESS_REQUIRED_DEVS
,
815 .loopbacks
= SFX7101_LOOPBACKS
,
818 struct efx_phy_operations falcon_sft9001_phy_ops
= {
819 .macs
= EFX_GMAC
| EFX_XMAC
,
820 .init
= tenxpress_phy_init
,
821 .reconfigure
= tenxpress_phy_reconfigure
,
822 .poll
= tenxpress_phy_poll
,
823 .fini
= tenxpress_phy_fini
,
824 .clear_interrupt
= efx_port_dummy_op_void
,
825 .get_settings
= tenxpress_get_settings
,
826 .set_settings
= tenxpress_set_settings
,
827 .set_npage_adv
= sft9001_set_npage_adv
,
828 .num_tests
= ARRAY_SIZE(sft9001_test_names
),
829 .test_names
= sft9001_test_names
,
830 .run_tests
= sft9001_run_tests
,
831 .mmds
= TENXPRESS_REQUIRED_DEVS
,
832 .loopbacks
= SFT9001_LOOPBACKS
,