2 * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
4 * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/delay.h>
12 #include <linux/highmem.h>
13 #include <linux/pci.h>
14 #include <linux/dma-mapping.h>
16 #include <linux/mmc/host.h>
17 #include <linux/mmc/protocol.h>
19 #include <asm/scatterlist.h>
23 #define DRIVER_NAME "sdhci"
24 #define DRIVER_VERSION "0.12"
26 #define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
28 #define DBG(f, x...) \
29 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
31 static unsigned int debug_nodma
= 0;
32 static unsigned int debug_forcedma
= 0;
33 static unsigned int debug_quirks
= 0;
35 static const struct pci_device_id pci_ids
[] __devinitdata
= {
36 /* handle any SD host controller */
37 {PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI
<< 8), 0xFFFF00)},
38 { /* end: all zeroes */ },
41 MODULE_DEVICE_TABLE(pci
, pci_ids
);
43 static void sdhci_prepare_data(struct sdhci_host
*, struct mmc_data
*);
44 static void sdhci_finish_data(struct sdhci_host
*);
46 static void sdhci_send_command(struct sdhci_host
*, struct mmc_command
*);
47 static void sdhci_finish_command(struct sdhci_host
*);
49 static void sdhci_dumpregs(struct sdhci_host
*host
)
51 printk(KERN_DEBUG DRIVER_NAME
": ============== REGISTER DUMP ==============\n");
53 printk(KERN_DEBUG DRIVER_NAME
": Sys addr: 0x%08x | Version: 0x%08x\n",
54 readl(host
->ioaddr
+ SDHCI_DMA_ADDRESS
),
55 readw(host
->ioaddr
+ SDHCI_HOST_VERSION
));
56 printk(KERN_DEBUG DRIVER_NAME
": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
57 readw(host
->ioaddr
+ SDHCI_BLOCK_SIZE
),
58 readw(host
->ioaddr
+ SDHCI_BLOCK_COUNT
));
59 printk(KERN_DEBUG DRIVER_NAME
": Argument: 0x%08x | Trn mode: 0x%08x\n",
60 readl(host
->ioaddr
+ SDHCI_ARGUMENT
),
61 readw(host
->ioaddr
+ SDHCI_TRANSFER_MODE
));
62 printk(KERN_DEBUG DRIVER_NAME
": Present: 0x%08x | Host ctl: 0x%08x\n",
63 readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
),
64 readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
));
65 printk(KERN_DEBUG DRIVER_NAME
": Power: 0x%08x | Blk gap: 0x%08x\n",
66 readb(host
->ioaddr
+ SDHCI_POWER_CONTROL
),
67 readb(host
->ioaddr
+ SDHCI_BLOCK_GAP_CONTROL
));
68 printk(KERN_DEBUG DRIVER_NAME
": Wake-up: 0x%08x | Clock: 0x%08x\n",
69 readb(host
->ioaddr
+ SDHCI_WALK_UP_CONTROL
),
70 readw(host
->ioaddr
+ SDHCI_CLOCK_CONTROL
));
71 printk(KERN_DEBUG DRIVER_NAME
": Timeout: 0x%08x | Int stat: 0x%08x\n",
72 readb(host
->ioaddr
+ SDHCI_TIMEOUT_CONTROL
),
73 readl(host
->ioaddr
+ SDHCI_INT_STATUS
));
74 printk(KERN_DEBUG DRIVER_NAME
": Int enab: 0x%08x | Sig enab: 0x%08x\n",
75 readl(host
->ioaddr
+ SDHCI_INT_ENABLE
),
76 readl(host
->ioaddr
+ SDHCI_SIGNAL_ENABLE
));
77 printk(KERN_DEBUG DRIVER_NAME
": AC12 err: 0x%08x | Slot int: 0x%08x\n",
78 readw(host
->ioaddr
+ SDHCI_ACMD12_ERR
),
79 readw(host
->ioaddr
+ SDHCI_SLOT_INT_STATUS
));
80 printk(KERN_DEBUG DRIVER_NAME
": Caps: 0x%08x | Max curr: 0x%08x\n",
81 readl(host
->ioaddr
+ SDHCI_CAPABILITIES
),
82 readl(host
->ioaddr
+ SDHCI_MAX_CURRENT
));
84 printk(KERN_DEBUG DRIVER_NAME
": ===========================================\n");
87 /*****************************************************************************\
89 * Low level functions *
91 \*****************************************************************************/
93 static void sdhci_reset(struct sdhci_host
*host
, u8 mask
)
95 unsigned long timeout
;
97 writeb(mask
, host
->ioaddr
+ SDHCI_SOFTWARE_RESET
);
99 if (mask
& SDHCI_RESET_ALL
)
102 /* Wait max 100 ms */
105 /* hw clears the bit when it's done */
106 while (readb(host
->ioaddr
+ SDHCI_SOFTWARE_RESET
) & mask
) {
108 printk(KERN_ERR
"%s: Reset 0x%x never completed. "
109 "Please report this to " BUGMAIL
".\n",
110 mmc_hostname(host
->mmc
), (int)mask
);
111 sdhci_dumpregs(host
);
119 static void sdhci_init(struct sdhci_host
*host
)
123 sdhci_reset(host
, SDHCI_RESET_ALL
);
125 intmask
= SDHCI_INT_BUS_POWER
| SDHCI_INT_DATA_END_BIT
|
126 SDHCI_INT_DATA_CRC
| SDHCI_INT_DATA_TIMEOUT
| SDHCI_INT_INDEX
|
127 SDHCI_INT_END_BIT
| SDHCI_INT_CRC
| SDHCI_INT_TIMEOUT
|
128 SDHCI_INT_CARD_REMOVE
| SDHCI_INT_CARD_INSERT
|
129 SDHCI_INT_DATA_AVAIL
| SDHCI_INT_SPACE_AVAIL
|
130 SDHCI_INT_DMA_END
| SDHCI_INT_DATA_END
| SDHCI_INT_RESPONSE
;
132 writel(intmask
, host
->ioaddr
+ SDHCI_INT_ENABLE
);
133 writel(intmask
, host
->ioaddr
+ SDHCI_SIGNAL_ENABLE
);
136 static void sdhci_activate_led(struct sdhci_host
*host
)
140 ctrl
= readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
);
141 ctrl
|= SDHCI_CTRL_LED
;
142 writeb(ctrl
, host
->ioaddr
+ SDHCI_HOST_CONTROL
);
145 static void sdhci_deactivate_led(struct sdhci_host
*host
)
149 ctrl
= readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
);
150 ctrl
&= ~SDHCI_CTRL_LED
;
151 writeb(ctrl
, host
->ioaddr
+ SDHCI_HOST_CONTROL
);
154 /*****************************************************************************\
158 \*****************************************************************************/
160 static inline char* sdhci_kmap_sg(struct sdhci_host
* host
)
162 host
->mapped_sg
= kmap_atomic(host
->cur_sg
->page
, KM_BIO_SRC_IRQ
);
163 return host
->mapped_sg
+ host
->cur_sg
->offset
;
166 static inline void sdhci_kunmap_sg(struct sdhci_host
* host
)
168 kunmap_atomic(host
->mapped_sg
, KM_BIO_SRC_IRQ
);
171 static inline int sdhci_next_sg(struct sdhci_host
* host
)
174 * Skip to next SG entry.
182 if (host
->num_sg
> 0) {
184 host
->remain
= host
->cur_sg
->length
;
190 static void sdhci_read_block_pio(struct sdhci_host
*host
)
192 int blksize
, chunk_remain
;
197 DBG("PIO reading\n");
199 blksize
= host
->data
->blksz
;
203 buffer
= sdhci_kmap_sg(host
) + host
->offset
;
206 if (chunk_remain
== 0) {
207 data
= readl(host
->ioaddr
+ SDHCI_BUFFER
);
208 chunk_remain
= min(blksize
, 4);
211 size
= min(host
->size
, host
->remain
);
212 size
= min(size
, chunk_remain
);
214 chunk_remain
-= size
;
216 host
->offset
+= size
;
217 host
->remain
-= size
;
220 *buffer
= data
& 0xFF;
226 if (host
->remain
== 0) {
227 sdhci_kunmap_sg(host
);
228 if (sdhci_next_sg(host
) == 0) {
229 BUG_ON(blksize
!= 0);
232 buffer
= sdhci_kmap_sg(host
);
236 sdhci_kunmap_sg(host
);
239 static void sdhci_write_block_pio(struct sdhci_host
*host
)
241 int blksize
, chunk_remain
;
246 DBG("PIO writing\n");
248 blksize
= host
->data
->blksz
;
253 buffer
= sdhci_kmap_sg(host
) + host
->offset
;
256 size
= min(host
->size
, host
->remain
);
257 size
= min(size
, chunk_remain
);
259 chunk_remain
-= size
;
261 host
->offset
+= size
;
262 host
->remain
-= size
;
266 data
|= (u32
)*buffer
<< 24;
271 if (chunk_remain
== 0) {
272 writel(data
, host
->ioaddr
+ SDHCI_BUFFER
);
273 chunk_remain
= min(blksize
, 4);
276 if (host
->remain
== 0) {
277 sdhci_kunmap_sg(host
);
278 if (sdhci_next_sg(host
) == 0) {
279 BUG_ON(blksize
!= 0);
282 buffer
= sdhci_kmap_sg(host
);
286 sdhci_kunmap_sg(host
);
289 static void sdhci_transfer_pio(struct sdhci_host
*host
)
298 if (host
->data
->flags
& MMC_DATA_READ
)
299 mask
= SDHCI_DATA_AVAILABLE
;
301 mask
= SDHCI_SPACE_AVAILABLE
;
303 while (readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & mask
) {
304 if (host
->data
->flags
& MMC_DATA_READ
)
305 sdhci_read_block_pio(host
);
307 sdhci_write_block_pio(host
);
312 BUG_ON(host
->num_sg
== 0);
315 DBG("PIO transfer complete.\n");
318 static void sdhci_prepare_data(struct sdhci_host
*host
, struct mmc_data
*data
)
321 unsigned target_timeout
, current_timeout
;
328 DBG("blksz %04x blks %04x flags %08x\n",
329 data
->blksz
, data
->blocks
, data
->flags
);
330 DBG("tsac %d ms nsac %d clk\n",
331 data
->timeout_ns
/ 1000000, data
->timeout_clks
);
334 BUG_ON(data
->blksz
* data
->blocks
> 524288);
335 BUG_ON(data
->blksz
> host
->max_block
);
336 BUG_ON(data
->blocks
> 65535);
339 target_timeout
= data
->timeout_ns
/ 1000 +
340 data
->timeout_clks
/ host
->clock
;
343 * Figure out needed cycles.
344 * We do this in steps in order to fit inside a 32 bit int.
345 * The first step is the minimum timeout, which will have a
346 * minimum resolution of 6 bits:
347 * (1) 2^13*1000 > 2^22,
348 * (2) host->timeout_clk < 2^16
353 current_timeout
= (1 << 13) * 1000 / host
->timeout_clk
;
354 while (current_timeout
< target_timeout
) {
356 current_timeout
<<= 1;
362 printk(KERN_WARNING
"%s: Too large timeout requested!\n",
363 mmc_hostname(host
->mmc
));
367 writeb(count
, host
->ioaddr
+ SDHCI_TIMEOUT_CONTROL
);
369 if (host
->flags
& SDHCI_USE_DMA
) {
372 count
= pci_map_sg(host
->chip
->pdev
, data
->sg
, data
->sg_len
,
373 (data
->flags
& MMC_DATA_READ
)?PCI_DMA_FROMDEVICE
:PCI_DMA_TODEVICE
);
376 writel(sg_dma_address(data
->sg
), host
->ioaddr
+ SDHCI_DMA_ADDRESS
);
378 host
->size
= data
->blksz
* data
->blocks
;
380 host
->cur_sg
= data
->sg
;
381 host
->num_sg
= data
->sg_len
;
384 host
->remain
= host
->cur_sg
->length
;
387 /* We do not handle DMA boundaries, so set it to max (512 KiB) */
388 writew(SDHCI_MAKE_BLKSZ(7, data
->blksz
),
389 host
->ioaddr
+ SDHCI_BLOCK_SIZE
);
390 writew(data
->blocks
, host
->ioaddr
+ SDHCI_BLOCK_COUNT
);
393 static void sdhci_set_transfer_mode(struct sdhci_host
*host
,
394 struct mmc_data
*data
)
403 mode
= SDHCI_TRNS_BLK_CNT_EN
;
404 if (data
->blocks
> 1)
405 mode
|= SDHCI_TRNS_MULTI
;
406 if (data
->flags
& MMC_DATA_READ
)
407 mode
|= SDHCI_TRNS_READ
;
408 if (host
->flags
& SDHCI_USE_DMA
)
409 mode
|= SDHCI_TRNS_DMA
;
411 writew(mode
, host
->ioaddr
+ SDHCI_TRANSFER_MODE
);
414 static void sdhci_finish_data(struct sdhci_host
*host
)
416 struct mmc_data
*data
;
424 if (host
->flags
& SDHCI_USE_DMA
) {
425 pci_unmap_sg(host
->chip
->pdev
, data
->sg
, data
->sg_len
,
426 (data
->flags
& MMC_DATA_READ
)?PCI_DMA_FROMDEVICE
:PCI_DMA_TODEVICE
);
430 * Controller doesn't count down when in single block mode.
432 if ((data
->blocks
== 1) && (data
->error
== MMC_ERR_NONE
))
435 blocks
= readw(host
->ioaddr
+ SDHCI_BLOCK_COUNT
);
436 data
->bytes_xfered
= data
->blksz
* (data
->blocks
- blocks
);
438 if ((data
->error
== MMC_ERR_NONE
) && blocks
) {
439 printk(KERN_ERR
"%s: Controller signalled completion even "
440 "though there were blocks left. Please report this "
441 "to " BUGMAIL
".\n", mmc_hostname(host
->mmc
));
442 data
->error
= MMC_ERR_FAILED
;
445 if (host
->size
!= 0) {
446 printk(KERN_ERR
"%s: %d bytes were left untransferred. "
447 "Please report this to " BUGMAIL
".\n",
448 mmc_hostname(host
->mmc
), host
->size
);
449 data
->error
= MMC_ERR_FAILED
;
452 DBG("Ending data transfer (%d bytes)\n", data
->bytes_xfered
);
456 * The controller needs a reset of internal state machines
457 * upon error conditions.
459 if (data
->error
!= MMC_ERR_NONE
) {
460 sdhci_reset(host
, SDHCI_RESET_CMD
);
461 sdhci_reset(host
, SDHCI_RESET_DATA
);
464 sdhci_send_command(host
, data
->stop
);
466 tasklet_schedule(&host
->finish_tasklet
);
469 static void sdhci_send_command(struct sdhci_host
*host
, struct mmc_command
*cmd
)
473 unsigned long timeout
;
477 DBG("Sending cmd (%x)\n", cmd
->opcode
);
482 mask
= SDHCI_CMD_INHIBIT
;
483 if ((cmd
->data
!= NULL
) || (cmd
->flags
& MMC_RSP_BUSY
))
484 mask
|= SDHCI_DATA_INHIBIT
;
486 /* We shouldn't wait for data inihibit for stop commands, even
487 though they might use busy signaling */
488 if (host
->mrq
->data
&& (cmd
== host
->mrq
->data
->stop
))
489 mask
&= ~SDHCI_DATA_INHIBIT
;
491 while (readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & mask
) {
493 printk(KERN_ERR
"%s: Controller never released "
494 "inhibit bit(s). Please report this to "
495 BUGMAIL
".\n", mmc_hostname(host
->mmc
));
496 sdhci_dumpregs(host
);
497 cmd
->error
= MMC_ERR_FAILED
;
498 tasklet_schedule(&host
->finish_tasklet
);
505 mod_timer(&host
->timer
, jiffies
+ 10 * HZ
);
509 sdhci_prepare_data(host
, cmd
->data
);
511 writel(cmd
->arg
, host
->ioaddr
+ SDHCI_ARGUMENT
);
513 sdhci_set_transfer_mode(host
, cmd
->data
);
515 if ((cmd
->flags
& MMC_RSP_136
) && (cmd
->flags
& MMC_RSP_BUSY
)) {
516 printk(KERN_ERR
"%s: Unsupported response type! "
517 "Please report this to " BUGMAIL
".\n",
518 mmc_hostname(host
->mmc
));
519 cmd
->error
= MMC_ERR_INVALID
;
520 tasklet_schedule(&host
->finish_tasklet
);
524 if (!(cmd
->flags
& MMC_RSP_PRESENT
))
525 flags
= SDHCI_CMD_RESP_NONE
;
526 else if (cmd
->flags
& MMC_RSP_136
)
527 flags
= SDHCI_CMD_RESP_LONG
;
528 else if (cmd
->flags
& MMC_RSP_BUSY
)
529 flags
= SDHCI_CMD_RESP_SHORT_BUSY
;
531 flags
= SDHCI_CMD_RESP_SHORT
;
533 if (cmd
->flags
& MMC_RSP_CRC
)
534 flags
|= SDHCI_CMD_CRC
;
535 if (cmd
->flags
& MMC_RSP_OPCODE
)
536 flags
|= SDHCI_CMD_INDEX
;
538 flags
|= SDHCI_CMD_DATA
;
540 writel(SDHCI_MAKE_CMD(cmd
->opcode
, flags
),
541 host
->ioaddr
+ SDHCI_COMMAND
);
544 static void sdhci_finish_command(struct sdhci_host
*host
)
548 BUG_ON(host
->cmd
== NULL
);
550 if (host
->cmd
->flags
& MMC_RSP_PRESENT
) {
551 if (host
->cmd
->flags
& MMC_RSP_136
) {
552 /* CRC is stripped so we need to do some shifting. */
553 for (i
= 0;i
< 4;i
++) {
554 host
->cmd
->resp
[i
] = readl(host
->ioaddr
+
555 SDHCI_RESPONSE
+ (3-i
)*4) << 8;
557 host
->cmd
->resp
[i
] |=
559 SDHCI_RESPONSE
+ (3-i
)*4-1);
562 host
->cmd
->resp
[0] = readl(host
->ioaddr
+ SDHCI_RESPONSE
);
566 host
->cmd
->error
= MMC_ERR_NONE
;
568 DBG("Ending cmd (%x)\n", host
->cmd
->opcode
);
571 host
->data
= host
->cmd
->data
;
573 tasklet_schedule(&host
->finish_tasklet
);
578 static void sdhci_set_clock(struct sdhci_host
*host
, unsigned int clock
)
582 unsigned long timeout
;
584 if (clock
== host
->clock
)
587 writew(0, host
->ioaddr
+ SDHCI_CLOCK_CONTROL
);
592 for (div
= 1;div
< 256;div
*= 2) {
593 if ((host
->max_clk
/ div
) <= clock
)
598 clk
= div
<< SDHCI_DIVIDER_SHIFT
;
599 clk
|= SDHCI_CLOCK_INT_EN
;
600 writew(clk
, host
->ioaddr
+ SDHCI_CLOCK_CONTROL
);
604 while (!((clk
= readw(host
->ioaddr
+ SDHCI_CLOCK_CONTROL
))
605 & SDHCI_CLOCK_INT_STABLE
)) {
607 printk(KERN_ERR
"%s: Internal clock never stabilised. "
608 "Please report this to " BUGMAIL
".\n",
609 mmc_hostname(host
->mmc
));
610 sdhci_dumpregs(host
);
617 clk
|= SDHCI_CLOCK_CARD_EN
;
618 writew(clk
, host
->ioaddr
+ SDHCI_CLOCK_CONTROL
);
624 static void sdhci_set_power(struct sdhci_host
*host
, unsigned short power
)
628 if (host
->power
== power
)
631 writeb(0, host
->ioaddr
+ SDHCI_POWER_CONTROL
);
633 if (power
== (unsigned short)-1)
636 pwr
= SDHCI_POWER_ON
;
642 pwr
|= SDHCI_POWER_180
;
647 pwr
|= SDHCI_POWER_300
;
652 pwr
|= SDHCI_POWER_330
;
658 writeb(pwr
, host
->ioaddr
+ SDHCI_POWER_CONTROL
);
664 /*****************************************************************************\
668 \*****************************************************************************/
670 static void sdhci_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
672 struct sdhci_host
*host
;
675 host
= mmc_priv(mmc
);
677 spin_lock_irqsave(&host
->lock
, flags
);
679 WARN_ON(host
->mrq
!= NULL
);
681 sdhci_activate_led(host
);
685 if (!(readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & SDHCI_CARD_PRESENT
)) {
686 host
->mrq
->cmd
->error
= MMC_ERR_TIMEOUT
;
687 tasklet_schedule(&host
->finish_tasklet
);
689 sdhci_send_command(host
, mrq
->cmd
);
691 spin_unlock_irqrestore(&host
->lock
, flags
);
694 static void sdhci_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
696 struct sdhci_host
*host
;
700 host
= mmc_priv(mmc
);
702 spin_lock_irqsave(&host
->lock
, flags
);
705 * Reset the chip on each power off.
706 * Should clear out any weird states.
708 if (ios
->power_mode
== MMC_POWER_OFF
) {
709 writel(0, host
->ioaddr
+ SDHCI_SIGNAL_ENABLE
);
713 sdhci_set_clock(host
, ios
->clock
);
715 if (ios
->power_mode
== MMC_POWER_OFF
)
716 sdhci_set_power(host
, -1);
718 sdhci_set_power(host
, ios
->vdd
);
720 ctrl
= readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
);
721 if (ios
->bus_width
== MMC_BUS_WIDTH_4
)
722 ctrl
|= SDHCI_CTRL_4BITBUS
;
724 ctrl
&= ~SDHCI_CTRL_4BITBUS
;
725 writeb(ctrl
, host
->ioaddr
+ SDHCI_HOST_CONTROL
);
727 spin_unlock_irqrestore(&host
->lock
, flags
);
730 static int sdhci_get_ro(struct mmc_host
*mmc
)
732 struct sdhci_host
*host
;
736 host
= mmc_priv(mmc
);
738 spin_lock_irqsave(&host
->lock
, flags
);
740 present
= readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
);
742 spin_unlock_irqrestore(&host
->lock
, flags
);
744 return !(present
& SDHCI_WRITE_PROTECT
);
747 static struct mmc_host_ops sdhci_ops
= {
748 .request
= sdhci_request
,
749 .set_ios
= sdhci_set_ios
,
750 .get_ro
= sdhci_get_ro
,
753 /*****************************************************************************\
757 \*****************************************************************************/
759 static void sdhci_tasklet_card(unsigned long param
)
761 struct sdhci_host
*host
;
764 host
= (struct sdhci_host
*)param
;
766 spin_lock_irqsave(&host
->lock
, flags
);
768 if (!(readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & SDHCI_CARD_PRESENT
)) {
770 printk(KERN_ERR
"%s: Card removed during transfer!\n",
771 mmc_hostname(host
->mmc
));
772 printk(KERN_ERR
"%s: Resetting controller.\n",
773 mmc_hostname(host
->mmc
));
775 sdhci_reset(host
, SDHCI_RESET_CMD
);
776 sdhci_reset(host
, SDHCI_RESET_DATA
);
778 host
->mrq
->cmd
->error
= MMC_ERR_FAILED
;
779 tasklet_schedule(&host
->finish_tasklet
);
783 spin_unlock_irqrestore(&host
->lock
, flags
);
785 mmc_detect_change(host
->mmc
, msecs_to_jiffies(500));
788 static void sdhci_tasklet_finish(unsigned long param
)
790 struct sdhci_host
*host
;
792 struct mmc_request
*mrq
;
794 host
= (struct sdhci_host
*)param
;
796 spin_lock_irqsave(&host
->lock
, flags
);
798 del_timer(&host
->timer
);
802 DBG("Ending request, cmd (%x)\n", mrq
->cmd
->opcode
);
805 * The controller needs a reset of internal state machines
806 * upon error conditions.
808 if ((mrq
->cmd
->error
!= MMC_ERR_NONE
) ||
809 (mrq
->data
&& ((mrq
->data
->error
!= MMC_ERR_NONE
) ||
810 (mrq
->data
->stop
&& (mrq
->data
->stop
->error
!= MMC_ERR_NONE
))))) {
811 sdhci_reset(host
, SDHCI_RESET_CMD
);
812 sdhci_reset(host
, SDHCI_RESET_DATA
);
819 sdhci_deactivate_led(host
);
821 spin_unlock_irqrestore(&host
->lock
, flags
);
823 mmc_request_done(host
->mmc
, mrq
);
826 static void sdhci_timeout_timer(unsigned long data
)
828 struct sdhci_host
*host
;
831 host
= (struct sdhci_host
*)data
;
833 spin_lock_irqsave(&host
->lock
, flags
);
836 printk(KERN_ERR
"%s: Timeout waiting for hardware interrupt. "
837 "Please report this to " BUGMAIL
".\n",
838 mmc_hostname(host
->mmc
));
839 sdhci_dumpregs(host
);
842 host
->data
->error
= MMC_ERR_TIMEOUT
;
843 sdhci_finish_data(host
);
846 host
->cmd
->error
= MMC_ERR_TIMEOUT
;
848 host
->mrq
->cmd
->error
= MMC_ERR_TIMEOUT
;
850 tasklet_schedule(&host
->finish_tasklet
);
854 spin_unlock_irqrestore(&host
->lock
, flags
);
857 /*****************************************************************************\
859 * Interrupt handling *
861 \*****************************************************************************/
863 static void sdhci_cmd_irq(struct sdhci_host
*host
, u32 intmask
)
865 BUG_ON(intmask
== 0);
868 printk(KERN_ERR
"%s: Got command interrupt even though no "
869 "command operation was in progress.\n",
870 mmc_hostname(host
->mmc
));
871 printk(KERN_ERR
"%s: Please report this to " BUGMAIL
".\n",
872 mmc_hostname(host
->mmc
));
873 sdhci_dumpregs(host
);
877 if (intmask
& SDHCI_INT_RESPONSE
)
878 sdhci_finish_command(host
);
880 if (intmask
& SDHCI_INT_TIMEOUT
)
881 host
->cmd
->error
= MMC_ERR_TIMEOUT
;
882 else if (intmask
& SDHCI_INT_CRC
)
883 host
->cmd
->error
= MMC_ERR_BADCRC
;
884 else if (intmask
& (SDHCI_INT_END_BIT
| SDHCI_INT_INDEX
))
885 host
->cmd
->error
= MMC_ERR_FAILED
;
887 host
->cmd
->error
= MMC_ERR_INVALID
;
889 tasklet_schedule(&host
->finish_tasklet
);
893 static void sdhci_data_irq(struct sdhci_host
*host
, u32 intmask
)
895 BUG_ON(intmask
== 0);
899 * A data end interrupt is sent together with the response
900 * for the stop command.
902 if (intmask
& SDHCI_INT_DATA_END
)
905 printk(KERN_ERR
"%s: Got data interrupt even though no "
906 "data operation was in progress.\n",
907 mmc_hostname(host
->mmc
));
908 printk(KERN_ERR
"%s: Please report this to " BUGMAIL
".\n",
909 mmc_hostname(host
->mmc
));
910 sdhci_dumpregs(host
);
915 if (intmask
& SDHCI_INT_DATA_TIMEOUT
)
916 host
->data
->error
= MMC_ERR_TIMEOUT
;
917 else if (intmask
& SDHCI_INT_DATA_CRC
)
918 host
->data
->error
= MMC_ERR_BADCRC
;
919 else if (intmask
& SDHCI_INT_DATA_END_BIT
)
920 host
->data
->error
= MMC_ERR_FAILED
;
922 if (host
->data
->error
!= MMC_ERR_NONE
)
923 sdhci_finish_data(host
);
925 if (intmask
& (SDHCI_INT_DATA_AVAIL
| SDHCI_INT_SPACE_AVAIL
))
926 sdhci_transfer_pio(host
);
928 if (intmask
& SDHCI_INT_DATA_END
)
929 sdhci_finish_data(host
);
933 static irqreturn_t
sdhci_irq(int irq
, void *dev_id
, struct pt_regs
*regs
)
936 struct sdhci_host
* host
= dev_id
;
939 spin_lock(&host
->lock
);
941 intmask
= readl(host
->ioaddr
+ SDHCI_INT_STATUS
);
948 DBG("*** %s got interrupt: 0x%08x\n", host
->slot_descr
, intmask
);
950 if (intmask
& (SDHCI_INT_CARD_INSERT
| SDHCI_INT_CARD_REMOVE
)) {
951 writel(intmask
& (SDHCI_INT_CARD_INSERT
| SDHCI_INT_CARD_REMOVE
),
952 host
->ioaddr
+ SDHCI_INT_STATUS
);
953 tasklet_schedule(&host
->card_tasklet
);
956 intmask
&= ~(SDHCI_INT_CARD_INSERT
| SDHCI_INT_CARD_REMOVE
);
958 if (intmask
& SDHCI_INT_CMD_MASK
) {
959 writel(intmask
& SDHCI_INT_CMD_MASK
,
960 host
->ioaddr
+ SDHCI_INT_STATUS
);
961 sdhci_cmd_irq(host
, intmask
& SDHCI_INT_CMD_MASK
);
964 if (intmask
& SDHCI_INT_DATA_MASK
) {
965 writel(intmask
& SDHCI_INT_DATA_MASK
,
966 host
->ioaddr
+ SDHCI_INT_STATUS
);
967 sdhci_data_irq(host
, intmask
& SDHCI_INT_DATA_MASK
);
970 intmask
&= ~(SDHCI_INT_CMD_MASK
| SDHCI_INT_DATA_MASK
);
972 if (intmask
& SDHCI_INT_BUS_POWER
) {
973 printk(KERN_ERR
"%s: Card is consuming too much power!\n",
974 mmc_hostname(host
->mmc
));
975 writel(SDHCI_INT_BUS_POWER
, host
->ioaddr
+ SDHCI_INT_STATUS
);
978 intmask
&= SDHCI_INT_BUS_POWER
;
981 printk(KERN_ERR
"%s: Unexpected interrupt 0x%08x. Please "
982 "report this to " BUGMAIL
".\n",
983 mmc_hostname(host
->mmc
), intmask
);
984 sdhci_dumpregs(host
);
986 writel(intmask
, host
->ioaddr
+ SDHCI_INT_STATUS
);
989 result
= IRQ_HANDLED
;
992 spin_unlock(&host
->lock
);
997 /*****************************************************************************\
1001 \*****************************************************************************/
1005 static int sdhci_suspend (struct pci_dev
*pdev
, pm_message_t state
)
1007 struct sdhci_chip
*chip
;
1010 chip
= pci_get_drvdata(pdev
);
1014 DBG("Suspending...\n");
1016 for (i
= 0;i
< chip
->num_slots
;i
++) {
1017 if (!chip
->hosts
[i
])
1019 ret
= mmc_suspend_host(chip
->hosts
[i
]->mmc
, state
);
1021 for (i
--;i
>= 0;i
--)
1022 mmc_resume_host(chip
->hosts
[i
]->mmc
);
1027 pci_save_state(pdev
);
1028 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), 0);
1029 pci_disable_device(pdev
);
1030 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
1035 static int sdhci_resume (struct pci_dev
*pdev
)
1037 struct sdhci_chip
*chip
;
1040 chip
= pci_get_drvdata(pdev
);
1044 DBG("Resuming...\n");
1046 pci_set_power_state(pdev
, PCI_D0
);
1047 pci_restore_state(pdev
);
1048 pci_enable_device(pdev
);
1050 for (i
= 0;i
< chip
->num_slots
;i
++) {
1051 if (!chip
->hosts
[i
])
1053 if (chip
->hosts
[i
]->flags
& SDHCI_USE_DMA
)
1054 pci_set_master(pdev
);
1055 sdhci_init(chip
->hosts
[i
]);
1056 ret
= mmc_resume_host(chip
->hosts
[i
]->mmc
);
1064 #else /* CONFIG_PM */
1066 #define sdhci_suspend NULL
1067 #define sdhci_resume NULL
1069 #endif /* CONFIG_PM */
1071 /*****************************************************************************\
1073 * Device probing/removal *
1075 \*****************************************************************************/
1077 static int __devinit
sdhci_probe_slot(struct pci_dev
*pdev
, int slot
)
1080 unsigned int version
;
1081 struct sdhci_chip
*chip
;
1082 struct mmc_host
*mmc
;
1083 struct sdhci_host
*host
;
1088 chip
= pci_get_drvdata(pdev
);
1091 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &first_bar
);
1095 first_bar
&= PCI_SLOT_INFO_FIRST_BAR_MASK
;
1097 if (first_bar
> 5) {
1098 printk(KERN_ERR DRIVER_NAME
": Invalid first BAR. Aborting.\n");
1102 if (!(pci_resource_flags(pdev
, first_bar
+ slot
) & IORESOURCE_MEM
)) {
1103 printk(KERN_ERR DRIVER_NAME
": BAR is not iomem. Aborting.\n");
1107 if (pci_resource_len(pdev
, first_bar
+ slot
) != 0x100) {
1108 printk(KERN_ERR DRIVER_NAME
": Invalid iomem size. Aborting.\n");
1112 if ((pdev
->class & 0x0000FF) == PCI_SDHCI_IFVENDOR
) {
1113 printk(KERN_ERR DRIVER_NAME
": Vendor specific interface. Aborting.\n");
1117 if ((pdev
->class & 0x0000FF) > PCI_SDHCI_IFVENDOR
) {
1118 printk(KERN_ERR DRIVER_NAME
": Unknown interface. Aborting.\n");
1122 mmc
= mmc_alloc_host(sizeof(struct sdhci_host
), &pdev
->dev
);
1126 host
= mmc_priv(mmc
);
1129 host
->bar
= first_bar
+ slot
;
1131 host
->addr
= pci_resource_start(pdev
, host
->bar
);
1132 host
->irq
= pdev
->irq
;
1134 DBG("slot %d at 0x%08lx, irq %d\n", slot
, host
->addr
, host
->irq
);
1136 snprintf(host
->slot_descr
, 20, "sdhci:slot%d", slot
);
1138 ret
= pci_request_region(pdev
, host
->bar
, host
->slot_descr
);
1142 host
->ioaddr
= ioremap_nocache(host
->addr
,
1143 pci_resource_len(pdev
, host
->bar
));
1144 if (!host
->ioaddr
) {
1149 sdhci_reset(host
, SDHCI_RESET_ALL
);
1151 version
= readw(host
->ioaddr
+ SDHCI_HOST_VERSION
);
1152 version
= (version
& SDHCI_SPEC_VER_MASK
) >> SDHCI_SPEC_VER_SHIFT
;
1154 printk(KERN_ERR
"%s: Unknown controller version (%d). "
1155 "Cowardly refusing to continue.\n", host
->slot_descr
,
1161 caps
= readl(host
->ioaddr
+ SDHCI_CAPABILITIES
);
1164 DBG("DMA forced off\n");
1165 else if (debug_forcedma
) {
1166 DBG("DMA forced on\n");
1167 host
->flags
|= SDHCI_USE_DMA
;
1168 } else if ((pdev
->class & 0x0000FF) != PCI_SDHCI_IFDMA
)
1169 DBG("Controller doesn't have DMA interface\n");
1170 else if (!(caps
& SDHCI_CAN_DO_DMA
))
1171 DBG("Controller doesn't have DMA capability\n");
1173 host
->flags
|= SDHCI_USE_DMA
;
1175 if (host
->flags
& SDHCI_USE_DMA
) {
1176 if (pci_set_dma_mask(pdev
, DMA_32BIT_MASK
)) {
1177 printk(KERN_WARNING
"%s: No suitable DMA available. "
1178 "Falling back to PIO.\n", host
->slot_descr
);
1179 host
->flags
&= ~SDHCI_USE_DMA
;
1183 if (host
->flags
& SDHCI_USE_DMA
)
1184 pci_set_master(pdev
);
1185 else /* XXX: Hack to get MMC layer to avoid highmem */
1189 (caps
& SDHCI_CLOCK_BASE_MASK
) >> SDHCI_CLOCK_BASE_SHIFT
;
1190 if (host
->max_clk
== 0) {
1191 printk(KERN_ERR
"%s: Hardware doesn't specify base clock "
1192 "frequency.\n", host
->slot_descr
);
1196 host
->max_clk
*= 1000000;
1199 (caps
& SDHCI_TIMEOUT_CLK_MASK
) >> SDHCI_TIMEOUT_CLK_SHIFT
;
1200 if (host
->timeout_clk
== 0) {
1201 printk(KERN_ERR
"%s: Hardware doesn't specify timeout clock "
1202 "frequency.\n", host
->slot_descr
);
1206 if (caps
& SDHCI_TIMEOUT_CLK_UNIT
)
1207 host
->timeout_clk
*= 1000;
1209 host
->max_block
= (caps
& SDHCI_MAX_BLOCK_MASK
) >> SDHCI_MAX_BLOCK_SHIFT
;
1210 if (host
->max_block
>= 3) {
1211 printk(KERN_ERR
"%s: Invalid maximum block size.\n",
1216 host
->max_block
= 512 << host
->max_block
;
1219 * Set host parameters.
1221 mmc
->ops
= &sdhci_ops
;
1222 mmc
->f_min
= host
->max_clk
/ 256;
1223 mmc
->f_max
= host
->max_clk
;
1224 mmc
->caps
= MMC_CAP_4_BIT_DATA
;
1227 if (caps
& SDHCI_CAN_VDD_330
)
1228 mmc
->ocr_avail
|= MMC_VDD_32_33
|MMC_VDD_33_34
;
1229 else if (caps
& SDHCI_CAN_VDD_300
)
1230 mmc
->ocr_avail
|= MMC_VDD_29_30
|MMC_VDD_30_31
;
1231 else if (caps
& SDHCI_CAN_VDD_180
)
1232 mmc
->ocr_avail
|= MMC_VDD_17_18
|MMC_VDD_18_19
;
1234 if (mmc
->ocr_avail
== 0) {
1235 printk(KERN_ERR
"%s: Hardware doesn't report any "
1236 "support voltages.\n", host
->slot_descr
);
1241 spin_lock_init(&host
->lock
);
1244 * Maximum number of segments. Hardware cannot do scatter lists.
1246 if (host
->flags
& SDHCI_USE_DMA
)
1247 mmc
->max_hw_segs
= 1;
1249 mmc
->max_hw_segs
= 16;
1250 mmc
->max_phys_segs
= 16;
1253 * Maximum number of sectors in one transfer. Limited by DMA boundary
1254 * size (512KiB), which means (512 KiB/512=) 1024 entries.
1256 mmc
->max_sectors
= 1024;
1259 * Maximum segment size. Could be one segment with the maximum number
1262 mmc
->max_seg_size
= mmc
->max_sectors
* 512;
1267 tasklet_init(&host
->card_tasklet
,
1268 sdhci_tasklet_card
, (unsigned long)host
);
1269 tasklet_init(&host
->finish_tasklet
,
1270 sdhci_tasklet_finish
, (unsigned long)host
);
1272 setup_timer(&host
->timer
, sdhci_timeout_timer
, (long)host
);
1274 ret
= request_irq(host
->irq
, sdhci_irq
, IRQF_SHARED
,
1275 host
->slot_descr
, host
);
1281 #ifdef CONFIG_MMC_DEBUG
1282 sdhci_dumpregs(host
);
1286 chip
->hosts
[slot
] = host
;
1290 printk(KERN_INFO
"%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc
),
1291 host
->addr
, host
->irq
,
1292 (host
->flags
& SDHCI_USE_DMA
)?"DMA":"PIO");
1297 tasklet_kill(&host
->card_tasklet
);
1298 tasklet_kill(&host
->finish_tasklet
);
1300 iounmap(host
->ioaddr
);
1302 pci_release_region(pdev
, host
->bar
);
1309 static void sdhci_remove_slot(struct pci_dev
*pdev
, int slot
)
1311 struct sdhci_chip
*chip
;
1312 struct mmc_host
*mmc
;
1313 struct sdhci_host
*host
;
1315 chip
= pci_get_drvdata(pdev
);
1316 host
= chip
->hosts
[slot
];
1319 chip
->hosts
[slot
] = NULL
;
1321 mmc_remove_host(mmc
);
1323 sdhci_reset(host
, SDHCI_RESET_ALL
);
1325 free_irq(host
->irq
, host
);
1327 del_timer_sync(&host
->timer
);
1329 tasklet_kill(&host
->card_tasklet
);
1330 tasklet_kill(&host
->finish_tasklet
);
1332 iounmap(host
->ioaddr
);
1334 pci_release_region(pdev
, host
->bar
);
1339 static int __devinit
sdhci_probe(struct pci_dev
*pdev
,
1340 const struct pci_device_id
*ent
)
1344 struct sdhci_chip
*chip
;
1346 BUG_ON(pdev
== NULL
);
1347 BUG_ON(ent
== NULL
);
1349 pci_read_config_byte(pdev
, PCI_CLASS_REVISION
, &rev
);
1351 printk(KERN_INFO DRIVER_NAME
1352 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1353 pci_name(pdev
), (int)pdev
->vendor
, (int)pdev
->device
,
1356 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &slots
);
1360 slots
= PCI_SLOT_INFO_SLOTS(slots
) + 1;
1361 DBG("found %d slot(s)\n", slots
);
1365 ret
= pci_enable_device(pdev
);
1369 chip
= kzalloc(sizeof(struct sdhci_chip
) +
1370 sizeof(struct sdhci_host
*) * slots
, GFP_KERNEL
);
1377 chip
->quirks
= ent
->driver_data
;
1380 chip
->quirks
= debug_quirks
;
1382 chip
->num_slots
= slots
;
1383 pci_set_drvdata(pdev
, chip
);
1385 for (i
= 0;i
< slots
;i
++) {
1386 ret
= sdhci_probe_slot(pdev
, i
);
1388 for (i
--;i
>= 0;i
--)
1389 sdhci_remove_slot(pdev
, i
);
1397 pci_set_drvdata(pdev
, NULL
);
1401 pci_disable_device(pdev
);
1405 static void __devexit
sdhci_remove(struct pci_dev
*pdev
)
1408 struct sdhci_chip
*chip
;
1410 chip
= pci_get_drvdata(pdev
);
1413 for (i
= 0;i
< chip
->num_slots
;i
++)
1414 sdhci_remove_slot(pdev
, i
);
1416 pci_set_drvdata(pdev
, NULL
);
1421 pci_disable_device(pdev
);
1424 static struct pci_driver sdhci_driver
= {
1425 .name
= DRIVER_NAME
,
1426 .id_table
= pci_ids
,
1427 .probe
= sdhci_probe
,
1428 .remove
= __devexit_p(sdhci_remove
),
1429 .suspend
= sdhci_suspend
,
1430 .resume
= sdhci_resume
,
1433 /*****************************************************************************\
1435 * Driver init/exit *
1437 \*****************************************************************************/
1439 static int __init
sdhci_drv_init(void)
1441 printk(KERN_INFO DRIVER_NAME
1442 ": Secure Digital Host Controller Interface driver, "
1443 DRIVER_VERSION
"\n");
1444 printk(KERN_INFO DRIVER_NAME
": Copyright(c) Pierre Ossman\n");
1446 return pci_register_driver(&sdhci_driver
);
1449 static void __exit
sdhci_drv_exit(void)
1453 pci_unregister_driver(&sdhci_driver
);
1456 module_init(sdhci_drv_init
);
1457 module_exit(sdhci_drv_exit
);
1459 module_param(debug_nodma
, uint
, 0444);
1460 module_param(debug_forcedma
, uint
, 0444);
1461 module_param(debug_quirks
, uint
, 0444);
1463 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1464 MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1465 MODULE_VERSION(DRIVER_VERSION
);
1466 MODULE_LICENSE("GPL");
1468 MODULE_PARM_DESC(debug_nodma
, "Forcefully disable DMA transfers. (default 0)");
1469 MODULE_PARM_DESC(debug_forcedma
, "Forcefully enable DMA transfers. (default 0)");
1470 MODULE_PARM_DESC(debug_quirks
, "Force certain quirks.");