2 * wm0010.c -- WM0010 DSP Driver
4 * Copyright 2012 Wolfson Microelectronics PLC.
6 * Authors: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 * Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
8 * Scott Ling <sl@opensource.wolfsonmicro.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/irqreturn.h>
18 #include <linux/init.h>
19 #include <linux/spi/spi.h>
20 #include <linux/firmware.h>
21 #include <linux/delay.h>
23 #include <linux/miscdevice.h>
24 #include <linux/gpio.h>
25 #include <linux/regulator/consumer.h>
26 #include <linux/mutex.h>
27 #include <linux/workqueue.h>
29 #include <sound/soc.h>
30 #include <sound/wm0010.h>
32 #define DEVICE_ID_WM0010 10
61 static struct pll_clock_map
{
63 int max_pll_spi_speed
;
65 } pll_clock_map
[] = { /* Dividers */
66 { 22000000, 26000000, 0x00201f11 }, /* 2,32,2 */
67 { 18000000, 26000000, 0x00203f21 }, /* 2,64,4 */
68 { 14000000, 26000000, 0x00202620 }, /* 1,39,4 */
69 { 10000000, 22000000, 0x00203120 }, /* 1,50,4 */
70 { 6500000, 22000000, 0x00204520 }, /* 1,70,4 */
71 { 5500000, 22000000, 0x00103f10 }, /* 1,64,2 */
83 struct snd_soc_codec
*codec
;
88 struct wm0010_pdata pdata
;
93 struct regulator_bulk_data core_supplies
[2];
94 struct regulator
*dbvdd
;
98 enum wm0010_state state
;
104 int board_max_spi_speed
;
110 struct completion boot_completion
;
113 struct wm0010_spi_msg
{
114 struct spi_message m
;
115 struct spi_transfer t
;
121 static const struct snd_soc_dapm_route wm0010_dapm_routes
[] = {
122 { "SDI2 Capture", NULL
, "SDI1 Playback" },
123 { "SDI1 Capture", NULL
, "SDI2 Playback" },
126 static const char *wm0010_state_to_str(enum wm0010_state state
)
128 const char *state_to_str
[] = {
136 if (state
< 0 || state
>= ARRAY_SIZE(state_to_str
))
138 return state_to_str
[state
];
141 /* Called with wm0010->lock held */
142 static void wm0010_halt(struct snd_soc_codec
*codec
)
144 struct wm0010_priv
*wm0010
= snd_soc_codec_get_drvdata(codec
);
146 enum wm0010_state state
;
148 /* Fetch the wm0010 state */
149 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
150 state
= wm0010
->state
;
151 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
154 case WM0010_POWER_OFF
:
155 /* If there's nothing to do, bail out */
157 case WM0010_OUT_OF_RESET
:
160 case WM0010_FIRMWARE
:
161 /* Remember to put chip back into reset */
162 gpio_set_value(wm0010
->gpio_reset
, wm0010
->gpio_reset_value
);
163 /* Disable the regulators */
164 regulator_disable(wm0010
->dbvdd
);
165 regulator_bulk_disable(ARRAY_SIZE(wm0010
->core_supplies
),
166 wm0010
->core_supplies
);
170 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
171 wm0010
->state
= WM0010_POWER_OFF
;
172 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
175 struct wm0010_boot_xfer
{
176 struct list_head list
;
177 struct snd_soc_codec
*codec
;
178 struct completion
*done
;
179 struct spi_message m
;
180 struct spi_transfer t
;
183 /* Called with wm0010->lock held */
184 static void wm0010_mark_boot_failure(struct wm0010_priv
*wm0010
)
186 enum wm0010_state state
;
189 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
190 state
= wm0010
->state
;
191 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
193 dev_err(wm0010
->dev
, "Failed to transition from `%s' state to `%s' state\n",
194 wm0010_state_to_str(state
), wm0010_state_to_str(state
+ 1));
196 wm0010
->boot_failed
= true;
199 static void wm0010_boot_xfer_complete(void *data
)
201 struct wm0010_boot_xfer
*xfer
= data
;
202 struct snd_soc_codec
*codec
= xfer
->codec
;
203 struct wm0010_priv
*wm0010
= snd_soc_codec_get_drvdata(codec
);
204 u32
*out32
= xfer
->t
.rx_buf
;
207 if (xfer
->m
.status
!= 0) {
208 dev_err(codec
->dev
, "SPI transfer failed: %d\n",
210 wm0010_mark_boot_failure(wm0010
);
212 complete(xfer
->done
);
216 for (i
= 0; i
< xfer
->t
.len
/ 4; i
++) {
217 dev_dbg(codec
->dev
, "%d: %04x\n", i
, out32
[i
]);
219 switch (be32_to_cpu(out32
[i
])) {
222 "%d: ROM error reported in stage 2\n", i
);
223 wm0010_mark_boot_failure(wm0010
);
227 if (wm0010
->boot_done
== 0)
230 "%d: ROM bootloader running in stage 2\n", i
);
231 wm0010_mark_boot_failure(wm0010
);
235 dev_dbg(codec
->dev
, "Stage2 loader running\n");
239 dev_dbg(codec
->dev
, "CODE_HDR packet received\n");
243 dev_dbg(codec
->dev
, "CODE_DATA packet received\n");
247 dev_dbg(codec
->dev
, "Download complete\n");
251 dev_dbg(codec
->dev
, "Application start\n");
255 dev_dbg(codec
->dev
, "PLL packet received\n");
256 wm0010
->pll_running
= true;
260 dev_err(codec
->dev
, "Device reports image too long\n");
261 wm0010_mark_boot_failure(wm0010
);
265 dev_err(codec
->dev
, "Device reports bad SPI packet\n");
266 wm0010_mark_boot_failure(wm0010
);
270 dev_err(codec
->dev
, "Device reports SPI read overflow\n");
271 wm0010_mark_boot_failure(wm0010
);
275 dev_err(codec
->dev
, "Device reports SPI underclock\n");
276 wm0010_mark_boot_failure(wm0010
);
280 dev_err(codec
->dev
, "Device reports bad header packet\n");
281 wm0010_mark_boot_failure(wm0010
);
285 dev_err(codec
->dev
, "Device reports invalid packet type\n");
286 wm0010_mark_boot_failure(wm0010
);
290 dev_err(codec
->dev
, "Device reports data before header error\n");
291 wm0010_mark_boot_failure(wm0010
);
295 dev_err(codec
->dev
, "Device reports invalid PLL packet\n");
299 dev_err(codec
->dev
, "Device reports packet alignment error\n");
300 wm0010_mark_boot_failure(wm0010
);
304 dev_err(codec
->dev
, "Unrecognised return 0x%x\n",
305 be32_to_cpu(out32
[i
]));
306 wm0010_mark_boot_failure(wm0010
);
310 if (wm0010
->boot_failed
)
316 complete(xfer
->done
);
319 static void byte_swap_64(u64
*data_in
, u64
*data_out
, u32 len
)
323 for (i
= 0; i
< len
/ 8; i
++)
324 data_out
[i
] = cpu_to_be64(le64_to_cpu(data_in
[i
]));
327 static int wm0010_boot(struct snd_soc_codec
*codec
)
329 struct spi_device
*spi
= to_spi_device(codec
->dev
);
330 struct wm0010_priv
*wm0010
= snd_soc_codec_get_drvdata(codec
);
332 struct list_head xfer_list
;
333 struct wm0010_boot_xfer
*xfer
;
335 struct completion done
;
336 const struct firmware
*fw
;
337 const struct dfw_binrec
*rec
;
338 struct spi_message m
;
339 struct spi_transfer t
;
340 struct dfw_pllrec pll_rec
;
347 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
348 if (wm0010
->state
!= WM0010_POWER_OFF
)
349 dev_warn(wm0010
->dev
, "DSP already powered up!\n");
350 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
352 if (wm0010
->sysclk
> 26000000) {
353 dev_err(codec
->dev
, "Max DSP clock frequency is 26MHz\n");
358 INIT_LIST_HEAD(&xfer_list
);
360 mutex_lock(&wm0010
->lock
);
361 wm0010
->pll_running
= false;
363 dev_dbg(codec
->dev
, "max_spi_freq: %d\n", wm0010
->max_spi_freq
);
365 ret
= regulator_bulk_enable(ARRAY_SIZE(wm0010
->core_supplies
),
366 wm0010
->core_supplies
);
368 dev_err(&spi
->dev
, "Failed to enable core supplies: %d\n",
370 mutex_unlock(&wm0010
->lock
);
374 ret
= regulator_enable(wm0010
->dbvdd
);
376 dev_err(&spi
->dev
, "Failed to enable DBVDD: %d\n", ret
);
381 gpio_set_value(wm0010
->gpio_reset
, !wm0010
->gpio_reset_value
);
382 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
383 wm0010
->state
= WM0010_OUT_OF_RESET
;
384 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
386 /* First the bootloader */
387 ret
= request_firmware(&fw
, "wm0010_stage2.bin", codec
->dev
);
389 dev_err(codec
->dev
, "Failed to request stage2 loader: %d\n",
394 if (!wait_for_completion_timeout(&wm0010
->boot_completion
,
395 msecs_to_jiffies(10)))
396 dev_err(codec
->dev
, "Failed to get interrupt from DSP\n");
398 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
399 wm0010
->state
= WM0010_BOOTROM
;
400 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
402 dev_dbg(codec
->dev
, "Downloading %d byte stage 2 loader\n", fw
->size
);
404 /* Copy to local buffer first as vmalloc causes problems for dma */
405 img
= kzalloc(fw
->size
, GFP_KERNEL
);
407 dev_err(codec
->dev
, "Failed to allocate image buffer\n");
411 out
= kzalloc(fw
->size
, GFP_KERNEL
);
413 dev_err(codec
->dev
, "Failed to allocate output buffer\n");
417 memcpy(img
, &fw
->data
[0], fw
->size
);
419 spi_message_init(&m
);
420 memset(&t
, 0, sizeof(t
));
425 t
.speed_hz
= wm0010
->sysclk
/ 10;
426 spi_message_add_tail(&t
, &m
);
428 dev_dbg(codec
->dev
, "Starting initial download at %dHz\n",
431 ret
= spi_sync(spi
, &m
);
433 dev_err(codec
->dev
, "Initial download failed: %d\n", ret
);
437 /* Look for errors from the boot ROM */
438 for (i
= 0; i
< fw
->size
; i
++) {
439 if (out
[i
] != 0x55) {
441 dev_err(codec
->dev
, "Boot ROM error: %x in %d\n",
443 wm0010_mark_boot_failure(wm0010
);
448 release_firmware(fw
);
452 if (!wait_for_completion_timeout(&wm0010
->boot_completion
,
453 msecs_to_jiffies(10)))
454 dev_err(codec
->dev
, "Failed to get interrupt from DSP loader.\n");
456 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
457 wm0010
->state
= WM0010_STAGE2
;
458 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
460 /* Only initialise PLL if max_spi_freq initialised */
461 if (wm0010
->max_spi_freq
) {
463 /* Initialise a PLL record */
464 memset(&pll_rec
, 0, sizeof(pll_rec
));
465 pll_rec
.command
= DFW_CMD_PLL
;
466 pll_rec
.length
= (sizeof(pll_rec
) - 8);
468 /* On wm0010 only the CLKCTRL1 value is used */
469 pll_rec
.clkctrl1
= wm0010
->pll_clkctrl1
;
471 len
= pll_rec
.length
+ 8;
472 out
= kzalloc(len
, GFP_KERNEL
);
475 "Failed to allocate RX buffer\n");
479 img_swap
= kzalloc(len
, GFP_KERNEL
);
482 "Failed to allocate image buffer\n");
486 /* We need to re-order for 0010 */
487 byte_swap_64((u64
*)&pll_rec
, img_swap
, len
);
489 spi_message_init(&m
);
490 memset(&t
, 0, sizeof(t
));
495 t
.speed_hz
= wm0010
->sysclk
/ 6;
496 spi_message_add_tail(&t
, &m
);
498 ret
= spi_sync(spi
, &m
);
500 dev_err(codec
->dev
, "First PLL write failed: %d\n", ret
);
504 /* Use a second send of the message to get the return status */
505 ret
= spi_sync(spi
, &m
);
507 dev_err(codec
->dev
, "Second PLL write failed: %d\n", ret
);
513 /* Look for PLL active code from the DSP */
514 for (i
= 0; i
< len
/ 4; i
++) {
515 if (*p
== 0x0e00ed0f) {
516 dev_dbg(codec
->dev
, "PLL packet received\n");
517 wm0010
->pll_running
= true;
526 dev_dbg(codec
->dev
, "Not enabling DSP PLL.");
528 ret
= request_firmware(&fw
, "wm0010.dfw", codec
->dev
);
530 dev_err(codec
->dev
, "Failed to request application: %d\n",
535 rec
= (const struct dfw_binrec
*)fw
->data
;
537 wm0010
->boot_done
= 0;
538 wm0010
->boot_failed
= false;
539 BUG_ON(!list_empty(&xfer_list
));
540 init_completion(&done
);
542 /* First record should be INFO */
543 if (rec
->command
!= DFW_CMD_INFO
) {
544 dev_err(codec
->dev
, "First record not INFO\r\n");
548 /* Check it's a 0010 file */
549 if (rec
->data
[0] != DEVICE_ID_WM0010
) {
550 dev_err(codec
->dev
, "Not a WM0010 firmware file.\r\n");
554 /* Skip the info record as we don't need to send it */
555 offset
+= ((rec
->length
) + 8);
556 rec
= (void *)&rec
->data
[rec
->length
];
558 while (offset
< fw
->size
) {
560 "Packet: command %d, data length = 0x%x\r\n",
561 rec
->command
, rec
->length
);
562 len
= rec
->length
+ 8;
564 out
= kzalloc(len
, GFP_KERNEL
);
567 "Failed to allocate RX buffer\n");
571 img_swap
= kzalloc(len
, GFP_KERNEL
);
574 "Failed to allocate image buffer\n");
578 /* We need to re-order for 0010 */
579 byte_swap_64((u64
*)&rec
->command
, img_swap
, len
);
581 xfer
= kzalloc(sizeof(*xfer
), GFP_KERNEL
);
583 dev_err(codec
->dev
, "Failed to allocate xfer\n");
588 list_add_tail(&xfer
->list
, &xfer_list
);
590 spi_message_init(&xfer
->m
);
591 xfer
->m
.complete
= wm0010_boot_xfer_complete
;
592 xfer
->m
.context
= xfer
;
593 xfer
->t
.tx_buf
= img_swap
;
594 xfer
->t
.rx_buf
= out
;
596 xfer
->t
.bits_per_word
= 8;
598 if (!wm0010
->pll_running
) {
599 xfer
->t
.speed_hz
= wm0010
->sysclk
/ 6;
601 xfer
->t
.speed_hz
= wm0010
->max_spi_freq
;
603 if (wm0010
->board_max_spi_speed
&&
604 (wm0010
->board_max_spi_speed
< wm0010
->max_spi_freq
))
605 xfer
->t
.speed_hz
= wm0010
->board_max_spi_speed
;
608 /* Store max usable spi frequency for later use */
609 wm0010
->max_spi_freq
= xfer
->t
.speed_hz
;
611 spi_message_add_tail(&xfer
->t
, &xfer
->m
);
613 offset
+= ((rec
->length
) + 8);
614 rec
= (void *)&rec
->data
[rec
->length
];
616 if (offset
>= fw
->size
) {
617 dev_dbg(codec
->dev
, "All transfers scheduled\n");
621 ret
= spi_async(spi
, &xfer
->m
);
623 dev_err(codec
->dev
, "Write failed: %d\n", ret
);
627 if (wm0010
->boot_failed
)
631 wait_for_completion(&done
);
633 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
634 wm0010
->state
= WM0010_FIRMWARE
;
635 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
637 mutex_unlock(&wm0010
->lock
);
639 release_firmware(fw
);
641 while (!list_empty(&xfer_list
)) {
642 xfer
= list_first_entry(&xfer_list
, struct wm0010_boot_xfer
,
644 kfree(xfer
->t
.rx_buf
);
645 kfree(xfer
->t
.tx_buf
);
646 list_del(&xfer
->list
);
653 /* Put the chip back into reset */
655 mutex_unlock(&wm0010
->lock
);
658 regulator_bulk_disable(ARRAY_SIZE(wm0010
->core_supplies
),
659 wm0010
->core_supplies
);
664 static int wm0010_set_bias_level(struct snd_soc_codec
*codec
,
665 enum snd_soc_bias_level level
)
667 struct wm0010_priv
*wm0010
= snd_soc_codec_get_drvdata(codec
);
670 case SND_SOC_BIAS_ON
:
671 if (codec
->dapm
.bias_level
== SND_SOC_BIAS_PREPARE
)
674 case SND_SOC_BIAS_PREPARE
:
676 case SND_SOC_BIAS_STANDBY
:
677 if (codec
->dapm
.bias_level
== SND_SOC_BIAS_PREPARE
) {
678 mutex_lock(&wm0010
->lock
);
680 mutex_unlock(&wm0010
->lock
);
683 case SND_SOC_BIAS_OFF
:
687 codec
->dapm
.bias_level
= level
;
692 static int wm0010_set_sysclk(struct snd_soc_codec
*codec
, int source
,
693 int clk_id
, unsigned int freq
, int dir
)
695 struct wm0010_priv
*wm0010
= snd_soc_codec_get_drvdata(codec
);
698 wm0010
->sysclk
= freq
;
700 if (freq
< pll_clock_map
[ARRAY_SIZE(pll_clock_map
)-1].max_sysclk
) {
701 wm0010
->max_spi_freq
= 0;
703 for (i
= 0; i
< ARRAY_SIZE(pll_clock_map
); i
++)
704 if (freq
>= pll_clock_map
[i
].max_sysclk
)
707 wm0010
->max_spi_freq
= pll_clock_map
[i
].max_pll_spi_speed
;
708 wm0010
->pll_clkctrl1
= pll_clock_map
[i
].pll_clkctrl1
;
714 static int wm0010_probe(struct snd_soc_codec
*codec
);
716 static struct snd_soc_codec_driver soc_codec_dev_wm0010
= {
717 .probe
= wm0010_probe
,
718 .set_bias_level
= wm0010_set_bias_level
,
719 .set_sysclk
= wm0010_set_sysclk
,
721 .dapm_routes
= wm0010_dapm_routes
,
722 .num_dapm_routes
= ARRAY_SIZE(wm0010_dapm_routes
),
725 #define WM0010_RATES (SNDRV_PCM_RATE_48000)
726 #define WM0010_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE |\
727 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE |\
728 SNDRV_PCM_FMTBIT_S32_LE)
730 static struct snd_soc_dai_driver wm0010_dai
[] = {
732 .name
= "wm0010-sdi1",
734 .stream_name
= "SDI1 Playback",
737 .rates
= WM0010_RATES
,
738 .formats
= WM0010_FORMATS
,
741 .stream_name
= "SDI1 Capture",
744 .rates
= WM0010_RATES
,
745 .formats
= WM0010_FORMATS
,
749 .name
= "wm0010-sdi2",
751 .stream_name
= "SDI2 Playback",
754 .rates
= WM0010_RATES
,
755 .formats
= WM0010_FORMATS
,
758 .stream_name
= "SDI2 Capture",
761 .rates
= WM0010_RATES
,
762 .formats
= WM0010_FORMATS
,
767 static irqreturn_t
wm0010_irq(int irq
, void *data
)
769 struct wm0010_priv
*wm0010
= data
;
771 switch (wm0010
->state
) {
772 case WM0010_POWER_OFF
:
773 case WM0010_OUT_OF_RESET
:
776 spin_lock(&wm0010
->irq_lock
);
777 complete(&wm0010
->boot_completion
);
778 spin_unlock(&wm0010
->irq_lock
);
787 static int wm0010_probe(struct snd_soc_codec
*codec
)
789 struct wm0010_priv
*wm0010
= snd_soc_codec_get_drvdata(codec
);
790 struct spi_device
*spi
= to_spi_device(wm0010
->dev
);
792 unsigned long gpio_flags
;
797 wm0010
->codec
= codec
;
799 init_completion(&wm0010
->boot_completion
);
801 wm0010
->core_supplies
[0].supply
= "AVDD";
802 wm0010
->core_supplies
[1].supply
= "DCVDD";
803 ret
= devm_regulator_bulk_get(wm0010
->dev
, ARRAY_SIZE(wm0010
->core_supplies
),
804 wm0010
->core_supplies
);
806 dev_err(wm0010
->dev
, "Failed to obtain core supplies: %d\n",
811 wm0010
->dbvdd
= devm_regulator_get(wm0010
->dev
, "DBVDD");
812 if (IS_ERR(wm0010
->dbvdd
)) {
813 ret
= PTR_ERR(wm0010
->dbvdd
);
814 dev_err(wm0010
->dev
, "Failed to obtain DBVDD: %d\n", ret
);
818 if (wm0010
->pdata
.gpio_reset
) {
819 wm0010
->gpio_reset
= wm0010
->pdata
.gpio_reset
;
821 if (wm0010
->pdata
.reset_active_high
)
822 wm0010
->gpio_reset_value
= 1;
824 wm0010
->gpio_reset_value
= 0;
826 if (wm0010
->gpio_reset_value
)
827 gpio_flags
= GPIOF_OUT_INIT_HIGH
;
829 gpio_flags
= GPIOF_OUT_INIT_LOW
;
831 ret
= devm_gpio_request_one(wm0010
->dev
, wm0010
->gpio_reset
,
832 gpio_flags
, "wm0010 reset");
835 "Failed to request GPIO for DSP reset: %d\n",
840 dev_err(wm0010
->dev
, "No reset GPIO configured\n");
845 if (wm0010
->pdata
.irq_flags
)
846 trigger
= wm0010
->pdata
.irq_flags
;
848 trigger
= IRQF_TRIGGER_FALLING
;
849 trigger
|= IRQF_ONESHOT
;
851 ret
= request_threaded_irq(irq
, NULL
, wm0010_irq
, trigger
,
854 dev_err(wm0010
->dev
, "Failed to request IRQ %d: %d\n",
858 if (spi
->max_speed_hz
)
859 wm0010
->board_max_spi_speed
= spi
->max_speed_hz
;
861 wm0010
->board_max_spi_speed
= 0;
863 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
864 wm0010
->state
= WM0010_POWER_OFF
;
865 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
870 static int __devinit
wm0010_spi_probe(struct spi_device
*spi
)
872 struct wm0010_priv
*wm0010
;
875 wm0010
= devm_kzalloc(&spi
->dev
, sizeof(*wm0010
),
880 mutex_init(&wm0010
->lock
);
881 spin_lock_init(&wm0010
->irq_lock
);
883 spi_set_drvdata(spi
, wm0010
);
884 wm0010
->dev
= &spi
->dev
;
886 if (dev_get_platdata(&spi
->dev
))
887 memcpy(&wm0010
->pdata
, dev_get_platdata(&spi
->dev
),
888 sizeof(wm0010
->pdata
));
890 ret
= snd_soc_register_codec(&spi
->dev
,
891 &soc_codec_dev_wm0010
, wm0010_dai
,
892 ARRAY_SIZE(wm0010_dai
));
899 static int __devexit
wm0010_spi_remove(struct spi_device
*spi
)
901 struct wm0010_priv
*wm0010
= spi_get_drvdata(spi
);
903 snd_soc_unregister_codec(&spi
->dev
);
905 if (wm0010
->gpio_reset
) {
906 /* Remember to put chip back into reset */
907 gpio_set_value(wm0010
->gpio_reset
, wm0010
->gpio_reset_value
);
908 gpio_free(wm0010
->gpio_reset
);
912 free_irq(wm0010
->irq
, wm0010
);
917 static struct spi_driver wm0010_spi_driver
= {
920 .bus
= &spi_bus_type
,
921 .owner
= THIS_MODULE
,
923 .probe
= wm0010_spi_probe
,
924 .remove
= __devexit_p(wm0010_spi_remove
),
927 module_spi_driver(wm0010_spi_driver
);
929 MODULE_DESCRIPTION("ASoC WM0010 driver");
930 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
931 MODULE_LICENSE("GPL");