[PATCH] ahci: readability tweak
[linux-2.6.git] / include / asm-x86_64 / smp.h
blobd6b7c057edbaf281ddb97963e027e17931a01211
1 #ifndef __ASM_SMP_H
2 #define __ASM_SMP_H
4 /*
5 * We need the APIC definitions automatically as part of 'smp.h'
6 */
7 #include <linux/threads.h>
8 #include <linux/cpumask.h>
9 #include <linux/bitops.h>
10 extern int disable_apic;
12 #include <asm/fixmap.h>
13 #include <asm/mpspec.h>
14 #include <asm/io_apic.h>
15 #include <asm/apic.h>
16 #include <asm/thread_info.h>
18 #ifdef CONFIG_SMP
20 #include <asm/pda.h>
22 struct pt_regs;
24 extern cpumask_t cpu_present_mask;
25 extern cpumask_t cpu_possible_map;
26 extern cpumask_t cpu_online_map;
27 extern cpumask_t cpu_callout_map;
28 extern cpumask_t cpu_initialized;
31 * Private routines/data
34 extern void smp_alloc_memory(void);
35 extern volatile unsigned long smp_invalidate_needed;
36 extern void lock_ipi_call_lock(void);
37 extern void unlock_ipi_call_lock(void);
38 extern int smp_num_siblings;
39 extern void smp_send_reschedule(int cpu);
40 void smp_stop_cpu(void);
42 extern cpumask_t cpu_sibling_map[NR_CPUS];
43 extern cpumask_t cpu_core_map[NR_CPUS];
44 extern u8 cpu_llc_id[NR_CPUS];
46 #define SMP_TRAMPOLINE_BASE 0x6000
49 * On x86 all CPUs are mapped 1:1 to the APIC space.
50 * This simplifies scheduling and IPI sending and
51 * compresses data structures.
54 static inline int num_booting_cpus(void)
56 return cpus_weight(cpu_callout_map);
59 #define raw_smp_processor_id() read_pda(cpunumber)
61 static inline int hard_smp_processor_id(void)
63 /* we don't want to mark this access volatile - bad code generation */
64 return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
67 extern int __cpu_disable(void);
68 extern void __cpu_die(unsigned int cpu);
69 extern void prefill_possible_map(void);
70 extern unsigned num_processors;
71 extern unsigned disabled_cpus;
73 #define NO_PROC_ID 0xFF /* No processor magic marker */
75 #endif
78 * Some lowlevel functions might want to know about
79 * the real APIC ID <-> CPU # mapping.
81 extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */
82 extern u8 x86_cpu_to_log_apicid[NR_CPUS];
83 extern u8 bios_cpu_apicid[];
85 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
87 return cpus_addr(cpumask)[0];
90 static inline int cpu_present_to_apicid(int mps_cpu)
92 if (mps_cpu < NR_CPUS)
93 return (int)bios_cpu_apicid[mps_cpu];
94 else
95 return BAD_APICID;
98 #ifndef CONFIG_SMP
99 #define stack_smp_processor_id() 0
100 #define cpu_logical_map(x) (x)
101 #else
102 #include <asm/thread_info.h>
103 #define stack_smp_processor_id() \
104 ({ \
105 struct thread_info *ti; \
106 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
107 ti->cpu; \
109 #endif
111 static __inline int logical_smp_processor_id(void)
113 /* we don't want to mark this access volatile - bad code generation */
114 return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
117 #ifdef CONFIG_SMP
118 #define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
119 #else
120 #define cpu_physical_id(cpu) boot_cpu_id
121 static inline int smp_call_function_single(int cpuid, void (*func) (void *info),
122 void *info, int retry, int wait)
124 /* Disable interrupts here? */
125 func(info);
126 return 0;
128 #endif /* !CONFIG_SMP */
129 #endif