1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #ifndef _IXGBE_COMMON_H_
29 #define _IXGBE_COMMON_H_
31 #include "ixgbe_type.h"
33 s32
ixgbe_init_ops_generic(struct ixgbe_hw
*hw
);
34 s32
ixgbe_init_hw_generic(struct ixgbe_hw
*hw
);
35 s32
ixgbe_start_hw_generic(struct ixgbe_hw
*hw
);
36 s32
ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw
*hw
);
37 s32
ixgbe_read_pba_num_generic(struct ixgbe_hw
*hw
, u32
*pba_num
);
38 s32
ixgbe_get_mac_addr_generic(struct ixgbe_hw
*hw
, u8
*mac_addr
);
39 s32
ixgbe_get_bus_info_generic(struct ixgbe_hw
*hw
);
40 s32
ixgbe_stop_adapter_generic(struct ixgbe_hw
*hw
);
42 s32
ixgbe_led_on_generic(struct ixgbe_hw
*hw
, u32 index
);
43 s32
ixgbe_led_off_generic(struct ixgbe_hw
*hw
, u32 index
);
45 s32
ixgbe_init_eeprom_params_generic(struct ixgbe_hw
*hw
);
46 s32
ixgbe_read_eeprom_generic(struct ixgbe_hw
*hw
, u16 offset
, u16
*data
);
47 s32
ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw
*hw
, u16 offset
,
49 s32
ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw
*hw
,
51 s32
ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw
*hw
);
53 s32
ixgbe_set_rar_generic(struct ixgbe_hw
*hw
, u32 index
, u8
*addr
, u32 vmdq
,
55 s32
ixgbe_clear_rar_generic(struct ixgbe_hw
*hw
, u32 index
);
56 s32
ixgbe_init_rx_addrs_generic(struct ixgbe_hw
*hw
);
57 s32
ixgbe_update_mc_addr_list_generic(struct ixgbe_hw
*hw
, u8
*mc_addr_list
,
59 ixgbe_mc_addr_itr func
);
60 s32
ixgbe_update_uc_addr_list_generic(struct ixgbe_hw
*hw
, u8
*addr_list
,
61 u32 addr_count
, ixgbe_mc_addr_itr func
);
62 s32
ixgbe_enable_mc_generic(struct ixgbe_hw
*hw
);
63 s32
ixgbe_disable_mc_generic(struct ixgbe_hw
*hw
);
64 s32
ixgbe_setup_fc_generic(struct ixgbe_hw
*hw
, s32 packetbuf_num
);
65 s32
ixgbe_fc_enable(struct ixgbe_hw
*hw
, s32 packtetbuf_num
);
66 s32
ixgbe_fc_autoneg(struct ixgbe_hw
*hw
);
68 s32
ixgbe_validate_mac_addr(u8
*mac_addr
);
69 s32
ixgbe_acquire_swfw_sync(struct ixgbe_hw
*hw
, u16 mask
);
70 void ixgbe_release_swfw_sync(struct ixgbe_hw
*hw
, u16 mask
);
71 s32
ixgbe_disable_pcie_master(struct ixgbe_hw
*hw
);
73 s32
ixgbe_read_analog_reg8_generic(struct ixgbe_hw
*hw
, u32 reg
, u8
*val
);
74 s32
ixgbe_write_analog_reg8_generic(struct ixgbe_hw
*hw
, u32 reg
, u8 val
);
76 #define IXGBE_WRITE_REG(a, reg, value) writel((value), ((a)->hw_addr + (reg)))
78 #define IXGBE_READ_REG(a, reg) readl((a)->hw_addr + (reg))
80 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
81 writel((value), ((a)->hw_addr + (reg) + ((offset) << 2))))
83 #define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
84 readl((a)->hw_addr + (reg) + ((offset) << 2)))
86 #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
89 #define hw_dbg(hw, format, arg...) \
90 printk(KERN_DEBUG, "%s: " format, ixgbe_get_hw_dev_name(hw), ##arg);
92 static inline int __attribute__ ((format (printf
, 2, 3)))
93 hw_dbg(struct ixgbe_hw
*hw
, const char *format
, ...)
99 #endif /* IXGBE_COMMON */