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[netdrvr] netxen: workqueue-related build fixes
[linux-2.6.git] / drivers / net / netxen / netxen_nic_init.c
blob869725f0bb1861cda3e726664c7e3c23f9e7b507
1 /*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Source file for NIC routines to initialize the Phantom Hardware
31 *
32 */
33
34 #include <linux/netdevice.h>
35 #include <linux/delay.h>
36 #include "netxen_nic.h"
37 #include "netxen_nic_hw.h"
38 #include "netxen_nic_ioctl.h"
39 #include "netxen_nic_phan_reg.h"
40
41 struct crb_addr_pair {
42 long addr;
43 long data;
44 };
45
46 #define NETXEN_MAX_CRB_XFORM 60
47 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
48 #define NETXEN_ADDR_ERROR ((unsigned long ) 0xffffffff )
49
50 #define crb_addr_transform(name) \
51 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
52 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
53
54 #define NETXEN_NIC_XDMA_RESET 0x8000ff
55
56 static inline void
57 netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
58 unsigned long off, int *data)
59 {
60 void __iomem *addr = pci_base_offset(adapter, off);
61 writel(*data, addr);
62 }
63
64 static void crb_addr_transform_setup(void)
65 {
66 crb_addr_transform(XDMA);
67 crb_addr_transform(TIMR);
68 crb_addr_transform(SRE);
69 crb_addr_transform(SQN3);
70 crb_addr_transform(SQN2);
71 crb_addr_transform(SQN1);
72 crb_addr_transform(SQN0);
73 crb_addr_transform(SQS3);
74 crb_addr_transform(SQS2);
75 crb_addr_transform(SQS1);
76 crb_addr_transform(SQS0);
77 crb_addr_transform(RPMX7);
78 crb_addr_transform(RPMX6);
79 crb_addr_transform(RPMX5);
80 crb_addr_transform(RPMX4);
81 crb_addr_transform(RPMX3);
82 crb_addr_transform(RPMX2);
83 crb_addr_transform(RPMX1);
84 crb_addr_transform(RPMX0);
85 crb_addr_transform(ROMUSB);
86 crb_addr_transform(SN);
87 crb_addr_transform(QMN);
88 crb_addr_transform(QMS);
89 crb_addr_transform(PGNI);
90 crb_addr_transform(PGND);
91 crb_addr_transform(PGN3);
92 crb_addr_transform(PGN2);
93 crb_addr_transform(PGN1);
94 crb_addr_transform(PGN0);
95 crb_addr_transform(PGSI);
96 crb_addr_transform(PGSD);
97 crb_addr_transform(PGS3);
98 crb_addr_transform(PGS2);
99 crb_addr_transform(PGS1);
100 crb_addr_transform(PGS0);
101 crb_addr_transform(PS);
102 crb_addr_transform(PH);
103 crb_addr_transform(NIU);
104 crb_addr_transform(I2Q);
105 crb_addr_transform(EG);
106 crb_addr_transform(MN);
107 crb_addr_transform(MS);
108 crb_addr_transform(CAS2);
109 crb_addr_transform(CAS1);
110 crb_addr_transform(CAS0);
111 crb_addr_transform(CAM);
112 crb_addr_transform(C2C1);
113 crb_addr_transform(C2C0);
114 }
115
116 int netxen_init_firmware(struct netxen_adapter *adapter)
117 {
118 u32 state = 0, loops = 0, err = 0;
119
120 /* Window 1 call */
121 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
122
123 if (state == PHAN_INITIALIZE_ACK)
124 return 0;
125
126 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
127 udelay(100);
128 /* Window 1 call */
129 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
130
131 loops++;
132 }
133 if (loops >= 2000) {
134 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
135 state);
136 err = -EIO;
137 return err;
138 }
139 /* Window 1 call */
140 writel(MPORT_SINGLE_FUNCTION_MODE,
141 NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
142 writel(PHAN_INITIALIZE_ACK,
143 NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
144
145 return err;
146 }
147
148 #define NETXEN_ADDR_LIMIT 0xffffffffULL
149
150 void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
151 struct pci_dev **used_dev)
152 {
153 void *addr;
154
155 addr = pci_alloc_consistent(pdev, sz, ptr);
156 if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
157 *used_dev = pdev;
158 return addr;
159 }
160 pci_free_consistent(pdev, sz, addr, *ptr);
161 addr = pci_alloc_consistent(NULL, sz, ptr);
162 *used_dev = NULL;
163 return addr;
164 }
165
166 void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
167 {
168 int ctxid, ring;
169 u32 i;
170 u32 num_rx_bufs = 0;
171 struct netxen_rcv_desc_ctx *rcv_desc;
172
173 DPRINTK(INFO, "initializing some queues: %p\n", adapter);
174 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
175 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
176 struct netxen_rx_buffer *rx_buf;
177 rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
178 rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
179 rcv_desc->begin_alloc = 0;
180 rx_buf = rcv_desc->rx_buf_arr;
181 num_rx_bufs = rcv_desc->max_rx_desc_count;
182 /*
183 * Now go through all of them, set reference handles
184 * and put them in the queues.
185 */
186 for (i = 0; i < num_rx_bufs; i++) {
187 rx_buf->ref_handle = i;
188 rx_buf->state = NETXEN_BUFFER_FREE;
189 DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
190 "%p\n", ctxid, i, rx_buf);
191 rx_buf++;
192 }
193 }
194 }
195 }
196
197 void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
198 {
199 int ports = 0;
200 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
201
202 if (netxen_nic_get_board_info(adapter) != 0)
203 printk("%s: Error getting board config info.\n",
204 netxen_nic_driver_name);
205 get_brd_port_by_type(board_info->board_type, &ports);
206 if (ports == 0)
207 printk(KERN_ERR "%s: Unknown board type\n",
208 netxen_nic_driver_name);
209 adapter->ahw.max_ports = ports;
210 }
211
212 void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
213 {
214 switch (adapter->ahw.board_type) {
215 case NETXEN_NIC_GBE:
216 adapter->enable_phy_interrupts =
217 netxen_niu_gbe_enable_phy_interrupts;
218 adapter->disable_phy_interrupts =
219 netxen_niu_gbe_disable_phy_interrupts;
220 adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
221 adapter->macaddr_set = netxen_niu_macaddr_set;
222 adapter->set_mtu = netxen_nic_set_mtu_gb;
223 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
224 adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
225 adapter->phy_read = netxen_niu_gbe_phy_read;
226 adapter->phy_write = netxen_niu_gbe_phy_write;
227 adapter->init_port = netxen_niu_gbe_init_port;
228 adapter->init_niu = netxen_nic_init_niu_gb;
229 adapter->stop_port = netxen_niu_disable_gbe_port;
230 break;
231
232 case NETXEN_NIC_XGBE:
233 adapter->enable_phy_interrupts =
234 netxen_niu_xgbe_enable_phy_interrupts;
235 adapter->disable_phy_interrupts =
236 netxen_niu_xgbe_disable_phy_interrupts;
237 adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
238 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
239 adapter->set_mtu = netxen_nic_set_mtu_xgb;
240 adapter->init_port = netxen_niu_xg_init_port;
241 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
242 adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
243 adapter->stop_port = netxen_niu_disable_xg_port;
244 break;
245
246 default:
247 break;
248 }
249 }
250
251 /*
252 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
253 * address to external PCI CRB address.
254 */
255 unsigned long netxen_decode_crb_addr(unsigned long addr)
256 {
257 int i;
258 unsigned long base_addr, offset, pci_base;
259
260 crb_addr_transform_setup();
261
262 pci_base = NETXEN_ADDR_ERROR;
263 base_addr = addr & 0xfff00000;
264 offset = addr & 0x000fffff;
265
266 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
267 if (crb_addr_xform[i] == base_addr) {
268 pci_base = i << 20;
269 break;
270 }
271 }
272 if (pci_base == NETXEN_ADDR_ERROR)
273 return pci_base;
274 else
275 return (pci_base + offset);
276 }
277
278 static long rom_max_timeout = 10000;
279 static long rom_lock_timeout = 1000000;
280
281 static inline int rom_lock(struct netxen_adapter *adapter)
282 {
283 int iter;
284 u32 done = 0;
285 int timeout = 0;
286
287 while (!done) {
288 /* acquire semaphore2 from PCI HW block */
289 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
290 &done);
291 if (done == 1)
292 break;
293 if (timeout >= rom_lock_timeout)
294 return -EIO;
295
296 timeout++;
297 /*
298 * Yield CPU
299 */
300 if (!in_atomic())
301 schedule();
302 else {
303 for (iter = 0; iter < 20; iter++)
304 cpu_relax(); /*This a nop instr on i386 */
305 }
306 }
307 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
308 return 0;
309 }
310
311 int netxen_wait_rom_done(struct netxen_adapter *adapter)
312 {
313 long timeout = 0;
314 long done = 0;
315
316 while (done == 0) {
317 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
318 done &= 2;
319 timeout++;
320 if (timeout >= rom_max_timeout) {
321 printk("Timeout reached waiting for rom done");
322 return -EIO;
323 }
324 }
325 return 0;
326 }
327
328 static inline int netxen_rom_wren(struct netxen_adapter *adapter)
329 {
330 /* Set write enable latch in ROM status register */
331 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
332 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
333 M25P_INSTR_WREN);
334 if (netxen_wait_rom_done(adapter)) {
335 return -1;
336 }
337 return 0;
338 }
339
340 static inline unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
341 unsigned int addr)
342 {
343 unsigned int data = 0xdeaddead;
344 data = netxen_nic_reg_read(adapter, addr);
345 return data;
346 }
347
348 static inline int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
349 {
350 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
351 M25P_INSTR_RDSR);
352 if (netxen_wait_rom_done(adapter)) {
353 return -1;
354 }
355 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
356 }
357
358 static inline void netxen_rom_unlock(struct netxen_adapter *adapter)
359 {
360 u32 val;
361
362 /* release semaphore2 */
363 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
364
365 }
366
367 int netxen_rom_wip_poll(struct netxen_adapter *adapter)
368 {
369 long timeout = 0;
370 long wip = 1;
371 int val;
372 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
373 while (wip != 0) {
374 val = netxen_do_rom_rdsr(adapter);
375 wip = val & 1;
376 timeout++;
377 if (timeout > rom_max_timeout) {
378 return -1;
379 }
380 }
381 return 0;
382 }
383
384 static inline int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
385 int data)
386 {
387 if (netxen_rom_wren(adapter)) {
388 return -1;
389 }
390 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
391 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
392 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
393 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
394 M25P_INSTR_PP);
395 if (netxen_wait_rom_done(adapter)) {
396 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
397 return -1;
398 }
399
400 return netxen_rom_wip_poll(adapter);
401 }
402
403 static inline int
404 do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
405 {
406 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
407 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
408 udelay(100); /* prevent bursting on CRB */
409 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
410 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
411 if (netxen_wait_rom_done(adapter)) {
412 printk("Error waiting for rom done\n");
413 return -EIO;
414 }
415 /* reset abyte_cnt and dummy_byte_cnt */
416 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
417 udelay(100); /* prevent bursting on CRB */
418 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
419
420 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
421 return 0;
422 }
423
424 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
425 {
426 int ret;
427
428 if (rom_lock(adapter) != 0)
429 return -EIO;
430
431 ret = do_rom_fast_read(adapter, addr, valp);
432 netxen_rom_unlock(adapter);
433 return ret;
434 }
435
436 int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
437 {
438 int ret = 0;
439
440 if (rom_lock(adapter) != 0) {
441 return -1;
442 }
443 ret = do_rom_fast_write(adapter, addr, data);
444 netxen_rom_unlock(adapter);
445 return ret;
446 }
447 int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
448 {
449 netxen_rom_wren(adapter);
450 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
451 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
452 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
453 M25P_INSTR_SE);
454 if (netxen_wait_rom_done(adapter)) {
455 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
456 return -1;
457 }
458 return netxen_rom_wip_poll(adapter);
459 }
460
461 int netxen_rom_se(struct netxen_adapter *adapter, int addr)
462 {
463 int ret = 0;
464 if (rom_lock(adapter) != 0) {
465 return -1;
466 }
467 ret = netxen_do_rom_se(adapter, addr);
468 netxen_rom_unlock(adapter);
469 return ret;
470 }
471
472 #define NETXEN_BOARDTYPE 0x4008
473 #define NETXEN_BOARDNUM 0x400c
474 #define NETXEN_CHIPNUM 0x4010
475 #define NETXEN_ROMBUS_RESET 0xFFFFFFFF
476 #define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
477 #define NETXEN_ROM_FOUND_INIT 0x400
478
479 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
480 {
481 int addr, val, status;
482 int n, i;
483 int init_delay = 0;
484 struct crb_addr_pair *buf;
485 unsigned long off;
486
487 /* resetall */
488 status = netxen_nic_get_board_info(adapter);
489 if (status)
490 printk("%s: netxen_pinit_from_rom: Error getting board info\n",
491 netxen_nic_driver_name);
492
493 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
494 NETXEN_ROMBUS_RESET);
495
496 if (verbose) {
497 int val;
498 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
499 printk("P2 ROM board type: 0x%08x\n", val);
500 else
501 printk("Could not read board type\n");
502 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
503 printk("P2 ROM board num: 0x%08x\n", val);
504 else
505 printk("Could not read board number\n");
506 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
507 printk("P2 ROM chip num: 0x%08x\n", val);
508 else
509 printk("Could not read chip number\n");
510 }
511
512 if (netxen_rom_fast_read(adapter, 0, &n) == 0
513 && (n & NETXEN_ROM_FIRST_BARRIER)) {
514 n &= ~NETXEN_ROM_ROUNDUP;
515 if (n < NETXEN_ROM_FOUND_INIT) {
516 if (verbose)
517 printk("%s: %d CRB init values found"
518 " in ROM.\n", netxen_nic_driver_name, n);
519 } else {
520 printk("%s:n=0x%x Error! NetXen card flash not"
521 " initialized.\n", __FUNCTION__, n);
522 return -EIO;
523 }
524 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
525 if (buf == NULL) {
526 printk("%s: netxen_pinit_from_rom: Unable to calloc "
527 "memory.\n", netxen_nic_driver_name);
528 return -ENOMEM;
529 }
530 for (i = 0; i < n; i++) {
531 if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
532 || netxen_rom_fast_read(adapter, 8 * i + 8,
533 &addr) != 0)
534 return -EIO;
535
536 buf[i].addr = addr;
537 buf[i].data = val;
538
539 if (verbose)
540 printk("%s: PCI: 0x%08x == 0x%08x\n",
541 netxen_nic_driver_name, (unsigned int)
542 netxen_decode_crb_addr((unsigned long)
543 addr), val);
544 }
545 for (i = 0; i < n; i++) {
546
547 off =
548 netxen_decode_crb_addr((unsigned long)buf[i].addr) +
549 NETXEN_PCI_CRBSPACE;
550 /* skipping cold reboot MAGIC */
551 if (off == NETXEN_CAM_RAM(0x1fc))
552 continue;
553
554 /* After writing this register, HW needs time for CRB */
555 /* to quiet down (else crb_window returns 0xffffffff) */
556 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
557 init_delay = 1;
558 /* hold xdma in reset also */
559 buf[i].data = NETXEN_NIC_XDMA_RESET;
560 }
561
562 if (ADDR_IN_WINDOW1(off)) {
563 writel(buf[i].data,
564 NETXEN_CRB_NORMALIZE(adapter, off));
565 } else {
566 netxen_nic_pci_change_crbwindow(adapter, 0);
567 writel(buf[i].data,
568 pci_base_offset(adapter, off));
569
570 netxen_nic_pci_change_crbwindow(adapter, 1);
571 }
572 if (init_delay == 1) {
573 ssleep(1);
574 init_delay = 0;
575 }
576 msleep(1);
577 }
578 kfree(buf);
579
580 /* disable_peg_cache_all */
581
582 /* unreset_net_cache */
583 netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
584 4);
585 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
586 (val & 0xffffff0f));
587 /* p2dn replyCount */
588 netxen_crb_writelit_adapter(adapter,
589 NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
590 /* disable_peg_cache 0 */
591 netxen_crb_writelit_adapter(adapter,
592 NETXEN_CRB_PEG_NET_D + 0x4c, 8);
593 /* disable_peg_cache 1 */
594 netxen_crb_writelit_adapter(adapter,
595 NETXEN_CRB_PEG_NET_I + 0x4c, 8);
596
597 /* peg_clr_all */
598
599 /* peg_clr 0 */
600 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
601 0);
602 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
603 0);
604 /* peg_clr 1 */
605 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
606 0);
607 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
608 0);
609 /* peg_clr 2 */
610 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
611 0);
612 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
613 0);
614 /* peg_clr 3 */
615 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
616 0);
617 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
618 0);
619 }
620 return 0;
621 }
622
623 int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
624 {
625 uint64_t addr;
626 uint32_t hi;
627 uint32_t lo;
628
629 adapter->dummy_dma.addr =
630 pci_alloc_consistent(adapter->ahw.pdev,
631 NETXEN_HOST_DUMMY_DMA_SIZE,
632 &adapter->dummy_dma.phys_addr);
633 if (adapter->dummy_dma.addr == NULL) {
634 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
635 __FUNCTION__);
636 return -ENOMEM;
637 }
638
639 addr = (uint64_t) adapter->dummy_dma.phys_addr;
640 hi = (addr >> 32) & 0xffffffff;
641 lo = addr & 0xffffffff;
642
643 writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
644 writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
645
646 return 0;
647 }
648
649 void netxen_free_adapter_offload(struct netxen_adapter *adapter)
650 {
651 if (adapter->dummy_dma.addr) {
652 pci_free_consistent(adapter->ahw.pdev,
653 NETXEN_HOST_DUMMY_DMA_SIZE,
654 adapter->dummy_dma.addr,
655 adapter->dummy_dma.phys_addr);
656 adapter->dummy_dma.addr = NULL;
657 }
658 }
659
660 void netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
661 {
662 u32 val = 0;
663 int loops = 0;
664
665 if (!pegtune_val) {
666 while (val != PHAN_INITIALIZE_COMPLETE && loops < 200000) {
667 udelay(100);
668 schedule();
669 val =
670 readl(NETXEN_CRB_NORMALIZE
671 (adapter, CRB_CMDPEG_STATE));
672 loops++;
673 }
674 if (val != PHAN_INITIALIZE_COMPLETE)
675 printk("WARNING: Initial boot wait loop failed...\n");
676 }
677 }
678
679 int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
680 {
681 int ctx;
682
683 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
684 struct netxen_recv_context *recv_ctx =
685 &(adapter->recv_ctx[ctx]);
686 u32 consumer;
687 struct status_desc *desc_head;
688 struct status_desc *desc;
689
690 consumer = recv_ctx->status_rx_consumer;
691 desc_head = recv_ctx->rcv_status_desc_head;
692 desc = &desc_head[consumer];
693
694 if (((le16_to_cpu(netxen_get_sts_owner(desc)))
695 & STATUS_OWNER_HOST))
696 return 1;
697 }
698
699 return 0;
700 }
701
702 static inline int netxen_nic_check_temp(struct netxen_adapter *adapter)
703 {
704 int port_num;
705 struct netxen_port *port;
706 struct net_device *netdev;
707 uint32_t temp, temp_state, temp_val;
708 int rv = 0;
709
710 temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
711
712 temp_state = nx_get_temp_state(temp);
713 temp_val = nx_get_temp_val(temp);
714
715 if (temp_state == NX_TEMP_PANIC) {
716 printk(KERN_ALERT
717 "%s: Device temperature %d degrees C exceeds"
718 " maximum allowed. Hardware has been shut down.\n",
719 netxen_nic_driver_name, temp_val);
720 for (port_num = 0; port_num < adapter->ahw.max_ports;
721 port_num++) {
722 port = adapter->port[port_num];
723 netdev = port->netdev;
724
725 netif_carrier_off(netdev);
726 netif_stop_queue(netdev);
727 }
728 rv = 1;
729 } else if (temp_state == NX_TEMP_WARN) {
730 if (adapter->temp == NX_TEMP_NORMAL) {
731 printk(KERN_ALERT
732 "%s: Device temperature %d degrees C "
733 "exceeds operating range."
734 " Immediate action needed.\n",
735 netxen_nic_driver_name, temp_val);
736 }
737 } else {
738 if (adapter->temp == NX_TEMP_WARN) {
739 printk(KERN_INFO
740 "%s: Device temperature is now %d degrees C"
741 " in normal range.\n", netxen_nic_driver_name,
742 temp_val);
743 }
744 }
745 adapter->temp = temp_state;
746 return rv;
747 }
748
749 void netxen_watchdog_task(struct work_struct *work)
750 {
751 int port_num;
752 struct netxen_port *port;
753 struct net_device *netdev;
754 struct netxen_adapter *adapter =
755 container_of(work, struct netxen_adapter, watchdog_task);
756
757 if (netxen_nic_check_temp(adapter))
758 return;
759
760 for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
761 port = adapter->port[port_num];
762 netdev = port->netdev;
763
764 if ((netif_running(netdev)) && !netif_carrier_ok(netdev)) {
765 printk(KERN_INFO "%s port %d, %s carrier is now ok\n",
766 netxen_nic_driver_name, port_num, netdev->name);
767 netif_carrier_on(netdev);
768 }
769
770 if (netif_queue_stopped(netdev))
771 netif_wake_queue(netdev);
772 }
773
774 if (adapter->handle_phy_intr)
775 adapter->handle_phy_intr(adapter);
776 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
777 }
778
779 /*
780 * netxen_process_rcv() send the received packet to the protocol stack.
781 * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
782 * invoke the routine to send more rx buffers to the Phantom...
783 */
784 void
785 netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
786 struct status_desc *desc)
787 {
788 struct netxen_port *port = adapter->port[netxen_get_sts_port(desc)];
789 struct pci_dev *pdev = port->pdev;
790 struct net_device *netdev = port->netdev;
791 int index = le16_to_cpu(netxen_get_sts_refhandle(desc));
792 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
793 struct netxen_rx_buffer *buffer;
794 struct sk_buff *skb;
795 u32 length = le16_to_cpu(netxen_get_sts_totallength(desc));
796 u32 desc_ctx;
797 struct netxen_rcv_desc_ctx *rcv_desc;
798 int ret;
799
800 desc_ctx = netxen_get_sts_type(desc);
801 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
802 printk("%s: %s Bad Rcv descriptor ring\n",
803 netxen_nic_driver_name, netdev->name);
804 return;
805 }
806
807 rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
808 if (unlikely(index > rcv_desc->max_rx_desc_count)) {
809 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
810 index, rcv_desc->max_rx_desc_count);
811 return;
812 }
813 buffer = &rcv_desc->rx_buf_arr[index];
814 if (desc_ctx == RCV_DESC_LRO_CTXID) {
815 buffer->lro_current_frags++;
816 if (netxen_get_sts_desc_lro_last_frag(desc)) {
817 buffer->lro_expected_frags =
818 netxen_get_sts_desc_lro_cnt(desc);
819 buffer->lro_length = length;
820 }
821 if (buffer->lro_current_frags != buffer->lro_expected_frags) {
822 if (buffer->lro_expected_frags != 0) {
823 printk("LRO: (refhandle:%x) recv frag."
824 "wait for last. flags: %x expected:%d"
825 "have:%d\n", index,
826 netxen_get_sts_desc_lro_last_frag(desc),
827 buffer->lro_expected_frags,
828 buffer->lro_current_frags);
829 }
830 return;
831 }
832 }
833
834 pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
835 PCI_DMA_FROMDEVICE);
836
837 skb = (struct sk_buff *)buffer->skb;
838
839 if (likely(netxen_get_sts_status(desc) == STATUS_CKSUM_OK)) {
840 port->stats.csummed++;
841 skb->ip_summed = CHECKSUM_UNNECESSARY;
842 }
843 skb->dev = netdev;
844 if (desc_ctx == RCV_DESC_LRO_CTXID) {
845 /* True length was only available on the last pkt */
846 skb_put(skb, buffer->lro_length);
847 } else {
848 skb_put(skb, length);
849 }
850
851 skb->protocol = eth_type_trans(skb, netdev);
852
853 ret = netif_receive_skb(skb);
854
855 /*
856 * RH: Do we need these stats on a regular basis. Can we get it from
857 * Linux stats.
858 */
859 switch (ret) {
860 case NET_RX_SUCCESS:
861 port->stats.uphappy++;
862 break;
863
864 case NET_RX_CN_LOW:
865 port->stats.uplcong++;
866 break;
867
868 case NET_RX_CN_MOD:
869 port->stats.upmcong++;
870 break;
871
872 case NET_RX_CN_HIGH:
873 port->stats.uphcong++;
874 break;
875
876 case NET_RX_DROP:
877 port->stats.updropped++;
878 break;
879
880 default:
881 port->stats.updunno++;
882 break;
883 }
884
885 netdev->last_rx = jiffies;
886
887 rcv_desc->rcv_free++;
888 rcv_desc->rcv_pending--;
889
890 /*
891 * We just consumed one buffer so post a buffer.
892 */
893 adapter->stats.post_called++;
894 buffer->skb = NULL;
895 buffer->state = NETXEN_BUFFER_FREE;
896 buffer->lro_current_frags = 0;
897 buffer->lro_expected_frags = 0;
898
899 port->stats.no_rcv++;
900 port->stats.rxbytes += length;
901 }
902
903 /* Process Receive status ring */
904 u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
905 {
906 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
907 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
908 struct status_desc *desc; /* used to read status desc here */
909 u32 consumer = recv_ctx->status_rx_consumer;
910 u32 producer = 0;
911 int count = 0, ring;
912
913 DPRINTK(INFO, "procesing receive\n");
914 /*
915 * we assume in this case that there is only one port and that is
916 * port #1...changes need to be done in firmware to indicate port
917 * number as part of the descriptor. This way we will be able to get
918 * the netdev which is associated with that device.
919 */
920 while (count < max) {
921 desc = &desc_head[consumer];
922 if (!
923 (le16_to_cpu(netxen_get_sts_owner(desc)) &
924 STATUS_OWNER_HOST)) {
925 DPRINTK(ERR, "desc %p ownedby %x\n", desc,
926 netxen_get_sts_owner(desc));
927 break;
928 }
929 netxen_process_rcv(adapter, ctxid, desc);
930 netxen_clear_sts_owner(desc);
931 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
932 consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
933 count++;
934 }
935 if (count) {
936 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
937 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
938 }
939 }
940
941 /* update the consumer index in phantom */
942 if (count) {
943 adapter->stats.process_rcv++;
944 recv_ctx->status_rx_consumer = consumer;
945 recv_ctx->status_rx_producer = producer;
946
947 /* Window = 1 */
948 writel(consumer,
949 NETXEN_CRB_NORMALIZE(adapter,
950 recv_crb_registers[ctxid].
951 crb_rcv_status_consumer));
952 }
953
954 return count;
955 }
956
957 /* Process Command status ring */
958 int netxen_process_cmd_ring(unsigned long data)
959 {
960 u32 last_consumer;
961 u32 consumer;
962 struct netxen_adapter *adapter = (struct netxen_adapter *)data;
963 int count1 = 0;
964 int count2 = 0;
965 struct netxen_cmd_buffer *buffer;
966 struct netxen_port *port; /* port #1 */
967 struct netxen_port *nport;
968 struct pci_dev *pdev;
969 struct netxen_skb_frag *frag;
970 u32 i;
971 struct sk_buff *skb = NULL;
972 int p;
973 int done;
974
975 spin_lock(&adapter->tx_lock);
976 last_consumer = adapter->last_cmd_consumer;
977 DPRINTK(INFO, "procesing xmit complete\n");
978 /* we assume in this case that there is only one port and that is
979 * port #1...changes need to be done in firmware to indicate port
980 * number as part of the descriptor. This way we will be able to get
981 * the netdev which is associated with that device.
982 */
983
984 consumer = *(adapter->cmd_consumer);
985 if (last_consumer == consumer) { /* Ring is empty */
986 DPRINTK(INFO, "last_consumer %d == consumer %d\n",
987 last_consumer, consumer);
988 spin_unlock(&adapter->tx_lock);
989 return 1;
990 }
991
992 adapter->proc_cmd_buf_counter++;
993 adapter->stats.process_xmit++;
994 /*
995 * Not needed - does not seem to be used anywhere.
996 * adapter->cmd_consumer = consumer;
997 */
998 spin_unlock(&adapter->tx_lock);
999
1000 while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) {
1001 buffer = &adapter->cmd_buf_arr[last_consumer];
1002 port = adapter->port[buffer->port];
1003 pdev = port->pdev;
1004 frag = &buffer->frag_array[0];
1005 skb = buffer->skb;
1006 if (skb && (cmpxchg(&buffer->skb, skb, 0) == skb)) {
1007 pci_unmap_single(pdev, frag->dma, frag->length,
1008 PCI_DMA_TODEVICE);
1009 for (i = 1; i < buffer->frag_count; i++) {
1010 DPRINTK(INFO, "getting fragment no %d\n", i);
1011 frag++; /* Get the next frag */
1012 pci_unmap_page(pdev, frag->dma, frag->length,
1013 PCI_DMA_TODEVICE);
1014 }
1015
1016 port->stats.skbfreed++;
1017 dev_kfree_skb_any(skb);
1018 skb = NULL;
1019 } else if (adapter->proc_cmd_buf_counter == 1) {
1020 port->stats.txnullskb++;
1021 }
1022 if (unlikely(netif_queue_stopped(port->netdev)
1023 && netif_carrier_ok(port->netdev))
1024 && ((jiffies - port->netdev->trans_start) >
1025 port->netdev->watchdog_timeo)) {
1026 SCHEDULE_WORK(&port->adapter->tx_timeout_task);
1027 }
1028
1029 last_consumer = get_next_index(last_consumer,
1030 adapter->max_tx_desc_count);
1031 count1++;
1032 }
1033 adapter->stats.noxmitdone += count1;
1034
1035 count2 = 0;
1036 spin_lock(&adapter->tx_lock);
1037 if ((--adapter->proc_cmd_buf_counter) == 0) {
1038 adapter->last_cmd_consumer = last_consumer;
1039 while ((adapter->last_cmd_consumer != consumer)
1040 && (count2 < MAX_STATUS_HANDLE)) {
1041 buffer =
1042 &adapter->cmd_buf_arr[adapter->last_cmd_consumer];
1043 count2++;
1044 if (buffer->skb)
1045 break;
1046 else
1047 adapter->last_cmd_consumer =
1048 get_next_index(adapter->last_cmd_consumer,
1049 adapter->max_tx_desc_count);
1050 }
1051 }
1052 if (count1 || count2) {
1053 for (p = 0; p < adapter->ahw.max_ports; p++) {
1054 nport = adapter->port[p];
1055 if (netif_queue_stopped(nport->netdev)
1056 && (nport->flags & NETXEN_NETDEV_STATUS)) {
1057 netif_wake_queue(nport->netdev);
1058 nport->flags &= ~NETXEN_NETDEV_STATUS;
1059 }
1060 }
1061 }
1062 /*
1063 * If everything is freed up to consumer then check if the ring is full
1064 * If the ring is full then check if more needs to be freed and
1065 * schedule the call back again.
1066 *
1067 * This happens when there are 2 CPUs. One could be freeing and the
1068 * other filling it. If the ring is full when we get out of here and
1069 * the card has already interrupted the host then the host can miss the
1070 * interrupt.
1071 *
1072 * There is still a possible race condition and the host could miss an
1073 * interrupt. The card has to take care of this.
1074 */
1075 if (adapter->last_cmd_consumer == consumer &&
1076 (((adapter->cmd_producer + 1) %
1077 adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) {
1078 consumer = *(adapter->cmd_consumer);
1079 }
1080 done = (adapter->last_cmd_consumer == consumer);
1081
1082 spin_unlock(&adapter->tx_lock);
1083 DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
1084 __FUNCTION__);
1085 return (done);
1086 }
1087
1088 /*
1089 * netxen_post_rx_buffers puts buffer in the Phantom memory
1090 */
1091 void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1092 {
1093 struct pci_dev *pdev = adapter->ahw.pdev;
1094 struct sk_buff *skb;
1095 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1096 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1097 uint producer;
1098 struct rcv_desc *pdesc;
1099 struct netxen_rx_buffer *buffer;
1100 int count = 0;
1101 int index = 0;
1102 netxen_ctx_msg msg = 0;
1103 dma_addr_t dma;
1104
1105 adapter->stats.post_called++;
1106 rcv_desc = &recv_ctx->rcv_desc[ringid];
1107
1108 producer = rcv_desc->producer;
1109 index = rcv_desc->begin_alloc;
1110 buffer = &rcv_desc->rx_buf_arr[index];
1111 /* We can start writing rx descriptors into the phantom memory. */
1112 while (buffer->state == NETXEN_BUFFER_FREE) {
1113 skb = dev_alloc_skb(rcv_desc->skb_size);
1114 if (unlikely(!skb)) {
1115 /*
1116 * TODO
1117 * We need to schedule the posting of buffers to the pegs.
1118 */
1119 rcv_desc->begin_alloc = index;
1120 DPRINTK(ERR, "netxen_post_rx_buffers: "
1121 " allocated only %d buffers\n", count);
1122 break;
1123 }
1124
1125 count++; /* now there should be no failure */
1126 pdesc = &rcv_desc->desc_head[producer];
1127
1128 #if defined(XGB_DEBUG)
1129 *(unsigned long *)(skb->head) = 0xc0debabe;
1130 if (skb_is_nonlinear(skb)) {
1131 printk("Allocated SKB @%p is nonlinear\n");
1132 }
1133 #endif
1134 skb_reserve(skb, 2);
1135 /* This will be setup when we receive the
1136 * buffer after it has been filled FSL TBD TBD
1137 * skb->dev = netdev;
1138 */
1139 dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
1140 PCI_DMA_FROMDEVICE);
1141 pdesc->addr_buffer = dma;
1142 buffer->skb = skb;
1143 buffer->state = NETXEN_BUFFER_BUSY;
1144 buffer->dma = dma;
1145 /* make a rcv descriptor */
1146 pdesc->reference_handle = buffer->ref_handle;
1147 pdesc->buffer_length = rcv_desc->dma_size;
1148 DPRINTK(INFO, "done writing descripter\n");
1149 producer =
1150 get_next_index(producer, rcv_desc->max_rx_desc_count);
1151 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1152 buffer = &rcv_desc->rx_buf_arr[index];
1153 }
1154 /* if we did allocate buffers, then write the count to Phantom */
1155 if (count) {
1156 rcv_desc->begin_alloc = index;
1157 rcv_desc->rcv_pending += count;
1158 adapter->stats.lastposted = count;
1159 adapter->stats.posted += count;
1160 rcv_desc->producer = producer;
1161 if (rcv_desc->rcv_free >= 32) {
1162 rcv_desc->rcv_free = 0;
1163 /* Window = 1 */
1164 writel((producer - 1) &
1165 (rcv_desc->max_rx_desc_count - 1),
1166 NETXEN_CRB_NORMALIZE(adapter,
1167 recv_crb_registers[0].
1168 rcv_desc_crb[ringid].
1169 crb_rcv_producer_offset));
1170 /*
1171 * Write a doorbell msg to tell phanmon of change in
1172 * receive ring producer
1173 */
1174 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1175 netxen_set_msg_privid(msg);
1176 netxen_set_msg_count(msg,
1177 ((producer -
1178 1) & (rcv_desc->
1179 max_rx_desc_count - 1)));
1180 netxen_set_msg_ctxid(msg, 0);
1181 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1182 writel(msg,
1183 DB_NORMALIZE(adapter,
1184 NETXEN_RCV_PRODUCER_OFFSET));
1185 }
1186 }
1187 }
1188
1189 void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, uint32_t ctx,
1190 uint32_t ringid)
1191 {
1192 struct pci_dev *pdev = adapter->ahw.pdev;
1193 struct sk_buff *skb;
1194 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1195 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1196 u32 producer;
1197 struct rcv_desc *pdesc;
1198 struct netxen_rx_buffer *buffer;
1199 int count = 0;
1200 int index = 0;
1201
1202 adapter->stats.post_called++;
1203 rcv_desc = &recv_ctx->rcv_desc[ringid];
1204
1205 producer = rcv_desc->producer;
1206 index = rcv_desc->begin_alloc;
1207 buffer = &rcv_desc->rx_buf_arr[index];
1208 /* We can start writing rx descriptors into the phantom memory. */
1209 while (buffer->state == NETXEN_BUFFER_FREE) {
1210 skb = dev_alloc_skb(rcv_desc->skb_size);
1211 if (unlikely(!skb)) {
1212 /*
1213 * We need to schedule the posting of buffers to the pegs.
1214 */
1215 rcv_desc->begin_alloc = index;
1216 DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
1217 " allocated only %d buffers\n", count);
1218 break;
1219 }
1220 count++; /* now there should be no failure */
1221 pdesc = &rcv_desc->desc_head[producer];
1222 skb_reserve(skb, 2);
1223 /*
1224 * This will be setup when we receive the
1225 * buffer after it has been filled
1226 * skb->dev = netdev;
1227 */
1228 buffer->skb = skb;
1229 buffer->state = NETXEN_BUFFER_BUSY;
1230 buffer->dma = pci_map_single(pdev, skb->data,
1231 rcv_desc->dma_size,
1232 PCI_DMA_FROMDEVICE);
1233
1234 /* make a rcv descriptor */
1235 pdesc->reference_handle = le16_to_cpu(buffer->ref_handle);
1236 pdesc->buffer_length = le16_to_cpu(rcv_desc->dma_size);
1237 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1238 DPRINTK(INFO, "done writing descripter\n");
1239 producer =
1240 get_next_index(producer, rcv_desc->max_rx_desc_count);
1241 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1242 buffer = &rcv_desc->rx_buf_arr[index];
1243 }
1244
1245 /* if we did allocate buffers, then write the count to Phantom */
1246 if (count) {
1247 rcv_desc->begin_alloc = index;
1248 rcv_desc->rcv_pending += count;
1249 adapter->stats.lastposted = count;
1250 adapter->stats.posted += count;
1251 rcv_desc->producer = producer;
1252 if (rcv_desc->rcv_free >= 32) {
1253 rcv_desc->rcv_free = 0;
1254 /* Window = 1 */
1255 writel((producer - 1) &
1256 (rcv_desc->max_rx_desc_count - 1),
1257 NETXEN_CRB_NORMALIZE(adapter,
1258 recv_crb_registers[0].
1259 rcv_desc_crb[ringid].
1260 crb_rcv_producer_offset));
1261 wmb();
1262 }
1263 }
1264 }
1265
1266 int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
1267 {
1268 if (find_diff_among(adapter->last_cmd_consumer,
1269 adapter->cmd_producer,
1270 adapter->max_tx_desc_count) > 0)
1271 return 1;
1272
1273 return 0;
1274 }
1275
1276 int
1277 netxen_nic_fill_statistics(struct netxen_adapter *adapter,
1278 struct netxen_port *port,
1279 struct netxen_statistics *netxen_stats)
1280 {
1281 void __iomem *addr;
1282
1283 if (adapter->ahw.board_type == NETXEN_NIC_XGBE) {
1284 netxen_nic_pci_change_crbwindow(adapter, 0);
1285 NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_TX_BYTE_CNT,
1286 &(netxen_stats->tx_bytes));
1287 NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_TX_FRAME_CNT,
1288 &(netxen_stats->tx_packets));
1289 NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_RX_BYTE_CNT,
1290 &(netxen_stats->rx_bytes));
1291 NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_RX_FRAME_CNT,
1292 &(netxen_stats->rx_packets));
1293 NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_AGGR_ERROR_CNT,
1294 &(netxen_stats->rx_errors));
1295 NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_CRC_ERROR_CNT,
1296 &(netxen_stats->rx_crc_errors));
1297 NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_OVERSIZE_FRAME_ERR,
1298 &(netxen_stats->
1299 rx_long_length_error));
1300 NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_UNDERSIZE_FRAME_ERR,
1301 &(netxen_stats->
1302 rx_short_length_error));
1303
1304 netxen_nic_pci_change_crbwindow(adapter, 1);
1305 } else {
1306 spin_lock_bh(&adapter->tx_lock);
1307 netxen_stats->tx_bytes = port->stats.txbytes;
1308 netxen_stats->tx_packets = port->stats.xmitedframes +
1309 port->stats.xmitfinished;
1310 netxen_stats->rx_bytes = port->stats.rxbytes;
1311 netxen_stats->rx_packets = port->stats.no_rcv;
1312 netxen_stats->rx_errors = port->stats.rcvdbadskb;
1313 netxen_stats->tx_errors = port->stats.nocmddescriptor;
1314 netxen_stats->rx_short_length_error = port->stats.uplcong;
1315 netxen_stats->rx_long_length_error = port->stats.uphcong;
1316 netxen_stats->rx_crc_errors = 0;
1317 netxen_stats->rx_mac_errors = 0;
1318 spin_unlock_bh(&adapter->tx_lock);
1319 }
1320 return 0;
1321 }
1322
1323 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1324 {
1325 struct netxen_port *port;
1326 int port_num;
1327
1328 memset(&adapter->stats, 0, sizeof(adapter->stats));
1329 for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
1330 port = adapter->port[port_num];
1331 memset(&port->stats, 0, sizeof(port->stats));
1332 }
1333 }
1334
1335 int
1336 netxen_nic_clear_statistics(struct netxen_adapter *adapter,
1337 struct netxen_port *port)
1338 {
1339 int data = 0;
1340
1341 netxen_nic_pci_change_crbwindow(adapter, 0);
1342
1343 netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_TX_BYTE_CNT, &data);
1344 netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_TX_FRAME_CNT,
1345 &data);
1346 netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_RX_BYTE_CNT, &data);
1347 netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_RX_FRAME_CNT,
1348 &data);
1349 netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_AGGR_ERROR_CNT,
1350 &data);
1351 netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_CRC_ERROR_CNT,
1352 &data);
1353 netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_OVERSIZE_FRAME_ERR,
1354 &data);
1355 netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_UNDERSIZE_FRAME_ERR,
1356 &data);
1357
1358 netxen_nic_pci_change_crbwindow(adapter, 1);
1359 netxen_nic_clear_stats(adapter);
1360 return 0;
1361 }
1362
1363 int
1364 netxen_nic_do_ioctl(struct netxen_adapter *adapter, void *u_data,
1365 struct netxen_port *port)
1366 {
1367 struct netxen_nic_ioctl_data data;
1368 struct netxen_nic_ioctl_data *up_data;
1369 int retval = 0;
1370 struct netxen_statistics netxen_stats;
1371
1372 up_data = (void *)u_data;
1373
1374 DPRINTK(INFO, "doing ioctl for %p\n", adapter);
1375 if (copy_from_user(&data, (void __user *)up_data, sizeof(data))) {
1376 /* evil user tried to crash the kernel */
1377 DPRINTK(ERR, "bad copy from userland: %d\n", (int)sizeof(data));
1378 retval = -EFAULT;
1379 goto error_out;
1380 }
1381
1382 /* Shouldn't access beyond legal limits of "char u[64];" member */
1383 if (!data.ptr && (data.size > sizeof(data.u))) {
1384 /* evil user tried to crash the kernel */
1385 DPRINTK(ERR, "bad size: %d\n", data.size);
1386 retval = -EFAULT;
1387 goto error_out;
1388 }
1389
1390 switch (data.cmd) {
1391 case netxen_nic_cmd_pci_read:
1392 if ((retval = netxen_nic_hw_read_ioctl(adapter, data.off,
1393 &(data.u), data.size)))
1394 goto error_out;
1395 if (copy_to_user
1396 ((void __user *)&(up_data->u), &(data.u), data.size)) {
1397 DPRINTK(ERR, "bad copy to userland: %d\n",
1398 (int)sizeof(data));
1399 retval = -EFAULT;
1400 goto error_out;
1401 }
1402 data.rv = 0;
1403 break;
1404
1405 case netxen_nic_cmd_pci_write:
1406 if ((retval = netxen_nic_hw_write_ioctl(adapter, data.off,
1407 &(data.u), data.size)))
1408 goto error_out;
1409 data.rv = 0;
1410 break;
1411
1412 case netxen_nic_cmd_pci_mem_read:
1413 if (netxen_nic_pci_mem_read_ioctl(adapter, data.off, &(data.u),
1414 data.size)) {
1415 DPRINTK(ERR, "Failed to read the data.\n");
1416 retval = -EFAULT;
1417 goto error_out;
1418 }
1419 if (copy_to_user
1420 ((void __user *)&(up_data->u), &(data.u), data.size)) {
1421 DPRINTK(ERR, "bad copy to userland: %d\n",
1422 (int)sizeof(data));
1423 retval = -EFAULT;
1424 goto error_out;
1425 }
1426 data.rv = 0;
1427 break;
1428
1429 case netxen_nic_cmd_pci_mem_write:
1430 if ((retval = netxen_nic_pci_mem_write_ioctl(adapter, data.off,
1431 &(data.u),
1432 data.size)))
1433 goto error_out;
1434 data.rv = 0;
1435 break;
1436
1437 case netxen_nic_cmd_pci_config_read:
1438 switch (data.size) {
1439 case 1:
1440 data.rv = pci_read_config_byte(adapter->ahw.pdev,
1441 data.off,
1442 (char *)&(data.u));
1443 break;
1444 case 2:
1445 data.rv = pci_read_config_word(adapter->ahw.pdev,
1446 data.off,
1447 (short *)&(data.u));
1448 break;
1449 case 4:
1450 data.rv = pci_read_config_dword(adapter->ahw.pdev,
1451 data.off,
1452 (u32 *) & (data.u));
1453 break;
1454 }
1455 if (copy_to_user
1456 ((void __user *)&(up_data->u), &(data.u), data.size)) {
1457 DPRINTK(ERR, "bad copy to userland: %d\n",
1458 (int)sizeof(data));
1459 retval = -EFAULT;
1460 goto error_out;
1461 }
1462 break;
1463
1464 case netxen_nic_cmd_pci_config_write:
1465 switch (data.size) {
1466 case 1:
1467 data.rv = pci_write_config_byte(adapter->ahw.pdev,
1468 data.off,
1469 *(char *)&(data.u));
1470 break;
1471 case 2:
1472 data.rv = pci_write_config_word(adapter->ahw.pdev,
1473 data.off,
1474 *(short *)&(data.u));
1475 break;
1476 case 4:
1477 data.rv = pci_write_config_dword(adapter->ahw.pdev,
1478 data.off,
1479 *(u32 *) & (data.u));
1480 break;
1481 }
1482 break;
1483
1484 case netxen_nic_cmd_get_stats:
1485 data.rv =
1486 netxen_nic_fill_statistics(adapter, port, &netxen_stats);
1487 if (copy_to_user
1488 ((void __user *)(up_data->ptr), (void *)&netxen_stats,
1489 sizeof(struct netxen_statistics))) {
1490 DPRINTK(ERR, "bad copy to userland: %d\n",
1491 (int)sizeof(netxen_stats));
1492 retval = -EFAULT;
1493 goto error_out;
1494 }
1495 up_data->rv = data.rv;
1496 break;
1497
1498 case netxen_nic_cmd_clear_stats:
1499 data.rv = netxen_nic_clear_statistics(adapter, port);
1500 up_data->rv = data.rv;
1501 break;
1502
1503 case netxen_nic_cmd_get_version:
1504 if (copy_to_user
1505 ((void __user *)&(up_data->u), NETXEN_NIC_LINUX_VERSIONID,
1506 sizeof(NETXEN_NIC_LINUX_VERSIONID))) {
1507 DPRINTK(ERR, "bad copy to userland: %d\n",
1508 (int)sizeof(data));
1509 retval = -EFAULT;
1510 goto error_out;
1511 }
1512 break;
1513
1514 default:
1515 DPRINTK(INFO, "bad command %d for %p\n", data.cmd, adapter);
1516 retval = -EOPNOTSUPP;
1517 goto error_out;
1518 }
1519 put_user(data.rv, (&(up_data->rv)));
1520 DPRINTK(INFO, "done ioctl for %p well.\n", adapter);
1521
1522 error_out:
1523 return retval;
1524 }
Linus' kernel tree