5 select HAVE_ARCH_TRACEHOOK
6 select HAVE_PERF_EVENTS
8 select HAVE_GENERIC_HARDIRQS
10 select GENERIC_IRQ_SHOW
11 select HAVE_DEBUG_BUGVERBOSE
12 select ARCH_HAVE_NMI_SAFE_CMPXCHG
13 select GENERIC_CPU_DEVICES
14 select ARCH_WANT_IPC_PARSE_VERSION
15 select OLD_SIGSUSPEND3
22 config RWSEM_GENERIC_SPINLOCK
26 config RWSEM_XCHGADD_ALGORITHM
29 config GENERIC_HWEIGHT
33 config GENERIC_CALIBRATE_DELAY
45 config ARCH_HAS_ILOG2_U32
49 config ARCH_HAS_ILOG2_U64
59 source "kernel/Kconfig.freezer"
62 menu "Fujitsu FR-V system setup"
67 This options switches on and off support for the FR-V MMU
68 (effectively switching between vmlinux and uClinux). Not all FR-V
69 CPUs support this. Currently only the FR451 has a sufficiently
72 config FRV_OUTOFLINE_ATOMIC_OPS
73 bool "Out-of-line the FRV atomic operations"
76 Setting this option causes the FR-V atomic operations to be mostly
77 implemented out-of-line.
79 See Documentation/frv/atomic-ops.txt for more information.
82 bool "High memory support"
86 If you wish to use more than 256MB of memory with your MMU based
87 system, you will need to select this option. The kernel can only see
88 the memory between 0xC0000000 and 0xD0000000 directly... everything
91 The arch is, however, capable of supporting up to 3GB of SDRAM.
94 bool "Allocate page tables in highmem"
98 The VM uses one page of memory for each page table. For systems
99 with a lot of RAM, this can be wasteful of precious low memory.
100 Setting this option will put user-space page tables in high memory.
105 prompt "uClinux kernel load address"
107 default UCPAGE_OFFSET_C0000000
109 This option sets the base address for the uClinux kernel. The kernel
110 will rearrange the SDRAM layout to start at this address, and move
111 itself to start there. It must be greater than 0, and it must be
112 sufficiently less than 0xE0000000 that the SDRAM does not intersect
115 The base address must also be aligned such that the SDRAM controller
116 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
118 config UCPAGE_OFFSET_20000000
121 config UCPAGE_OFFSET_40000000
124 config UCPAGE_OFFSET_60000000
127 config UCPAGE_OFFSET_80000000
130 config UCPAGE_OFFSET_A0000000
133 config UCPAGE_OFFSET_C0000000
134 bool "0xC0000000 (Recommended)"
140 default 0x20000000 if UCPAGE_OFFSET_20000000
141 default 0x40000000 if UCPAGE_OFFSET_40000000
142 default 0x60000000 if UCPAGE_OFFSET_60000000
143 default 0x80000000 if UCPAGE_OFFSET_80000000
144 default 0xA0000000 if UCPAGE_OFFSET_A0000000
147 config PROTECT_KERNEL
148 bool "Protect core kernel against userspace"
152 Selecting this option causes the uClinux kernel to change the
153 permittivity of DAMPR register covering the core kernel image to
154 prevent userspace accessing the underlying memory directly.
157 prompt "CPU Caching mode"
158 default FRV_DEFL_CACHE_WBACK
160 This option determines the default caching mode for the kernel.
162 Write-Back caching mode involves the all reads and writes causing
163 the affected cacheline to be read into the cache first before being
164 operated upon. Memory is not then updated by a write until the cache
165 is filled and a cacheline needs to be displaced from the cache to
166 make room. Only at that point is it written back.
168 Write-Behind caching is similar to Write-Back caching, except that a
169 write won't fetch a cacheline into the cache if there isn't already
170 one there; it will write directly to memory instead.
172 Write-Through caching only fetches cachelines from memory on a
173 read. Writes always get written directly to memory. If the affected
174 cacheline is also in cache, it will be updated too.
176 The final option is to turn of caching entirely.
178 Note that not all CPUs support Write-Behind caching. If the CPU on
179 which the kernel is running doesn't, it'll fall back to Write-Back
182 config FRV_DEFL_CACHE_WBACK
185 config FRV_DEFL_CACHE_WBEHIND
188 config FRV_DEFL_CACHE_WTHRU
191 config FRV_DEFL_CACHE_DISABLED
196 menu "CPU core support"
199 bool "Include FR401 core support"
203 This enables support for the FR401, FR401A and FR403 CPUs
206 bool "Include FR405 core support"
210 This enables support for the FR405 CPU
213 bool "Include FR451 core support"
216 This enables support for the FR451 CPU
218 config CPU_FR451_COMPILE
219 bool "Specifically compile for FR451 core"
220 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
223 This causes appropriate flags to be passed to the compiler to
224 optimise for the FR451 CPU
227 bool "Include FR551 core support"
231 This enables support for the FR555 CPU
233 config CPU_FR551_COMPILE
234 bool "Specifically compile for FR551 core"
235 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
238 This causes appropriate flags to be passed to the compiler to
239 optimise for the FR555 CPU
241 config FRV_L1_CACHE_SHIFT
243 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
244 default "6" if CPU_FR551
249 prompt "System support"
253 bool "MB93091 CPU board with or without motherboard"
256 bool "MB93093 PDK unit"
262 prompt "Motherboard support"
266 bool "Use the MB93090-MB00 motherboard"
268 Select this option if the MB93091 CPU board is going to be used with
269 a MB93090-MB00 VDK motherboard
272 bool "Use standalone"
274 Select this option if the MB93091 CPU board is going to be used
275 without a motherboard
280 config FUJITSU_MB93493
281 bool "MB93493 Multimedia chip"
283 Select this option if the MB93493 multimedia chip is going to be
287 prompt "GP-Relative data support"
290 This option controls what data, if any, should be placed in the GP
291 relative data sections. Using this means that the compiler can
292 generate accesses to the data using GR16-relative addressing which
293 is faster than absolute instructions and saves space (2 instructions
296 However, the GPREL region is limited in size because the immediate
297 value used in the load and store instructions is limited to a 12-bit
300 So if the linker starts complaining that accesses to GPREL data are
301 out of range, try changing this option from the default.
303 Note that modules will always be compiled with this feature disabled
304 as the module data will not be in range of the GP base address.
307 bool "Put data objects of up to 8 bytes into GP-REL"
310 bool "Put data objects of up to 4 bytes into GP-REL"
312 config GPREL_DATA_NONE
313 bool "Don't use GP-REL"
317 config FRV_ONCPU_SERIAL
318 bool "Use on-CPU serial ports"
324 depends on MB93090_MB00
326 select GENERIC_PCI_IOMAP
328 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
329 onboard. If you have one of these boards and you wish to use the PCI
330 facilities, say Y here.
332 config RESERVE_DMA_COHERENT
333 bool "Reserve DMA coherent memory"
334 depends on PCI && !MMU
337 Many PCI drivers require access to uncached memory for DMA device
338 communications (such as is done with some Ethernet buffer rings). If
339 a fully featured MMU is available, this can be done through page
340 table settings, but if not, a region has to be set aside and marked
341 with a special DAMPR register.
343 Setting this option causes uClinux to set aside a portion of the
344 available memory for use in this manner. The memory will then be
345 unavailable for normal kernel use.
347 source "drivers/pci/Kconfig"
349 source "drivers/pcmcia/Kconfig"
351 menu "Power management options"
353 config ARCH_SUSPEND_POSSIBLE
356 source kernel/power/Kconfig
362 menu "Executable formats"
364 source "fs/Kconfig.binfmt"
370 source "drivers/Kconfig"
374 source "arch/frv/Kconfig.debug"
376 source "security/Kconfig"
378 source "crypto/Kconfig"