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ath9k: rework tx queue selection and fix queue stopping/waking
[linux-2.6.git] / drivers / net / wireless / ath / ath9k / htc_drv_txrx.c
blob5324ffd96ec76e18cbd951a1581cbacf041896d8
1 /*
2 * Copyright (c) 2010 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include "htc.h"
18
19 /******/
20 /* TX */
21 /******/
22
23 static const int subtype_txq_to_hwq[] = {
24 [WME_AC_BE] = ATH_TXQ_AC_BE,
25 [WME_AC_BK] = ATH_TXQ_AC_BK,
26 [WME_AC_VI] = ATH_TXQ_AC_VI,
27 [WME_AC_VO] = ATH_TXQ_AC_VO,
28 };
29
30 #define ATH9K_HTC_INIT_TXQ(subtype) do { \
31 qi.tqi_subtype = subtype_txq_to_hwq[subtype]; \
32 qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT; \
33 qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT; \
34 qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT; \
35 qi.tqi_physCompBuf = 0; \
36 qi.tqi_qflags = TXQ_FLAG_TXEOLINT_ENABLE | \
37 TXQ_FLAG_TXDESCINT_ENABLE; \
38 } while (0)
39
40 int get_hw_qnum(u16 queue, int *hwq_map)
41 {
42 switch (queue) {
43 case 0:
44 return hwq_map[WME_AC_VO];
45 case 1:
46 return hwq_map[WME_AC_VI];
47 case 2:
48 return hwq_map[WME_AC_BE];
49 case 3:
50 return hwq_map[WME_AC_BK];
51 default:
52 return hwq_map[WME_AC_BE];
53 }
54 }
55
56 int ath_htc_txq_update(struct ath9k_htc_priv *priv, int qnum,
57 struct ath9k_tx_queue_info *qinfo)
58 {
59 struct ath_hw *ah = priv->ah;
60 int error = 0;
61 struct ath9k_tx_queue_info qi;
62
63 ath9k_hw_get_txq_props(ah, qnum, &qi);
64
65 qi.tqi_aifs = qinfo->tqi_aifs;
66 qi.tqi_cwmin = qinfo->tqi_cwmin / 2; /* XXX */
67 qi.tqi_cwmax = qinfo->tqi_cwmax;
68 qi.tqi_burstTime = qinfo->tqi_burstTime;
69 qi.tqi_readyTime = qinfo->tqi_readyTime;
70
71 if (!ath9k_hw_set_txq_props(ah, qnum, &qi)) {
72 ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
73 "Unable to update hardware queue %u!\n", qnum);
74 error = -EIO;
75 } else {
76 ath9k_hw_resettxqueue(ah, qnum);
77 }
78
79 return error;
80 }
81
82 int ath9k_htc_tx_start(struct ath9k_htc_priv *priv, struct sk_buff *skb)
83 {
84 struct ieee80211_hdr *hdr;
85 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
86 struct ieee80211_sta *sta = tx_info->control.sta;
87 struct ath9k_htc_sta *ista;
88 struct ath9k_htc_tx_ctl tx_ctl;
89 enum htc_endpoint_id epid;
90 u16 qnum;
91 __le16 fc;
92 u8 *tx_fhdr;
93 u8 sta_idx, vif_idx;
94
95 hdr = (struct ieee80211_hdr *) skb->data;
96 fc = hdr->frame_control;
97
98 if (tx_info->control.vif &&
99 (struct ath9k_htc_vif *) tx_info->control.vif->drv_priv)
100 vif_idx = ((struct ath9k_htc_vif *)
101 tx_info->control.vif->drv_priv)->index;
102 else
103 vif_idx = priv->nvifs;
104
105 if (sta) {
106 ista = (struct ath9k_htc_sta *) sta->drv_priv;
107 sta_idx = ista->index;
108 } else {
109 sta_idx = 0;
110 }
111
112 memset(&tx_ctl, 0, sizeof(struct ath9k_htc_tx_ctl));
113
114 if (ieee80211_is_data(fc)) {
115 struct tx_frame_hdr tx_hdr;
116 u8 *qc;
117
118 memset(&tx_hdr, 0, sizeof(struct tx_frame_hdr));
119
120 tx_hdr.node_idx = sta_idx;
121 tx_hdr.vif_idx = vif_idx;
122
123 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
124 tx_ctl.type = ATH9K_HTC_AMPDU;
125 tx_hdr.data_type = ATH9K_HTC_AMPDU;
126 } else {
127 tx_ctl.type = ATH9K_HTC_NORMAL;
128 tx_hdr.data_type = ATH9K_HTC_NORMAL;
129 }
130
131 if (ieee80211_is_data(fc)) {
132 qc = ieee80211_get_qos_ctl(hdr);
133 tx_hdr.tidno = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
134 }
135
136 /* Check for RTS protection */
137 if (priv->hw->wiphy->rts_threshold != (u32) -1)
138 if (skb->len > priv->hw->wiphy->rts_threshold)
139 tx_hdr.flags |= ATH9K_HTC_TX_RTSCTS;
140
141 /* CTS-to-self */
142 if (!(tx_hdr.flags & ATH9K_HTC_TX_RTSCTS) &&
143 (priv->op_flags & OP_PROTECT_ENABLE))
144 tx_hdr.flags |= ATH9K_HTC_TX_CTSONLY;
145
146 tx_hdr.key_type = ath9k_cmn_get_hw_crypto_keytype(skb);
147 if (tx_hdr.key_type == ATH9K_KEY_TYPE_CLEAR)
148 tx_hdr.keyix = (u8) ATH9K_TXKEYIX_INVALID;
149 else
150 tx_hdr.keyix = tx_info->control.hw_key->hw_key_idx;
151
152 tx_fhdr = skb_push(skb, sizeof(tx_hdr));
153 memcpy(tx_fhdr, (u8 *) &tx_hdr, sizeof(tx_hdr));
154
155 qnum = skb_get_queue_mapping(skb);
156
157 switch (qnum) {
158 case 0:
159 TX_QSTAT_INC(WME_AC_VO);
160 epid = priv->data_vo_ep;
161 break;
162 case 1:
163 TX_QSTAT_INC(WME_AC_VI);
164 epid = priv->data_vi_ep;
165 break;
166 case 2:
167 TX_QSTAT_INC(WME_AC_BE);
168 epid = priv->data_be_ep;
169 break;
170 case 3:
171 default:
172 TX_QSTAT_INC(WME_AC_BK);
173 epid = priv->data_bk_ep;
174 break;
175 }
176 } else {
177 struct tx_mgmt_hdr mgmt_hdr;
178
179 memset(&mgmt_hdr, 0, sizeof(struct tx_mgmt_hdr));
180
181 tx_ctl.type = ATH9K_HTC_NORMAL;
182
183 mgmt_hdr.node_idx = sta_idx;
184 mgmt_hdr.vif_idx = vif_idx;
185 mgmt_hdr.tidno = 0;
186 mgmt_hdr.flags = 0;
187
188 mgmt_hdr.key_type = ath9k_cmn_get_hw_crypto_keytype(skb);
189 if (mgmt_hdr.key_type == ATH9K_KEY_TYPE_CLEAR)
190 mgmt_hdr.keyix = (u8) ATH9K_TXKEYIX_INVALID;
191 else
192 mgmt_hdr.keyix = tx_info->control.hw_key->hw_key_idx;
193
194 tx_fhdr = skb_push(skb, sizeof(mgmt_hdr));
195 memcpy(tx_fhdr, (u8 *) &mgmt_hdr, sizeof(mgmt_hdr));
196 epid = priv->mgmt_ep;
197 }
198
199 return htc_send(priv->htc, skb, epid, &tx_ctl);
200 }
201
202 static bool ath9k_htc_check_tx_aggr(struct ath9k_htc_priv *priv,
203 struct ath9k_htc_sta *ista, u8 tid)
204 {
205 bool ret = false;
206
207 spin_lock_bh(&priv->tx_lock);
208 if ((tid < ATH9K_HTC_MAX_TID) && (ista->tid_state[tid] == AGGR_STOP))
209 ret = true;
210 spin_unlock_bh(&priv->tx_lock);
211
212 return ret;
213 }
214
215 void ath9k_tx_tasklet(unsigned long data)
216 {
217 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)data;
218 struct ieee80211_sta *sta;
219 struct ieee80211_hdr *hdr;
220 struct ieee80211_tx_info *tx_info;
221 struct sk_buff *skb = NULL;
222 __le16 fc;
223
224 while ((skb = skb_dequeue(&priv->tx_queue)) != NULL) {
225
226 hdr = (struct ieee80211_hdr *) skb->data;
227 fc = hdr->frame_control;
228 tx_info = IEEE80211_SKB_CB(skb);
229
230 memset(&tx_info->status, 0, sizeof(tx_info->status));
231
232 rcu_read_lock();
233
234 sta = ieee80211_find_sta(priv->vif, hdr->addr1);
235 if (!sta) {
236 rcu_read_unlock();
237 ieee80211_tx_status(priv->hw, skb);
238 continue;
239 }
240
241 /* Check if we need to start aggregation */
242
243 if (sta && conf_is_ht(&priv->hw->conf) &&
244 !(skb->protocol == cpu_to_be16(ETH_P_PAE))) {
245 if (ieee80211_is_data_qos(fc)) {
246 u8 *qc, tid;
247 struct ath9k_htc_sta *ista;
248
249 qc = ieee80211_get_qos_ctl(hdr);
250 tid = qc[0] & 0xf;
251 ista = (struct ath9k_htc_sta *)sta->drv_priv;
252
253 if (ath9k_htc_check_tx_aggr(priv, ista, tid)) {
254 ieee80211_start_tx_ba_session(sta, tid);
255 spin_lock_bh(&priv->tx_lock);
256 ista->tid_state[tid] = AGGR_PROGRESS;
257 spin_unlock_bh(&priv->tx_lock);
258 }
259 }
260 }
261
262 rcu_read_unlock();
263
264 /* Send status to mac80211 */
265 ieee80211_tx_status(priv->hw, skb);
266 }
267
268 /* Wake TX queues if needed */
269 spin_lock_bh(&priv->tx_lock);
270 if (priv->tx_queues_stop) {
271 priv->tx_queues_stop = false;
272 spin_unlock_bh(&priv->tx_lock);
273 ath_print(ath9k_hw_common(priv->ah), ATH_DBG_XMIT,
274 "Waking up TX queues\n");
275 ieee80211_wake_queues(priv->hw);
276 return;
277 }
278 spin_unlock_bh(&priv->tx_lock);
279 }
280
281 void ath9k_htc_txep(void *drv_priv, struct sk_buff *skb,
282 enum htc_endpoint_id ep_id, bool txok)
283 {
284 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) drv_priv;
285 struct ath_common *common = ath9k_hw_common(priv->ah);
286 struct ieee80211_tx_info *tx_info;
287
288 if (!skb)
289 return;
290
291 if (ep_id == priv->mgmt_ep) {
292 skb_pull(skb, sizeof(struct tx_mgmt_hdr));
293 } else if ((ep_id == priv->data_bk_ep) ||
294 (ep_id == priv->data_be_ep) ||
295 (ep_id == priv->data_vi_ep) ||
296 (ep_id == priv->data_vo_ep)) {
297 skb_pull(skb, sizeof(struct tx_frame_hdr));
298 } else {
299 ath_print(common, ATH_DBG_FATAL,
300 "Unsupported TX EPID: %d\n", ep_id);
301 dev_kfree_skb_any(skb);
302 return;
303 }
304
305 tx_info = IEEE80211_SKB_CB(skb);
306
307 if (txok)
308 tx_info->flags |= IEEE80211_TX_STAT_ACK;
309
310 skb_queue_tail(&priv->tx_queue, skb);
311 tasklet_schedule(&priv->tx_tasklet);
312 }
313
314 int ath9k_tx_init(struct ath9k_htc_priv *priv)
315 {
316 skb_queue_head_init(&priv->tx_queue);
317 return 0;
318 }
319
320 void ath9k_tx_cleanup(struct ath9k_htc_priv *priv)
321 {
322
323 }
324
325 bool ath9k_htc_txq_setup(struct ath9k_htc_priv *priv, int subtype)
326 {
327 struct ath_hw *ah = priv->ah;
328 struct ath_common *common = ath9k_hw_common(ah);
329 struct ath9k_tx_queue_info qi;
330 int qnum;
331
332 memset(&qi, 0, sizeof(qi));
333 ATH9K_HTC_INIT_TXQ(subtype);
334
335 qnum = ath9k_hw_setuptxqueue(priv->ah, ATH9K_TX_QUEUE_DATA, &qi);
336 if (qnum == -1)
337 return false;
338
339 if (qnum >= ARRAY_SIZE(priv->hwq_map)) {
340 ath_print(common, ATH_DBG_FATAL,
341 "qnum %u out of range, max %u!\n",
342 qnum, (unsigned int)ARRAY_SIZE(priv->hwq_map));
343 ath9k_hw_releasetxqueue(ah, qnum);
344 return false;
345 }
346
347 priv->hwq_map[subtype] = qnum;
348 return true;
349 }
350
351 int ath9k_htc_cabq_setup(struct ath9k_htc_priv *priv)
352 {
353 struct ath9k_tx_queue_info qi;
354
355 memset(&qi, 0, sizeof(qi));
356 ATH9K_HTC_INIT_TXQ(0);
357
358 return ath9k_hw_setuptxqueue(priv->ah, ATH9K_TX_QUEUE_CAB, &qi);
359 }
360
361 /******/
362 /* RX */
363 /******/
364
365 /*
366 * Calculate the RX filter to be set in the HW.
367 */
368 u32 ath9k_htc_calcrxfilter(struct ath9k_htc_priv *priv)
369 {
370 #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
371
372 struct ath_hw *ah = priv->ah;
373 u32 rfilt;
374
375 rfilt = (ath9k_hw_getrxfilter(ah) & RX_FILTER_PRESERVE)
376 | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
377 | ATH9K_RX_FILTER_MCAST;
378
379 if (priv->rxfilter & FIF_PROBE_REQ)
380 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
381
382 /*
383 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
384 * mode interface or when in monitor mode. AP mode does not need this
385 * since it receives all in-BSS frames anyway.
386 */
387 if (((ah->opmode != NL80211_IFTYPE_AP) &&
388 (priv->rxfilter & FIF_PROMISC_IN_BSS)) ||
389 (ah->opmode == NL80211_IFTYPE_MONITOR))
390 rfilt |= ATH9K_RX_FILTER_PROM;
391
392 if (priv->rxfilter & FIF_CONTROL)
393 rfilt |= ATH9K_RX_FILTER_CONTROL;
394
395 if ((ah->opmode == NL80211_IFTYPE_STATION) &&
396 !(priv->rxfilter & FIF_BCN_PRBRESP_PROMISC))
397 rfilt |= ATH9K_RX_FILTER_MYBEACON;
398 else
399 rfilt |= ATH9K_RX_FILTER_BEACON;
400
401 if (conf_is_ht(&priv->hw->conf))
402 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
403
404 return rfilt;
405
406 #undef RX_FILTER_PRESERVE
407 }
408
409 /*
410 * Recv initialization for opmode change.
411 */
412 static void ath9k_htc_opmode_init(struct ath9k_htc_priv *priv)
413 {
414 struct ath_hw *ah = priv->ah;
415 struct ath_common *common = ath9k_hw_common(ah);
416
417 u32 rfilt, mfilt[2];
418
419 /* configure rx filter */
420 rfilt = ath9k_htc_calcrxfilter(priv);
421 ath9k_hw_setrxfilter(ah, rfilt);
422
423 /* configure bssid mask */
424 ath_hw_setbssidmask(common);
425
426 /* configure operational mode */
427 ath9k_hw_setopmode(ah);
428
429 /* calculate and install multicast filter */
430 mfilt[0] = mfilt[1] = ~0;
431 ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
432 }
433
434 void ath9k_host_rx_init(struct ath9k_htc_priv *priv)
435 {
436 ath9k_hw_rxena(priv->ah);
437 ath9k_htc_opmode_init(priv);
438 ath9k_hw_startpcureceive(priv->ah, (priv->op_flags & OP_SCANNING));
439 priv->rx.last_rssi = ATH_RSSI_DUMMY_MARKER;
440 }
441
442 static void ath9k_process_rate(struct ieee80211_hw *hw,
443 struct ieee80211_rx_status *rxs,
444 u8 rx_rate, u8 rs_flags)
445 {
446 struct ieee80211_supported_band *sband;
447 enum ieee80211_band band;
448 unsigned int i = 0;
449
450 if (rx_rate & 0x80) {
451 /* HT rate */
452 rxs->flag |= RX_FLAG_HT;
453 if (rs_flags & ATH9K_RX_2040)
454 rxs->flag |= RX_FLAG_40MHZ;
455 if (rs_flags & ATH9K_RX_GI)
456 rxs->flag |= RX_FLAG_SHORT_GI;
457 rxs->rate_idx = rx_rate & 0x7f;
458 return;
459 }
460
461 band = hw->conf.channel->band;
462 sband = hw->wiphy->bands[band];
463
464 for (i = 0; i < sband->n_bitrates; i++) {
465 if (sband->bitrates[i].hw_value == rx_rate) {
466 rxs->rate_idx = i;
467 return;
468 }
469 if (sband->bitrates[i].hw_value_short == rx_rate) {
470 rxs->rate_idx = i;
471 rxs->flag |= RX_FLAG_SHORTPRE;
472 return;
473 }
474 }
475
476 }
477
478 static bool ath9k_rx_prepare(struct ath9k_htc_priv *priv,
479 struct ath9k_htc_rxbuf *rxbuf,
480 struct ieee80211_rx_status *rx_status)
481
482 {
483 struct ieee80211_hdr *hdr;
484 struct ieee80211_hw *hw = priv->hw;
485 struct sk_buff *skb = rxbuf->skb;
486 struct ath_common *common = ath9k_hw_common(priv->ah);
487 struct ath_htc_rx_status *rxstatus;
488 int hdrlen, padpos, padsize;
489 int last_rssi = ATH_RSSI_DUMMY_MARKER;
490 __le16 fc;
491
492 if (skb->len <= HTC_RX_FRAME_HEADER_SIZE) {
493 ath_print(common, ATH_DBG_FATAL,
494 "Corrupted RX frame, dropping\n");
495 goto rx_next;
496 }
497
498 rxstatus = (struct ath_htc_rx_status *)skb->data;
499
500 if (be16_to_cpu(rxstatus->rs_datalen) -
501 (skb->len - HTC_RX_FRAME_HEADER_SIZE) != 0) {
502 ath_print(common, ATH_DBG_FATAL,
503 "Corrupted RX data len, dropping "
504 "(dlen: %d, skblen: %d)\n",
505 rxstatus->rs_datalen, skb->len);
506 goto rx_next;
507 }
508
509 /* Get the RX status information */
510 memcpy(&rxbuf->rxstatus, rxstatus, HTC_RX_FRAME_HEADER_SIZE);
511 skb_pull(skb, HTC_RX_FRAME_HEADER_SIZE);
512
513 hdr = (struct ieee80211_hdr *)skb->data;
514 fc = hdr->frame_control;
515 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
516
517 padpos = ath9k_cmn_padpos(fc);
518
519 padsize = padpos & 3;
520 if (padsize && skb->len >= padpos+padsize+FCS_LEN) {
521 memmove(skb->data + padsize, skb->data, padpos);
522 skb_pull(skb, padsize);
523 }
524
525 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
526
527 if (rxbuf->rxstatus.rs_status != 0) {
528 if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_CRC)
529 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
530 if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_PHY)
531 goto rx_next;
532
533 if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_DECRYPT) {
534 /* FIXME */
535 } else if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_MIC) {
536 if (ieee80211_is_ctl(fc))
537 /*
538 * Sometimes, we get invalid
539 * MIC failures on valid control frames.
540 * Remove these mic errors.
541 */
542 rxbuf->rxstatus.rs_status &= ~ATH9K_RXERR_MIC;
543 else
544 rx_status->flag |= RX_FLAG_MMIC_ERROR;
545 }
546
547 /*
548 * Reject error frames with the exception of
549 * decryption and MIC failures. For monitor mode,
550 * we also ignore the CRC error.
551 */
552 if (priv->ah->opmode == NL80211_IFTYPE_MONITOR) {
553 if (rxbuf->rxstatus.rs_status &
554 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
555 ATH9K_RXERR_CRC))
556 goto rx_next;
557 } else {
558 if (rxbuf->rxstatus.rs_status &
559 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
560 goto rx_next;
561 }
562 }
563 }
564
565 if (!(rxbuf->rxstatus.rs_status & ATH9K_RXERR_DECRYPT)) {
566 u8 keyix;
567 keyix = rxbuf->rxstatus.rs_keyix;
568 if (keyix != ATH9K_RXKEYIX_INVALID) {
569 rx_status->flag |= RX_FLAG_DECRYPTED;
570 } else if (ieee80211_has_protected(fc) &&
571 skb->len >= hdrlen + 4) {
572 keyix = skb->data[hdrlen + 3] >> 6;
573 if (test_bit(keyix, common->keymap))
574 rx_status->flag |= RX_FLAG_DECRYPTED;
575 }
576 }
577
578 ath9k_process_rate(hw, rx_status, rxbuf->rxstatus.rs_rate,
579 rxbuf->rxstatus.rs_flags);
580
581 if (priv->op_flags & OP_ASSOCIATED) {
582 if (rxbuf->rxstatus.rs_rssi != ATH9K_RSSI_BAD &&
583 !rxbuf->rxstatus.rs_moreaggr)
584 ATH_RSSI_LPF(priv->rx.last_rssi,
585 rxbuf->rxstatus.rs_rssi);
586
587 last_rssi = priv->rx.last_rssi;
588
589 if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
590 rxbuf->rxstatus.rs_rssi = ATH_EP_RND(last_rssi,
591 ATH_RSSI_EP_MULTIPLIER);
592
593 if (rxbuf->rxstatus.rs_rssi < 0)
594 rxbuf->rxstatus.rs_rssi = 0;
595
596 if (ieee80211_is_beacon(fc))
597 priv->ah->stats.avgbrssi = rxbuf->rxstatus.rs_rssi;
598 }
599
600 rx_status->mactime = be64_to_cpu(rxbuf->rxstatus.rs_tstamp);
601 rx_status->band = hw->conf.channel->band;
602 rx_status->freq = hw->conf.channel->center_freq;
603 rx_status->signal = rxbuf->rxstatus.rs_rssi + ATH_DEFAULT_NOISE_FLOOR;
604 rx_status->antenna = rxbuf->rxstatus.rs_antenna;
605 rx_status->flag |= RX_FLAG_TSFT;
606
607 return true;
608
609 rx_next:
610 return false;
611 }
612
613 /*
614 * FIXME: Handle FLUSH later on.
615 */
616 void ath9k_rx_tasklet(unsigned long data)
617 {
618 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)data;
619 struct ath9k_htc_rxbuf *rxbuf = NULL, *tmp_buf = NULL;
620 struct ieee80211_rx_status rx_status;
621 struct sk_buff *skb;
622 unsigned long flags;
623 struct ieee80211_hdr *hdr;
624
625 do {
626 spin_lock_irqsave(&priv->rx.rxbuflock, flags);
627 list_for_each_entry(tmp_buf, &priv->rx.rxbuf, list) {
628 if (tmp_buf->in_process) {
629 rxbuf = tmp_buf;
630 break;
631 }
632 }
633
634 if (rxbuf == NULL) {
635 spin_unlock_irqrestore(&priv->rx.rxbuflock, flags);
636 break;
637 }
638
639 if (!rxbuf->skb)
640 goto requeue;
641
642 if (!ath9k_rx_prepare(priv, rxbuf, &rx_status)) {
643 dev_kfree_skb_any(rxbuf->skb);
644 goto requeue;
645 }
646
647 memcpy(IEEE80211_SKB_RXCB(rxbuf->skb), &rx_status,
648 sizeof(struct ieee80211_rx_status));
649 skb = rxbuf->skb;
650 hdr = (struct ieee80211_hdr *) skb->data;
651
652 if (ieee80211_is_beacon(hdr->frame_control) && priv->ps_enabled)
653 ieee80211_queue_work(priv->hw, &priv->ps_work);
654
655 spin_unlock_irqrestore(&priv->rx.rxbuflock, flags);
656
657 ieee80211_rx(priv->hw, skb);
658
659 spin_lock_irqsave(&priv->rx.rxbuflock, flags);
660 requeue:
661 rxbuf->in_process = false;
662 rxbuf->skb = NULL;
663 list_move_tail(&rxbuf->list, &priv->rx.rxbuf);
664 rxbuf = NULL;
665 spin_unlock_irqrestore(&priv->rx.rxbuflock, flags);
666 } while (1);
667
668 }
669
670 void ath9k_htc_rxep(void *drv_priv, struct sk_buff *skb,
671 enum htc_endpoint_id ep_id)
672 {
673 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)drv_priv;
674 struct ath_hw *ah = priv->ah;
675 struct ath_common *common = ath9k_hw_common(ah);
676 struct ath9k_htc_rxbuf *rxbuf = NULL, *tmp_buf = NULL;
677
678 spin_lock(&priv->rx.rxbuflock);
679 list_for_each_entry(tmp_buf, &priv->rx.rxbuf, list) {
680 if (!tmp_buf->in_process) {
681 rxbuf = tmp_buf;
682 break;
683 }
684 }
685 spin_unlock(&priv->rx.rxbuflock);
686
687 if (rxbuf == NULL) {
688 ath_print(common, ATH_DBG_ANY,
689 "No free RX buffer\n");
690 goto err;
691 }
692
693 spin_lock(&priv->rx.rxbuflock);
694 rxbuf->skb = skb;
695 rxbuf->in_process = true;
696 spin_unlock(&priv->rx.rxbuflock);
697
698 tasklet_schedule(&priv->rx_tasklet);
699 return;
700 err:
701 dev_kfree_skb_any(skb);
702 }
703
704 /* FIXME: Locking for cleanup/init */
705
706 void ath9k_rx_cleanup(struct ath9k_htc_priv *priv)
707 {
708 struct ath9k_htc_rxbuf *rxbuf, *tbuf;
709
710 list_for_each_entry_safe(rxbuf, tbuf, &priv->rx.rxbuf, list) {
711 list_del(&rxbuf->list);
712 if (rxbuf->skb)
713 dev_kfree_skb_any(rxbuf->skb);
714 kfree(rxbuf);
715 }
716 }
717
718 int ath9k_rx_init(struct ath9k_htc_priv *priv)
719 {
720 struct ath_hw *ah = priv->ah;
721 struct ath_common *common = ath9k_hw_common(ah);
722 struct ath9k_htc_rxbuf *rxbuf;
723 int i = 0;
724
725 INIT_LIST_HEAD(&priv->rx.rxbuf);
726 spin_lock_init(&priv->rx.rxbuflock);
727
728 for (i = 0; i < ATH9K_HTC_RXBUF; i++) {
729 rxbuf = kzalloc(sizeof(struct ath9k_htc_rxbuf), GFP_KERNEL);
730 if (rxbuf == NULL) {
731 ath_print(common, ATH_DBG_FATAL,
732 "Unable to allocate RX buffers\n");
733 goto err;
734 }
735 list_add_tail(&rxbuf->list, &priv->rx.rxbuf);
736 }
737
738 return 0;
739
740 err:
741 ath9k_rx_cleanup(priv);
742 return -ENOMEM;
743 }
Linus' kernel tree