2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License version 2 as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * Copyright (C) 2012 ARM Limited
14 #include <linux/err.h>
15 #include <linux/gpio.h>
17 #include <linux/leds.h>
18 #include <linux/of_address.h>
19 #include <linux/platform_device.h>
20 #include <linux/regulator/driver.h>
21 #include <linux/slab.h>
22 #include <linux/stat.h>
23 #include <linux/timer.h>
24 #include <linux/vexpress.h>
29 #define SYS_100HZ 0x024
30 #define SYS_FLAGS 0x030
31 #define SYS_FLAGSSET 0x030
32 #define SYS_FLAGSCLR 0x034
33 #define SYS_NVFLAGS 0x038
34 #define SYS_NVFLAGSSET 0x038
35 #define SYS_NVFLAGSCLR 0x03c
37 #define SYS_FLASH 0x04c
38 #define SYS_CFGSW 0x058
39 #define SYS_24MHZ 0x05c
40 #define SYS_MISC 0x060
42 #define SYS_PROCID0 0x084
43 #define SYS_PROCID1 0x088
44 #define SYS_CFGDATA 0x0a0
45 #define SYS_CFGCTRL 0x0a4
46 #define SYS_CFGSTAT 0x0a8
48 #define SYS_HBI_MASK 0xfff
49 #define SYS_ID_HBI_SHIFT 16
50 #define SYS_PROCIDx_HBI_SHIFT 0
52 #define SYS_MCI_CARDIN (1 << 0)
53 #define SYS_MCI_WPROT (1 << 1)
55 #define SYS_FLASH_WPn (1 << 0)
57 #define SYS_MISC_MASTERSITE (1 << 14)
59 #define SYS_CFGCTRL_START (1 << 31)
60 #define SYS_CFGCTRL_WRITE (1 << 30)
61 #define SYS_CFGCTRL_DCC(n) (((n) & 0xf) << 26)
62 #define SYS_CFGCTRL_FUNC(n) (((n) & 0x3f) << 20)
63 #define SYS_CFGCTRL_SITE(n) (((n) & 0x3) << 16)
64 #define SYS_CFGCTRL_POSITION(n) (((n) & 0xf) << 12)
65 #define SYS_CFGCTRL_DEVICE(n) (((n) & 0xfff) << 0)
67 #define SYS_CFGSTAT_ERR (1 << 1)
68 #define SYS_CFGSTAT_COMPLETE (1 << 0)
71 static void __iomem
*vexpress_sysreg_base
;
72 static struct device
*vexpress_sysreg_dev
;
73 static int vexpress_master_site
;
76 void vexpress_flags_set(u32 data
)
78 writel(~0, vexpress_sysreg_base
+ SYS_FLAGSCLR
);
79 writel(data
, vexpress_sysreg_base
+ SYS_FLAGSSET
);
82 u32
vexpress_get_procid(int site
)
84 if (site
== VEXPRESS_SITE_MASTER
)
85 site
= vexpress_master_site
;
87 return readl(vexpress_sysreg_base
+ (site
== VEXPRESS_SITE_DB1
?
88 SYS_PROCID0
: SYS_PROCID1
));
91 u32
vexpress_get_hbi(int site
)
96 case VEXPRESS_SITE_MB
:
97 id
= readl(vexpress_sysreg_base
+ SYS_ID
);
98 return (id
>> SYS_ID_HBI_SHIFT
) & SYS_HBI_MASK
;
99 case VEXPRESS_SITE_MASTER
:
100 case VEXPRESS_SITE_DB1
:
101 case VEXPRESS_SITE_DB2
:
102 id
= vexpress_get_procid(site
);
103 return (id
>> SYS_PROCIDx_HBI_SHIFT
) & SYS_HBI_MASK
;
109 void __iomem
*vexpress_get_24mhz_clock_base(void)
111 return vexpress_sysreg_base
+ SYS_24MHZ
;
115 static void vexpress_sysreg_find_prop(struct device_node
*node
,
116 const char *name
, u32
*val
)
120 if (of_property_read_u32(node
, name
, val
) == 0) {
124 node
= of_get_next_parent(node
);
128 unsigned __vexpress_get_site(struct device
*dev
, struct device_node
*node
)
132 WARN_ON(dev
&& node
&& dev
->of_node
!= node
);
137 vexpress_sysreg_find_prop(node
, "arm,vexpress,site", &site
);
138 } else if (dev
&& dev
->bus
== &platform_bus_type
) {
139 struct platform_device
*pdev
= to_platform_device(dev
);
141 if (pdev
->num_resources
== 1 &&
142 pdev
->resource
[0].flags
== IORESOURCE_BUS
)
143 site
= pdev
->resource
[0].start
;
144 } else if (dev
&& strncmp(dev_name(dev
), "ct:", 3) == 0) {
145 site
= VEXPRESS_SITE_MASTER
;
148 if (site
== VEXPRESS_SITE_MASTER
)
149 site
= vexpress_master_site
;
155 struct vexpress_sysreg_config_func
{
160 static struct vexpress_config_bridge
*vexpress_sysreg_config_bridge
;
161 static struct timer_list vexpress_sysreg_config_timer
;
162 static u32
*vexpress_sysreg_config_data
;
163 static int vexpress_sysreg_config_tries
;
165 static void *vexpress_sysreg_config_func_get(struct device
*dev
,
166 struct device_node
*node
)
168 struct vexpress_sysreg_config_func
*config_func
;
177 vexpress_sysreg_find_prop(node
, "arm,vexpress,site", &site
);
178 vexpress_sysreg_find_prop(node
, "arm,vexpress,position",
180 vexpress_sysreg_find_prop(node
, "arm,vexpress,dcc", &dcc
);
181 err
= of_property_read_u32_array(node
,
182 "arm,vexpress-sysreg,func", func_device
,
183 ARRAY_SIZE(func_device
));
185 } else if (dev
&& dev
->bus
== &platform_bus_type
) {
186 struct platform_device
*pdev
= to_platform_device(dev
);
188 if (pdev
->num_resources
== 1 &&
189 pdev
->resource
[0].flags
== IORESOURCE_BUS
) {
190 site
= pdev
->resource
[0].start
;
191 func_device
[0] = pdev
->resource
[0].end
;
192 func_device
[1] = pdev
->id
;
199 config_func
= kzalloc(sizeof(*config_func
), GFP_KERNEL
);
203 config_func
->template = SYS_CFGCTRL_DCC(dcc
);
204 config_func
->template |= SYS_CFGCTRL_FUNC(func_device
[0]);
205 config_func
->template |= SYS_CFGCTRL_SITE(site
== VEXPRESS_SITE_MASTER
?
206 vexpress_master_site
: site
);
207 config_func
->template |= SYS_CFGCTRL_POSITION(position
);
208 config_func
->device
|= func_device
[1];
210 dev_dbg(vexpress_sysreg_dev
, "func 0x%p = 0x%x, %d\n", config_func
,
211 config_func
->template, config_func
->device
);
216 static void vexpress_sysreg_config_func_put(void *func
)
221 static int vexpress_sysreg_config_func_exec(void *func
, int offset
,
222 bool write
, u32
*data
)
225 struct vexpress_sysreg_config_func
*config_func
= func
;
228 if (WARN_ON(!vexpress_sysreg_base
))
231 command
= readl(vexpress_sysreg_base
+ SYS_CFGCTRL
);
232 if (WARN_ON(command
& SYS_CFGCTRL_START
))
235 command
= SYS_CFGCTRL_START
;
236 command
|= write
? SYS_CFGCTRL_WRITE
: 0;
237 command
|= config_func
->template;
238 command
|= SYS_CFGCTRL_DEVICE(config_func
->device
+ offset
);
240 /* Use a canary for reads */
244 dev_dbg(vexpress_sysreg_dev
, "command %x, data %x\n",
246 writel(*data
, vexpress_sysreg_base
+ SYS_CFGDATA
);
247 writel(0, vexpress_sysreg_base
+ SYS_CFGSTAT
);
248 writel(command
, vexpress_sysreg_base
+ SYS_CFGCTRL
);
251 if (vexpress_sysreg_dev
) {
252 /* Schedule completion check */
254 vexpress_sysreg_config_data
= data
;
255 vexpress_sysreg_config_tries
= 100;
256 mod_timer(&vexpress_sysreg_config_timer
,
257 jiffies
+ usecs_to_jiffies(100));
258 status
= VEXPRESS_CONFIG_STATUS_WAIT
;
260 /* Early execution, no timer available, have to spin */
265 cfgstat
= readl(vexpress_sysreg_base
+ SYS_CFGSTAT
);
268 if (!write
&& (cfgstat
& SYS_CFGSTAT_COMPLETE
))
269 *data
= readl(vexpress_sysreg_base
+ SYS_CFGDATA
);
270 status
= VEXPRESS_CONFIG_STATUS_DONE
;
272 if (cfgstat
& SYS_CFGSTAT_ERR
)
279 struct vexpress_config_bridge_info vexpress_sysreg_config_bridge_info
= {
280 .name
= "vexpress-sysreg",
281 .func_get
= vexpress_sysreg_config_func_get
,
282 .func_put
= vexpress_sysreg_config_func_put
,
283 .func_exec
= vexpress_sysreg_config_func_exec
,
286 static void vexpress_sysreg_config_complete(unsigned long data
)
288 int status
= VEXPRESS_CONFIG_STATUS_DONE
;
289 u32 cfgstat
= readl(vexpress_sysreg_base
+ SYS_CFGSTAT
);
291 if (cfgstat
& SYS_CFGSTAT_ERR
)
293 if (!vexpress_sysreg_config_tries
--)
297 dev_err(vexpress_sysreg_dev
, "error %d\n", status
);
298 } else if (!(cfgstat
& SYS_CFGSTAT_COMPLETE
)) {
299 mod_timer(&vexpress_sysreg_config_timer
,
300 jiffies
+ usecs_to_jiffies(50));
304 if (vexpress_sysreg_config_data
) {
305 *vexpress_sysreg_config_data
= readl(vexpress_sysreg_base
+
307 dev_dbg(vexpress_sysreg_dev
, "read data %x\n",
308 *vexpress_sysreg_config_data
);
309 vexpress_sysreg_config_data
= NULL
;
312 vexpress_config_complete(vexpress_sysreg_config_bridge
, status
);
316 void __init
vexpress_sysreg_setup(struct device_node
*node
)
318 if (WARN_ON(!vexpress_sysreg_base
))
321 if (readl(vexpress_sysreg_base
+ SYS_MISC
) & SYS_MISC_MASTERSITE
)
322 vexpress_master_site
= VEXPRESS_SITE_DB2
;
324 vexpress_master_site
= VEXPRESS_SITE_DB1
;
326 vexpress_sysreg_config_bridge
= vexpress_config_bridge_register(
327 node
, &vexpress_sysreg_config_bridge_info
);
328 WARN_ON(!vexpress_sysreg_config_bridge
);
331 void __init
vexpress_sysreg_early_init(void __iomem
*base
)
333 vexpress_sysreg_base
= base
;
334 vexpress_sysreg_setup(NULL
);
337 void __init
vexpress_sysreg_of_early_init(void)
339 struct device_node
*node
= of_find_compatible_node(NULL
, NULL
,
340 "arm,vexpress-sysreg");
343 vexpress_sysreg_base
= of_iomap(node
, 0);
344 vexpress_sysreg_setup(node
);
346 pr_info("vexpress-sysreg: No Device Tree node found.");
351 static struct vexpress_sysreg_gpio
{
354 } vexpress_sysreg_gpios
[] = {
355 [VEXPRESS_GPIO_MMC_CARDIN
] = {
357 .value
= SYS_MCI_CARDIN
,
359 [VEXPRESS_GPIO_MMC_WPROT
] = {
361 .value
= SYS_MCI_WPROT
,
363 [VEXPRESS_GPIO_FLASH_WPn
] = {
365 .value
= SYS_FLASH_WPn
,
369 static int vexpress_sysreg_gpio_direction_input(struct gpio_chip
*chip
,
375 static int vexpress_sysreg_gpio_direction_output(struct gpio_chip
*chip
,
376 unsigned offset
, int value
)
381 static int vexpress_sysreg_gpio_get(struct gpio_chip
*chip
,
384 struct vexpress_sysreg_gpio
*gpio
= &vexpress_sysreg_gpios
[offset
];
385 u32 reg_value
= readl(vexpress_sysreg_base
+ gpio
->reg
);
387 return !!(reg_value
& gpio
->value
);
390 static void vexpress_sysreg_gpio_set(struct gpio_chip
*chip
,
391 unsigned offset
, int value
)
393 struct vexpress_sysreg_gpio
*gpio
= &vexpress_sysreg_gpios
[offset
];
394 u32 reg_value
= readl(vexpress_sysreg_base
+ gpio
->reg
);
397 reg_value
|= gpio
->value
;
399 reg_value
&= ~gpio
->value
;
401 writel(reg_value
, vexpress_sysreg_base
+ gpio
->reg
);
404 static struct gpio_chip vexpress_sysreg_gpio_chip
= {
405 .label
= "vexpress-sysreg",
406 .direction_input
= vexpress_sysreg_gpio_direction_input
,
407 .direction_output
= vexpress_sysreg_gpio_direction_output
,
408 .get
= vexpress_sysreg_gpio_get
,
409 .set
= vexpress_sysreg_gpio_set
,
410 .ngpio
= ARRAY_SIZE(vexpress_sysreg_gpios
),
415 static ssize_t
vexpress_sysreg_sys_id_show(struct device
*dev
,
416 struct device_attribute
*attr
, char *buf
)
418 return sprintf(buf
, "0x%08x\n", readl(vexpress_sysreg_base
+ SYS_ID
));
421 DEVICE_ATTR(sys_id
, S_IRUGO
, vexpress_sysreg_sys_id_show
, NULL
);
423 static int vexpress_sysreg_probe(struct platform_device
*pdev
)
426 struct resource
*res
= platform_get_resource(pdev
,
429 if (!devm_request_mem_region(&pdev
->dev
, res
->start
,
430 resource_size(res
), pdev
->name
)) {
431 dev_err(&pdev
->dev
, "Failed to request memory region!\n");
435 if (!vexpress_sysreg_base
) {
436 vexpress_sysreg_base
= devm_ioremap(&pdev
->dev
, res
->start
,
438 vexpress_sysreg_setup(pdev
->dev
.of_node
);
441 if (!vexpress_sysreg_base
) {
442 dev_err(&pdev
->dev
, "Failed to obtain base address!\n");
446 setup_timer(&vexpress_sysreg_config_timer
,
447 vexpress_sysreg_config_complete
, 0);
449 vexpress_sysreg_gpio_chip
.dev
= &pdev
->dev
;
450 err
= gpiochip_add(&vexpress_sysreg_gpio_chip
);
452 vexpress_config_bridge_unregister(
453 vexpress_sysreg_config_bridge
);
454 dev_err(&pdev
->dev
, "Failed to register GPIO chip! (%d)\n",
459 vexpress_sysreg_dev
= &pdev
->dev
;
461 device_create_file(vexpress_sysreg_dev
, &dev_attr_sys_id
);
466 static const struct of_device_id vexpress_sysreg_match
[] = {
467 { .compatible
= "arm,vexpress-sysreg", },
471 static struct platform_driver vexpress_sysreg_driver
= {
473 .name
= "vexpress-sysreg",
474 .of_match_table
= vexpress_sysreg_match
,
476 .probe
= vexpress_sysreg_probe
,
479 static int __init
vexpress_sysreg_init(void)
481 return platform_driver_register(&vexpress_sysreg_driver
);
483 core_initcall(vexpress_sysreg_init
);