2 * omap-dmic.c -- OMAP ASoC DMIC DAI driver
4 * Copyright (C) 2010 - 2011 Texas Instruments
6 * Author: David Lambert <dlambert@ti.com>
7 * Misael Lopez Cruz <misael.lopez@ti.com>
8 * Liam Girdwood <lrg@ti.com>
9 * Peter Ujfalusi <peter.ujfalusi@ti.com>
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
27 #include <linux/init.h>
28 #include <linux/module.h>
29 #include <linux/platform_device.h>
30 #include <linux/err.h>
31 #include <linux/clk.h>
33 #include <linux/slab.h>
34 #include <linux/pm_runtime.h>
35 #include <linux/of_device.h>
37 #include <sound/core.h>
38 #include <sound/pcm.h>
39 #include <sound/pcm_params.h>
40 #include <sound/initval.h>
41 #include <sound/soc.h>
42 #include <sound/dmaengine_pcm.h>
44 #include "omap-dmic.h"
48 void __iomem
*io_base
;
59 struct snd_dmaengine_dai_dma_data dma_data
;
63 static inline void omap_dmic_write(struct omap_dmic
*dmic
, u16 reg
, u32 val
)
65 __raw_writel(val
, dmic
->io_base
+ reg
);
68 static inline int omap_dmic_read(struct omap_dmic
*dmic
, u16 reg
)
70 return __raw_readl(dmic
->io_base
+ reg
);
73 static inline void omap_dmic_start(struct omap_dmic
*dmic
)
75 u32 ctrl
= omap_dmic_read(dmic
, OMAP_DMIC_CTRL_REG
);
77 /* Configure DMA controller */
78 omap_dmic_write(dmic
, OMAP_DMIC_DMAENABLE_SET_REG
,
79 OMAP_DMIC_DMA_ENABLE
);
81 omap_dmic_write(dmic
, OMAP_DMIC_CTRL_REG
, ctrl
| dmic
->ch_enabled
);
84 static inline void omap_dmic_stop(struct omap_dmic
*dmic
)
86 u32 ctrl
= omap_dmic_read(dmic
, OMAP_DMIC_CTRL_REG
);
87 omap_dmic_write(dmic
, OMAP_DMIC_CTRL_REG
,
88 ctrl
& ~OMAP_DMIC_UP_ENABLE_MASK
);
90 /* Disable DMA request generation */
91 omap_dmic_write(dmic
, OMAP_DMIC_DMAENABLE_CLR_REG
,
92 OMAP_DMIC_DMA_ENABLE
);
96 static inline int dmic_is_enabled(struct omap_dmic
*dmic
)
98 return omap_dmic_read(dmic
, OMAP_DMIC_CTRL_REG
) &
99 OMAP_DMIC_UP_ENABLE_MASK
;
102 static int omap_dmic_dai_startup(struct snd_pcm_substream
*substream
,
103 struct snd_soc_dai
*dai
)
105 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
108 mutex_lock(&dmic
->mutex
);
115 mutex_unlock(&dmic
->mutex
);
117 snd_soc_dai_set_dma_data(dai
, substream
, &dmic
->dma_data
);
121 static void omap_dmic_dai_shutdown(struct snd_pcm_substream
*substream
,
122 struct snd_soc_dai
*dai
)
124 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
126 mutex_lock(&dmic
->mutex
);
131 mutex_unlock(&dmic
->mutex
);
134 static int omap_dmic_select_divider(struct omap_dmic
*dmic
, int sample_rate
)
136 int divider
= -EINVAL
;
139 * 192KHz rate is only supported with 19.2MHz/3.84MHz clock
142 if (sample_rate
== 192000) {
143 if (dmic
->fclk_freq
== 19200000 && dmic
->out_freq
== 3840000)
144 divider
= 0x6; /* Divider: 5 (192KHz sampling rate) */
147 "invalid clock configuration for 192KHz\n");
152 switch (dmic
->out_freq
) {
154 if (dmic
->fclk_freq
!= 24576000)
156 divider
= 0x4; /* Divider: 16 */
159 switch (dmic
->fclk_freq
) {
161 divider
= 0x5; /* Divider: 5 */
164 divider
= 0x0; /* Divider: 8 */
167 divider
= 0x2; /* Divider: 10 */
174 if (dmic
->fclk_freq
!= 24576000)
176 divider
= 0x3; /* Divider: 8 */
179 if (dmic
->fclk_freq
!= 19200000)
181 divider
= 0x1; /* Divider: 5 (96KHz sampling rate) */
184 dev_err(dmic
->dev
, "invalid out frequency: %dHz\n",
192 dev_err(dmic
->dev
, "invalid out frequency %dHz for %dHz input\n",
193 dmic
->out_freq
, dmic
->fclk_freq
);
197 static int omap_dmic_dai_hw_params(struct snd_pcm_substream
*substream
,
198 struct snd_pcm_hw_params
*params
,
199 struct snd_soc_dai
*dai
)
201 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
202 struct snd_dmaengine_dai_dma_data
*dma_data
;
205 dmic
->clk_div
= omap_dmic_select_divider(dmic
, params_rate(params
));
206 if (dmic
->clk_div
< 0) {
207 dev_err(dmic
->dev
, "no valid divider for %dHz from %dHz\n",
208 dmic
->out_freq
, dmic
->fclk_freq
);
212 dmic
->ch_enabled
= 0;
213 channels
= params_channels(params
);
216 dmic
->ch_enabled
|= OMAP_DMIC_UP3_ENABLE
;
218 dmic
->ch_enabled
|= OMAP_DMIC_UP2_ENABLE
;
220 dmic
->ch_enabled
|= OMAP_DMIC_UP1_ENABLE
;
223 dev_err(dmic
->dev
, "invalid number of legacy channels\n");
227 /* packet size is threshold * channels */
228 dma_data
= snd_soc_dai_get_dma_data(dai
, substream
);
229 dma_data
->maxburst
= dmic
->threshold
* channels
;
234 static int omap_dmic_dai_prepare(struct snd_pcm_substream
*substream
,
235 struct snd_soc_dai
*dai
)
237 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
240 /* Configure uplink threshold */
241 omap_dmic_write(dmic
, OMAP_DMIC_FIFO_CTRL_REG
, dmic
->threshold
);
243 ctrl
= omap_dmic_read(dmic
, OMAP_DMIC_CTRL_REG
);
245 /* Set dmic out format */
246 ctrl
&= ~(OMAP_DMIC_FORMAT
| OMAP_DMIC_POLAR_MASK
);
247 ctrl
|= (OMAP_DMICOUTFORMAT_LJUST
| OMAP_DMIC_POLAR1
|
248 OMAP_DMIC_POLAR2
| OMAP_DMIC_POLAR3
);
250 /* Configure dmic clock divider */
251 ctrl
&= ~OMAP_DMIC_CLK_DIV_MASK
;
252 ctrl
|= OMAP_DMIC_CLK_DIV(dmic
->clk_div
);
254 omap_dmic_write(dmic
, OMAP_DMIC_CTRL_REG
, ctrl
);
256 omap_dmic_write(dmic
, OMAP_DMIC_CTRL_REG
,
257 ctrl
| OMAP_DMICOUTFORMAT_LJUST
| OMAP_DMIC_POLAR1
|
258 OMAP_DMIC_POLAR2
| OMAP_DMIC_POLAR3
);
263 static int omap_dmic_dai_trigger(struct snd_pcm_substream
*substream
,
264 int cmd
, struct snd_soc_dai
*dai
)
266 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
269 case SNDRV_PCM_TRIGGER_START
:
270 omap_dmic_start(dmic
);
272 case SNDRV_PCM_TRIGGER_STOP
:
273 omap_dmic_stop(dmic
);
282 static int omap_dmic_select_fclk(struct omap_dmic
*dmic
, int clk_id
,
285 struct clk
*parent_clk
;
286 char *parent_clk_name
;
296 dev_err(dmic
->dev
, "invalid input frequency: %dHz\n", freq
);
301 if (dmic
->sysclk
== clk_id
) {
302 dmic
->fclk_freq
= freq
;
306 /* re-parent not allowed if a stream is ongoing */
307 if (dmic
->active
&& dmic_is_enabled(dmic
)) {
308 dev_err(dmic
->dev
, "can't re-parent when DMIC active\n");
313 case OMAP_DMIC_SYSCLK_PAD_CLKS
:
314 parent_clk_name
= "pad_clks_ck";
316 case OMAP_DMIC_SYSCLK_SLIMBLUS_CLKS
:
317 parent_clk_name
= "slimbus_clk";
319 case OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS
:
320 parent_clk_name
= "dmic_sync_mux_ck";
323 dev_err(dmic
->dev
, "fclk clk_id (%d) not supported\n", clk_id
);
327 parent_clk
= clk_get(dmic
->dev
, parent_clk_name
);
328 if (IS_ERR(parent_clk
)) {
329 dev_err(dmic
->dev
, "can't get %s\n", parent_clk_name
);
333 mutex_lock(&dmic
->mutex
);
335 /* disable clock while reparenting */
336 pm_runtime_put_sync(dmic
->dev
);
337 ret
= clk_set_parent(dmic
->fclk
, parent_clk
);
338 pm_runtime_get_sync(dmic
->dev
);
340 ret
= clk_set_parent(dmic
->fclk
, parent_clk
);
342 mutex_unlock(&dmic
->mutex
);
345 dev_err(dmic
->dev
, "re-parent failed\n");
349 dmic
->sysclk
= clk_id
;
350 dmic
->fclk_freq
= freq
;
358 static int omap_dmic_select_outclk(struct omap_dmic
*dmic
, int clk_id
,
363 if (clk_id
!= OMAP_DMIC_ABE_DMIC_CLK
) {
364 dev_err(dmic
->dev
, "output clk_id (%d) not supported\n",
374 dmic
->out_freq
= freq
;
377 dev_err(dmic
->dev
, "invalid out frequency: %dHz\n", freq
);
385 static int omap_dmic_set_dai_sysclk(struct snd_soc_dai
*dai
, int clk_id
,
386 unsigned int freq
, int dir
)
388 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
390 if (dir
== SND_SOC_CLOCK_IN
)
391 return omap_dmic_select_fclk(dmic
, clk_id
, freq
);
392 else if (dir
== SND_SOC_CLOCK_OUT
)
393 return omap_dmic_select_outclk(dmic
, clk_id
, freq
);
395 dev_err(dmic
->dev
, "invalid clock direction (%d)\n", dir
);
399 static const struct snd_soc_dai_ops omap_dmic_dai_ops
= {
400 .startup
= omap_dmic_dai_startup
,
401 .shutdown
= omap_dmic_dai_shutdown
,
402 .hw_params
= omap_dmic_dai_hw_params
,
403 .prepare
= omap_dmic_dai_prepare
,
404 .trigger
= omap_dmic_dai_trigger
,
405 .set_sysclk
= omap_dmic_set_dai_sysclk
,
408 static int omap_dmic_probe(struct snd_soc_dai
*dai
)
410 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
412 pm_runtime_enable(dmic
->dev
);
414 /* Disable lines while request is ongoing */
415 pm_runtime_get_sync(dmic
->dev
);
416 omap_dmic_write(dmic
, OMAP_DMIC_CTRL_REG
, 0x00);
417 pm_runtime_put_sync(dmic
->dev
);
419 /* Configure DMIC threshold value */
420 dmic
->threshold
= OMAP_DMIC_THRES_MAX
- 3;
424 static int omap_dmic_remove(struct snd_soc_dai
*dai
)
426 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
428 pm_runtime_disable(dmic
->dev
);
433 static struct snd_soc_dai_driver omap_dmic_dai
= {
435 .probe
= omap_dmic_probe
,
436 .remove
= omap_dmic_remove
,
440 .rates
= SNDRV_PCM_RATE_96000
| SNDRV_PCM_RATE_192000
,
441 .formats
= SNDRV_PCM_FMTBIT_S32_LE
,
444 .ops
= &omap_dmic_dai_ops
,
447 static const struct snd_soc_component_driver omap_dmic_component
= {
451 static int asoc_dmic_probe(struct platform_device
*pdev
)
453 struct omap_dmic
*dmic
;
454 struct resource
*res
;
457 dmic
= devm_kzalloc(&pdev
->dev
, sizeof(struct omap_dmic
), GFP_KERNEL
);
461 platform_set_drvdata(pdev
, dmic
);
462 dmic
->dev
= &pdev
->dev
;
463 dmic
->sysclk
= OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS
;
465 mutex_init(&dmic
->mutex
);
467 dmic
->fclk
= clk_get(dmic
->dev
, "fck");
468 if (IS_ERR(dmic
->fclk
)) {
469 dev_err(dmic
->dev
, "cant get fck\n");
473 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "dma");
475 dev_err(dmic
->dev
, "invalid dma memory resource\n");
479 dmic
->dma_data
.addr
= res
->start
+ OMAP_DMIC_DATA_REG
;
481 res
= platform_get_resource(pdev
, IORESOURCE_DMA
, 0);
483 dev_err(dmic
->dev
, "invalid dma resource\n");
488 dmic
->dma_req
= res
->start
;
489 dmic
->dma_data
.filter_data
= &dmic
->dma_req
;
491 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "mpu");
493 dev_err(dmic
->dev
, "invalid memory resource\n");
498 dmic
->io_base
= devm_ioremap_resource(&pdev
->dev
, res
);
499 if (IS_ERR(dmic
->io_base
))
500 return PTR_ERR(dmic
->io_base
);
502 ret
= snd_soc_register_component(&pdev
->dev
, &omap_dmic_component
,
514 static int asoc_dmic_remove(struct platform_device
*pdev
)
516 struct omap_dmic
*dmic
= platform_get_drvdata(pdev
);
518 snd_soc_unregister_component(&pdev
->dev
);
524 static const struct of_device_id omap_dmic_of_match
[] = {
525 { .compatible
= "ti,omap4-dmic", },
528 MODULE_DEVICE_TABLE(of
, omap_dmic_of_match
);
530 static struct platform_driver asoc_dmic_driver
= {
533 .owner
= THIS_MODULE
,
534 .of_match_table
= omap_dmic_of_match
,
536 .probe
= asoc_dmic_probe
,
537 .remove
= asoc_dmic_remove
,
540 module_platform_driver(asoc_dmic_driver
);
542 MODULE_ALIAS("platform:omap-dmic");
543 MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
544 MODULE_DESCRIPTION("OMAP DMIC ASoC Interface");
545 MODULE_LICENSE("GPL");