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[PATCH] powerpc: Add cputable entry for POWER6
[linux-2.6.git] / arch / powerpc / kernel / cputable.c
blob3f7182db9ed50cbafcc2992c0bb64fbb66a836e1
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/config.h>
14 #include <linux/string.h>
15 #include <linux/sched.h>
16 #include <linux/threads.h>
17 #include <linux/init.h>
18 #include <linux/module.h>
19
20 #include <asm/oprofile_impl.h>
21 #include <asm/cputable.h>
22
23 struct cpu_spec* cur_cpu_spec = NULL;
24 EXPORT_SYMBOL(cur_cpu_spec);
25
26 /* NOTE:
27 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
28 * the responsibility of the appropriate CPU save/restore functions to
29 * eventually copy these settings over. Those save/restore aren't yet
30 * part of the cputable though. That has to be fixed for both ppc32
31 * and ppc64
32 */
33 #ifdef CONFIG_PPC64
34 extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
35 extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
36 extern void __setup_cpu_be(unsigned long offset, struct cpu_spec* spec);
37 #else
38 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
46 #endif /* CONFIG_PPC32 */
47 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
48
49 /* This table only contains "desktop" CPUs, it need to be filled with embedded
50 * ones as well...
51 */
52 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
53 PPC_FEATURE_HAS_MMU)
54 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
55 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
56 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
57 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
58 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
59 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
60 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
61 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
62 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
63 PPC_FEATURE_BOOKE)
64
65 /* We only set the spe features if the kernel was compiled with
66 * spe support
67 */
68 #ifdef CONFIG_SPE
69 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
70 #else
71 #define PPC_FEATURE_SPE_COMP 0
72 #endif
73
74 struct cpu_spec cpu_specs[] = {
75 #ifdef CONFIG_PPC64
76 { /* Power3 */
77 .pvr_mask = 0xffff0000,
78 .pvr_value = 0x00400000,
79 .cpu_name = "POWER3 (630)",
80 .cpu_features = CPU_FTRS_POWER3,
81 .cpu_user_features = COMMON_USER_PPC64,
82 .icache_bsize = 128,
83 .dcache_bsize = 128,
84 .num_pmcs = 8,
85 .cpu_setup = __setup_cpu_power3,
86 .oprofile_cpu_type = "ppc64/power3",
87 .oprofile_type = PPC_OPROFILE_RS64,
88 .platform = "power3",
89 },
90 { /* Power3+ */
91 .pvr_mask = 0xffff0000,
92 .pvr_value = 0x00410000,
93 .cpu_name = "POWER3 (630+)",
94 .cpu_features = CPU_FTRS_POWER3,
95 .cpu_user_features = COMMON_USER_PPC64,
96 .icache_bsize = 128,
97 .dcache_bsize = 128,
98 .num_pmcs = 8,
99 .cpu_setup = __setup_cpu_power3,
100 .oprofile_cpu_type = "ppc64/power3",
101 .oprofile_type = PPC_OPROFILE_RS64,
102 .platform = "power3",
103 },
104 { /* Northstar */
105 .pvr_mask = 0xffff0000,
106 .pvr_value = 0x00330000,
107 .cpu_name = "RS64-II (northstar)",
108 .cpu_features = CPU_FTRS_RS64,
109 .cpu_user_features = COMMON_USER_PPC64,
110 .icache_bsize = 128,
111 .dcache_bsize = 128,
112 .num_pmcs = 8,
113 .cpu_setup = __setup_cpu_power3,
114 .oprofile_cpu_type = "ppc64/rs64",
115 .oprofile_type = PPC_OPROFILE_RS64,
116 .platform = "rs64",
117 },
118 { /* Pulsar */
119 .pvr_mask = 0xffff0000,
120 .pvr_value = 0x00340000,
121 .cpu_name = "RS64-III (pulsar)",
122 .cpu_features = CPU_FTRS_RS64,
123 .cpu_user_features = COMMON_USER_PPC64,
124 .icache_bsize = 128,
125 .dcache_bsize = 128,
126 .num_pmcs = 8,
127 .cpu_setup = __setup_cpu_power3,
128 .oprofile_cpu_type = "ppc64/rs64",
129 .oprofile_type = PPC_OPROFILE_RS64,
130 .platform = "rs64",
131 },
132 { /* I-star */
133 .pvr_mask = 0xffff0000,
134 .pvr_value = 0x00360000,
135 .cpu_name = "RS64-III (icestar)",
136 .cpu_features = CPU_FTRS_RS64,
137 .cpu_user_features = COMMON_USER_PPC64,
138 .icache_bsize = 128,
139 .dcache_bsize = 128,
140 .num_pmcs = 8,
141 .cpu_setup = __setup_cpu_power3,
142 .oprofile_cpu_type = "ppc64/rs64",
143 .oprofile_type = PPC_OPROFILE_RS64,
144 .platform = "rs64",
145 },
146 { /* S-star */
147 .pvr_mask = 0xffff0000,
148 .pvr_value = 0x00370000,
149 .cpu_name = "RS64-IV (sstar)",
150 .cpu_features = CPU_FTRS_RS64,
151 .cpu_user_features = COMMON_USER_PPC64,
152 .icache_bsize = 128,
153 .dcache_bsize = 128,
154 .num_pmcs = 8,
155 .cpu_setup = __setup_cpu_power3,
156 .oprofile_cpu_type = "ppc64/rs64",
157 .oprofile_type = PPC_OPROFILE_RS64,
158 .platform = "rs64",
159 },
160 { /* Power4 */
161 .pvr_mask = 0xffff0000,
162 .pvr_value = 0x00350000,
163 .cpu_name = "POWER4 (gp)",
164 .cpu_features = CPU_FTRS_POWER4,
165 .cpu_user_features = COMMON_USER_POWER4,
166 .icache_bsize = 128,
167 .dcache_bsize = 128,
168 .num_pmcs = 8,
169 .cpu_setup = __setup_cpu_power4,
170 .oprofile_cpu_type = "ppc64/power4",
171 .oprofile_type = PPC_OPROFILE_POWER4,
172 .platform = "power4",
173 },
174 { /* Power4+ */
175 .pvr_mask = 0xffff0000,
176 .pvr_value = 0x00380000,
177 .cpu_name = "POWER4+ (gq)",
178 .cpu_features = CPU_FTRS_POWER4,
179 .cpu_user_features = COMMON_USER_POWER4,
180 .icache_bsize = 128,
181 .dcache_bsize = 128,
182 .num_pmcs = 8,
183 .cpu_setup = __setup_cpu_power4,
184 .oprofile_cpu_type = "ppc64/power4",
185 .oprofile_type = PPC_OPROFILE_POWER4,
186 .platform = "power4",
187 },
188 { /* PPC970 */
189 .pvr_mask = 0xffff0000,
190 .pvr_value = 0x00390000,
191 .cpu_name = "PPC970",
192 .cpu_features = CPU_FTRS_PPC970,
193 .cpu_user_features = COMMON_USER_POWER4 |
194 PPC_FEATURE_HAS_ALTIVEC_COMP,
195 .icache_bsize = 128,
196 .dcache_bsize = 128,
197 .num_pmcs = 8,
198 .cpu_setup = __setup_cpu_ppc970,
199 .oprofile_cpu_type = "ppc64/970",
200 .oprofile_type = PPC_OPROFILE_POWER4,
201 .platform = "ppc970",
202 },
203 #endif /* CONFIG_PPC64 */
204 #if defined(CONFIG_PPC64) || defined(CONFIG_POWER4)
205 { /* PPC970FX */
206 .pvr_mask = 0xffff0000,
207 .pvr_value = 0x003c0000,
208 .cpu_name = "PPC970FX",
209 #ifdef CONFIG_PPC32
210 .cpu_features = CPU_FTRS_970_32,
211 #else
212 .cpu_features = CPU_FTRS_PPC970,
213 #endif
214 .cpu_user_features = COMMON_USER_POWER4 |
215 PPC_FEATURE_HAS_ALTIVEC_COMP,
216 .icache_bsize = 128,
217 .dcache_bsize = 128,
218 .num_pmcs = 8,
219 .cpu_setup = __setup_cpu_ppc970,
220 .oprofile_cpu_type = "ppc64/970",
221 .oprofile_type = PPC_OPROFILE_POWER4,
222 .platform = "ppc970",
223 },
224 #endif /* defined(CONFIG_PPC64) || defined(CONFIG_POWER4) */
225 #ifdef CONFIG_PPC64
226 { /* PPC970MP */
227 .pvr_mask = 0xffff0000,
228 .pvr_value = 0x00440000,
229 .cpu_name = "PPC970MP",
230 .cpu_features = CPU_FTRS_PPC970,
231 .cpu_user_features = COMMON_USER_POWER4 |
232 PPC_FEATURE_HAS_ALTIVEC_COMP,
233 .icache_bsize = 128,
234 .dcache_bsize = 128,
235 .cpu_setup = __setup_cpu_ppc970,
236 .oprofile_cpu_type = "ppc64/970",
237 .oprofile_type = PPC_OPROFILE_POWER4,
238 .platform = "ppc970",
239 },
240 { /* Power5 GR */
241 .pvr_mask = 0xffff0000,
242 .pvr_value = 0x003a0000,
243 .cpu_name = "POWER5 (gr)",
244 .cpu_features = CPU_FTRS_POWER5,
245 .cpu_user_features = COMMON_USER_POWER5,
246 .icache_bsize = 128,
247 .dcache_bsize = 128,
248 .num_pmcs = 6,
249 .cpu_setup = __setup_cpu_power4,
250 .oprofile_cpu_type = "ppc64/power5",
251 .oprofile_type = PPC_OPROFILE_POWER4,
252 .platform = "power5",
253 },
254 { /* Power5 GS */
255 .pvr_mask = 0xffff0000,
256 .pvr_value = 0x003b0000,
257 .cpu_name = "POWER5+ (gs)",
258 .cpu_features = CPU_FTRS_POWER5,
259 .cpu_user_features = COMMON_USER_POWER5_PLUS,
260 .icache_bsize = 128,
261 .dcache_bsize = 128,
262 .num_pmcs = 6,
263 .cpu_setup = __setup_cpu_power4,
264 .oprofile_cpu_type = "ppc64/power5+",
265 .oprofile_type = PPC_OPROFILE_POWER4,
266 .platform = "power5+",
267 },
268 { /* Power6 */
269 .pvr_mask = 0xffff0000,
270 .pvr_value = 0x003e0000,
271 .cpu_name = "POWER6",
272 .cpu_features = CPU_FTRS_POWER6,
273 .cpu_user_features = COMMON_USER_POWER6,
274 .icache_bsize = 128,
275 .dcache_bsize = 128,
276 .num_pmcs = 6,
277 .cpu_setup = __setup_cpu_power4,
278 .oprofile_cpu_type = "ppc64/power6",
279 .oprofile_type = PPC_OPROFILE_POWER4,
280 .platform = "power6",
281 },
282 { /* Cell Broadband Engine */
283 .pvr_mask = 0xffff0000,
284 .pvr_value = 0x00700000,
285 .cpu_name = "Cell Broadband Engine",
286 .cpu_features = CPU_FTRS_CELL,
287 .cpu_user_features = COMMON_USER_PPC64 |
288 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
289 PPC_FEATURE_SMT,
290 .icache_bsize = 128,
291 .dcache_bsize = 128,
292 .cpu_setup = __setup_cpu_be,
293 .platform = "ppc-cell-be",
294 },
295 { /* default match */
296 .pvr_mask = 0x00000000,
297 .pvr_value = 0x00000000,
298 .cpu_name = "POWER4 (compatible)",
299 .cpu_features = CPU_FTRS_COMPATIBLE,
300 .cpu_user_features = COMMON_USER_PPC64,
301 .icache_bsize = 128,
302 .dcache_bsize = 128,
303 .num_pmcs = 6,
304 .cpu_setup = __setup_cpu_power4,
305 .platform = "power4",
306 }
307 #endif /* CONFIG_PPC64 */
308 #ifdef CONFIG_PPC32
309 #if CLASSIC_PPC
310 { /* 601 */
311 .pvr_mask = 0xffff0000,
312 .pvr_value = 0x00010000,
313 .cpu_name = "601",
314 .cpu_features = CPU_FTRS_PPC601,
315 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
316 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
317 .icache_bsize = 32,
318 .dcache_bsize = 32,
319 .platform = "ppc601",
320 },
321 { /* 603 */
322 .pvr_mask = 0xffff0000,
323 .pvr_value = 0x00030000,
324 .cpu_name = "603",
325 .cpu_features = CPU_FTRS_603,
326 .cpu_user_features = COMMON_USER,
327 .icache_bsize = 32,
328 .dcache_bsize = 32,
329 .cpu_setup = __setup_cpu_603,
330 .platform = "ppc603",
331 },
332 { /* 603e */
333 .pvr_mask = 0xffff0000,
334 .pvr_value = 0x00060000,
335 .cpu_name = "603e",
336 .cpu_features = CPU_FTRS_603,
337 .cpu_user_features = COMMON_USER,
338 .icache_bsize = 32,
339 .dcache_bsize = 32,
340 .cpu_setup = __setup_cpu_603,
341 .platform = "ppc603",
342 },
343 { /* 603ev */
344 .pvr_mask = 0xffff0000,
345 .pvr_value = 0x00070000,
346 .cpu_name = "603ev",
347 .cpu_features = CPU_FTRS_603,
348 .cpu_user_features = COMMON_USER,
349 .icache_bsize = 32,
350 .dcache_bsize = 32,
351 .cpu_setup = __setup_cpu_603,
352 .platform = "ppc603",
353 },
354 { /* 604 */
355 .pvr_mask = 0xffff0000,
356 .pvr_value = 0x00040000,
357 .cpu_name = "604",
358 .cpu_features = CPU_FTRS_604,
359 .cpu_user_features = COMMON_USER,
360 .icache_bsize = 32,
361 .dcache_bsize = 32,
362 .num_pmcs = 2,
363 .cpu_setup = __setup_cpu_604,
364 .platform = "ppc604",
365 },
366 { /* 604e */
367 .pvr_mask = 0xfffff000,
368 .pvr_value = 0x00090000,
369 .cpu_name = "604e",
370 .cpu_features = CPU_FTRS_604,
371 .cpu_user_features = COMMON_USER,
372 .icache_bsize = 32,
373 .dcache_bsize = 32,
374 .num_pmcs = 4,
375 .cpu_setup = __setup_cpu_604,
376 .platform = "ppc604",
377 },
378 { /* 604r */
379 .pvr_mask = 0xffff0000,
380 .pvr_value = 0x00090000,
381 .cpu_name = "604r",
382 .cpu_features = CPU_FTRS_604,
383 .cpu_user_features = COMMON_USER,
384 .icache_bsize = 32,
385 .dcache_bsize = 32,
386 .num_pmcs = 4,
387 .cpu_setup = __setup_cpu_604,
388 .platform = "ppc604",
389 },
390 { /* 604ev */
391 .pvr_mask = 0xffff0000,
392 .pvr_value = 0x000a0000,
393 .cpu_name = "604ev",
394 .cpu_features = CPU_FTRS_604,
395 .cpu_user_features = COMMON_USER,
396 .icache_bsize = 32,
397 .dcache_bsize = 32,
398 .num_pmcs = 4,
399 .cpu_setup = __setup_cpu_604,
400 .platform = "ppc604",
401 },
402 { /* 740/750 (0x4202, don't support TAU ?) */
403 .pvr_mask = 0xffffffff,
404 .pvr_value = 0x00084202,
405 .cpu_name = "740/750",
406 .cpu_features = CPU_FTRS_740_NOTAU,
407 .cpu_user_features = COMMON_USER,
408 .icache_bsize = 32,
409 .dcache_bsize = 32,
410 .num_pmcs = 4,
411 .cpu_setup = __setup_cpu_750,
412 .platform = "ppc750",
413 },
414 { /* 750CX (80100 and 8010x?) */
415 .pvr_mask = 0xfffffff0,
416 .pvr_value = 0x00080100,
417 .cpu_name = "750CX",
418 .cpu_features = CPU_FTRS_750,
419 .cpu_user_features = COMMON_USER,
420 .icache_bsize = 32,
421 .dcache_bsize = 32,
422 .num_pmcs = 4,
423 .cpu_setup = __setup_cpu_750cx,
424 .platform = "ppc750",
425 },
426 { /* 750CX (82201 and 82202) */
427 .pvr_mask = 0xfffffff0,
428 .pvr_value = 0x00082200,
429 .cpu_name = "750CX",
430 .cpu_features = CPU_FTRS_750,
431 .cpu_user_features = COMMON_USER,
432 .icache_bsize = 32,
433 .dcache_bsize = 32,
434 .num_pmcs = 4,
435 .cpu_setup = __setup_cpu_750cx,
436 .platform = "ppc750",
437 },
438 { /* 750CXe (82214) */
439 .pvr_mask = 0xfffffff0,
440 .pvr_value = 0x00082210,
441 .cpu_name = "750CXe",
442 .cpu_features = CPU_FTRS_750,
443 .cpu_user_features = COMMON_USER,
444 .icache_bsize = 32,
445 .dcache_bsize = 32,
446 .num_pmcs = 4,
447 .cpu_setup = __setup_cpu_750cx,
448 .platform = "ppc750",
449 },
450 { /* 750CXe "Gekko" (83214) */
451 .pvr_mask = 0xffffffff,
452 .pvr_value = 0x00083214,
453 .cpu_name = "750CXe",
454 .cpu_features = CPU_FTRS_750,
455 .cpu_user_features = COMMON_USER,
456 .icache_bsize = 32,
457 .dcache_bsize = 32,
458 .num_pmcs = 4,
459 .cpu_setup = __setup_cpu_750cx,
460 .platform = "ppc750",
461 },
462 { /* 745/755 */
463 .pvr_mask = 0xfffff000,
464 .pvr_value = 0x00083000,
465 .cpu_name = "745/755",
466 .cpu_features = CPU_FTRS_750,
467 .cpu_user_features = COMMON_USER,
468 .icache_bsize = 32,
469 .dcache_bsize = 32,
470 .num_pmcs = 4,
471 .cpu_setup = __setup_cpu_750,
472 .platform = "ppc750",
473 },
474 { /* 750FX rev 1.x */
475 .pvr_mask = 0xffffff00,
476 .pvr_value = 0x70000100,
477 .cpu_name = "750FX",
478 .cpu_features = CPU_FTRS_750FX1,
479 .cpu_user_features = COMMON_USER,
480 .icache_bsize = 32,
481 .dcache_bsize = 32,
482 .num_pmcs = 4,
483 .cpu_setup = __setup_cpu_750,
484 .platform = "ppc750",
485 },
486 { /* 750FX rev 2.0 must disable HID0[DPM] */
487 .pvr_mask = 0xffffffff,
488 .pvr_value = 0x70000200,
489 .cpu_name = "750FX",
490 .cpu_features = CPU_FTRS_750FX2,
491 .cpu_user_features = COMMON_USER,
492 .icache_bsize = 32,
493 .dcache_bsize = 32,
494 .num_pmcs = 4,
495 .cpu_setup = __setup_cpu_750,
496 .platform = "ppc750",
497 },
498 { /* 750FX (All revs except 2.0) */
499 .pvr_mask = 0xffff0000,
500 .pvr_value = 0x70000000,
501 .cpu_name = "750FX",
502 .cpu_features = CPU_FTRS_750FX,
503 .cpu_user_features = COMMON_USER,
504 .icache_bsize = 32,
505 .dcache_bsize = 32,
506 .num_pmcs = 4,
507 .cpu_setup = __setup_cpu_750fx,
508 .platform = "ppc750",
509 },
510 { /* 750GX */
511 .pvr_mask = 0xffff0000,
512 .pvr_value = 0x70020000,
513 .cpu_name = "750GX",
514 .cpu_features = CPU_FTRS_750GX,
515 .cpu_user_features = COMMON_USER,
516 .icache_bsize = 32,
517 .dcache_bsize = 32,
518 .num_pmcs = 4,
519 .cpu_setup = __setup_cpu_750fx,
520 .platform = "ppc750",
521 },
522 { /* 740/750 (L2CR bit need fixup for 740) */
523 .pvr_mask = 0xffff0000,
524 .pvr_value = 0x00080000,
525 .cpu_name = "740/750",
526 .cpu_features = CPU_FTRS_740,
527 .cpu_user_features = COMMON_USER,
528 .icache_bsize = 32,
529 .dcache_bsize = 32,
530 .num_pmcs = 4,
531 .cpu_setup = __setup_cpu_750,
532 .platform = "ppc750",
533 },
534 { /* 7400 rev 1.1 ? (no TAU) */
535 .pvr_mask = 0xffffffff,
536 .pvr_value = 0x000c1101,
537 .cpu_name = "7400 (1.1)",
538 .cpu_features = CPU_FTRS_7400_NOTAU,
539 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
540 .icache_bsize = 32,
541 .dcache_bsize = 32,
542 .num_pmcs = 4,
543 .cpu_setup = __setup_cpu_7400,
544 .platform = "ppc7400",
545 },
546 { /* 7400 */
547 .pvr_mask = 0xffff0000,
548 .pvr_value = 0x000c0000,
549 .cpu_name = "7400",
550 .cpu_features = CPU_FTRS_7400,
551 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
552 .icache_bsize = 32,
553 .dcache_bsize = 32,
554 .num_pmcs = 4,
555 .cpu_setup = __setup_cpu_7400,
556 .platform = "ppc7400",
557 },
558 { /* 7410 */
559 .pvr_mask = 0xffff0000,
560 .pvr_value = 0x800c0000,
561 .cpu_name = "7410",
562 .cpu_features = CPU_FTRS_7400,
563 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
564 .icache_bsize = 32,
565 .dcache_bsize = 32,
566 .num_pmcs = 4,
567 .cpu_setup = __setup_cpu_7410,
568 .platform = "ppc7400",
569 },
570 { /* 7450 2.0 - no doze/nap */
571 .pvr_mask = 0xffffffff,
572 .pvr_value = 0x80000200,
573 .cpu_name = "7450",
574 .cpu_features = CPU_FTRS_7450_20,
575 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
576 .icache_bsize = 32,
577 .dcache_bsize = 32,
578 .num_pmcs = 6,
579 .cpu_setup = __setup_cpu_745x,
580 .oprofile_cpu_type = "ppc/7450",
581 .oprofile_type = PPC_OPROFILE_G4,
582 .platform = "ppc7450",
583 },
584 { /* 7450 2.1 */
585 .pvr_mask = 0xffffffff,
586 .pvr_value = 0x80000201,
587 .cpu_name = "7450",
588 .cpu_features = CPU_FTRS_7450_21,
589 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
590 .icache_bsize = 32,
591 .dcache_bsize = 32,
592 .num_pmcs = 6,
593 .cpu_setup = __setup_cpu_745x,
594 .oprofile_cpu_type = "ppc/7450",
595 .oprofile_type = PPC_OPROFILE_G4,
596 .platform = "ppc7450",
597 },
598 { /* 7450 2.3 and newer */
599 .pvr_mask = 0xffff0000,
600 .pvr_value = 0x80000000,
601 .cpu_name = "7450",
602 .cpu_features = CPU_FTRS_7450_23,
603 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
604 .icache_bsize = 32,
605 .dcache_bsize = 32,
606 .num_pmcs = 6,
607 .cpu_setup = __setup_cpu_745x,
608 .oprofile_cpu_type = "ppc/7450",
609 .oprofile_type = PPC_OPROFILE_G4,
610 .platform = "ppc7450",
611 },
612 { /* 7455 rev 1.x */
613 .pvr_mask = 0xffffff00,
614 .pvr_value = 0x80010100,
615 .cpu_name = "7455",
616 .cpu_features = CPU_FTRS_7455_1,
617 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
618 .icache_bsize = 32,
619 .dcache_bsize = 32,
620 .num_pmcs = 6,
621 .cpu_setup = __setup_cpu_745x,
622 .oprofile_cpu_type = "ppc/7450",
623 .oprofile_type = PPC_OPROFILE_G4,
624 .platform = "ppc7450",
625 },
626 { /* 7455 rev 2.0 */
627 .pvr_mask = 0xffffffff,
628 .pvr_value = 0x80010200,
629 .cpu_name = "7455",
630 .cpu_features = CPU_FTRS_7455_20,
631 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
632 .icache_bsize = 32,
633 .dcache_bsize = 32,
634 .num_pmcs = 6,
635 .cpu_setup = __setup_cpu_745x,
636 .oprofile_cpu_type = "ppc/7450",
637 .oprofile_type = PPC_OPROFILE_G4,
638 .platform = "ppc7450",
639 },
640 { /* 7455 others */
641 .pvr_mask = 0xffff0000,
642 .pvr_value = 0x80010000,
643 .cpu_name = "7455",
644 .cpu_features = CPU_FTRS_7455,
645 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
646 .icache_bsize = 32,
647 .dcache_bsize = 32,
648 .num_pmcs = 6,
649 .cpu_setup = __setup_cpu_745x,
650 .oprofile_cpu_type = "ppc/7450",
651 .oprofile_type = PPC_OPROFILE_G4,
652 .platform = "ppc7450",
653 },
654 { /* 7447/7457 Rev 1.0 */
655 .pvr_mask = 0xffffffff,
656 .pvr_value = 0x80020100,
657 .cpu_name = "7447/7457",
658 .cpu_features = CPU_FTRS_7447_10,
659 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
660 .icache_bsize = 32,
661 .dcache_bsize = 32,
662 .num_pmcs = 6,
663 .cpu_setup = __setup_cpu_745x,
664 .oprofile_cpu_type = "ppc/7450",
665 .oprofile_type = PPC_OPROFILE_G4,
666 .platform = "ppc7450",
667 },
668 { /* 7447/7457 Rev 1.1 */
669 .pvr_mask = 0xffffffff,
670 .pvr_value = 0x80020101,
671 .cpu_name = "7447/7457",
672 .cpu_features = CPU_FTRS_7447_10,
673 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
674 .icache_bsize = 32,
675 .dcache_bsize = 32,
676 .num_pmcs = 6,
677 .cpu_setup = __setup_cpu_745x,
678 .oprofile_cpu_type = "ppc/7450",
679 .oprofile_type = PPC_OPROFILE_G4,
680 .platform = "ppc7450",
681 },
682 { /* 7447/7457 Rev 1.2 and later */
683 .pvr_mask = 0xffff0000,
684 .pvr_value = 0x80020000,
685 .cpu_name = "7447/7457",
686 .cpu_features = CPU_FTRS_7447,
687 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
688 .icache_bsize = 32,
689 .dcache_bsize = 32,
690 .num_pmcs = 6,
691 .cpu_setup = __setup_cpu_745x,
692 .oprofile_cpu_type = "ppc/7450",
693 .oprofile_type = PPC_OPROFILE_G4,
694 .platform = "ppc7450",
695 },
696 { /* 7447A */
697 .pvr_mask = 0xffff0000,
698 .pvr_value = 0x80030000,
699 .cpu_name = "7447A",
700 .cpu_features = CPU_FTRS_7447A,
701 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
702 .icache_bsize = 32,
703 .dcache_bsize = 32,
704 .num_pmcs = 6,
705 .cpu_setup = __setup_cpu_745x,
706 .oprofile_cpu_type = "ppc/7450",
707 .oprofile_type = PPC_OPROFILE_G4,
708 .platform = "ppc7450",
709 },
710 { /* 7448 */
711 .pvr_mask = 0xffff0000,
712 .pvr_value = 0x80040000,
713 .cpu_name = "7448",
714 .cpu_features = CPU_FTRS_7447A,
715 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
716 .icache_bsize = 32,
717 .dcache_bsize = 32,
718 .num_pmcs = 6,
719 .cpu_setup = __setup_cpu_745x,
720 .oprofile_cpu_type = "ppc/7450",
721 .oprofile_type = PPC_OPROFILE_G4,
722 .platform = "ppc7450",
723 },
724 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
725 .pvr_mask = 0x7fff0000,
726 .pvr_value = 0x00810000,
727 .cpu_name = "82xx",
728 .cpu_features = CPU_FTRS_82XX,
729 .cpu_user_features = COMMON_USER,
730 .icache_bsize = 32,
731 .dcache_bsize = 32,
732 .cpu_setup = __setup_cpu_603,
733 .platform = "ppc603",
734 },
735 { /* All G2_LE (603e core, plus some) have the same pvr */
736 .pvr_mask = 0x7fff0000,
737 .pvr_value = 0x00820000,
738 .cpu_name = "G2_LE",
739 .cpu_features = CPU_FTRS_G2_LE,
740 .cpu_user_features = COMMON_USER,
741 .icache_bsize = 32,
742 .dcache_bsize = 32,
743 .cpu_setup = __setup_cpu_603,
744 .platform = "ppc603",
745 },
746 { /* e300 (a 603e core, plus some) on 83xx */
747 .pvr_mask = 0x7fff0000,
748 .pvr_value = 0x00830000,
749 .cpu_name = "e300",
750 .cpu_features = CPU_FTRS_E300,
751 .cpu_user_features = COMMON_USER,
752 .icache_bsize = 32,
753 .dcache_bsize = 32,
754 .cpu_setup = __setup_cpu_603,
755 .platform = "ppc603",
756 },
757 { /* default match, we assume split I/D cache & TB (non-601)... */
758 .pvr_mask = 0x00000000,
759 .pvr_value = 0x00000000,
760 .cpu_name = "(generic PPC)",
761 .cpu_features = CPU_FTRS_CLASSIC32,
762 .cpu_user_features = COMMON_USER,
763 .icache_bsize = 32,
764 .dcache_bsize = 32,
765 .platform = "ppc603",
766 },
767 #endif /* CLASSIC_PPC */
768 #ifdef CONFIG_8xx
769 { /* 8xx */
770 .pvr_mask = 0xffff0000,
771 .pvr_value = 0x00500000,
772 .cpu_name = "8xx",
773 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
774 * if the 8xx code is there.... */
775 .cpu_features = CPU_FTRS_8XX,
776 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
777 .icache_bsize = 16,
778 .dcache_bsize = 16,
779 .platform = "ppc823",
780 },
781 #endif /* CONFIG_8xx */
782 #ifdef CONFIG_40x
783 { /* 403GC */
784 .pvr_mask = 0xffffff00,
785 .pvr_value = 0x00200200,
786 .cpu_name = "403GC",
787 .cpu_features = CPU_FTRS_40X,
788 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
789 .icache_bsize = 16,
790 .dcache_bsize = 16,
791 .platform = "ppc403",
792 },
793 { /* 403GCX */
794 .pvr_mask = 0xffffff00,
795 .pvr_value = 0x00201400,
796 .cpu_name = "403GCX",
797 .cpu_features = CPU_FTRS_40X,
798 .cpu_user_features = PPC_FEATURE_32 |
799 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
800 .icache_bsize = 16,
801 .dcache_bsize = 16,
802 .platform = "ppc403",
803 },
804 { /* 403G ?? */
805 .pvr_mask = 0xffff0000,
806 .pvr_value = 0x00200000,
807 .cpu_name = "403G ??",
808 .cpu_features = CPU_FTRS_40X,
809 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
810 .icache_bsize = 16,
811 .dcache_bsize = 16,
812 .platform = "ppc403",
813 },
814 { /* 405GP */
815 .pvr_mask = 0xffff0000,
816 .pvr_value = 0x40110000,
817 .cpu_name = "405GP",
818 .cpu_features = CPU_FTRS_40X,
819 .cpu_user_features = PPC_FEATURE_32 |
820 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
821 .icache_bsize = 32,
822 .dcache_bsize = 32,
823 .platform = "ppc405",
824 },
825 { /* STB 03xxx */
826 .pvr_mask = 0xffff0000,
827 .pvr_value = 0x40130000,
828 .cpu_name = "STB03xxx",
829 .cpu_features = CPU_FTRS_40X,
830 .cpu_user_features = PPC_FEATURE_32 |
831 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
832 .icache_bsize = 32,
833 .dcache_bsize = 32,
834 .platform = "ppc405",
835 },
836 { /* STB 04xxx */
837 .pvr_mask = 0xffff0000,
838 .pvr_value = 0x41810000,
839 .cpu_name = "STB04xxx",
840 .cpu_features = CPU_FTRS_40X,
841 .cpu_user_features = PPC_FEATURE_32 |
842 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
843 .icache_bsize = 32,
844 .dcache_bsize = 32,
845 .platform = "ppc405",
846 },
847 { /* NP405L */
848 .pvr_mask = 0xffff0000,
849 .pvr_value = 0x41610000,
850 .cpu_name = "NP405L",
851 .cpu_features = CPU_FTRS_40X,
852 .cpu_user_features = PPC_FEATURE_32 |
853 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
854 .icache_bsize = 32,
855 .dcache_bsize = 32,
856 .platform = "ppc405",
857 },
858 { /* NP4GS3 */
859 .pvr_mask = 0xffff0000,
860 .pvr_value = 0x40B10000,
861 .cpu_name = "NP4GS3",
862 .cpu_features = CPU_FTRS_40X,
863 .cpu_user_features = PPC_FEATURE_32 |
864 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
865 .icache_bsize = 32,
866 .dcache_bsize = 32,
867 .platform = "ppc405",
868 },
869 { /* NP405H */
870 .pvr_mask = 0xffff0000,
871 .pvr_value = 0x41410000,
872 .cpu_name = "NP405H",
873 .cpu_features = CPU_FTRS_40X,
874 .cpu_user_features = PPC_FEATURE_32 |
875 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
876 .icache_bsize = 32,
877 .dcache_bsize = 32,
878 .platform = "ppc405",
879 },
880 { /* 405GPr */
881 .pvr_mask = 0xffff0000,
882 .pvr_value = 0x50910000,
883 .cpu_name = "405GPr",
884 .cpu_features = CPU_FTRS_40X,
885 .cpu_user_features = PPC_FEATURE_32 |
886 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
887 .icache_bsize = 32,
888 .dcache_bsize = 32,
889 .platform = "ppc405",
890 },
891 { /* STBx25xx */
892 .pvr_mask = 0xffff0000,
893 .pvr_value = 0x51510000,
894 .cpu_name = "STBx25xx",
895 .cpu_features = CPU_FTRS_40X,
896 .cpu_user_features = PPC_FEATURE_32 |
897 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
898 .icache_bsize = 32,
899 .dcache_bsize = 32,
900 .platform = "ppc405",
901 },
902 { /* 405LP */
903 .pvr_mask = 0xffff0000,
904 .pvr_value = 0x41F10000,
905 .cpu_name = "405LP",
906 .cpu_features = CPU_FTRS_40X,
907 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
908 .icache_bsize = 32,
909 .dcache_bsize = 32,
910 .platform = "ppc405",
911 },
912 { /* Xilinx Virtex-II Pro */
913 .pvr_mask = 0xfffff000,
914 .pvr_value = 0x20010000,
915 .cpu_name = "Virtex-II Pro",
916 .cpu_features = CPU_FTRS_40X,
917 .cpu_user_features = PPC_FEATURE_32 |
918 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
919 .icache_bsize = 32,
920 .dcache_bsize = 32,
921 .platform = "ppc405",
922 },
923 { /* Xilinx Virtex-4 FX */
924 .pvr_mask = 0xfffff000,
925 .pvr_value = 0x20011000,
926 .cpu_name = "Virtex-4 FX",
927 .cpu_features = CPU_FTRS_40X,
928 .cpu_user_features = PPC_FEATURE_32 |
929 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
930 .icache_bsize = 32,
931 .dcache_bsize = 32,
932 },
933 { /* 405EP */
934 .pvr_mask = 0xffff0000,
935 .pvr_value = 0x51210000,
936 .cpu_name = "405EP",
937 .cpu_features = CPU_FTRS_40X,
938 .cpu_user_features = PPC_FEATURE_32 |
939 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
940 .icache_bsize = 32,
941 .dcache_bsize = 32,
942 .platform = "ppc405",
943 },
944
945 #endif /* CONFIG_40x */
946 #ifdef CONFIG_44x
947 {
948 .pvr_mask = 0xf0000fff,
949 .pvr_value = 0x40000850,
950 .cpu_name = "440EP Rev. A",
951 .cpu_features = CPU_FTRS_44X,
952 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
953 .icache_bsize = 32,
954 .dcache_bsize = 32,
955 .platform = "ppc440",
956 },
957 {
958 .pvr_mask = 0xf0000fff,
959 .pvr_value = 0x400008d3,
960 .cpu_name = "440EP Rev. B",
961 .cpu_features = CPU_FTRS_44X,
962 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
963 .icache_bsize = 32,
964 .dcache_bsize = 32,
965 .platform = "ppc440",
966 },
967 { /* 440GP Rev. B */
968 .pvr_mask = 0xf0000fff,
969 .pvr_value = 0x40000440,
970 .cpu_name = "440GP Rev. B",
971 .cpu_features = CPU_FTRS_44X,
972 .cpu_user_features = COMMON_USER_BOOKE,
973 .icache_bsize = 32,
974 .dcache_bsize = 32,
975 .platform = "ppc440gp",
976 },
977 { /* 440GP Rev. C */
978 .pvr_mask = 0xf0000fff,
979 .pvr_value = 0x40000481,
980 .cpu_name = "440GP Rev. C",
981 .cpu_features = CPU_FTRS_44X,
982 .cpu_user_features = COMMON_USER_BOOKE,
983 .icache_bsize = 32,
984 .dcache_bsize = 32,
985 .platform = "ppc440gp",
986 },
987 { /* 440GX Rev. A */
988 .pvr_mask = 0xf0000fff,
989 .pvr_value = 0x50000850,
990 .cpu_name = "440GX Rev. A",
991 .cpu_features = CPU_FTRS_44X,
992 .cpu_user_features = COMMON_USER_BOOKE,
993 .icache_bsize = 32,
994 .dcache_bsize = 32,
995 .platform = "ppc440",
996 },
997 { /* 440GX Rev. B */
998 .pvr_mask = 0xf0000fff,
999 .pvr_value = 0x50000851,
1000 .cpu_name = "440GX Rev. B",
1001 .cpu_features = CPU_FTRS_44X,
1002 .cpu_user_features = COMMON_USER_BOOKE,
1003 .icache_bsize = 32,
1004 .dcache_bsize = 32,
1005 .platform = "ppc440",
1006 },
1007 { /* 440GX Rev. C */
1008 .pvr_mask = 0xf0000fff,
1009 .pvr_value = 0x50000892,
1010 .cpu_name = "440GX Rev. C",
1011 .cpu_features = CPU_FTRS_44X,
1012 .cpu_user_features = COMMON_USER_BOOKE,
1013 .icache_bsize = 32,
1014 .dcache_bsize = 32,
1015 .platform = "ppc440",
1016 },
1017 { /* 440GX Rev. F */
1018 .pvr_mask = 0xf0000fff,
1019 .pvr_value = 0x50000894,
1020 .cpu_name = "440GX Rev. F",
1021 .cpu_features = CPU_FTRS_44X,
1022 .cpu_user_features = COMMON_USER_BOOKE,
1023 .icache_bsize = 32,
1024 .dcache_bsize = 32,
1025 .platform = "ppc440",
1026 },
1027 { /* 440SP Rev. A */
1028 .pvr_mask = 0xff000fff,
1029 .pvr_value = 0x53000891,
1030 .cpu_name = "440SP Rev. A",
1031 .cpu_features = CPU_FTRS_44X,
1032 .cpu_user_features = COMMON_USER_BOOKE,
1033 .icache_bsize = 32,
1034 .dcache_bsize = 32,
1035 .platform = "ppc440",
1036 },
1037 { /* 440SPe Rev. A */
1038 .pvr_mask = 0xff000fff,
1039 .pvr_value = 0x53000890,
1040 .cpu_name = "440SPe Rev. A",
1041 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
1042 CPU_FTR_USE_TB,
1043 .cpu_user_features = COMMON_USER_BOOKE,
1044 .icache_bsize = 32,
1045 .dcache_bsize = 32,
1046 .platform = "ppc440",
1047 },
1048 #endif /* CONFIG_44x */
1049 #ifdef CONFIG_FSL_BOOKE
1050 { /* e200z5 */
1051 .pvr_mask = 0xfff00000,
1052 .pvr_value = 0x81000000,
1053 .cpu_name = "e200z5",
1054 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1055 .cpu_features = CPU_FTRS_E200,
1056 .cpu_user_features = COMMON_USER_BOOKE |
1057 PPC_FEATURE_HAS_EFP_SINGLE |
1058 PPC_FEATURE_UNIFIED_CACHE,
1059 .dcache_bsize = 32,
1060 .platform = "ppc5554",
1061 },
1062 { /* e200z6 */
1063 .pvr_mask = 0xfff00000,
1064 .pvr_value = 0x81100000,
1065 .cpu_name = "e200z6",
1066 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1067 .cpu_features = CPU_FTRS_E200,
1068 .cpu_user_features = COMMON_USER_BOOKE |
1069 PPC_FEATURE_SPE_COMP |
1070 PPC_FEATURE_HAS_EFP_SINGLE |
1071 PPC_FEATURE_UNIFIED_CACHE,
1072 .dcache_bsize = 32,
1073 .platform = "ppc5554",
1074 },
1075 { /* e500 */
1076 .pvr_mask = 0xffff0000,
1077 .pvr_value = 0x80200000,
1078 .cpu_name = "e500",
1079 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1080 .cpu_features = CPU_FTRS_E500,
1081 .cpu_user_features = COMMON_USER_BOOKE |
1082 PPC_FEATURE_SPE_COMP |
1083 PPC_FEATURE_HAS_EFP_SINGLE,
1084 .icache_bsize = 32,
1085 .dcache_bsize = 32,
1086 .num_pmcs = 4,
1087 .oprofile_cpu_type = "ppc/e500",
1088 .oprofile_type = PPC_OPROFILE_BOOKE,
1089 .platform = "ppc8540",
1090 },
1091 { /* e500v2 */
1092 .pvr_mask = 0xffff0000,
1093 .pvr_value = 0x80210000,
1094 .cpu_name = "e500v2",
1095 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1096 .cpu_features = CPU_FTRS_E500_2,
1097 .cpu_user_features = COMMON_USER_BOOKE |
1098 PPC_FEATURE_SPE_COMP |
1099 PPC_FEATURE_HAS_EFP_SINGLE |
1100 PPC_FEATURE_HAS_EFP_DOUBLE,
1101 .icache_bsize = 32,
1102 .dcache_bsize = 32,
1103 .num_pmcs = 4,
1104 .oprofile_cpu_type = "ppc/e500",
1105 .oprofile_type = PPC_OPROFILE_BOOKE,
1106 .platform = "ppc8548",
1107 },
1108 #endif
1109 #if !CLASSIC_PPC
1110 { /* default match */
1111 .pvr_mask = 0x00000000,
1112 .pvr_value = 0x00000000,
1113 .cpu_name = "(generic PPC)",
1114 .cpu_features = CPU_FTRS_GENERIC_32,
1115 .cpu_user_features = PPC_FEATURE_32,
1116 .icache_bsize = 32,
1117 .dcache_bsize = 32,
1118 .platform = "powerpc",
1119 }
1120 #endif /* !CLASSIC_PPC */
1121 #endif /* CONFIG_PPC32 */
1122 };
Linus' kernel tree