include/asm-sh/dma-mapping.h

   1 #ifndef __ASM_SH_DMA_MAPPING_H
   2 #define __ASM_SH_DMA_MAPPING_H
   3
   4 #include <linux/config.h>
   5 #include <linux/mm.h>
   6 #include <asm/scatterlist.h>
   7 #include <asm/io.h>
   8
   9 /* arch/sh/mm/consistent.c */
  10 extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
  11 extern void consistent_free(void *vaddr, size_t size);
  12 extern void consistent_sync(void *vaddr, size_t size, int direction);
  13
  14 #ifdef CONFIG_SH_DREAMCAST
  15 struct pci_dev;
  16 extern struct bus_type pci_bus_type;
  17 extern void *__pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
  18                                     dma_addr_t *dma_handle);
  19 extern void __pci_free_consistent(struct pci_dev *hwdev, size_t size,
  20                                   void *vaddr, dma_addr_t dma_handle);
  21 #endif
  22
  23 #define dma_supported(dev, mask)        (1)
  24
  25 static inline int dma_set_mask(struct device *dev, u64 mask)
  26 {
  27         if (!dev->dma_mask || !dma_supported(dev, mask))
  28                 return -EIO;
  29
  30         *dev->dma_mask = mask;
  31
  32         return 0;
  33 }
  34
  35 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
  36                          dma_addr_t *dma_handle, int flag)
  37 {
  38         /*
  39          * Some platforms have special pci_alloc_consistent() implementations,
  40          * in these instances we can't use the generic consistent_alloc().
  41          */
  42 #ifdef CONFIG_SH_DREAMCAST
  43         if (dev && dev->bus == &pci_bus_type)
  44                 return __pci_alloc_consistent(NULL, size, dma_handle);
  45 #endif
  46         if (sh_mv.mv_consistent_alloc)
  47                 return sh_mv.mv_consistent_alloc(dev, size, dma_handle, flag);
  48
  49         return consistent_alloc(flag, size, dma_handle);
  50 }
  51
  52 static inline void dma_free_coherent(struct device *dev, size_t size,
  53                        void *vaddr, dma_addr_t dma_handle)
  54 {
  55         /*
  56          * Same note as above applies to pci_free_consistent()..
  57          */
  58 #ifdef CONFIG_SH_DREAMCAST
  59         if (dev && dev->bus == &pci_bus_type) {
  60                 __pci_free_consistent(NULL, size, vaddr, dma_handle);
  61                 return;
  62         }
  63 #endif
  64
  65         if (sh_mv.mv_consistent_free) {
  66                 sh_mv.mv_consistent_free(dev, size, vaddr, dma_handle);
  67                 return;
  68         }
  69
  70         consistent_free(vaddr, size);
  71 }
  72
  73 static inline void dma_cache_sync(void *vaddr, size_t size,
  74                                   enum dma_data_direction dir)
  75 {
  76         consistent_sync(vaddr, size, (int)dir);
  77 }
  78
  79 static inline dma_addr_t dma_map_single(struct device *dev,
  80                                         void *ptr, size_t size,
  81                                         enum dma_data_direction dir)
  82 {
  83 #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
  84         if (dev->bus == &pci_bus_type)
  85                 return virt_to_bus(ptr);
  86 #endif
  87         dma_cache_sync(ptr, size, dir);
  88
  89         return virt_to_bus(ptr);
  90 }
  91
  92 #define dma_unmap_single(dev, addr, size, dir)  do { } while (0)
  93
  94 static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
  95                              int nents, enum dma_data_direction dir)
  96 {
  97         int i;
  98
  99         for (i = 0; i < nents; i++) {
 100 #if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT)
 101                 dma_cache_sync(page_address(sg[i].page) + sg[i].offset,
 102                                sg[i].length, dir);
 103 #endif
 104                 sg[i].dma_address = page_to_phys(sg[i].page) + sg[i].offset;
 105         }
 106
 107         return nents;
 108 }
 109
 110 #define dma_unmap_sg(dev, sg, nents, dir)       do { } while (0)
 111
 112 static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
 113                                       unsigned long offset, size_t size,
 114                                       enum dma_data_direction dir)
 115 {
 116         return dma_map_single(dev, page_address(page) + offset, size, dir);
 117 }
 118
 119 static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
 120                                   size_t size, enum dma_data_direction dir)
 121 {
 122         dma_unmap_single(dev, dma_address, size, dir);
 123 }
 124
 125 static inline void dma_sync_single(struct device *dev, dma_addr_t dma_handle,
 126                                    size_t size, enum dma_data_direction dir)
 127 {
 128 #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
 129         if (dev->bus == &pci_bus_type)
 130                 return;
 131 #endif
 132         dma_cache_sync(bus_to_virt(dma_handle), size, dir);
 133 }
 134
 135 static inline void dma_sync_single_range(struct device *dev,
 136                                          dma_addr_t dma_handle,
 137                                          unsigned long offset, size_t size,
 138                                          enum dma_data_direction dir)
 139 {
 140 #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
 141         if (dev->bus == &pci_bus_type)
 142                 return;
 143 #endif
 144         dma_cache_sync(bus_to_virt(dma_handle) + offset, size, dir);
 145 }
 146
 147 static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg,
 148                                int nelems, enum dma_data_direction dir)
 149 {
 150         int i;
 151
 152         for (i = 0; i < nelems; i++) {
 153 #if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT)
 154                 dma_cache_sync(page_address(sg[i].page) + sg[i].offset,
 155                                sg[i].length, dir);
 156 #endif
 157                 sg[i].dma_address = page_to_phys(sg[i].page) + sg[i].offset;
 158         }
 159 }
 160
 161 static inline void dma_sync_single_for_cpu(struct device *dev,
 162                                            dma_addr_t dma_handle, size_t size,
 163                                            enum dma_data_direction dir)
 164         __attribute__ ((alias("dma_sync_single")));
 165
 166 static inline void dma_sync_single_for_device(struct device *dev,
 167                                            dma_addr_t dma_handle, size_t size,
 168                                            enum dma_data_direction dir)
 169         __attribute__ ((alias("dma_sync_single")));
 170
 171 static inline void dma_sync_sg_for_cpu(struct device *dev,
 172                                        struct scatterlist *sg, int nelems,
 173                                        enum dma_data_direction dir)
 174         __attribute__ ((alias("dma_sync_sg")));
 175
 176 static inline void dma_sync_sg_for_device(struct device *dev,
 177                                        struct scatterlist *sg, int nelems,
 178                                        enum dma_data_direction dir)
 179         __attribute__ ((alias("dma_sync_sg")));
 180
 181 static inline int dma_get_cache_alignment(void)
 182 {
 183         /*
 184          * Each processor family will define its own L1_CACHE_SHIFT,
 185          * L1_CACHE_BYTES wraps to this, so this is always safe.
 186          */
 187         return L1_CACHE_BYTES;
 188 }
 189
 190 static inline int dma_mapping_error(dma_addr_t dma_addr)
 191 {
 192         return dma_addr == 0;
 193 }
 194
 195 #endif /* __ASM_SH_DMA_MAPPING_H */
 196