include/asm-cris/pgtable.h

   1 /*
   2  * CRIS pgtable.h - macros and functions to manipulate page tables.
   3  */
   4
   5 #ifndef _CRIS_PGTABLE_H
   6 #define _CRIS_PGTABLE_H
   7
   8 #ifndef __ASSEMBLY__
   9 #include <linux/config.h>
  10 #include <linux/sched.h>
  11 #include <asm/mmu.h>
  12 #endif
  13 #include <asm/arch/pgtable.h>
  14
  15 /*
  16  * The Linux memory management assumes a three-level page table setup. On
  17  * CRIS, we use that, but "fold" the mid level into the top-level page
  18  * table. Since the MMU TLB is software loaded through an interrupt, it
  19  * supports any page table structure, so we could have used a three-level
  20  * setup, but for the amounts of memory we normally use, a two-level is
  21  * probably more efficient.
  22  *
  23  * This file contains the functions and defines necessary to modify and use
  24  * the CRIS page table tree.
  25  */
  26 #ifndef __ASSEMBLY__
  27 extern void paging_init(void);
  28 #endif
  29
  30 /* Certain architectures need to do special things when pte's
  31  * within a page table are directly modified.  Thus, the following
  32  * hook is made available.
  33  */
  34 #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval))
  35 /*
  36  * (pmds are folded into pgds so this doesn't get actually called,
  37  * but the define is needed for a generic inline function.)
  38  */
  39 #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
  40 #define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval)
  41
  42 /* PMD_SHIFT determines the size of the area a second-level page table can
  43  * map. It is equal to the page size times the number of PTE's that fit in
  44  * a PMD page. A PTE is 4-bytes in CRIS. Hence the following number.
  45  */
  46
  47 #define PMD_SHIFT       (PAGE_SHIFT + (PAGE_SHIFT-2))
  48 #define PMD_SIZE        (1UL << PMD_SHIFT)
  49 #define PMD_MASK        (~(PMD_SIZE-1))
  50
  51 /* PGDIR_SHIFT determines what a third-level page table entry can map.
  52  * Since we fold into a two-level structure, this is the same as PMD_SHIFT.
  53  */
  54
  55 #define PGDIR_SHIFT     PMD_SHIFT
  56 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
  57 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
  58
  59 /*
  60  * entries per page directory level: we use a two-level, so
  61  * we don't really have any PMD directory physically.
  62  * pointers are 4 bytes so we can use the page size and
  63  * divide it by 4 (shift by 2).
  64  */
  65 #define PTRS_PER_PTE    (1UL << (PAGE_SHIFT-2))
  66 #define PTRS_PER_PMD    1
  67 #define PTRS_PER_PGD    (1UL << (PAGE_SHIFT-2))
  68
  69 /* calculate how many PGD entries a user-level program can use
  70  * the first mappable virtual address is 0
  71  * (TASK_SIZE is the maximum virtual address space)
  72  */
  73
  74 #define USER_PTRS_PER_PGD       (TASK_SIZE/PGDIR_SIZE)
  75 #define FIRST_USER_PGD_NR       0
  76
  77 /* zero page used for uninitialized stuff */
  78 #ifndef __ASSEMBLY__
  79 extern unsigned long empty_zero_page;
  80 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
  81 #endif
  82
  83 /* number of bits that fit into a memory pointer */
  84 #define BITS_PER_PTR                    (8*sizeof(unsigned long))
  85
  86 /* to align the pointer to a pointer address */
  87 #define PTR_MASK                        (~(sizeof(void*)-1))
  88
  89 /* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
  90 /* 64-bit machines, beware!  SRB. */
  91 #define SIZEOF_PTR_LOG2                 2
  92
  93 /* to find an entry in a page-table */
  94 #define PAGE_PTR(address) \
  95 ((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)
  96
  97 /* to set the page-dir */
  98 #define SET_PAGE_DIR(tsk,pgdir)
  99
 100 #define pte_none(x)     (!pte_val(x))
 101 #define pte_present(x)  (pte_val(x) & _PAGE_PRESENT)
 102 #define pte_clear(xp)   do { pte_val(*(xp)) = 0; } while (0)
 103
 104 #define pmd_none(x)     (!pmd_val(x))
 105 /* by removing the _PAGE_KERNEL bit from the comparision, the same pmd_bad
 106  * works for both _PAGE_TABLE and _KERNPG_TABLE pmd entries.
 107  */
 108 #define pmd_bad(x)      ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_KERNEL)) != _PAGE_TABLE)
 109 #define pmd_present(x)  (pmd_val(x) & _PAGE_PRESENT)
 110 #define pmd_clear(xp)   do { pmd_val(*(xp)) = 0; } while (0)
 111
 112 #ifndef __ASSEMBLY__
 113
 114 /*
 115  * The "pgd_xxx()" functions here are trivial for a folded two-level
 116  * setup: the pgd is never bad, and a pmd always exists (as it's folded
 117  * into the pgd entry)
 118  */
 119 extern inline int pgd_none(pgd_t pgd)           { return 0; }
 120 extern inline int pgd_bad(pgd_t pgd)            { return 0; }
 121 extern inline int pgd_present(pgd_t pgd)        { return 1; }
 122 extern inline void pgd_clear(pgd_t * pgdp)      { }
 123
 124 /*
 125  * The following only work if pte_present() is true.
 126  * Undefined behaviour if not..
 127  */
 128
 129 extern inline int pte_read(pte_t pte)           { return pte_val(pte) & _PAGE_READ; }
 130 extern inline int pte_write(pte_t pte)          { return pte_val(pte) & _PAGE_WRITE; }
 131 extern inline int pte_exec(pte_t pte)           { return pte_val(pte) & _PAGE_READ; }
 132 extern inline int pte_dirty(pte_t pte)          { return pte_val(pte) & _PAGE_MODIFIED; }
 133 extern inline int pte_young(pte_t pte)          { return pte_val(pte) & _PAGE_ACCESSED; }
 134 extern inline int pte_file(pte_t pte)           { return pte_val(pte) & _PAGE_FILE; }
 135
 136 extern inline pte_t pte_wrprotect(pte_t pte)
 137 {
 138         pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
 139         return pte;
 140 }
 141
 142 extern inline pte_t pte_rdprotect(pte_t pte)
 143 {
 144         pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ);
 145         return pte;
 146 }
 147
 148 extern inline pte_t pte_exprotect(pte_t pte)
 149 {
 150         pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ);
 151         return pte;
 152 }
 153
 154 extern inline pte_t pte_mkclean(pte_t pte)
 155 {
 156         pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
 157         return pte;
 158 }
 159
 160 extern inline pte_t pte_mkold(pte_t pte)
 161 {
 162         pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
 163         return pte;
 164 }
 165
 166 extern inline pte_t pte_mkwrite(pte_t pte)
 167 {
 168         pte_val(pte) |= _PAGE_WRITE;
 169         if (pte_val(pte) & _PAGE_MODIFIED)
 170                 pte_val(pte) |= _PAGE_SILENT_WRITE;
 171         return pte;
 172 }
 173
 174 extern inline pte_t pte_mkread(pte_t pte)
 175 {
 176         pte_val(pte) |= _PAGE_READ;
 177         if (pte_val(pte) & _PAGE_ACCESSED)
 178                 pte_val(pte) |= _PAGE_SILENT_READ;
 179         return pte;
 180 }
 181
 182 extern inline pte_t pte_mkexec(pte_t pte)
 183 {
 184         pte_val(pte) |= _PAGE_READ;
 185         if (pte_val(pte) & _PAGE_ACCESSED)
 186                 pte_val(pte) |= _PAGE_SILENT_READ;
 187         return pte;
 188 }
 189
 190 extern inline pte_t pte_mkdirty(pte_t pte)
 191 {
 192         pte_val(pte) |= _PAGE_MODIFIED;
 193         if (pte_val(pte) & _PAGE_WRITE)
 194                 pte_val(pte) |= _PAGE_SILENT_WRITE;
 195         return pte;
 196 }
 197
 198 extern inline pte_t pte_mkyoung(pte_t pte)
 199 {
 200         pte_val(pte) |= _PAGE_ACCESSED;
 201         if (pte_val(pte) & _PAGE_READ)
 202         {
 203                 pte_val(pte) |= _PAGE_SILENT_READ;
 204                 if ((pte_val(pte) & (_PAGE_WRITE | _PAGE_MODIFIED)) ==
 205                     (_PAGE_WRITE | _PAGE_MODIFIED))
 206                         pte_val(pte) |= _PAGE_SILENT_WRITE;
 207         }
 208         return pte;
 209 }
 210
 211 /*
 212  * Conversion functions: convert a page and protection to a page entry,
 213  * and a page entry and page directory to the page they refer to.
 214  */
 215
 216 /* What actually goes as arguments to the various functions is less than
 217  * obvious, but a rule of thumb is that struct page's goes as struct page *,
 218  * really physical DRAM addresses are unsigned long's, and DRAM "virtual"
 219  * addresses (the 0xc0xxxxxx's) goes as void *'s.
 220  */
 221
 222 extern inline pte_t __mk_pte(void * page, pgprot_t pgprot)
 223 {
 224         pte_t pte;
 225         /* the PTE needs a physical address */
 226         pte_val(pte) = __pa(page) | pgprot_val(pgprot);
 227         return pte;
 228 }
 229
 230 #define mk_pte(page, pgprot) __mk_pte(page_address(page), (pgprot))
 231
 232 #define mk_pte_phys(physpage, pgprot) \
 233 ({                                                                      \
 234         pte_t __pte;                                                    \
 235                                                                         \
 236         pte_val(__pte) = (physpage) + pgprot_val(pgprot);               \
 237         __pte;                                                          \
 238 })
 239
 240 extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 241 { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
 242
 243
 244 /* pte_val refers to a page in the 0x4xxxxxxx physical DRAM interval
 245  * __pte_page(pte_val) refers to the "virtual" DRAM interval
 246  * pte_pagenr refers to the page-number counted starting from the virtual DRAM start
 247  */
 248
 249 extern inline unsigned long __pte_page(pte_t pte)
 250 {
 251         /* the PTE contains a physical address */
 252         return (unsigned long)__va(pte_val(pte) & PAGE_MASK);
 253 }
 254
 255 #define pte_pagenr(pte)         ((__pte_page(pte) - PAGE_OFFSET) >> PAGE_SHIFT)
 256
 257 /* permanent address of a page */
 258
 259 #define __page_address(page)    (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT))
 260 #define pte_page(pte)           (mem_map+pte_pagenr(pte))
 261
 262 /* only the pte's themselves need to point to physical DRAM (see above)
 263  * the pagetable links are purely handled within the kernel SW and thus
 264  * don't need the __pa and __va transformations.
 265  */
 266
 267 extern inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
 268 { pmd_val(*pmdp) = _PAGE_TABLE | (unsigned long) ptep; }
 269
 270 #define pmd_page(pmd)           (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
 271 #define pmd_page_kernel(pmd)    ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
 272
 273 /* to find an entry in a page-table-directory. */
 274 #define pgd_index(address) ((address >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
 275
 276 /* to find an entry in a page-table-directory */
 277 extern inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address)
 278 {
 279         return mm->pgd + pgd_index(address);
 280 }
 281
 282 /* to find an entry in a kernel page-table-directory */
 283 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
 284
 285 /* Find an entry in the second-level page table.. */
 286 extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
 287 {
 288         return (pmd_t *) dir;
 289 }
 290
 291 /* Find an entry in the third-level page table.. */
 292 #define __pte_offset(address) \
 293         (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 294 #define pte_offset_kernel(dir, address) \
 295         ((pte_t *) pmd_page_kernel(*(dir)) +  __pte_offset(address))
 296 #define pte_offset_map(dir, address) \
 297         ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
 298 #define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
 299
 300 #define pte_unmap(pte) do { } while (0)
 301 #define pte_unmap_nested(pte) do { } while (0)
 302 #define pte_pfn(x)              ((unsigned long)(__va((x).pte)) >> PAGE_SHIFT)
 303 #define pfn_pte(pfn, prot)      __pte((__pa((pfn) << PAGE_SHIFT)) | pgprot_val(prot))
 304
 305 #define pte_ERROR(e) \
 306         printk("%s:%d: bad pte %p(%08lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
 307 #define pmd_ERROR(e) \
 308         printk("%s:%d: bad pmd %p(%08lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
 309 #define pgd_ERROR(e) \
 310         printk("%s:%d: bad pgd %p(%08lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
 311
 312
 313 extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* defined in head.S */
 314
 315 /*
 316  * CRIS doesn't have any external MMU info: the kernel page
 317  * tables contain all the necessary information.
 318  *
 319  * Actually I am not sure on what this could be used for.
 320  */
 321 extern inline void update_mmu_cache(struct vm_area_struct * vma,
 322         unsigned long address, pte_t pte)
 323 {
 324 }
 325
 326 /* Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e)) */
 327 /* Since the PAGE_PRESENT bit is bit 4, we can use the bits above */
 328
 329 #define __swp_type(x)                   (((x).val >> 5) & 0x7f)
 330 #define __swp_offset(x)                 ((x).val >> 12)
 331 #define __swp_entry(type, offset)       ((swp_entry_t) { ((type) << 5) | ((offset) << 12) })
 332 #define __pte_to_swp_entry(pte)         ((swp_entry_t) { pte_val(pte) })
 333 #define __swp_entry_to_pte(x)           ((pte_t) { (x).val })
 334
 335 #define kern_addr_valid(addr)   (1)
 336
 337 #include <asm-generic/pgtable.h>
 338
 339 /*
 340  * No page table caches to initialise
 341  */
 342 #define pgtable_cache_init()   do { } while (0)
 343
 344 #define pte_to_pgoff(x) (pte_val(x) >> 6)
 345 #define pgoff_to_pte(x) __pte(((x) << 6) | _PAGE_FILE)
 346
 347 #endif /* __ASSEMBLY__ */
 348 #endif /* _CRIS_PGTABLE_H */