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[linux-2.6.9-moxart.git] / drivers / pci / proc.c
blob81fd72ef15380f14be1848b75705ee898a2a4ac2
1 /*
2 * $Id: proc.c,v 1.13 1998/05/12 07:36:07 mj Exp $
4 * Procfs interface for the PCI bus.
6 * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
7 */
9 #include <linux/init.h>
10 #include <linux/pci.h>
11 #include <linux/module.h>
12 #include <linux/proc_fs.h>
13 #include <linux/seq_file.h>
14 #include <linux/smp_lock.h>
16 #include <asm/uaccess.h>
17 #include <asm/byteorder.h>
19 static int proc_initialized; /* = 0 */
21 static loff_t
22 proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
24 loff_t new = -1;
25 struct inode *inode = file->f_dentry->d_inode;
27 down(&inode->i_sem);
28 switch (whence) {
29 case 0:
30 new = off;
31 break;
32 case 1:
33 new = file->f_pos + off;
34 break;
35 case 2:
36 new = inode->i_size + off;
37 break;
39 if (new < 0 || new > inode->i_size)
40 new = -EINVAL;
41 else
42 file->f_pos = new;
43 up(&inode->i_sem);
44 return new;
47 static ssize_t
48 proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *ppos)
50 const struct inode *ino = file->f_dentry->d_inode;
51 const struct proc_dir_entry *dp = PDE(ino);
52 struct pci_dev *dev = dp->data;
53 unsigned int pos = *ppos;
54 unsigned int cnt, size;
57 * Normal users can read only the standardized portion of the
58 * configuration space as several chips lock up when trying to read
59 * undefined locations (think of Intel PIIX4 as a typical example).
62 if (capable(CAP_SYS_ADMIN))
63 size = dev->cfg_size;
64 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
65 size = 128;
66 else
67 size = 64;
69 if (pos >= size)
70 return 0;
71 if (nbytes >= size)
72 nbytes = size;
73 if (pos + nbytes > size)
74 nbytes = size - pos;
75 cnt = nbytes;
77 if (!access_ok(VERIFY_WRITE, buf, cnt))
78 return -EINVAL;
80 if ((pos & 1) && cnt) {
81 unsigned char val;
82 pci_read_config_byte(dev, pos, &val);
83 __put_user(val, buf);
84 buf++;
85 pos++;
86 cnt--;
89 if ((pos & 3) && cnt > 2) {
90 unsigned short val;
91 pci_read_config_word(dev, pos, &val);
92 __put_user(cpu_to_le16(val), (unsigned short __user *) buf);
93 buf += 2;
94 pos += 2;
95 cnt -= 2;
98 while (cnt >= 4) {
99 unsigned int val;
100 pci_read_config_dword(dev, pos, &val);
101 __put_user(cpu_to_le32(val), (unsigned int __user *) buf);
102 buf += 4;
103 pos += 4;
104 cnt -= 4;
107 if (cnt >= 2) {
108 unsigned short val;
109 pci_read_config_word(dev, pos, &val);
110 __put_user(cpu_to_le16(val), (unsigned short __user *) buf);
111 buf += 2;
112 pos += 2;
113 cnt -= 2;
116 if (cnt) {
117 unsigned char val;
118 pci_read_config_byte(dev, pos, &val);
119 __put_user(val, buf);
120 buf++;
121 pos++;
122 cnt--;
125 *ppos = pos;
126 return nbytes;
129 static ssize_t
130 proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos)
132 const struct inode *ino = file->f_dentry->d_inode;
133 const struct proc_dir_entry *dp = PDE(ino);
134 struct pci_dev *dev = dp->data;
135 int pos = *ppos;
136 int size = dev->cfg_size;
137 int cnt;
139 if (pos >= size)
140 return 0;
141 if (nbytes >= size)
142 nbytes = size;
143 if (pos + nbytes > size)
144 nbytes = size - pos;
145 cnt = nbytes;
147 if (!access_ok(VERIFY_READ, buf, cnt))
148 return -EINVAL;
150 if ((pos & 1) && cnt) {
151 unsigned char val;
152 __get_user(val, buf);
153 pci_write_config_byte(dev, pos, val);
154 buf++;
155 pos++;
156 cnt--;
159 if ((pos & 3) && cnt > 2) {
160 unsigned short val;
161 __get_user(val, (unsigned short __user *) buf);
162 pci_write_config_word(dev, pos, le16_to_cpu(val));
163 buf += 2;
164 pos += 2;
165 cnt -= 2;
168 while (cnt >= 4) {
169 unsigned int val;
170 __get_user(val, (unsigned int __user *) buf);
171 pci_write_config_dword(dev, pos, le32_to_cpu(val));
172 buf += 4;
173 pos += 4;
174 cnt -= 4;
177 if (cnt >= 2) {
178 unsigned short val;
179 __get_user(val, (unsigned short __user *) buf);
180 pci_write_config_word(dev, pos, le16_to_cpu(val));
181 buf += 2;
182 pos += 2;
183 cnt -= 2;
186 if (cnt) {
187 unsigned char val;
188 __get_user(val, buf);
189 pci_write_config_byte(dev, pos, val);
190 buf++;
191 pos++;
192 cnt--;
195 *ppos = pos;
196 return nbytes;
199 struct pci_filp_private {
200 enum pci_mmap_state mmap_state;
201 int write_combine;
204 static int proc_bus_pci_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
206 const struct proc_dir_entry *dp = PDE(inode);
207 struct pci_dev *dev = dp->data;
208 #ifdef HAVE_PCI_MMAP
209 struct pci_filp_private *fpriv = file->private_data;
210 #endif /* HAVE_PCI_MMAP */
211 int ret = 0;
213 switch (cmd) {
214 case PCIIOC_CONTROLLER:
215 ret = pci_domain_nr(dev->bus);
216 break;
218 #ifdef HAVE_PCI_MMAP
219 case PCIIOC_MMAP_IS_IO:
220 fpriv->mmap_state = pci_mmap_io;
221 break;
223 case PCIIOC_MMAP_IS_MEM:
224 fpriv->mmap_state = pci_mmap_mem;
225 break;
227 case PCIIOC_WRITE_COMBINE:
228 if (arg)
229 fpriv->write_combine = 1;
230 else
231 fpriv->write_combine = 0;
232 break;
234 #endif /* HAVE_PCI_MMAP */
236 default:
237 ret = -EINVAL;
238 break;
241 return ret;
244 #ifdef HAVE_PCI_MMAP
245 static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
247 struct inode *inode = file->f_dentry->d_inode;
248 const struct proc_dir_entry *dp = PDE(inode);
249 struct pci_dev *dev = dp->data;
250 struct pci_filp_private *fpriv = file->private_data;
251 int ret;
253 if (!capable(CAP_SYS_RAWIO))
254 return -EPERM;
256 ret = pci_mmap_page_range(dev, vma,
257 fpriv->mmap_state,
258 fpriv->write_combine);
259 if (ret < 0)
260 return ret;
262 return 0;
265 static int proc_bus_pci_open(struct inode *inode, struct file *file)
267 struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
269 if (!fpriv)
270 return -ENOMEM;
272 fpriv->mmap_state = pci_mmap_io;
273 fpriv->write_combine = 0;
275 file->private_data = fpriv;
277 return 0;
280 static int proc_bus_pci_release(struct inode *inode, struct file *file)
282 kfree(file->private_data);
283 file->private_data = NULL;
285 return 0;
287 #endif /* HAVE_PCI_MMAP */
289 static struct file_operations proc_bus_pci_operations = {
290 .llseek = proc_bus_pci_lseek,
291 .read = proc_bus_pci_read,
292 .write = proc_bus_pci_write,
293 .ioctl = proc_bus_pci_ioctl,
294 #ifdef HAVE_PCI_MMAP
295 .open = proc_bus_pci_open,
296 .release = proc_bus_pci_release,
297 .mmap = proc_bus_pci_mmap,
298 #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
299 .get_unmapped_area = get_pci_unmapped_area,
300 #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
301 #endif /* HAVE_PCI_MMAP */
304 #if BITS_PER_LONG == 32
305 #define LONG_FORMAT "\t%08lx"
306 #else
307 #define LONG_FORMAT "\t%16lx"
308 #endif
310 /* iterator */
311 static void *pci_seq_start(struct seq_file *m, loff_t *pos)
313 struct pci_dev *dev = NULL;
314 loff_t n = *pos;
316 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
317 while (n--) {
318 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
319 if (dev == NULL)
320 goto exit;
322 exit:
323 return dev;
326 static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
328 struct pci_dev *dev = v;
330 (*pos)++;
331 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
332 return dev;
335 static void pci_seq_stop(struct seq_file *m, void *v)
337 if (v) {
338 struct pci_dev *dev = v;
339 pci_dev_put(dev);
343 static int show_device(struct seq_file *m, void *v)
345 const struct pci_dev *dev = v;
346 const struct pci_driver *drv;
347 int i;
349 if (dev == NULL)
350 return 0;
352 drv = pci_dev_driver(dev);
353 seq_printf(m, "%02x%02x\t%04x%04x\t%x",
354 dev->bus->number,
355 dev->devfn,
356 dev->vendor,
357 dev->device,
358 dev->irq);
359 /* Here should be 7 and not PCI_NUM_RESOURCES as we need to preserve compatibility */
360 for(i=0; i<7; i++)
361 seq_printf(m, LONG_FORMAT,
362 dev->resource[i].start |
363 (dev->resource[i].flags & PCI_REGION_FLAG_MASK));
364 for(i=0; i<7; i++)
365 seq_printf(m, LONG_FORMAT,
366 dev->resource[i].start < dev->resource[i].end ?
367 dev->resource[i].end - dev->resource[i].start + 1 : 0);
368 seq_putc(m, '\t');
369 if (drv)
370 seq_printf(m, "%s", drv->name);
371 seq_putc(m, '\n');
372 return 0;
375 static struct seq_operations proc_bus_pci_devices_op = {
376 .start = pci_seq_start,
377 .next = pci_seq_next,
378 .stop = pci_seq_stop,
379 .show = show_device
382 struct proc_dir_entry *proc_bus_pci_dir;
384 int pci_proc_attach_device(struct pci_dev *dev)
386 struct pci_bus *bus = dev->bus;
387 struct proc_dir_entry *de, *e;
388 char name[16];
390 if (!proc_initialized)
391 return -EACCES;
393 if (!(de = bus->procdir)) {
394 if (pci_name_bus(name, bus))
395 return -EEXIST;
396 de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
397 if (!de)
398 return -ENOMEM;
400 sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
401 e = dev->procent = create_proc_entry(name, S_IFREG | S_IRUGO | S_IWUSR, de);
402 if (!e)
403 return -ENOMEM;
404 e->proc_fops = &proc_bus_pci_operations;
405 e->data = dev;
406 e->size = dev->cfg_size;
408 return 0;
411 int pci_proc_detach_device(struct pci_dev *dev)
413 struct proc_dir_entry *e;
415 if ((e = dev->procent)) {
416 if (atomic_read(&e->count))
417 return -EBUSY;
418 remove_proc_entry(e->name, dev->bus->procdir);
419 dev->procent = NULL;
421 return 0;
424 int pci_proc_attach_bus(struct pci_bus* bus)
426 struct proc_dir_entry *de = bus->procdir;
428 if (!proc_initialized)
429 return -EACCES;
431 if (!de) {
432 char name[16];
433 sprintf(name, "%02x", bus->number);
434 de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
435 if (!de)
436 return -ENOMEM;
438 return 0;
441 int pci_proc_detach_bus(struct pci_bus* bus)
443 struct proc_dir_entry *de = bus->procdir;
444 if (de)
445 remove_proc_entry(de->name, proc_bus_pci_dir);
446 return 0;
449 #ifdef CONFIG_PCI_LEGACY_PROC
452 * Backward compatible /proc/pci interface.
456 * Convert some of the configuration space registers of the device at
457 * address (bus,devfn) into a string (possibly several lines each).
458 * The configuration string is stored starting at buf[len]. If the
459 * string would exceed the size of the buffer (SIZE), 0 is returned.
461 static int show_dev_config(struct seq_file *m, void *v)
463 struct pci_dev *dev = v;
464 struct pci_dev *first_dev;
465 struct pci_driver *drv;
466 u32 class_rev;
467 unsigned char latency, min_gnt, max_lat, *class;
468 int reg;
470 first_dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL);
471 if (dev == first_dev)
472 seq_puts(m, "PCI devices found:\n");
473 pci_dev_put(first_dev);
475 drv = pci_dev_driver(dev);
477 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
478 pci_read_config_byte (dev, PCI_LATENCY_TIMER, &latency);
479 pci_read_config_byte (dev, PCI_MIN_GNT, &min_gnt);
480 pci_read_config_byte (dev, PCI_MAX_LAT, &max_lat);
481 seq_printf(m, " Bus %2d, device %3d, function %2d:\n",
482 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
483 class = pci_class_name(class_rev >> 16);
484 if (class)
485 seq_printf(m, " %s", class);
486 else
487 seq_printf(m, " Class %04x", class_rev >> 16);
488 #ifdef CONFIG_PCI_NAMES
489 seq_printf(m, ": %s", dev->pretty_name);
490 #else
491 seq_printf(m, ": PCI device %04x:%04x", dev->vendor, dev->device);
492 #endif
493 seq_printf(m, " (rev %d).\n", class_rev & 0xff);
495 if (dev->irq)
496 seq_printf(m, " IRQ %d.\n", dev->irq);
498 if (latency || min_gnt || max_lat) {
499 seq_printf(m, " Master Capable. ");
500 if (latency)
501 seq_printf(m, "Latency=%d. ", latency);
502 else
503 seq_puts(m, "No bursts. ");
504 if (min_gnt)
505 seq_printf(m, "Min Gnt=%d.", min_gnt);
506 if (max_lat)
507 seq_printf(m, "Max Lat=%d.", max_lat);
508 seq_putc(m, '\n');
511 for (reg = 0; reg < 6; reg++) {
512 struct resource *res = dev->resource + reg;
513 unsigned long base, end, flags;
515 base = res->start;
516 end = res->end;
517 flags = res->flags;
518 if (!end)
519 continue;
521 if (flags & PCI_BASE_ADDRESS_SPACE_IO) {
522 seq_printf(m, " I/O at 0x%lx [0x%lx].\n",
523 base, end);
524 } else {
525 const char *pref, *type = "unknown";
527 if (flags & PCI_BASE_ADDRESS_MEM_PREFETCH)
528 pref = "P";
529 else
530 pref = "Non-p";
531 switch (flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
532 case PCI_BASE_ADDRESS_MEM_TYPE_32:
533 type = "32 bit"; break;
534 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
535 type = "20 bit"; break;
536 case PCI_BASE_ADDRESS_MEM_TYPE_64:
537 type = "64 bit"; break;
539 seq_printf(m, " %srefetchable %s memory at "
540 "0x%lx [0x%lx].\n", pref, type,
541 base,
542 end);
545 return 0;
548 static struct seq_operations proc_pci_op = {
549 .start = pci_seq_start,
550 .next = pci_seq_next,
551 .stop = pci_seq_stop,
552 .show = show_dev_config
555 static int proc_pci_open(struct inode *inode, struct file *file)
557 return seq_open(file, &proc_pci_op);
559 static struct file_operations proc_pci_operations = {
560 .open = proc_pci_open,
561 .read = seq_read,
562 .llseek = seq_lseek,
563 .release = seq_release,
566 static void legacy_proc_init(void)
568 struct proc_dir_entry * entry = create_proc_entry("pci", 0, NULL);
569 if (entry)
570 entry->proc_fops = &proc_pci_operations;
573 #else
575 static void legacy_proc_init(void)
580 #endif /* CONFIG_PCI_LEGACY_PROC */
582 static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
584 return seq_open(file, &proc_bus_pci_devices_op);
586 static struct file_operations proc_bus_pci_dev_operations = {
587 .open = proc_bus_pci_dev_open,
588 .read = seq_read,
589 .llseek = seq_lseek,
590 .release = seq_release,
593 static int __init pci_proc_init(void)
595 struct proc_dir_entry *entry;
596 struct pci_dev *dev = NULL;
597 proc_bus_pci_dir = proc_mkdir("pci", proc_bus);
598 entry = create_proc_entry("devices", 0, proc_bus_pci_dir);
599 if (entry)
600 entry->proc_fops = &proc_bus_pci_dev_operations;
601 proc_initialized = 1;
602 while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
603 pci_proc_attach_device(dev);
605 legacy_proc_init();
606 return 0;
609 __initcall(pci_proc_init);
611 #ifdef CONFIG_HOTPLUG
612 EXPORT_SYMBOL(pci_proc_attach_device);
613 EXPORT_SYMBOL(pci_proc_attach_bus);
614 EXPORT_SYMBOL(pci_proc_detach_bus);
615 EXPORT_SYMBOL(proc_bus_pci_dir);
616 #endif