drivers/pci/hotplug/cpqphp.h

   1 /*
   2  * Compaq Hot Plug Controller Driver
   3  *
   4  * Copyright (C) 1995,2001 Compaq Computer Corporation
   5  * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
   6  * Copyright (C) 2001 IBM
   7  *
   8  * All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or (at
  13  * your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  18  * NON INFRINGEMENT.  See the GNU General Public License for more
  19  * details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24  *
  25  * Send feedback to <greg@kroah.com>
  26  *
  27  */
  28 #ifndef _CPQPHP_H
  29 #define _CPQPHP_H
  30
  31 #include "pci_hotplug.h"
  32 #include <linux/interrupt.h>
  33 #include <asm/io.h>             /* for read? and write? functions */
  34 #include <linux/delay.h>        /* for delays */
  35
  36 #define MY_NAME "cpqphp"
  37
  38 #define dbg(fmt, arg...) do { if (cpqhp_debug) printk(KERN_DEBUG "%s: " fmt , MY_NAME , ## arg); } while (0)
  39 #define err(format, arg...) printk(KERN_ERR "%s: " format , MY_NAME , ## arg)
  40 #define info(format, arg...) printk(KERN_INFO "%s: " format , MY_NAME , ## arg)
  41 #define warn(format, arg...) printk(KERN_WARNING "%s: " format , MY_NAME , ## arg)
  42
  43
  44
  45 struct smbios_system_slot {
  46         u8 type;
  47         u8 length;
  48         u16 handle;
  49         u8 name_string_num;
  50         u8 slot_type;
  51         u8 slot_width;
  52         u8 slot_current_usage;
  53         u8 slot_length;
  54         u16 slot_number;
  55         u8 properties1;
  56         u8 properties2;
  57 } __attribute__ ((packed));
  58
  59 /* offsets to the smbios generic type based on the above structure layout */
  60 enum smbios_system_slot_offsets {
  61         SMBIOS_SLOT_GENERIC_TYPE =      offsetof(struct smbios_system_slot, type),
  62         SMBIOS_SLOT_GENERIC_LENGTH =    offsetof(struct smbios_system_slot, length),
  63         SMBIOS_SLOT_GENERIC_HANDLE =    offsetof(struct smbios_system_slot, handle),
  64         SMBIOS_SLOT_NAME_STRING_NUM =   offsetof(struct smbios_system_slot, name_string_num),
  65         SMBIOS_SLOT_TYPE =              offsetof(struct smbios_system_slot, slot_type),
  66         SMBIOS_SLOT_WIDTH =             offsetof(struct smbios_system_slot, slot_width),
  67         SMBIOS_SLOT_CURRENT_USAGE =     offsetof(struct smbios_system_slot, slot_current_usage),
  68         SMBIOS_SLOT_LENGTH =            offsetof(struct smbios_system_slot, slot_length),
  69         SMBIOS_SLOT_NUMBER =            offsetof(struct smbios_system_slot, slot_number),
  70         SMBIOS_SLOT_PROPERTIES1 =       offsetof(struct smbios_system_slot, properties1),
  71         SMBIOS_SLOT_PROPERTIES2 =       offsetof(struct smbios_system_slot, properties2),
  72 };
  73
  74 struct smbios_generic {
  75         u8 type;
  76         u8 length;
  77         u16 handle;
  78 } __attribute__ ((packed));
  79
  80 /* offsets to the smbios generic type based on the above structure layout */
  81 enum smbios_generic_offsets {
  82         SMBIOS_GENERIC_TYPE =   offsetof(struct smbios_generic, type),
  83         SMBIOS_GENERIC_LENGTH = offsetof(struct smbios_generic, length),
  84         SMBIOS_GENERIC_HANDLE = offsetof(struct smbios_generic, handle),
  85 };
  86
  87 struct smbios_entry_point {
  88         char anchor[4];
  89         u8 ep_checksum;
  90         u8 ep_length;
  91         u8 major_version;
  92         u8 minor_version;
  93         u16 max_size_entry;
  94         u8 ep_rev;
  95         u8 reserved[5];
  96         char int_anchor[5];
  97         u8 int_checksum;
  98         u16 st_length;
  99         u32 st_address;
 100         u16 number_of_entrys;
 101         u8 bcd_rev;
 102 } __attribute__ ((packed));
 103
 104 /* offsets to the smbios entry point based on the above structure layout */
 105 enum smbios_entry_point_offsets {
 106         ANCHOR =                offsetof(struct smbios_entry_point, anchor[0]),
 107         EP_CHECKSUM =           offsetof(struct smbios_entry_point, ep_checksum),
 108         EP_LENGTH =             offsetof(struct smbios_entry_point, ep_length),
 109         MAJOR_VERSION =         offsetof(struct smbios_entry_point, major_version),
 110         MINOR_VERSION =         offsetof(struct smbios_entry_point, minor_version),
 111         MAX_SIZE_ENTRY =        offsetof(struct smbios_entry_point, max_size_entry),
 112         EP_REV =                offsetof(struct smbios_entry_point, ep_rev),
 113         INT_ANCHOR =            offsetof(struct smbios_entry_point, int_anchor[0]),
 114         INT_CHECKSUM =          offsetof(struct smbios_entry_point, int_checksum),
 115         ST_LENGTH =             offsetof(struct smbios_entry_point, st_length),
 116         ST_ADDRESS =            offsetof(struct smbios_entry_point, st_address),
 117         NUMBER_OF_ENTRYS =      offsetof(struct smbios_entry_point, number_of_entrys),
 118         BCD_REV =               offsetof(struct smbios_entry_point, bcd_rev),
 119 };
 120
 121 struct ctrl_reg {                       /* offset */
 122         u8      slot_RST;               /* 0x00 */
 123         u8      slot_enable;            /* 0x01 */
 124         u16     misc;                   /* 0x02 */
 125         u32     led_control;            /* 0x04 */
 126         u32     int_input_clear;        /* 0x08 */
 127         u32     int_mask;               /* 0x0a */
 128         u8      reserved0;              /* 0x10 */
 129         u8      reserved1;              /* 0x11 */
 130         u8      reserved2;              /* 0x12 */
 131         u8      gen_output_AB;          /* 0x13 */
 132         u32     non_int_input;          /* 0x14 */
 133         u32     reserved3;              /* 0x18 */
 134         u32     reserved4;              /* 0x1a */
 135         u32     reserved5;              /* 0x20 */
 136         u8      reserved6;              /* 0x24 */
 137         u8      reserved7;              /* 0x25 */
 138         u16     reserved8;              /* 0x26 */
 139         u8      slot_mask;              /* 0x28 */
 140         u8      reserved9;              /* 0x29 */
 141         u8      reserved10;             /* 0x2a */
 142         u8      reserved11;             /* 0x2b */
 143         u8      slot_SERR;              /* 0x2c */
 144         u8      slot_power;             /* 0x2d */
 145         u8      reserved12;             /* 0x2e */
 146         u8      reserved13;             /* 0x2f */
 147         u8      next_curr_freq;         /* 0x30 */
 148         u8      reset_freq_mode;        /* 0x31 */
 149 } __attribute__ ((packed));
 150
 151 /* offsets to the controller registers based on the above structure layout */
 152 enum ctrl_offsets {
 153         SLOT_RST =              offsetof(struct ctrl_reg, slot_RST),
 154         SLOT_ENABLE =           offsetof(struct ctrl_reg, slot_enable),
 155         MISC =                  offsetof(struct ctrl_reg, misc),
 156         LED_CONTROL =           offsetof(struct ctrl_reg, led_control),
 157         INT_INPUT_CLEAR =       offsetof(struct ctrl_reg, int_input_clear),
 158         INT_MASK =              offsetof(struct ctrl_reg, int_mask),
 159         CTRL_RESERVED0 =        offsetof(struct ctrl_reg, reserved0),
 160         CTRL_RESERVED1 =        offsetof(struct ctrl_reg, reserved1),
 161         CTRL_RESERVED2 =        offsetof(struct ctrl_reg, reserved1),
 162         GEN_OUTPUT_AB =         offsetof(struct ctrl_reg, gen_output_AB),
 163         NON_INT_INPUT =         offsetof(struct ctrl_reg, non_int_input),
 164         CTRL_RESERVED3 =        offsetof(struct ctrl_reg, reserved3),
 165         CTRL_RESERVED4 =        offsetof(struct ctrl_reg, reserved4),
 166         CTRL_RESERVED5 =        offsetof(struct ctrl_reg, reserved5),
 167         CTRL_RESERVED6 =        offsetof(struct ctrl_reg, reserved6),
 168         CTRL_RESERVED7 =        offsetof(struct ctrl_reg, reserved7),
 169         CTRL_RESERVED8 =        offsetof(struct ctrl_reg, reserved8),
 170         SLOT_MASK =             offsetof(struct ctrl_reg, slot_mask),
 171         CTRL_RESERVED9 =        offsetof(struct ctrl_reg, reserved9),
 172         CTRL_RESERVED10 =       offsetof(struct ctrl_reg, reserved10),
 173         CTRL_RESERVED11 =       offsetof(struct ctrl_reg, reserved11),
 174         SLOT_SERR =             offsetof(struct ctrl_reg, slot_SERR),
 175         SLOT_POWER =            offsetof(struct ctrl_reg, slot_power),
 176         NEXT_CURR_FREQ =        offsetof(struct ctrl_reg, next_curr_freq),
 177         RESET_FREQ_MODE =       offsetof(struct ctrl_reg, reset_freq_mode),
 178 };
 179
 180 struct hrt {
 181         char sig0;
 182         char sig1;
 183         char sig2;
 184         char sig3;
 185         u16 unused_IRQ;
 186         u16 PCIIRQ;
 187         u8 number_of_entries;
 188         u8 revision;
 189         u16 reserved1;
 190         u32 reserved2;
 191 } __attribute__ ((packed));
 192
 193 /* offsets to the hotplug resource table registers based on the above structure layout */
 194 enum hrt_offsets {
 195         SIG0 =                  offsetof(struct hrt, sig0),
 196         SIG1 =                  offsetof(struct hrt, sig1),
 197         SIG2 =                  offsetof(struct hrt, sig2),
 198         SIG3 =                  offsetof(struct hrt, sig3),
 199         UNUSED_IRQ =            offsetof(struct hrt, unused_IRQ),
 200         PCIIRQ =                offsetof(struct hrt, PCIIRQ),
 201         NUMBER_OF_ENTRIES =     offsetof(struct hrt, number_of_entries),
 202         REVISION =              offsetof(struct hrt, revision),
 203         HRT_RESERVED1 =         offsetof(struct hrt, reserved1),
 204         HRT_RESERVED2 =         offsetof(struct hrt, reserved2),
 205 };
 206
 207 struct slot_rt {
 208         u8 dev_func;
 209         u8 primary_bus;
 210         u8 secondary_bus;
 211         u8 max_bus;
 212         u16 io_base;
 213         u16 io_length;
 214         u16 mem_base;
 215         u16 mem_length;
 216         u16 pre_mem_base;
 217         u16 pre_mem_length;
 218 } __attribute__ ((packed));
 219
 220 /* offsets to the hotplug slot resource table registers based on the above structure layout */
 221 enum slot_rt_offsets {
 222         DEV_FUNC =              offsetof(struct slot_rt, dev_func),
 223         PRIMARY_BUS =           offsetof(struct slot_rt, primary_bus),
 224         SECONDARY_BUS =         offsetof(struct slot_rt, secondary_bus),
 225         MAX_BUS =               offsetof(struct slot_rt, max_bus),
 226         IO_BASE =               offsetof(struct slot_rt, io_base),
 227         IO_LENGTH =             offsetof(struct slot_rt, io_length),
 228         MEM_BASE =              offsetof(struct slot_rt, mem_base),
 229         MEM_LENGTH =            offsetof(struct slot_rt, mem_length),
 230         PRE_MEM_BASE =          offsetof(struct slot_rt, pre_mem_base),
 231         PRE_MEM_LENGTH =        offsetof(struct slot_rt, pre_mem_length),
 232 };
 233
 234 struct pci_func {
 235         struct pci_func *next;
 236         u8 bus;
 237         u8 device;
 238         u8 function;
 239         u8 is_a_board;
 240         u16 status;
 241         u8 configured;
 242         u8 switch_save;
 243         u8 presence_save;
 244         u32 base_length[0x06];
 245         u8 base_type[0x06];
 246         u16 reserved2;
 247         u32 config_space[0x20];
 248         struct pci_resource *mem_head;
 249         struct pci_resource *p_mem_head;
 250         struct pci_resource *io_head;
 251         struct pci_resource *bus_head;
 252         struct timer_list *p_task_event;
 253         struct pci_dev* pci_dev;
 254 };
 255
 256 struct slot {
 257         struct slot *next;
 258         u8 bus;
 259         u8 device;
 260         u8 number;
 261         u8 is_a_board;
 262         u8 configured;
 263         u8 state;
 264         u8 switch_save;
 265         u8 presence_save;
 266         u32 capabilities;
 267         u16 reserved2;
 268         struct timer_list task_event;
 269         u8 hp_slot;
 270         struct controller *ctrl;
 271         void *p_sm_slot;
 272         struct hotplug_slot *hotplug_slot;
 273 };
 274
 275 struct pci_resource {
 276         struct pci_resource * next;
 277         u32 base;
 278         u32 length;
 279 };
 280
 281 struct event_info {
 282         u32 event_type;
 283         u8 hp_slot;
 284 };
 285
 286 struct controller {
 287         struct controller *next;
 288         u32 ctrl_int_comp;
 289         struct semaphore crit_sect;     /* critical section semaphore */
 290         void *hpc_reg;                  /* cookie for our pci controller location */
 291         struct pci_resource *mem_head;
 292         struct pci_resource *p_mem_head;
 293         struct pci_resource *io_head;
 294         struct pci_resource *bus_head;
 295         struct pci_dev *pci_dev;
 296         struct pci_bus *pci_bus;
 297         struct event_info event_queue[10];
 298         struct slot *slot;
 299         u8 next_event;
 300         u8 interrupt;
 301         u8 cfgspc_irq;
 302         u8 bus;                         /* bus number for the pci hotplug controller */
 303         u8 rev;
 304         u8 slot_device_offset;
 305         u8 first_slot;
 306         u8 add_support;
 307         u8 push_flag;
 308         enum pci_bus_speed speed;
 309         enum pci_bus_speed speed_capability;
 310         u8 push_button;                 /* 0 = no pushbutton, 1 = pushbutton present */
 311         u8 slot_switch_type;            /* 0 = no switch, 1 = switch present */
 312         u8 defeature_PHP;               /* 0 = PHP not supported, 1 = PHP supported */
 313         u8 alternate_base_address;      /* 0 = not supported, 1 = supported */
 314         u8 pci_config_space;            /* Index/data access to working registers 0 = not supported, 1 = supported */
 315         u8 pcix_speed_capability;       /* PCI-X */
 316         u8 pcix_support;                /* PCI-X */
 317         u16 vendor_id;
 318         struct work_struct int_task_event;
 319         wait_queue_head_t queue;        /* sleep & wake process */
 320 };
 321
 322 struct irq_mapping {
 323         u8 barber_pole;
 324         u8 valid_INT;
 325         u8 interrupt[4];
 326 };
 327
 328 struct resource_lists {
 329         struct pci_resource *mem_head;
 330         struct pci_resource *p_mem_head;
 331         struct pci_resource *io_head;
 332         struct pci_resource *bus_head;
 333         struct irq_mapping *irqs;
 334 };
 335
 336 #define ROM_PHY_ADDR                    0x0F0000
 337 #define ROM_PHY_LEN                     0x00ffff
 338
 339 #define PCI_HPC_ID                      0xA0F7
 340 #define PCI_SUB_HPC_ID                  0xA2F7
 341 #define PCI_SUB_HPC_ID2                 0xA2F8
 342 #define PCI_SUB_HPC_ID3                 0xA2F9
 343 #define PCI_SUB_HPC_ID_INTC             0xA2FA
 344 #define PCI_SUB_HPC_ID4                 0xA2FD
 345
 346 #define INT_BUTTON_IGNORE               0
 347 #define INT_PRESENCE_ON                 1
 348 #define INT_PRESENCE_OFF                2
 349 #define INT_SWITCH_CLOSE                3
 350 #define INT_SWITCH_OPEN                 4
 351 #define INT_POWER_FAULT                 5
 352 #define INT_POWER_FAULT_CLEAR           6
 353 #define INT_BUTTON_PRESS                7
 354 #define INT_BUTTON_RELEASE              8
 355 #define INT_BUTTON_CANCEL               9
 356
 357 #define STATIC_STATE                    0
 358 #define BLINKINGON_STATE                1
 359 #define BLINKINGOFF_STATE               2
 360 #define POWERON_STATE                   3
 361 #define POWEROFF_STATE                  4
 362
 363 #define PCISLOT_INTERLOCK_CLOSED        0x00000001
 364 #define PCISLOT_ADAPTER_PRESENT         0x00000002
 365 #define PCISLOT_POWERED                 0x00000004
 366 #define PCISLOT_66_MHZ_OPERATION        0x00000008
 367 #define PCISLOT_64_BIT_OPERATION        0x00000010
 368 #define PCISLOT_REPLACE_SUPPORTED       0x00000020
 369 #define PCISLOT_ADD_SUPPORTED           0x00000040
 370 #define PCISLOT_INTERLOCK_SUPPORTED     0x00000080
 371 #define PCISLOT_66_MHZ_SUPPORTED        0x00000100
 372 #define PCISLOT_64_BIT_SUPPORTED        0x00000200
 373
 374 #define PCI_TO_PCI_BRIDGE_CLASS         0x00060400
 375
 376 #define INTERLOCK_OPEN                  0x00000002
 377 #define ADD_NOT_SUPPORTED               0x00000003
 378 #define CARD_FUNCTIONING                0x00000005
 379 #define ADAPTER_NOT_SAME                0x00000006
 380 #define NO_ADAPTER_PRESENT              0x00000009
 381 #define NOT_ENOUGH_RESOURCES            0x0000000B
 382 #define DEVICE_TYPE_NOT_SUPPORTED       0x0000000C
 383 #define POWER_FAILURE                   0x0000000E
 384
 385 #define REMOVE_NOT_SUPPORTED            0x00000003
 386
 387
 388 /*
 389  * error Messages
 390  */
 391 #define msg_initialization_err  "Initialization failure, error=%d\n"
 392 #define msg_HPC_rev_error       "Unsupported revision of the PCI hot plug controller found.\n"
 393 #define msg_HPC_non_compaq_or_intel     "The PCI hot plug controller is not supported by this driver.\n"
 394 #define msg_HPC_not_supported   "this system is not supported by this version of cpqphpd. Upgrade to a newer version of cpqphpd\n"
 395 #define msg_unable_to_save      "unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
 396 #define msg_button_on           "PCI slot #%d - powering on due to button press.\n"
 397 #define msg_button_off          "PCI slot #%d - powering off due to button press.\n"
 398 #define msg_button_cancel       "PCI slot #%d - action canceled due to button press.\n"
 399 #define msg_button_ignore       "PCI slot #%d - button press ignored.  (action in progress...)\n"
 400
 401
 402 /* sysfs functions for the hotplug controller info */
 403 extern void cpqhp_create_ctrl_files             (struct controller *ctrl);
 404
 405 /* controller functions */
 406 extern void     cpqhp_pushbutton_thread         (unsigned long event_pointer);
 407 extern irqreturn_t cpqhp_ctrl_intr              (int IRQ, void *data, struct pt_regs *regs);
 408 extern int      cpqhp_find_available_resources  (struct controller *ctrl, void *rom_start);
 409 extern int      cpqhp_event_start_thread        (void);
 410 extern void     cpqhp_event_stop_thread         (void);
 411 extern struct pci_func *cpqhp_slot_create       (unsigned char busnumber);
 412 extern struct pci_func *cpqhp_slot_find         (unsigned char bus, unsigned char device, unsigned char index);
 413 extern int      cpqhp_process_SI                (struct controller *ctrl, struct pci_func *func);
 414 extern int      cpqhp_process_SS                (struct controller *ctrl, struct pci_func *func);
 415 extern int      cpqhp_hardware_test             (struct controller *ctrl, int test_num);
 416
 417 /* resource functions */
 418 extern int      cpqhp_resource_sort_and_combine (struct pci_resource **head);
 419
 420 /* pci functions */
 421 extern int      cpqhp_set_irq                   (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
 422 extern int      cpqhp_get_bus_dev               (struct controller *ctrl, u8 *bus_num, u8 *dev_num, u8 slot);
 423 extern int      cpqhp_save_config               (struct controller *ctrl, int busnumber, int is_hot_plug);
 424 extern int      cpqhp_save_base_addr_length     (struct controller *ctrl, struct pci_func * func);
 425 extern int      cpqhp_save_used_resources       (struct controller *ctrl, struct pci_func * func);
 426 extern int      cpqhp_configure_board           (struct controller *ctrl, struct pci_func * func);
 427 extern int      cpqhp_save_slot_config          (struct controller *ctrl, struct pci_func * new_slot);
 428 extern int      cpqhp_valid_replace             (struct controller *ctrl, struct pci_func * func);
 429 extern void     cpqhp_destroy_board_resources   (struct pci_func * func);
 430 extern int      cpqhp_return_board_resources    (struct pci_func * func, struct resource_lists * resources);
 431 extern void     cpqhp_destroy_resource_list     (struct resource_lists * resources);
 432 extern int      cpqhp_configure_device          (struct controller* ctrl, struct pci_func* func);
 433 extern int      cpqhp_unconfigure_device        (struct pci_func* func);
 434
 435 /* Global variables */
 436 extern int cpqhp_debug;
 437 extern int cpqhp_legacy_mode;
 438 extern struct controller *cpqhp_ctrl_list;
 439 extern struct pci_func *cpqhp_slot_list[256];
 440
 441 /* these can be gotten rid of, but for debugging they are purty */
 442 extern u8 cpqhp_nic_irq;
 443 extern u8 cpqhp_disk_irq;
 444
 445
 446 /* inline functions */
 447
 448 /*
 449  * return_resource
 450  *
 451  * Puts node back in the resource list pointed to by head
 452  *
 453  */
 454 static inline void return_resource(struct pci_resource **head, struct pci_resource *node)
 455 {
 456         if (!node || !head)
 457                 return;
 458         node->next = *head;
 459         *head = node;
 460 }
 461
 462 static inline void set_SOGO(struct controller *ctrl)
 463 {
 464         u16 misc;
 465
 466         misc = readw(ctrl->hpc_reg + MISC);
 467         misc = (misc | 0x0001) & 0xFFFB;
 468         writew(misc, ctrl->hpc_reg + MISC);
 469 }
 470
 471
 472 static inline void amber_LED_on(struct controller *ctrl, u8 slot)
 473 {
 474         u32 led_control;
 475
 476         led_control = readl(ctrl->hpc_reg + LED_CONTROL);
 477         led_control |= (0x01010000L << slot);
 478         writel(led_control, ctrl->hpc_reg + LED_CONTROL);
 479 }
 480
 481
 482 static inline void amber_LED_off(struct controller *ctrl, u8 slot)
 483 {
 484         u32 led_control;
 485
 486         led_control = readl(ctrl->hpc_reg + LED_CONTROL);
 487         led_control &= ~(0x01010000L << slot);
 488         writel(led_control, ctrl->hpc_reg + LED_CONTROL);
 489 }
 490
 491
 492 static inline int read_amber_LED(struct controller *ctrl, u8 slot)
 493 {
 494         u32 led_control;
 495
 496         led_control = readl(ctrl->hpc_reg + LED_CONTROL);
 497         led_control &= (0x01010000L << slot);
 498
 499         return led_control ? 1 : 0;
 500 }
 501
 502
 503 static inline void green_LED_on(struct controller *ctrl, u8 slot)
 504 {
 505         u32 led_control;
 506
 507         led_control = readl(ctrl->hpc_reg + LED_CONTROL);
 508         led_control |= 0x0101L << slot;
 509         writel(led_control, ctrl->hpc_reg + LED_CONTROL);
 510 }
 511
 512 static inline void green_LED_off(struct controller *ctrl, u8 slot)
 513 {
 514         u32 led_control;
 515
 516         led_control = readl(ctrl->hpc_reg + LED_CONTROL);
 517         led_control &= ~(0x0101L << slot);
 518         writel(led_control, ctrl->hpc_reg + LED_CONTROL);
 519 }
 520
 521
 522 static inline void green_LED_blink(struct controller *ctrl, u8 slot)
 523 {
 524         u32 led_control;
 525
 526         led_control = readl(ctrl->hpc_reg + LED_CONTROL);
 527         led_control &= ~(0x0101L << slot);
 528         led_control |= (0x0001L << slot);
 529         writel(led_control, ctrl->hpc_reg + LED_CONTROL);
 530 }
 531
 532
 533 static inline void slot_disable(struct controller *ctrl, u8 slot)
 534 {
 535         u8 slot_enable;
 536
 537         slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
 538         slot_enable &= ~(0x01 << slot);
 539         writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
 540 }
 541
 542
 543 static inline void slot_enable(struct controller *ctrl, u8 slot)
 544 {
 545         u8 slot_enable;
 546
 547         slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
 548         slot_enable |= (0x01 << slot);
 549         writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
 550 }
 551
 552
 553 static inline u8 is_slot_enabled(struct controller *ctrl, u8 slot)
 554 {
 555         u8 slot_enable;
 556
 557         slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
 558         slot_enable &= (0x01 << slot);
 559         return slot_enable ? 1 : 0;
 560 }
 561
 562
 563 static inline u8 read_slot_enable(struct controller *ctrl)
 564 {
 565         return readb(ctrl->hpc_reg + SLOT_ENABLE);
 566 }
 567
 568
 569 /*
 570  * get_controller_speed - find the current frequency/mode of controller.
 571  *
 572  * @ctrl: controller to get frequency/mode for.
 573  *
 574  * Returns controller speed.
 575  *
 576  */
 577 static inline u8 get_controller_speed(struct controller *ctrl)
 578 {
 579         u8 curr_freq;
 580         u16 misc;
 581
 582         if (ctrl->pcix_support) {
 583                 curr_freq = readb(ctrl->hpc_reg + NEXT_CURR_FREQ);
 584                 if ((curr_freq & 0xB0) == 0xB0)
 585                         return PCI_SPEED_133MHz_PCIX;
 586                 if ((curr_freq & 0xA0) == 0xA0)
 587                         return PCI_SPEED_100MHz_PCIX;
 588                 if ((curr_freq & 0x90) == 0x90)
 589                         return PCI_SPEED_66MHz_PCIX;
 590                 if (curr_freq & 0x10)
 591                         return PCI_SPEED_66MHz;
 592
 593                 return PCI_SPEED_33MHz;
 594         }
 595
 596         misc = readw(ctrl->hpc_reg + MISC);
 597         return (misc & 0x0800) ? PCI_SPEED_66MHz : PCI_SPEED_33MHz;
 598 }
 599
 600
 601 /*
 602  * get_adapter_speed - find the max supported frequency/mode of adapter.
 603  *
 604  * @ctrl: hotplug controller.
 605  * @hp_slot: hotplug slot where adapter is installed.
 606  *
 607  * Returns adapter speed.
 608  *
 609  */
 610 static inline u8 get_adapter_speed(struct controller *ctrl, u8 hp_slot)
 611 {
 612         u32 temp_dword = readl(ctrl->hpc_reg + NON_INT_INPUT);
 613         dbg("slot: %d, PCIXCAP: %8x\n", hp_slot, temp_dword);
 614         if (ctrl->pcix_support) {
 615                 if (temp_dword & (0x10000 << hp_slot))
 616                         return PCI_SPEED_133MHz_PCIX;
 617                 if (temp_dword & (0x100 << hp_slot))
 618                         return PCI_SPEED_66MHz_PCIX;
 619         }
 620
 621         if (temp_dword & (0x01 << hp_slot))
 622                 return PCI_SPEED_66MHz;
 623
 624         return PCI_SPEED_33MHz;
 625 }
 626
 627 static inline void enable_slot_power(struct controller *ctrl, u8 slot)
 628 {
 629         u8 slot_power;
 630
 631         slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
 632         slot_power |= (0x01 << slot);
 633         writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
 634 }
 635
 636 static inline void disable_slot_power(struct controller *ctrl, u8 slot)
 637 {
 638         u8 slot_power;
 639
 640         slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
 641         slot_power &= ~(0x01 << slot);
 642         writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
 643 }
 644
 645
 646 static inline int cpq_get_attention_status(struct controller *ctrl, struct slot *slot)
 647 {
 648         u8 hp_slot;
 649
 650         hp_slot = slot->device - ctrl->slot_device_offset;
 651
 652         return read_amber_LED(ctrl, hp_slot);
 653 }
 654
 655
 656 static inline int get_slot_enabled(struct controller *ctrl, struct slot *slot)
 657 {
 658         u8 hp_slot;
 659
 660         hp_slot = slot->device - ctrl->slot_device_offset;
 661
 662         return is_slot_enabled(ctrl, hp_slot);
 663 }
 664
 665
 666 static inline int cpq_get_latch_status(struct controller *ctrl, struct slot *slot)
 667 {
 668         u32 status;
 669         u8 hp_slot;
 670
 671         hp_slot = slot->device - ctrl->slot_device_offset;
 672         dbg("%s: slot->device = %d, ctrl->slot_device_offset = %d \n",
 673             __FUNCTION__, slot->device, ctrl->slot_device_offset);
 674
 675         status = (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot));
 676
 677         return(status == 0) ? 1 : 0;
 678 }
 679
 680
 681 static inline int get_presence_status(struct controller *ctrl, struct slot *slot)
 682 {
 683         int presence_save = 0;
 684         u8 hp_slot;
 685         u32 tempdword;
 686
 687         hp_slot = slot->device - ctrl->slot_device_offset;
 688
 689         tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
 690         presence_save = (int) ((((~tempdword) >> 23) | ((~tempdword) >> 15)) >> hp_slot) & 0x02;
 691
 692         return presence_save;
 693 }
 694
 695 #define SLOT_NAME_SIZE 10
 696
 697 static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot)
 698 {
 699         snprintf(buffer, buffer_size, "%d", slot->number);
 700 }
 701
 702
 703 static inline int wait_for_ctrl_irq(struct controller *ctrl)
 704 {
 705         DECLARE_WAITQUEUE(wait, current);
 706         int retval = 0;
 707
 708         dbg("%s - start\n", __FUNCTION__);
 709         add_wait_queue(&ctrl->queue, &wait);
 710         set_current_state(TASK_INTERRUPTIBLE);
 711         /* Sleep for up to 1 second to wait for the LED to change. */
 712         schedule_timeout(1*HZ);
 713         remove_wait_queue(&ctrl->queue, &wait);
 714         if (signal_pending(current))
 715                 retval =  -EINTR;
 716
 717         dbg("%s - end\n", __FUNCTION__);
 718         return retval;
 719 }
 720
 721 #endif
 722