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MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / drivers / net / tlan.c
blob6454331093e67b4c2c744033b1baf5e50dc1d5af
1 /*******************************************************************************
2 *
3 * Linux ThunderLAN Driver
4 *
5 * tlan.c
6 * by James Banks
7 *
8 * (C) 1997-1998 Caldera, Inc.
9 * (C) 1998 James Banks
10 * (C) 1999-2001 Torben Mathiasen
11 * (C) 2002 Samuel Chessman
12 *
13 * This software may be used and distributed according to the terms
14 * of the GNU General Public License, incorporated herein by reference.
15 *
16 ** This file is best viewed/edited with columns>=132.
17 *
18 ** Useful (if not required) reading:
19 *
20 * Texas Instruments, ThunderLAN Programmer's Guide,
21 * TI Literature Number SPWU013A
22 * available in PDF format from www.ti.com
23 * Level One, LXT901 and LXT970 Data Sheets
24 * available in PDF format from www.level1.com
25 * National Semiconductor, DP83840A Data Sheet
26 * available in PDF format from www.national.com
27 * Microchip Technology, 24C01A/02A/04A Data Sheet
28 * available in PDF format from www.microchip.com
29 *
30 * Change History
31 *
32 * Tigran Aivazian <tigran@sco.com>: TLan_PciProbe() now uses
33 * new PCI BIOS interface.
34 * Alan Cox <alan@redhat.com>: Fixed the out of memory
35 * handling.
36 *
37 * Torben Mathiasen <torben.mathiasen@compaq.com> New Maintainer!
38 *
39 * v1.1 Dec 20, 1999 - Removed linux version checking
40 * Patch from Tigran Aivazian.
41 * - v1.1 includes Alan's SMP updates.
42 * - We still have problems on SMP though,
43 * but I'm looking into that.
44 *
45 * v1.2 Jan 02, 2000 - Hopefully fixed the SMP deadlock.
46 * - Removed dependency of HZ being 100.
47 * - We now allow higher priority timers to
48 * overwrite timers like TLAN_TIMER_ACTIVITY
49 * Patch from John Cagle <john.cagle@compaq.com>.
50 * - Fixed a few compiler warnings.
51 *
52 * v1.3 Feb 04, 2000 - Fixed the remaining HZ issues.
53 * - Removed call to pci_present().
54 * - Removed SA_INTERRUPT flag from irq handler.
55 * - Added __init and __initdata to reduce resisdent
56 * code size.
57 * - Driver now uses module_init/module_exit.
58 * - Rewrote init_module and tlan_probe to
59 * share a lot more code. We now use tlan_probe
60 * with builtin and module driver.
61 * - Driver ported to new net API.
62 * - tlan.txt has been reworked to reflect current
63 * driver (almost)
64 * - Other minor stuff
65 *
66 * v1.4 Feb 10, 2000 - Updated with more changes required after Dave's
67 * network cleanup in 2.3.43pre7 (Tigran & myself)
68 * - Minor stuff.
69 *
70 * v1.5 March 22, 2000 - Fixed another timer bug that would hang the driver
71 * if no cable/link were present.
72 * - Cosmetic changes.
73 * - TODO: Port completely to new PCI/DMA API
74 * Auto-Neg fallback.
75 *
76 * v1.6 April 04, 2000 - Fixed driver support for kernel-parameters. Haven't
77 * tested it though, as the kernel support is currently
78 * broken (2.3.99p4p3).
79 * - Updated tlan.txt accordingly.
80 * - Adjusted minimum/maximum frame length.
81 * - There is now a TLAN website up at
82 * http://tlan.kernel.dk
83 *
84 * v1.7 April 07, 2000 - Started to implement custom ioctls. Driver now
85 * reports PHY information when used with Donald
86 * Beckers userspace MII diagnostics utility.
87 *
88 * v1.8 April 23, 2000 - Fixed support for forced speed/duplex settings.
89 * - Added link information to Auto-Neg and forced
90 * modes. When NIC operates with auto-neg the driver
91 * will report Link speed & duplex modes as well as
92 * link partner abilities. When forced link is used,
93 * the driver will report status of the established
94 * link.
95 * Please read tlan.txt for additional information.
96 * - Removed call to check_region(), and used
97 * return value of request_region() instead.
98 *
99 * v1.8a May 28, 2000 - Minor updates.
100 *
101 * v1.9 July 25, 2000 - Fixed a few remaining Full-Duplex issues.
102 * - Updated with timer fixes from Andrew Morton.
103 * - Fixed module race in TLan_Open.
104 * - Added routine to monitor PHY status.
105 * - Added activity led support for Proliant devices.
106 *
107 * v1.10 Aug 30, 2000 - Added support for EISA based tlan controllers
108 * like the Compaq NetFlex3/E.
109 * - Rewrote tlan_probe to better handle multiple
110 * bus probes. Probing and device setup is now
111 * done through TLan_Probe and TLan_init_one. Actual
112 * hardware probe is done with kernel API and
113 * TLan_EisaProbe.
114 * - Adjusted debug information for probing.
115 * - Fixed bug that would cause general debug information
116 * to be printed after driver removal.
117 * - Added transmit timeout handling.
118 * - Fixed OOM return values in tlan_probe.
119 * - Fixed possible mem leak in tlan_exit
120 * (now tlan_remove_one).
121 * - Fixed timer bug in TLan_phyMonitor.
122 * - This driver version is alpha quality, please
123 * send me any bug issues you may encounter.
124 *
125 * v1.11 Aug 31, 2000 - Do not try to register irq 0 if no irq line was
126 * set for EISA cards.
127 * - Added support for NetFlex3/E with nibble-rate
128 * 10Base-T PHY. This is untestet as I haven't got
129 * one of these cards.
130 * - Fixed timer being added twice.
131 * - Disabled PhyMonitoring by default as this is
132 * work in progress. Define MONITOR to enable it.
133 * - Now we don't display link info with PHYs that
134 * doesn't support it (level1).
135 * - Incresed tx_timeout beacuse of auto-neg.
136 * - Adjusted timers for forced speeds.
137 *
138 * v1.12 Oct 12, 2000 - Minor fixes (memleak, init, etc.)
139 *
140 * v1.13 Nov 28, 2000 - Stop flooding console with auto-neg issues
141 * when link can't be established.
142 * - Added the bbuf option as a kernel parameter.
143 * - Fixed ioaddr probe bug.
144 * - Fixed stupid deadlock with MII interrupts.
145 * - Added support for speed/duplex selection with
146 * multiple nics.
147 * - Added partly fix for TX Channel lockup with
148 * TLAN v1.0 silicon. This needs to be investigated
149 * further.
150 *
151 * v1.14 Dec 16, 2000 - Added support for servicing multiple frames per.
152 * interrupt. Thanks goes to
153 * Adam Keys <adam@ti.com>
154 * Denis Beaudoin <dbeaudoin@ti.com>
155 * for providing the patch.
156 * - Fixed auto-neg output when using multiple
157 * adapters.
158 * - Converted to use new taskq interface.
159 *
160 * v1.14a Jan 6, 2001 - Minor adjustments (spinlocks, etc.)
161 *
162 * Samuel Chessman <chessman@tux.org> New Maintainer!
163 *
164 * v1.15 Apr 4, 2002 - Correct operation when aui=1 to be
165 * 10T half duplex no loopback
166 * Thanks to Gunnar Eikman
167 *******************************************************************************/
168
169 #include <linux/module.h>
170 #include <linux/init.h>
171 #include <linux/ioport.h>
172 #include <linux/eisa.h>
173 #include <linux/pci.h>
174 #include <linux/netdevice.h>
175 #include <linux/etherdevice.h>
176 #include <linux/delay.h>
177 #include <linux/spinlock.h>
178 #include <linux/workqueue.h>
179 #include <linux/mii.h>
180
181 #include "tlan.h"
182
183 typedef u32 (TLanIntVectorFunc)( struct net_device *, u16 );
184
185
186 /* For removing EISA devices */
187 static struct net_device *TLan_Eisa_Devices;
188
189 static int TLanDevicesInstalled;
190
191 /* Set speed, duplex and aui settings */
192 static int aui[MAX_TLAN_BOARDS];
193 static int duplex[MAX_TLAN_BOARDS];
194 static int speed[MAX_TLAN_BOARDS];
195 static int boards_found;
196
197 MODULE_AUTHOR("Maintainer: Samuel Chessman <chessman@tux.org>");
198 MODULE_DESCRIPTION("Driver for TI ThunderLAN based ethernet PCI adapters");
199 MODULE_LICENSE("GPL");
200
201 MODULE_PARM(aui, "1-" __MODULE_STRING(MAX_TLAN_BOARDS) "i");
202 MODULE_PARM(duplex, "1-" __MODULE_STRING(MAX_TLAN_BOARDS) "i");
203 MODULE_PARM(speed, "1-" __MODULE_STRING(MAX_TLAN_BOARDS) "i");
204 MODULE_PARM(debug, "i");
205 MODULE_PARM(bbuf, "i");
206 MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)");
207 MODULE_PARM_DESC(duplex, "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)");
208 MODULE_PARM_DESC(speed, "ThunderLAN port speen setting(s) (0,10,100)");
209 MODULE_PARM_DESC(debug, "ThunderLAN debug mask");
210 MODULE_PARM_DESC(bbuf, "ThunderLAN use big buffer (0-1)");
211
212 /* Define this to enable Link beat monitoring */
213 #undef MONITOR
214
215 /* Turn on debugging. See Documentation/networking/tlan.txt for details */
216 static int debug;
217
218 static int bbuf;
219 static u8 *TLanPadBuffer;
220 static dma_addr_t TLanPadBufferDMA;
221 static char TLanSignature[] = "TLAN";
222 static const char tlan_banner[] = "ThunderLAN driver v1.15\n";
223 static int tlan_have_pci;
224 static int tlan_have_eisa;
225
226 const char *media[] = {
227 "10BaseT-HD ", "10BaseT-FD ","100baseTx-HD ",
228 "100baseTx-FD", "100baseT4", NULL
229 };
230
231 int media_map[] = { 0x0020, 0x0040, 0x0080, 0x0100, 0x0200,};
232
233 static struct board {
234 const char *deviceLabel;
235 u32 flags;
236 u16 addrOfs;
237 } board_info[] = {
238 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
239 { "Compaq Netelligent 10/100 TX PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
240 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
241 { "Compaq NetFlex-3/P", TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
242 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
243 { "Compaq Netelligent Integrated 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
244 { "Compaq Netelligent Dual 10/100 TX PCI UTP", TLAN_ADAPTER_NONE, 0x83 },
245 { "Compaq Netelligent 10/100 TX Embedded UTP", TLAN_ADAPTER_NONE, 0x83 },
246 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 },
247 { "Olicom OC-2325", TLAN_ADAPTER_UNMANAGED_PHY, 0xF8 },
248 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xF8 },
249 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
250 { "Compaq Netelligent 10 T/2 PCI UTP/Coax", TLAN_ADAPTER_NONE, 0x83 },
251 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */
252 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
253 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */
254 };
255
256 static struct pci_device_id tlan_pci_tbl[] = {
257 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10,
258 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
259 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100,
260 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
261 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3I,
262 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
263 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_THUNDER,
264 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
265 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3B,
266 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
267 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100PI,
268 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
269 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100D,
270 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
271 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100I,
272 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
273 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2183,
274 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
275 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2325,
276 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
277 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2326,
278 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
279 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100,
280 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
281 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_T2,
282 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
283 { 0,}
284 };
285 MODULE_DEVICE_TABLE(pci, tlan_pci_tbl);
286
287 static void TLan_EisaProbe( void );
288 static void TLan_Eisa_Cleanup( void );
289 static int TLan_Init( struct net_device * );
290 static int TLan_Open( struct net_device *dev );
291 static int TLan_StartTx( struct sk_buff *, struct net_device *);
292 static irqreturn_t TLan_HandleInterrupt( int, void *, struct pt_regs *);
293 static int TLan_Close( struct net_device *);
294 static struct net_device_stats *TLan_GetStats( struct net_device *);
295 static void TLan_SetMulticastList( struct net_device *);
296 static int TLan_ioctl( struct net_device *dev, struct ifreq *rq, int cmd);
297 static int TLan_probe1( struct pci_dev *pdev, long ioaddr, int irq, int rev, const struct pci_device_id *ent);
298 static void TLan_tx_timeout( struct net_device *dev);
299 static int tlan_init_one( struct pci_dev *pdev, const struct pci_device_id *ent);
300
301 static u32 TLan_HandleInvalid( struct net_device *, u16 );
302 static u32 TLan_HandleTxEOF( struct net_device *, u16 );
303 static u32 TLan_HandleStatOverflow( struct net_device *, u16 );
304 static u32 TLan_HandleRxEOF( struct net_device *, u16 );
305 static u32 TLan_HandleDummy( struct net_device *, u16 );
306 static u32 TLan_HandleTxEOC( struct net_device *, u16 );
307 static u32 TLan_HandleStatusCheck( struct net_device *, u16 );
308 static u32 TLan_HandleRxEOC( struct net_device *, u16 );
309
310 static void TLan_Timer( unsigned long );
311
312 static void TLan_ResetLists( struct net_device * );
313 static void TLan_FreeLists( struct net_device * );
314 static void TLan_PrintDio( u16 );
315 static void TLan_PrintList( TLanList *, char *, int );
316 static void TLan_ReadAndClearStats( struct net_device *, int );
317 static void TLan_ResetAdapter( struct net_device * );
318 static void TLan_FinishReset( struct net_device * );
319 static void TLan_SetMac( struct net_device *, int areg, char *mac );
320
321 static void TLan_PhyPrint( struct net_device * );
322 static void TLan_PhyDetect( struct net_device * );
323 static void TLan_PhyPowerDown( struct net_device * );
324 static void TLan_PhyPowerUp( struct net_device * );
325 static void TLan_PhyReset( struct net_device * );
326 static void TLan_PhyStartLink( struct net_device * );
327 static void TLan_PhyFinishAutoNeg( struct net_device * );
328 #ifdef MONITOR
329 static void TLan_PhyMonitor( struct net_device * );
330 #endif
331
332 /*
333 static int TLan_PhyNop( struct net_device * );
334 static int TLan_PhyInternalCheck( struct net_device * );
335 static int TLan_PhyInternalService( struct net_device * );
336 static int TLan_PhyDp83840aCheck( struct net_device * );
337 */
338
339 static int TLan_MiiReadReg( struct net_device *, u16, u16, u16 * );
340 static void TLan_MiiSendData( u16, u32, unsigned );
341 static void TLan_MiiSync( u16 );
342 static void TLan_MiiWriteReg( struct net_device *, u16, u16, u16 );
343
344 static void TLan_EeSendStart( u16 );
345 static int TLan_EeSendByte( u16, u8, int );
346 static void TLan_EeReceiveByte( u16, u8 *, int );
347 static int TLan_EeReadByte( struct net_device *, u8, u8 * );
348
349
350 static void
351 TLan_StoreSKB( struct tlan_list_tag *tag, struct sk_buff *skb)
352 {
353 unsigned long addr = (unsigned long)skb;
354 tag->buffer[9].address = (u32)addr;
355 addr >>= 31; /* >>= 32 is undefined for 32bit arch, stupid C */
356 addr >>= 1;
357 tag->buffer[8].address = (u32)addr;
358 }
359
360 static struct sk_buff *
361 TLan_GetSKB( struct tlan_list_tag *tag)
362 {
363 unsigned long addr = tag->buffer[8].address;
364 addr <<= 31;
365 addr <<= 1;
366 addr |= tag->buffer[9].address;
367 return (struct sk_buff *) addr;
368 }
369
370
371 static TLanIntVectorFunc *TLanIntVector[TLAN_INT_NUMBER_OF_INTS] = {
372 TLan_HandleInvalid,
373 TLan_HandleTxEOF,
374 TLan_HandleStatOverflow,
375 TLan_HandleRxEOF,
376 TLan_HandleDummy,
377 TLan_HandleTxEOC,
378 TLan_HandleStatusCheck,
379 TLan_HandleRxEOC
380 };
381
382 static inline void
383 TLan_SetTimer( struct net_device *dev, u32 ticks, u32 type )
384 {
385 TLanPrivateInfo *priv = dev->priv;
386 unsigned long flags = 0;
387
388 if (!in_irq())
389 spin_lock_irqsave(&priv->lock, flags);
390 if ( priv->timer.function != NULL &&
391 priv->timerType != TLAN_TIMER_ACTIVITY ) {
392 if (!in_irq())
393 spin_unlock_irqrestore(&priv->lock, flags);
394 return;
395 }
396 priv->timer.function = &TLan_Timer;
397 if (!in_irq())
398 spin_unlock_irqrestore(&priv->lock, flags);
399
400 priv->timer.data = (unsigned long) dev;
401 priv->timerSetAt = jiffies;
402 priv->timerType = type;
403 mod_timer(&priv->timer, jiffies + ticks);
404
405 } /* TLan_SetTimer */
406
407
408 /*****************************************************************************
409 ******************************************************************************
410
411 ThunderLAN Driver Primary Functions
412
413 These functions are more or less common to all Linux network drivers.
414
415 ******************************************************************************
416 *****************************************************************************/
417
418
419
420
421
422 /***************************************************************
423 * tlan_remove_one
424 *
425 * Returns:
426 * Nothing
427 * Parms:
428 * None
429 *
430 * Goes through the TLanDevices list and frees the device
431 * structs and memory associated with each device (lists
432 * and buffers). It also ureserves the IO port regions
433 * associated with this device.
434 *
435 **************************************************************/
436
437
438 static void __devexit tlan_remove_one( struct pci_dev *pdev)
439 {
440 struct net_device *dev = pci_get_drvdata( pdev );
441 TLanPrivateInfo *priv = dev->priv;
442
443 unregister_netdev( dev );
444
445 if ( priv->dmaStorage ) {
446 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA );
447 }
448
449 #ifdef CONFIG_PCI
450 pci_release_regions(pdev);
451 #endif
452
453 free_netdev( dev );
454
455 pci_set_drvdata( pdev, NULL );
456 }
457
458 static struct pci_driver tlan_driver = {
459 .name = "tlan",
460 .id_table = tlan_pci_tbl,
461 .probe = tlan_init_one,
462 .remove = __devexit_p(tlan_remove_one),
463 };
464
465 static int __init tlan_probe(void)
466 {
467 static int pad_allocated;
468
469 printk(KERN_INFO "%s", tlan_banner);
470
471 TLanPadBuffer = (u8 *) pci_alloc_consistent(NULL, TLAN_MIN_FRAME_SIZE, &TLanPadBufferDMA);
472
473 if (TLanPadBuffer == NULL) {
474 printk(KERN_ERR "TLAN: Could not allocate memory for pad buffer.\n");
475 return -ENOMEM;
476 }
477
478 memset(TLanPadBuffer, 0, TLAN_MIN_FRAME_SIZE);
479 pad_allocated = 1;
480
481 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting PCI Probe....\n");
482
483 /* Use new style PCI probing. Now the kernel will
484 do most of this for us */
485 pci_register_driver(&tlan_driver);
486
487 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting EISA Probe....\n");
488 TLan_EisaProbe();
489
490 printk(KERN_INFO "TLAN: %d device%s installed, PCI: %d EISA: %d\n",
491 TLanDevicesInstalled, TLanDevicesInstalled == 1 ? "" : "s",
492 tlan_have_pci, tlan_have_eisa);
493
494 if (TLanDevicesInstalled == 0) {
495 pci_unregister_driver(&tlan_driver);
496 pci_free_consistent(NULL, TLAN_MIN_FRAME_SIZE, TLanPadBuffer, TLanPadBufferDMA);
497 return -ENODEV;
498 }
499 return 0;
500 }
501
502
503 static int __devinit tlan_init_one( struct pci_dev *pdev,
504 const struct pci_device_id *ent)
505 {
506 return TLan_probe1( pdev, -1, -1, 0, ent);
507 }
508
509
510 /*
511 ***************************************************************
512 * tlan_probe1
513 *
514 * Returns:
515 * 0 on success, error code on error
516 * Parms:
517 * none
518 *
519 * The name is lower case to fit in with all the rest of
520 * the netcard_probe names. This function looks for
521 * another TLan based adapter, setting it up with the
522 * allocated device struct if one is found.
523 * tlan_probe has been ported to the new net API and
524 * now allocates its own device structure. This function
525 * is also used by modules.
526 *
527 **************************************************************/
528
529 static int __devinit TLan_probe1(struct pci_dev *pdev,
530 long ioaddr, int irq, int rev, const struct pci_device_id *ent )
531 {
532
533 struct net_device *dev;
534 TLanPrivateInfo *priv;
535 u8 pci_rev;
536 u16 device_id;
537 int reg, rc = -ENODEV;
538
539 if (pdev) {
540 rc = pci_enable_device(pdev);
541 if (rc)
542 return rc;
543
544 rc = pci_request_regions(pdev, TLanSignature);
545 if (rc) {
546 printk(KERN_ERR "TLAN: Could not reserve IO regions\n");
547 goto err_out;
548 }
549 }
550
551 dev = alloc_etherdev(sizeof(TLanPrivateInfo));
552 if (dev == NULL) {
553 printk(KERN_ERR "TLAN: Could not allocate memory for device.\n");
554 rc = -ENOMEM;
555 goto err_out_regions;
556 }
557 SET_MODULE_OWNER(dev);
558 SET_NETDEV_DEV(dev, &pdev->dev);
559
560 priv = dev->priv;
561
562 priv->pciDev = pdev;
563
564 /* Is this a PCI device? */
565 if (pdev) {
566 u32 pci_io_base = 0;
567
568 priv->adapter = &board_info[ent->driver_data];
569
570 rc = pci_set_dma_mask(pdev, 0xFFFFFFFF);
571 if (rc) {
572 printk(KERN_ERR "TLAN: No suitable PCI mapping available.\n");
573 goto err_out_free_dev;
574 }
575
576 pci_read_config_byte ( pdev, PCI_REVISION_ID, &pci_rev);
577
578 for ( reg= 0; reg <= 5; reg ++ ) {
579 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) {
580 pci_io_base = pci_resource_start(pdev, reg);
581 TLAN_DBG( TLAN_DEBUG_GNRL, "IO mapping is available at %x.\n",
582 pci_io_base);
583 break;
584 }
585 }
586 if (!pci_io_base) {
587 printk(KERN_ERR "TLAN: No IO mappings available\n");
588 rc = -EIO;
589 goto err_out_free_dev;
590 }
591
592 dev->base_addr = pci_io_base;
593 dev->irq = pdev->irq;
594 priv->adapterRev = pci_rev;
595 pci_set_master(pdev);
596 pci_set_drvdata(pdev, dev);
597
598 } else { /* EISA card */
599 /* This is a hack. We need to know which board structure
600 * is suited for this adapter */
601 device_id = inw(ioaddr + EISA_ID2);
602 priv->is_eisa = 1;
603 if (device_id == 0x20F1) {
604 priv->adapter = &board_info[13]; /* NetFlex-3/E */
605 priv->adapterRev = 23; /* TLAN 2.3 */
606 } else {
607 priv->adapter = &board_info[14];
608 priv->adapterRev = 10; /* TLAN 1.0 */
609 }
610 dev->base_addr = ioaddr;
611 dev->irq = irq;
612 }
613
614 /* Kernel parameters */
615 if (dev->mem_start) {
616 priv->aui = dev->mem_start & 0x01;
617 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0 : (dev->mem_start & 0x06) >> 1;
618 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0 : (dev->mem_start & 0x18) >> 3;
619
620 if (priv->speed == 0x1) {
621 priv->speed = TLAN_SPEED_10;
622 } else if (priv->speed == 0x2) {
623 priv->speed = TLAN_SPEED_100;
624 }
625 debug = priv->debug = dev->mem_end;
626 } else {
627 priv->aui = aui[boards_found];
628 priv->speed = speed[boards_found];
629 priv->duplex = duplex[boards_found];
630 priv->debug = debug;
631 }
632
633 /* This will be used when we get an adapter error from
634 * within our irq handler */
635 INIT_WORK(&priv->tlan_tqueue, (void *)(void*)TLan_tx_timeout, dev);
636
637 spin_lock_init(&priv->lock);
638
639 rc = TLan_Init(dev);
640 if (rc) {
641 printk(KERN_ERR "TLAN: Could not set up device.\n");
642 goto err_out_free_dev;
643 }
644
645 rc = register_netdev(dev);
646 if (rc) {
647 printk(KERN_ERR "TLAN: Could not register device.\n");
648 goto err_out_uninit;
649 }
650
651
652 TLanDevicesInstalled++;
653 boards_found++;
654
655 /* pdev is NULL if this is an EISA device */
656 if (pdev)
657 tlan_have_pci++;
658 else {
659 priv->nextDevice = TLan_Eisa_Devices;
660 TLan_Eisa_Devices = dev;
661 tlan_have_eisa++;
662 }
663
664 printk(KERN_INFO "TLAN: %s irq=%2d, io=%04x, %s, Rev. %d\n",
665 dev->name,
666 (int) dev->irq,
667 (int) dev->base_addr,
668 priv->adapter->deviceLabel,
669 priv->adapterRev);
670 return 0;
671
672 err_out_uninit:
673 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage,
674 priv->dmaStorageDMA );
675 err_out_free_dev:
676 free_netdev(dev);
677 err_out_regions:
678 #ifdef CONFIG_PCI
679 if (pdev)
680 pci_release_regions(pdev);
681 #endif
682 err_out:
683 if (pdev)
684 pci_disable_device(pdev);
685 return rc;
686 }
687
688
689 static void TLan_Eisa_Cleanup(void)
690 {
691 struct net_device *dev;
692 TLanPrivateInfo *priv;
693
694 while( tlan_have_eisa ) {
695 dev = TLan_Eisa_Devices;
696 priv = dev->priv;
697 if (priv->dmaStorage) {
698 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA );
699 }
700 release_region( dev->base_addr, 0x10);
701 unregister_netdev( dev );
702 TLan_Eisa_Devices = priv->nextDevice;
703 free_netdev( dev );
704 tlan_have_eisa--;
705 }
706 }
707
708
709 static void __exit tlan_exit(void)
710 {
711 pci_unregister_driver(&tlan_driver);
712
713 if (tlan_have_eisa)
714 TLan_Eisa_Cleanup();
715
716 pci_free_consistent(NULL, TLAN_MIN_FRAME_SIZE, TLanPadBuffer, TLanPadBufferDMA);
717
718 }
719
720
721 /* Module loading/unloading */
722 module_init(tlan_probe);
723 module_exit(tlan_exit);
724
725
726
727 /**************************************************************
728 * TLan_EisaProbe
729 *
730 * Returns: 0 on success, 1 otherwise
731 *
732 * Parms: None
733 *
734 *
735 * This functions probes for EISA devices and calls
736 * TLan_probe1 when one is found.
737 *
738 *************************************************************/
739
740 static void __init TLan_EisaProbe (void)
741 {
742 long ioaddr;
743 int rc = -ENODEV;
744 int irq;
745 u16 device_id;
746
747 if (!EISA_bus) {
748 TLAN_DBG(TLAN_DEBUG_PROBE, "No EISA bus present\n");
749 return;
750 }
751
752 /* Loop through all slots of the EISA bus */
753 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) {
754
755 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC80, inw(ioaddr + EISA_ID));
756 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC82, inw(ioaddr + EISA_ID2));
757
758
759 TLAN_DBG(TLAN_DEBUG_PROBE, "Probing for EISA adapter at IO: 0x%4x : ",
760 (int) ioaddr);
761 if (request_region(ioaddr, 0x10, TLanSignature) == NULL)
762 goto out;
763
764 if (inw(ioaddr + EISA_ID) != 0x110E) {
765 release_region(ioaddr, 0x10);
766 goto out;
767 }
768
769 device_id = inw(ioaddr + EISA_ID2);
770 if (device_id != 0x20F1 && device_id != 0x40F1) {
771 release_region (ioaddr, 0x10);
772 goto out;
773 }
774
775 if (inb(ioaddr + EISA_CR) != 0x1) { /* Check if adapter is enabled */
776 release_region (ioaddr, 0x10);
777 goto out2;
778 }
779
780 if (debug == 0x10)
781 printk("Found one\n");
782
783
784 /* Get irq from board */
785 switch (inb(ioaddr + 0xCC0)) {
786 case(0x10):
787 irq=5;
788 break;
789 case(0x20):
790 irq=9;
791 break;
792 case(0x40):
793 irq=10;
794 break;
795 case(0x80):
796 irq=11;
797 break;
798 default:
799 goto out;
800 }
801
802
803 /* Setup the newly found eisa adapter */
804 rc = TLan_probe1( NULL, ioaddr, irq,
805 12, NULL);
806 continue;
807
808 out:
809 if (debug == 0x10)
810 printk("None found\n");
811 continue;
812
813 out2: if (debug == 0x10)
814 printk("Card found but it is not enabled, skipping\n");
815 continue;
816
817 }
818
819 } /* TLan_EisaProbe */
820
821 #ifdef CONFIG_NET_POLL_CONTROLLER
822 static void TLan_Poll(struct net_device *dev)
823 {
824 disable_irq(dev->irq);
825 TLan_HandleInterrupt(dev->irq, dev, NULL);
826 enable_irq(dev->irq);
827 }
828 #endif
829
830
831
832
833 /***************************************************************
834 * TLan_Init
835 *
836 * Returns:
837 * 0 on success, error code otherwise.
838 * Parms:
839 * dev The structure of the device to be
840 * init'ed.
841 *
842 * This function completes the initialization of the
843 * device structure and driver. It reserves the IO
844 * addresses, allocates memory for the lists and bounce
845 * buffers, retrieves the MAC address from the eeprom
846 * and assignes the device's methods.
847 *
848 **************************************************************/
849
850 static int TLan_Init( struct net_device *dev )
851 {
852 int dma_size;
853 int err;
854 int i;
855 TLanPrivateInfo *priv;
856
857 priv = dev->priv;
858
859 if ( bbuf ) {
860 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
861 * ( sizeof(TLanList) + TLAN_MAX_FRAME_SIZE );
862 } else {
863 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
864 * ( sizeof(TLanList) );
865 }
866 priv->dmaStorage = pci_alloc_consistent(priv->pciDev, dma_size, &priv->dmaStorageDMA);
867 priv->dmaSize = dma_size;
868
869 if ( priv->dmaStorage == NULL ) {
870 printk(KERN_ERR "TLAN: Could not allocate lists and buffers for %s.\n",
871 dev->name );
872 return -ENOMEM;
873 }
874 memset( priv->dmaStorage, 0, dma_size );
875 priv->rxList = (TLanList *)
876 ( ( ( (u32) priv->dmaStorage ) + 7 ) & 0xFFFFFFF8 );
877 priv->rxListDMA = ( ( ( (u32) priv->dmaStorageDMA ) + 7 ) & 0xFFFFFFF8 );
878 priv->txList = priv->rxList + TLAN_NUM_RX_LISTS;
879 priv->txListDMA = priv->rxListDMA + sizeof(TLanList) * TLAN_NUM_RX_LISTS;
880 if ( bbuf ) {
881 priv->rxBuffer = (u8 *) ( priv->txList + TLAN_NUM_TX_LISTS );
882 priv->rxBufferDMA =priv->txListDMA + sizeof(TLanList) * TLAN_NUM_TX_LISTS;
883 priv->txBuffer = priv->rxBuffer + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
884 priv->txBufferDMA = priv->rxBufferDMA + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
885 }
886
887 err = 0;
888 for ( i = 0; i < 6 ; i++ )
889 err |= TLan_EeReadByte( dev,
890 (u8) priv->adapter->addrOfs + i,
891 (u8 *) &dev->dev_addr[i] );
892 if ( err ) {
893 printk(KERN_ERR "TLAN: %s: Error reading MAC from eeprom: %d\n",
894 dev->name,
895 err );
896 }
897 dev->addr_len = 6;
898
899 netif_carrier_off(dev);
900
901 /* Device methods */
902 dev->open = &TLan_Open;
903 dev->hard_start_xmit = &TLan_StartTx;
904 dev->stop = &TLan_Close;
905 dev->get_stats = &TLan_GetStats;
906 dev->set_multicast_list = &TLan_SetMulticastList;
907 dev->do_ioctl = &TLan_ioctl;
908 #ifdef CONFIG_NET_POLL_CONTROLLER
909 dev->poll_controller = &TLan_Poll;
910 #endif
911 dev->tx_timeout = &TLan_tx_timeout;
912 dev->watchdog_timeo = TX_TIMEOUT;
913
914 return 0;
915
916 } /* TLan_Init */
917
918
919
920
921 /***************************************************************
922 * TLan_Open
923 *
924 * Returns:
925 * 0 on success, error code otherwise.
926 * Parms:
927 * dev Structure of device to be opened.
928 *
929 * This routine puts the driver and TLAN adapter in a
930 * state where it is ready to send and receive packets.
931 * It allocates the IRQ, resets and brings the adapter
932 * out of reset, and allows interrupts. It also delays
933 * the startup for autonegotiation or sends a Rx GO
934 * command to the adapter, as appropriate.
935 *
936 **************************************************************/
937
938 static int TLan_Open( struct net_device *dev )
939 {
940 TLanPrivateInfo *priv = dev->priv;
941 int err;
942
943 priv->tlanRev = TLan_DioRead8( dev->base_addr, TLAN_DEF_REVISION );
944 err = request_irq( dev->irq, TLan_HandleInterrupt, SA_SHIRQ, TLanSignature, dev );
945
946 if ( err ) {
947 printk(KERN_ERR "TLAN: Cannot open %s because IRQ %d is already in use.\n", dev->name, dev->irq );
948 return err;
949 }
950
951 init_timer(&priv->timer);
952 netif_start_queue(dev);
953
954 /* NOTE: It might not be necessary to read the stats before a
955 reset if you don't care what the values are.
956 */
957 TLan_ResetLists( dev );
958 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
959 TLan_ResetAdapter( dev );
960
961 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n", dev->name, priv->tlanRev );
962
963 return 0;
964
965 } /* TLan_Open */
966
967
968
969 /**************************************************************
970 * TLan_ioctl
971 *
972 * Returns:
973 * 0 on success, error code otherwise
974 * Params:
975 * dev structure of device to receive ioctl.
976 *
977 * rq ifreq structure to hold userspace data.
978 *
979 * cmd ioctl command.
980 *
981 *
982 *************************************************************/
983
984 static int TLan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
985 {
986 TLanPrivateInfo *priv = dev->priv;
987 struct mii_ioctl_data *data = if_mii(rq);
988 u32 phy = priv->phy[priv->phyNum];
989
990 if (!priv->phyOnline)
991 return -EAGAIN;
992
993 switch(cmd) {
994 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
995 data->phy_id = phy;
996
997
998 case SIOCGMIIREG: /* Read MII PHY register. */
999 TLan_MiiReadReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, &data->val_out);
1000 return 0;
1001
1002
1003 case SIOCSMIIREG: /* Write MII PHY register. */
1004 if (!capable(CAP_NET_ADMIN))
1005 return -EPERM;
1006 TLan_MiiWriteReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1007 return 0;
1008 default:
1009 return -EOPNOTSUPP;
1010 }
1011 } /* tlan_ioctl */
1012
1013
1014 /***************************************************************
1015 * TLan_tx_timeout
1016 *
1017 * Returns: nothing
1018 *
1019 * Params:
1020 * dev structure of device which timed out
1021 * during transmit.
1022 *
1023 **************************************************************/
1024
1025 static void TLan_tx_timeout(struct net_device *dev)
1026 {
1027
1028 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Transmit timed out.\n", dev->name);
1029
1030 /* Ok so we timed out, lets see what we can do about it...*/
1031 TLan_FreeLists( dev );
1032 TLan_ResetLists( dev );
1033 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
1034 TLan_ResetAdapter( dev );
1035 dev->trans_start = jiffies;
1036 netif_wake_queue( dev );
1037
1038 }
1039
1040
1041
1042 /***************************************************************
1043 * TLan_StartTx
1044 *
1045 * Returns:
1046 * 0 on success, non-zero on failure.
1047 * Parms:
1048 * skb A pointer to the sk_buff containing the
1049 * frame to be sent.
1050 * dev The device to send the data on.
1051 *
1052 * This function adds a frame to the Tx list to be sent
1053 * ASAP. First it verifies that the adapter is ready and
1054 * there is room in the queue. Then it sets up the next
1055 * available list, copies the frame to the corresponding
1056 * buffer. If the adapter Tx channel is idle, it gives
1057 * the adapter a Tx Go command on the list, otherwise it
1058 * sets the forward address of the previous list to point
1059 * to this one. Then it frees the sk_buff.
1060 *
1061 **************************************************************/
1062
1063 static int TLan_StartTx( struct sk_buff *skb, struct net_device *dev )
1064 {
1065 TLanPrivateInfo *priv = dev->priv;
1066 TLanList *tail_list;
1067 dma_addr_t tail_list_phys;
1068 u8 *tail_buffer;
1069 int pad;
1070 unsigned long flags;
1071
1072 if ( ! priv->phyOnline ) {
1073 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n", dev->name );
1074 dev_kfree_skb_any(skb);
1075 return 0;
1076 }
1077
1078 tail_list = priv->txList + priv->txTail;
1079 tail_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txTail;
1080
1081 if ( tail_list->cStat != TLAN_CSTAT_UNUSED ) {
1082 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s is busy (Head=%d Tail=%d)\n", dev->name, priv->txHead, priv->txTail );
1083 netif_stop_queue(dev);
1084 priv->txBusyCount++;
1085 return 1;
1086 }
1087
1088 tail_list->forward = 0;
1089
1090 if ( bbuf ) {
1091 tail_buffer = priv->txBuffer + ( priv->txTail * TLAN_MAX_FRAME_SIZE );
1092 memcpy( tail_buffer, skb->data, skb->len );
1093 } else {
1094 tail_list->buffer[0].address = pci_map_single(priv->pciDev, skb->data, skb->len, PCI_DMA_TODEVICE);
1095 TLan_StoreSKB(tail_list, skb);
1096 }
1097
1098 pad = TLAN_MIN_FRAME_SIZE - skb->len;
1099
1100 if ( pad > 0 ) {
1101 tail_list->frameSize = (u16) skb->len + pad;
1102 tail_list->buffer[0].count = (u32) skb->len;
1103 tail_list->buffer[1].count = TLAN_LAST_BUFFER | (u32) pad;
1104 tail_list->buffer[1].address = TLanPadBufferDMA;
1105 } else {
1106 tail_list->frameSize = (u16) skb->len;
1107 tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) skb->len;
1108 tail_list->buffer[1].count = 0;
1109 tail_list->buffer[1].address = 0;
1110 }
1111
1112 spin_lock_irqsave(&priv->lock, flags);
1113 tail_list->cStat = TLAN_CSTAT_READY;
1114 if ( ! priv->txInProgress ) {
1115 priv->txInProgress = 1;
1116 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Starting TX on buffer %d\n", priv->txTail );
1117 outl( tail_list_phys, dev->base_addr + TLAN_CH_PARM );
1118 outl( TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD );
1119 } else {
1120 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Adding buffer %d to TX channel\n", priv->txTail );
1121 if ( priv->txTail == 0 ) {
1122 ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward = tail_list_phys;
1123 } else {
1124 ( priv->txList + ( priv->txTail - 1 ) )->forward = tail_list_phys;
1125 }
1126 }
1127 spin_unlock_irqrestore(&priv->lock, flags);
1128
1129 CIRC_INC( priv->txTail, TLAN_NUM_TX_LISTS );
1130
1131 if ( bbuf )
1132 dev_kfree_skb_any(skb);
1133
1134 dev->trans_start = jiffies;
1135 return 0;
1136
1137 } /* TLan_StartTx */
1138
1139
1140
1141
1142 /***************************************************************
1143 * TLan_HandleInterrupt
1144 *
1145 * Returns:
1146 * Nothing
1147 * Parms:
1148 * irq The line on which the interrupt
1149 * occurred.
1150 * dev_id A pointer to the device assigned to
1151 * this irq line.
1152 * regs ???
1153 *
1154 * This function handles an interrupt generated by its
1155 * assigned TLAN adapter. The function deactivates
1156 * interrupts on its adapter, records the type of
1157 * interrupt, executes the appropriate subhandler, and
1158 * acknowdges the interrupt to the adapter (thus
1159 * re-enabling adapter interrupts.
1160 *
1161 **************************************************************/
1162
1163 static irqreturn_t TLan_HandleInterrupt(int irq, void *dev_id, struct pt_regs *regs)
1164 {
1165 u32 ack;
1166 struct net_device *dev;
1167 u32 host_cmd;
1168 u16 host_int;
1169 int type;
1170 TLanPrivateInfo *priv;
1171
1172 dev = dev_id;
1173 priv = dev->priv;
1174
1175 spin_lock(&priv->lock);
1176
1177 host_int = inw( dev->base_addr + TLAN_HOST_INT );
1178 outw( host_int, dev->base_addr + TLAN_HOST_INT );
1179
1180 type = ( host_int & TLAN_HI_IT_MASK ) >> 2;
1181
1182 ack = TLanIntVector[type]( dev, host_int );
1183
1184 if ( ack ) {
1185 host_cmd = TLAN_HC_ACK | ack | ( type << 18 );
1186 outl( host_cmd, dev->base_addr + TLAN_HOST_CMD );
1187 }
1188
1189 spin_unlock(&priv->lock);
1190
1191 return IRQ_HANDLED;
1192 } /* TLan_HandleInterrupts */
1193
1194
1195
1196
1197 /***************************************************************
1198 * TLan_Close
1199 *
1200 * Returns:
1201 * An error code.
1202 * Parms:
1203 * dev The device structure of the device to
1204 * close.
1205 *
1206 * This function shuts down the adapter. It records any
1207 * stats, puts the adapter into reset state, deactivates
1208 * its time as needed, and frees the irq it is using.
1209 *
1210 **************************************************************/
1211
1212 static int TLan_Close(struct net_device *dev)
1213 {
1214 TLanPrivateInfo *priv = dev->priv;
1215
1216 netif_stop_queue(dev);
1217 priv->neg_be_verbose = 0;
1218
1219 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1220 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1221 if ( priv->timer.function != NULL ) {
1222 del_timer_sync( &priv->timer );
1223 priv->timer.function = NULL;
1224 }
1225
1226 free_irq( dev->irq, dev );
1227 TLan_FreeLists( dev );
1228 TLAN_DBG( TLAN_DEBUG_GNRL, "Device %s closed.\n", dev->name );
1229
1230 return 0;
1231
1232 } /* TLan_Close */
1233
1234
1235
1236
1237 /***************************************************************
1238 * TLan_GetStats
1239 *
1240 * Returns:
1241 * A pointer to the device's statistics structure.
1242 * Parms:
1243 * dev The device structure to return the
1244 * stats for.
1245 *
1246 * This function updates the devices statistics by reading
1247 * the TLAN chip's onboard registers. Then it returns the
1248 * address of the statistics structure.
1249 *
1250 **************************************************************/
1251
1252 static struct net_device_stats *TLan_GetStats( struct net_device *dev )
1253 {
1254 TLanPrivateInfo *priv = dev->priv;
1255 int i;
1256
1257 /* Should only read stats if open ? */
1258 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1259
1260 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name, priv->rxEocCount );
1261 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name, priv->txBusyCount );
1262 if ( debug & TLAN_DEBUG_GNRL ) {
1263 TLan_PrintDio( dev->base_addr );
1264 TLan_PhyPrint( dev );
1265 }
1266 if ( debug & TLAN_DEBUG_LIST ) {
1267 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ )
1268 TLan_PrintList( priv->rxList + i, "RX", i );
1269 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ )
1270 TLan_PrintList( priv->txList + i, "TX", i );
1271 }
1272
1273 return ( &( (TLanPrivateInfo *) dev->priv )->stats );
1274
1275 } /* TLan_GetStats */
1276
1277
1278
1279
1280 /***************************************************************
1281 * TLan_SetMulticastList
1282 *
1283 * Returns:
1284 * Nothing
1285 * Parms:
1286 * dev The device structure to set the
1287 * multicast list for.
1288 *
1289 * This function sets the TLAN adaptor to various receive
1290 * modes. If the IFF_PROMISC flag is set, promiscuous
1291 * mode is acitviated. Otherwise, promiscuous mode is
1292 * turned off. If the IFF_ALLMULTI flag is set, then
1293 * the hash table is set to receive all group addresses.
1294 * Otherwise, the first three multicast addresses are
1295 * stored in AREG_1-3, and the rest are selected via the
1296 * hash table, as necessary.
1297 *
1298 **************************************************************/
1299
1300 static void TLan_SetMulticastList( struct net_device *dev )
1301 {
1302 struct dev_mc_list *dmi = dev->mc_list;
1303 u32 hash1 = 0;
1304 u32 hash2 = 0;
1305 int i;
1306 u32 offset;
1307 u8 tmp;
1308
1309 if ( dev->flags & IFF_PROMISC ) {
1310 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1311 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF );
1312 } else {
1313 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1314 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF );
1315 if ( dev->flags & IFF_ALLMULTI ) {
1316 for ( i = 0; i < 3; i++ )
1317 TLan_SetMac( dev, i + 1, NULL );
1318 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, 0xFFFFFFFF );
1319 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, 0xFFFFFFFF );
1320 } else {
1321 for ( i = 0; i < dev->mc_count; i++ ) {
1322 if ( i < 3 ) {
1323 TLan_SetMac( dev, i + 1, (char *) &dmi->dmi_addr );
1324 } else {
1325 offset = TLan_HashFunc( (u8 *) &dmi->dmi_addr );
1326 if ( offset < 32 )
1327 hash1 |= ( 1 << offset );
1328 else
1329 hash2 |= ( 1 << ( offset - 32 ) );
1330 }
1331 dmi = dmi->next;
1332 }
1333 for ( ; i < 3; i++ )
1334 TLan_SetMac( dev, i + 1, NULL );
1335 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, hash1 );
1336 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, hash2 );
1337 }
1338 }
1339
1340 } /* TLan_SetMulticastList */
1341
1342
1343
1344 /*****************************************************************************
1345 ******************************************************************************
1346
1347 ThunderLAN Driver Interrupt Vectors and Table
1348
1349 Please see Chap. 4, "Interrupt Handling" of the "ThunderLAN
1350 Programmer's Guide" for more informations on handling interrupts
1351 generated by TLAN based adapters.
1352
1353 ******************************************************************************
1354 *****************************************************************************/
1355
1356
1357 /***************************************************************
1358 * TLan_HandleInvalid
1359 *
1360 * Returns:
1361 * 0
1362 * Parms:
1363 * dev Device assigned the IRQ that was
1364 * raised.
1365 * host_int The contents of the HOST_INT
1366 * port.
1367 *
1368 * This function handles invalid interrupts. This should
1369 * never happen unless some other adapter is trying to use
1370 * the IRQ line assigned to the device.
1371 *
1372 **************************************************************/
1373
1374 u32 TLan_HandleInvalid( struct net_device *dev, u16 host_int )
1375 {
1376 /* printk( "TLAN: Invalid interrupt on %s.\n", dev->name ); */
1377 return 0;
1378
1379 } /* TLan_HandleInvalid */
1380
1381
1382
1383
1384 /***************************************************************
1385 * TLan_HandleTxEOF
1386 *
1387 * Returns:
1388 * 1
1389 * Parms:
1390 * dev Device assigned the IRQ that was
1391 * raised.
1392 * host_int The contents of the HOST_INT
1393 * port.
1394 *
1395 * This function handles Tx EOF interrupts which are raised
1396 * by the adapter when it has completed sending the
1397 * contents of a buffer. If detemines which list/buffer
1398 * was completed and resets it. If the buffer was the last
1399 * in the channel (EOC), then the function checks to see if
1400 * another buffer is ready to send, and if so, sends a Tx
1401 * Go command. Finally, the driver activates/continues the
1402 * activity LED.
1403 *
1404 **************************************************************/
1405
1406 u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
1407 {
1408 TLanPrivateInfo *priv = dev->priv;
1409 int eoc = 0;
1410 TLanList *head_list;
1411 dma_addr_t head_list_phys;
1412 u32 ack = 0;
1413 u16 tmpCStat;
1414
1415 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1416 head_list = priv->txList + priv->txHead;
1417
1418 while (((tmpCStat = head_list->cStat ) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1419 ack++;
1420 if ( ! bbuf ) {
1421 struct sk_buff *skb = TLan_GetSKB(head_list);
1422 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, skb->len, PCI_DMA_TODEVICE);
1423 dev_kfree_skb_any(skb);
1424 head_list->buffer[8].address = 0;
1425 head_list->buffer[9].address = 0;
1426 }
1427
1428 if ( tmpCStat & TLAN_CSTAT_EOC )
1429 eoc = 1;
1430
1431 priv->stats.tx_bytes += head_list->frameSize;
1432
1433 head_list->cStat = TLAN_CSTAT_UNUSED;
1434 netif_start_queue(dev);
1435 CIRC_INC( priv->txHead, TLAN_NUM_TX_LISTS );
1436 head_list = priv->txList + priv->txHead;
1437 }
1438
1439 if (!ack)
1440 printk(KERN_INFO "TLAN: Received interrupt for uncompleted TX frame.\n");
1441
1442 if ( eoc ) {
1443 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1444 head_list = priv->txList + priv->txHead;
1445 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1446 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1447 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1448 ack |= TLAN_HC_GO;
1449 } else {
1450 priv->txInProgress = 0;
1451 }
1452 }
1453
1454 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1455 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1456 if ( priv->timer.function == NULL ) {
1457 priv->timer.function = &TLan_Timer;
1458 priv->timer.data = (unsigned long) dev;
1459 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1460 priv->timerSetAt = jiffies;
1461 priv->timerType = TLAN_TIMER_ACTIVITY;
1462 add_timer(&priv->timer);
1463 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1464 priv->timerSetAt = jiffies;
1465 }
1466 }
1467
1468 return ack;
1469
1470 } /* TLan_HandleTxEOF */
1471
1472
1473
1474
1475 /***************************************************************
1476 * TLan_HandleStatOverflow
1477 *
1478 * Returns:
1479 * 1
1480 * Parms:
1481 * dev Device assigned the IRQ that was
1482 * raised.
1483 * host_int The contents of the HOST_INT
1484 * port.
1485 *
1486 * This function handles the Statistics Overflow interrupt
1487 * which means that one or more of the TLAN statistics
1488 * registers has reached 1/2 capacity and needs to be read.
1489 *
1490 **************************************************************/
1491
1492 u32 TLan_HandleStatOverflow( struct net_device *dev, u16 host_int )
1493 {
1494 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1495
1496 return 1;
1497
1498 } /* TLan_HandleStatOverflow */
1499
1500
1501
1502
1503 /***************************************************************
1504 * TLan_HandleRxEOF
1505 *
1506 * Returns:
1507 * 1
1508 * Parms:
1509 * dev Device assigned the IRQ that was
1510 * raised.
1511 * host_int The contents of the HOST_INT
1512 * port.
1513 *
1514 * This function handles the Rx EOF interrupt which
1515 * indicates a frame has been received by the adapter from
1516 * the net and the frame has been transferred to memory.
1517 * The function determines the bounce buffer the frame has
1518 * been loaded into, creates a new sk_buff big enough to
1519 * hold the frame, and sends it to protocol stack. It
1520 * then resets the used buffer and appends it to the end
1521 * of the list. If the frame was the last in the Rx
1522 * channel (EOC), the function restarts the receive channel
1523 * by sending an Rx Go command to the adapter. Then it
1524 * activates/continues the activity LED.
1525 *
1526 **************************************************************/
1527
1528 u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
1529 {
1530 TLanPrivateInfo *priv = dev->priv;
1531 u32 ack = 0;
1532 int eoc = 0;
1533 u8 *head_buffer;
1534 TLanList *head_list;
1535 struct sk_buff *skb;
1536 TLanList *tail_list;
1537 void *t;
1538 u32 frameSize;
1539 u16 tmpCStat;
1540 dma_addr_t head_list_phys;
1541
1542 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1543 head_list = priv->rxList + priv->rxHead;
1544 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1545
1546 while (((tmpCStat = head_list->cStat) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1547 frameSize = head_list->frameSize;
1548 ack++;
1549 if (tmpCStat & TLAN_CSTAT_EOC)
1550 eoc = 1;
1551
1552 if (bbuf) {
1553 skb = dev_alloc_skb(frameSize + 7);
1554 if (skb == NULL)
1555 printk(KERN_INFO "TLAN: Couldn't allocate memory for received data.\n");
1556 else {
1557 head_buffer = priv->rxBuffer + (priv->rxHead * TLAN_MAX_FRAME_SIZE);
1558 skb->dev = dev;
1559 skb_reserve(skb, 2);
1560 t = (void *) skb_put(skb, frameSize);
1561
1562 priv->stats.rx_bytes += head_list->frameSize;
1563
1564 memcpy( t, head_buffer, frameSize );
1565 skb->protocol = eth_type_trans( skb, dev );
1566 netif_rx( skb );
1567 }
1568 } else {
1569 struct sk_buff *new_skb;
1570
1571 /*
1572 * I changed the algorithm here. What we now do
1573 * is allocate the new frame. If this fails we
1574 * simply recycle the frame.
1575 */
1576
1577 new_skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
1578
1579 if ( new_skb != NULL ) {
1580 skb = TLan_GetSKB(head_list);
1581 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1582 skb_trim( skb, frameSize );
1583
1584 priv->stats.rx_bytes += frameSize;
1585
1586 skb->protocol = eth_type_trans( skb, dev );
1587 netif_rx( skb );
1588
1589 new_skb->dev = dev;
1590 skb_reserve( new_skb, 2 );
1591 t = (void *) skb_put( new_skb, TLAN_MAX_FRAME_SIZE );
1592 head_list->buffer[0].address = pci_map_single(priv->pciDev, new_skb->data, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1593 head_list->buffer[8].address = (u32) t;
1594 TLan_StoreSKB(head_list, new_skb);
1595 } else
1596 printk(KERN_WARNING "TLAN: Couldn't allocate memory for received data.\n" );
1597 }
1598
1599 head_list->forward = 0;
1600 head_list->cStat = 0;
1601 tail_list = priv->rxList + priv->rxTail;
1602 tail_list->forward = head_list_phys;
1603
1604 CIRC_INC( priv->rxHead, TLAN_NUM_RX_LISTS );
1605 CIRC_INC( priv->rxTail, TLAN_NUM_RX_LISTS );
1606 head_list = priv->rxList + priv->rxHead;
1607 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1608 }
1609
1610 if (!ack)
1611 printk(KERN_INFO "TLAN: Received interrupt for uncompleted RX frame.\n");
1612
1613
1614
1615
1616 if ( eoc ) {
1617 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1618 head_list = priv->rxList + priv->rxHead;
1619 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1620 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1621 ack |= TLAN_HC_GO | TLAN_HC_RT;
1622 priv->rxEocCount++;
1623 }
1624
1625 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1626 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1627 if ( priv->timer.function == NULL ) {
1628 priv->timer.function = &TLan_Timer;
1629 priv->timer.data = (unsigned long) dev;
1630 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1631 priv->timerSetAt = jiffies;
1632 priv->timerType = TLAN_TIMER_ACTIVITY;
1633 add_timer(&priv->timer);
1634 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1635 priv->timerSetAt = jiffies;
1636 }
1637 }
1638
1639 dev->last_rx = jiffies;
1640
1641 return ack;
1642
1643 } /* TLan_HandleRxEOF */
1644
1645
1646
1647
1648 /***************************************************************
1649 * TLan_HandleDummy
1650 *
1651 * Returns:
1652 * 1
1653 * Parms:
1654 * dev Device assigned the IRQ that was
1655 * raised.
1656 * host_int The contents of the HOST_INT
1657 * port.
1658 *
1659 * This function handles the Dummy interrupt, which is
1660 * raised whenever a test interrupt is generated by setting
1661 * the Req_Int bit of HOST_CMD to 1.
1662 *
1663 **************************************************************/
1664
1665 u32 TLan_HandleDummy( struct net_device *dev, u16 host_int )
1666 {
1667 printk( "TLAN: Test interrupt on %s.\n", dev->name );
1668 return 1;
1669
1670 } /* TLan_HandleDummy */
1671
1672
1673
1674
1675 /***************************************************************
1676 * TLan_HandleTxEOC
1677 *
1678 * Returns:
1679 * 1
1680 * Parms:
1681 * dev Device assigned the IRQ that was
1682 * raised.
1683 * host_int The contents of the HOST_INT
1684 * port.
1685 *
1686 * This driver is structured to determine EOC occurrences by
1687 * reading the CSTAT member of the list structure. Tx EOC
1688 * interrupts are disabled via the DIO INTDIS register.
1689 * However, TLAN chips before revision 3.0 didn't have this
1690 * functionality, so process EOC events if this is the
1691 * case.
1692 *
1693 **************************************************************/
1694
1695 u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int )
1696 {
1697 TLanPrivateInfo *priv = dev->priv;
1698 TLanList *head_list;
1699 dma_addr_t head_list_phys;
1700 u32 ack = 1;
1701
1702 host_int = 0;
1703 if ( priv->tlanRev < 0x30 ) {
1704 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n", priv->txHead, priv->txTail );
1705 head_list = priv->txList + priv->txHead;
1706 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1707 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1708 netif_stop_queue(dev);
1709 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1710 ack |= TLAN_HC_GO;
1711 } else {
1712 priv->txInProgress = 0;
1713 }
1714 }
1715
1716 return ack;
1717
1718 } /* TLan_HandleTxEOC */
1719
1720
1721
1722
1723 /***************************************************************
1724 * TLan_HandleStatusCheck
1725 *
1726 * Returns:
1727 * 0 if Adapter check, 1 if Network Status check.
1728 * Parms:
1729 * dev Device assigned the IRQ that was
1730 * raised.
1731 * host_int The contents of the HOST_INT
1732 * port.
1733 *
1734 * This function handles Adapter Check/Network Status
1735 * interrupts generated by the adapter. It checks the
1736 * vector in the HOST_INT register to determine if it is
1737 * an Adapter Check interrupt. If so, it resets the
1738 * adapter. Otherwise it clears the status registers
1739 * and services the PHY.
1740 *
1741 **************************************************************/
1742
1743 u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int )
1744 {
1745 TLanPrivateInfo *priv = dev->priv;
1746 u32 ack;
1747 u32 error;
1748 u8 net_sts;
1749 u32 phy;
1750 u16 tlphy_ctl;
1751 u16 tlphy_sts;
1752
1753 ack = 1;
1754 if ( host_int & TLAN_HI_IV_MASK ) {
1755 netif_stop_queue( dev );
1756 error = inl( dev->base_addr + TLAN_CH_PARM );
1757 printk( "TLAN: %s: Adaptor Error = 0x%x\n", dev->name, error );
1758 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1759 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1760
1761 schedule_work(&priv->tlan_tqueue);
1762
1763 netif_wake_queue(dev);
1764 ack = 0;
1765 } else {
1766 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Status Check\n", dev->name );
1767 phy = priv->phy[priv->phyNum];
1768
1769 net_sts = TLan_DioRead8( dev->base_addr, TLAN_NET_STS );
1770 if ( net_sts ) {
1771 TLan_DioWrite8( dev->base_addr, TLAN_NET_STS, net_sts );
1772 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n", dev->name, (unsigned) net_sts );
1773 }
1774 if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) {
1775 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts );
1776 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
1777 if ( ! ( tlphy_sts & TLAN_TS_POLOK ) && ! ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1778 tlphy_ctl |= TLAN_TC_SWAPOL;
1779 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1780 } else if ( ( tlphy_sts & TLAN_TS_POLOK ) && ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1781 tlphy_ctl &= ~TLAN_TC_SWAPOL;
1782 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1783 }
1784
1785 if (debug) {
1786 TLan_PhyPrint( dev );
1787 }
1788 }
1789 }
1790
1791 return ack;
1792
1793 } /* TLan_HandleStatusCheck */
1794
1795
1796
1797
1798 /***************************************************************
1799 * TLan_HandleRxEOC
1800 *
1801 * Returns:
1802 * 1
1803 * Parms:
1804 * dev Device assigned the IRQ that was
1805 * raised.
1806 * host_int The contents of the HOST_INT
1807 * port.
1808 *
1809 * This driver is structured to determine EOC occurrences by
1810 * reading the CSTAT member of the list structure. Rx EOC
1811 * interrupts are disabled via the DIO INTDIS register.
1812 * However, TLAN chips before revision 3.0 didn't have this
1813 * CSTAT member or a INTDIS register, so if this chip is
1814 * pre-3.0, process EOC interrupts normally.
1815 *
1816 **************************************************************/
1817
1818 u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int )
1819 {
1820 TLanPrivateInfo *priv = dev->priv;
1821 dma_addr_t head_list_phys;
1822 u32 ack = 1;
1823
1824 if ( priv->tlanRev < 0x30 ) {
1825 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n", priv->rxHead, priv->rxTail );
1826 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1827 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1828 ack |= TLAN_HC_GO | TLAN_HC_RT;
1829 priv->rxEocCount++;
1830 }
1831
1832 return ack;
1833
1834 } /* TLan_HandleRxEOC */
1835
1836
1837
1838
1839 /*****************************************************************************
1840 ******************************************************************************
1841
1842 ThunderLAN Driver Timer Function
1843
1844 ******************************************************************************
1845 *****************************************************************************/
1846
1847
1848 /***************************************************************
1849 * TLan_Timer
1850 *
1851 * Returns:
1852 * Nothing
1853 * Parms:
1854 * data A value given to add timer when
1855 * add_timer was called.
1856 *
1857 * This function handles timed functionality for the
1858 * TLAN driver. The two current timer uses are for
1859 * delaying for autonegotionation and driving the ACT LED.
1860 * - Autonegotiation requires being allowed about
1861 * 2 1/2 seconds before attempting to transmit a
1862 * packet. It would be a very bad thing to hang
1863 * the kernel this long, so the driver doesn't
1864 * allow transmission 'til after this time, for
1865 * certain PHYs. It would be much nicer if all
1866 * PHYs were interrupt-capable like the internal
1867 * PHY.
1868 * - The ACT LED, which shows adapter activity, is
1869 * driven by the driver, and so must be left on
1870 * for a short period to power up the LED so it
1871 * can be seen. This delay can be changed by
1872 * changing the TLAN_TIMER_ACT_DELAY in tlan.h,
1873 * if desired. 100 ms produces a slightly
1874 * sluggish response.
1875 *
1876 **************************************************************/
1877
1878 void TLan_Timer( unsigned long data )
1879 {
1880 struct net_device *dev = (struct net_device *) data;
1881 TLanPrivateInfo *priv = dev->priv;
1882 u32 elapsed;
1883 unsigned long flags = 0;
1884
1885 priv->timer.function = NULL;
1886
1887 switch ( priv->timerType ) {
1888 #ifdef MONITOR
1889 case TLAN_TIMER_LINK_BEAT:
1890 TLan_PhyMonitor( dev );
1891 break;
1892 #endif
1893 case TLAN_TIMER_PHY_PDOWN:
1894 TLan_PhyPowerDown( dev );
1895 break;
1896 case TLAN_TIMER_PHY_PUP:
1897 TLan_PhyPowerUp( dev );
1898 break;
1899 case TLAN_TIMER_PHY_RESET:
1900 TLan_PhyReset( dev );
1901 break;
1902 case TLAN_TIMER_PHY_START_LINK:
1903 TLan_PhyStartLink( dev );
1904 break;
1905 case TLAN_TIMER_PHY_FINISH_AN:
1906 TLan_PhyFinishAutoNeg( dev );
1907 break;
1908 case TLAN_TIMER_FINISH_RESET:
1909 TLan_FinishReset( dev );
1910 break;
1911 case TLAN_TIMER_ACTIVITY:
1912 spin_lock_irqsave(&priv->lock, flags);
1913 if ( priv->timer.function == NULL ) {
1914 elapsed = jiffies - priv->timerSetAt;
1915 if ( elapsed >= TLAN_TIMER_ACT_DELAY ) {
1916 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
1917 } else {
1918 priv->timer.function = &TLan_Timer;
1919 priv->timer.expires = priv->timerSetAt + TLAN_TIMER_ACT_DELAY;
1920 spin_unlock_irqrestore(&priv->lock, flags);
1921 add_timer( &priv->timer );
1922 break;
1923 }
1924 }
1925 spin_unlock_irqrestore(&priv->lock, flags);
1926 break;
1927 default:
1928 break;
1929 }
1930
1931 } /* TLan_Timer */
1932
1933
1934
1935
1936 /*****************************************************************************
1937 ******************************************************************************
1938
1939 ThunderLAN Driver Adapter Related Routines
1940
1941 ******************************************************************************
1942 *****************************************************************************/
1943
1944
1945 /***************************************************************
1946 * TLan_ResetLists
1947 *
1948 * Returns:
1949 * Nothing
1950 * Parms:
1951 * dev The device structure with the list
1952 * stuctures to be reset.
1953 *
1954 * This routine sets the variables associated with managing
1955 * the TLAN lists to their initial values.
1956 *
1957 **************************************************************/
1958
1959 void TLan_ResetLists( struct net_device *dev )
1960 {
1961 TLanPrivateInfo *priv = dev->priv;
1962 int i;
1963 TLanList *list;
1964 dma_addr_t list_phys;
1965 struct sk_buff *skb;
1966 void *t = NULL;
1967
1968 priv->txHead = 0;
1969 priv->txTail = 0;
1970 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
1971 list = priv->txList + i;
1972 list->cStat = TLAN_CSTAT_UNUSED;
1973 if ( bbuf ) {
1974 list->buffer[0].address = priv->txBufferDMA + ( i * TLAN_MAX_FRAME_SIZE );
1975 } else {
1976 list->buffer[0].address = 0;
1977 }
1978 list->buffer[2].count = 0;
1979 list->buffer[2].address = 0;
1980 list->buffer[8].address = 0;
1981 list->buffer[9].address = 0;
1982 }
1983
1984 priv->rxHead = 0;
1985 priv->rxTail = TLAN_NUM_RX_LISTS - 1;
1986 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
1987 list = priv->rxList + i;
1988 list_phys = priv->rxListDMA + sizeof(TLanList) * i;
1989 list->cStat = TLAN_CSTAT_READY;
1990 list->frameSize = TLAN_MAX_FRAME_SIZE;
1991 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
1992 if ( bbuf ) {
1993 list->buffer[0].address = priv->rxBufferDMA + ( i * TLAN_MAX_FRAME_SIZE );
1994 } else {
1995 skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
1996 if ( skb == NULL ) {
1997 printk( "TLAN: Couldn't allocate memory for received data.\n" );
1998 /* If this ever happened it would be a problem */
1999 } else {
2000 skb->dev = dev;
2001 skb_reserve( skb, 2 );
2002 t = (void *) skb_put( skb, TLAN_MAX_FRAME_SIZE );
2003 }
2004 list->buffer[0].address = pci_map_single(priv->pciDev, t, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
2005 list->buffer[8].address = (u32) t;
2006 TLan_StoreSKB(list, skb);
2007 }
2008 list->buffer[1].count = 0;
2009 list->buffer[1].address = 0;
2010 if ( i < TLAN_NUM_RX_LISTS - 1 )
2011 list->forward = list_phys + sizeof(TLanList);
2012 else
2013 list->forward = 0;
2014 }
2015
2016 } /* TLan_ResetLists */
2017
2018
2019 void TLan_FreeLists( struct net_device *dev )
2020 {
2021 TLanPrivateInfo *priv = dev->priv;
2022 int i;
2023 TLanList *list;
2024 struct sk_buff *skb;
2025
2026 if ( ! bbuf ) {
2027 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
2028 list = priv->txList + i;
2029 skb = TLan_GetSKB(list);
2030 if ( skb ) {
2031 pci_unmap_single(priv->pciDev, list->buffer[0].address, skb->len, PCI_DMA_TODEVICE);
2032 dev_kfree_skb_any( skb );
2033 list->buffer[8].address = 0;
2034 list->buffer[9].address = 0;
2035 }
2036 }
2037
2038 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
2039 list = priv->rxList + i;
2040 skb = TLan_GetSKB(list);
2041 if ( skb ) {
2042 pci_unmap_single(priv->pciDev, list->buffer[0].address, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
2043 dev_kfree_skb_any( skb );
2044 list->buffer[8].address = 0;
2045 list->buffer[9].address = 0;
2046 }
2047 }
2048 }
2049 } /* TLan_FreeLists */
2050
2051
2052
2053
2054 /***************************************************************
2055 * TLan_PrintDio
2056 *
2057 * Returns:
2058 * Nothing
2059 * Parms:
2060 * io_base Base IO port of the device of
2061 * which to print DIO registers.
2062 *
2063 * This function prints out all the internal (DIO)
2064 * registers of a TLAN chip.
2065 *
2066 **************************************************************/
2067
2068 void TLan_PrintDio( u16 io_base )
2069 {
2070 u32 data0, data1;
2071 int i;
2072
2073 printk( "TLAN: Contents of internal registers for io base 0x%04hx.\n", io_base );
2074 printk( "TLAN: Off. +0 +4\n" );
2075 for ( i = 0; i < 0x4C; i+= 8 ) {
2076 data0 = TLan_DioRead32( io_base, i );
2077 data1 = TLan_DioRead32( io_base, i + 0x4 );
2078 printk( "TLAN: 0x%02x 0x%08x 0x%08x\n", i, data0, data1 );
2079 }
2080
2081 } /* TLan_PrintDio */
2082
2083
2084
2085
2086 /***************************************************************
2087 * TLan_PrintList
2088 *
2089 * Returns:
2090 * Nothing
2091 * Parms:
2092 * list A pointer to the TLanList structure to
2093 * be printed.
2094 * type A string to designate type of list,
2095 * "Rx" or "Tx".
2096 * num The index of the list.
2097 *
2098 * This function prints out the contents of the list
2099 * pointed to by the list parameter.
2100 *
2101 **************************************************************/
2102
2103 void TLan_PrintList( TLanList *list, char *type, int num)
2104 {
2105 int i;
2106
2107 printk( "TLAN: %s List %d at 0x%08x\n", type, num, (u32) list );
2108 printk( "TLAN: Forward = 0x%08x\n", list->forward );
2109 printk( "TLAN: CSTAT = 0x%04hx\n", list->cStat );
2110 printk( "TLAN: Frame Size = 0x%04hx\n", list->frameSize );
2111 /* for ( i = 0; i < 10; i++ ) { */
2112 for ( i = 0; i < 2; i++ ) {
2113 printk( "TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n", i, list->buffer[i].count, list->buffer[i].address );
2114 }
2115
2116 } /* TLan_PrintList */
2117
2118
2119
2120
2121 /***************************************************************
2122 * TLan_ReadAndClearStats
2123 *
2124 * Returns:
2125 * Nothing
2126 * Parms:
2127 * dev Pointer to device structure of adapter
2128 * to which to read stats.
2129 * record Flag indicating whether to add
2130 *
2131 * This functions reads all the internal status registers
2132 * of the TLAN chip, which clears them as a side effect.
2133 * It then either adds the values to the device's status
2134 * struct, or discards them, depending on whether record
2135 * is TLAN_RECORD (!=0) or TLAN_IGNORE (==0).
2136 *
2137 **************************************************************/
2138
2139 void TLan_ReadAndClearStats( struct net_device *dev, int record )
2140 {
2141 TLanPrivateInfo *priv = dev->priv;
2142 u32 tx_good, tx_under;
2143 u32 rx_good, rx_over;
2144 u32 def_tx, crc, code;
2145 u32 multi_col, single_col;
2146 u32 excess_col, late_col, loss;
2147
2148 outw( TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2149 tx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2150 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2151 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2152 tx_under = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
2153
2154 outw( TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2155 rx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2156 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2157 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2158 rx_over = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
2159
2160 outw( TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR );
2161 def_tx = inb( dev->base_addr + TLAN_DIO_DATA );
2162 def_tx += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2163 crc = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2164 code = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
2165
2166 outw( TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2167 multi_col = inb( dev->base_addr + TLAN_DIO_DATA );
2168 multi_col += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2169 single_col = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2170 single_col += inb( dev->base_addr + TLAN_DIO_DATA + 3 ) << 8;
2171
2172 outw( TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2173 excess_col = inb( dev->base_addr + TLAN_DIO_DATA );
2174 late_col = inb( dev->base_addr + TLAN_DIO_DATA + 1 );
2175 loss = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2176
2177 if ( record ) {
2178 priv->stats.rx_packets += rx_good;
2179 priv->stats.rx_errors += rx_over + crc + code;
2180 priv->stats.tx_packets += tx_good;
2181 priv->stats.tx_errors += tx_under + loss;
2182 priv->stats.collisions += multi_col + single_col + excess_col + late_col;
2183
2184 priv->stats.rx_over_errors += rx_over;
2185 priv->stats.rx_crc_errors += crc;
2186 priv->stats.rx_frame_errors += code;
2187
2188 priv->stats.tx_aborted_errors += tx_under;
2189 priv->stats.tx_carrier_errors += loss;
2190 }
2191
2192 } /* TLan_ReadAndClearStats */
2193
2194
2195
2196
2197 /***************************************************************
2198 * TLan_Reset
2199 *
2200 * Returns:
2201 * 0
2202 * Parms:
2203 * dev Pointer to device structure of adapter
2204 * to be reset.
2205 *
2206 * This function resets the adapter and it's physical
2207 * device. See Chap. 3, pp. 9-10 of the "ThunderLAN
2208 * Programmer's Guide" for details. The routine tries to
2209 * implement what is detailed there, though adjustments
2210 * have been made.
2211 *
2212 **************************************************************/
2213
2214 void
2215 TLan_ResetAdapter( struct net_device *dev )
2216 {
2217 TLanPrivateInfo *priv = dev->priv;
2218 int i;
2219 u32 addr;
2220 u32 data;
2221 u8 data8;
2222
2223 priv->tlanFullDuplex = FALSE;
2224 priv->phyOnline=0;
2225 netif_carrier_off(dev);
2226
2227 /* 1. Assert reset bit. */
2228
2229 data = inl(dev->base_addr + TLAN_HOST_CMD);
2230 data |= TLAN_HC_AD_RST;
2231 outl(data, dev->base_addr + TLAN_HOST_CMD);
2232
2233 udelay(1000);
2234
2235 /* 2. Turn off interrupts. ( Probably isn't necessary ) */
2236
2237 data = inl(dev->base_addr + TLAN_HOST_CMD);
2238 data |= TLAN_HC_INT_OFF;
2239 outl(data, dev->base_addr + TLAN_HOST_CMD);
2240
2241 /* 3. Clear AREGs and HASHs. */
2242
2243 for ( i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4 ) {
2244 TLan_DioWrite32( dev->base_addr, (u16) i, 0 );
2245 }
2246
2247 /* 4. Setup NetConfig register. */
2248
2249 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2250 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2251
2252 /* 5. Load Ld_Tmr and Ld_Thr in HOST_CMD. */
2253
2254 outl( TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD );
2255 outl( TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD );
2256
2257 /* 6. Unreset the MII by setting NMRST (in NetSio) to 1. */
2258
2259 outw( TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR );
2260 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2261 TLan_SetBit( TLAN_NET_SIO_NMRST, addr );
2262
2263 /* 7. Setup the remaining registers. */
2264
2265 if ( priv->tlanRev >= 0x30 ) {
2266 data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC;
2267 TLan_DioWrite8( dev->base_addr, TLAN_INT_DIS, data8 );
2268 }
2269 TLan_PhyDetect( dev );
2270 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN;
2271
2272 if ( priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY ) {
2273 data |= TLAN_NET_CFG_BIT;
2274 if ( priv->aui == 1 ) {
2275 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x0a );
2276 } else if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2277 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x00 );
2278 priv->tlanFullDuplex = TRUE;
2279 } else {
2280 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x08 );
2281 }
2282 }
2283
2284 if ( priv->phyNum == 0 ) {
2285 data |= TLAN_NET_CFG_PHY_EN;
2286 }
2287 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2288
2289 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2290 TLan_FinishReset( dev );
2291 } else {
2292 TLan_PhyPowerDown( dev );
2293 }
2294
2295 } /* TLan_ResetAdapter */
2296
2297
2298
2299
2300 void
2301 TLan_FinishReset( struct net_device *dev )
2302 {
2303 TLanPrivateInfo *priv = dev->priv;
2304 u8 data;
2305 u32 phy;
2306 u8 sio;
2307 u16 status;
2308 u16 partner;
2309 u16 tlphy_ctl;
2310 u16 tlphy_par;
2311 u16 tlphy_id1, tlphy_id2;
2312 int i;
2313
2314 phy = priv->phy[priv->phyNum];
2315
2316 data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP;
2317 if ( priv->tlanFullDuplex ) {
2318 data |= TLAN_NET_CMD_DUPLEX;
2319 }
2320 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, data );
2321 data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5;
2322 if ( priv->phyNum == 0 ) {
2323 data |= TLAN_NET_MASK_MASK7;
2324 }
2325 TLan_DioWrite8( dev->base_addr, TLAN_NET_MASK, data );
2326 TLan_DioWrite16( dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7 );
2327 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &tlphy_id1 );
2328 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &tlphy_id2 );
2329
2330 if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) || ( priv->aui ) ) {
2331 status = MII_GS_LINK;
2332 printk( "TLAN: %s: Link forced.\n", dev->name );
2333 } else {
2334 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2335 udelay( 1000 );
2336 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2337 if ( (status & MII_GS_LINK) && /* We only support link info on Nat.Sem. PHY's */
2338 (tlphy_id1 == NAT_SEM_ID1) &&
2339 (tlphy_id2 == NAT_SEM_ID2) ) {
2340 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &partner );
2341 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_PAR, &tlphy_par );
2342
2343 printk( "TLAN: %s: Link active with ", dev->name );
2344 if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) {
2345 printk( "forced 10%sMbps %s-Duplex\n",
2346 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2347 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2348 } else {
2349 printk( "AutoNegotiation enabled, at 10%sMbps %s-Duplex\n",
2350 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2351 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2352 printk("TLAN: Partner capability: ");
2353 for (i = 5; i <= 10; i++)
2354 if (partner & (1<<i))
2355 printk("%s",media[i-5]);
2356 printk("\n");
2357 }
2358
2359 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
2360 #ifdef MONITOR
2361 /* We have link beat..for now anyway */
2362 priv->link = 1;
2363 /*Enabling link beat monitoring */
2364 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_LINK_BEAT );
2365 #endif
2366 } else if (status & MII_GS_LINK) {
2367 printk( "TLAN: %s: Link active\n", dev->name );
2368 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
2369 }
2370 }
2371
2372 if ( priv->phyNum == 0 ) {
2373 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
2374 tlphy_ctl |= TLAN_TC_INTEN;
2375 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl );
2376 sio = TLan_DioRead8( dev->base_addr, TLAN_NET_SIO );
2377 sio |= TLAN_NET_SIO_MINTEN;
2378 TLan_DioWrite8( dev->base_addr, TLAN_NET_SIO, sio );
2379 }
2380
2381 if ( status & MII_GS_LINK ) {
2382 TLan_SetMac( dev, 0, dev->dev_addr );
2383 priv->phyOnline = 1;
2384 outb( ( TLAN_HC_INT_ON >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2385 if ( debug >= 1 && debug != TLAN_DEBUG_PROBE ) {
2386 outb( ( TLAN_HC_REQ_INT >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2387 }
2388 outl( priv->rxListDMA, dev->base_addr + TLAN_CH_PARM );
2389 outl( TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD );
2390 netif_carrier_on(dev);
2391 } else {
2392 printk( "TLAN: %s: Link inactive, will retry in 10 secs...\n", dev->name );
2393 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_FINISH_RESET );
2394 return;
2395 }
2396
2397 } /* TLan_FinishReset */
2398
2399
2400
2401
2402 /***************************************************************
2403 * TLan_SetMac
2404 *
2405 * Returns:
2406 * Nothing
2407 * Parms:
2408 * dev Pointer to device structure of adapter
2409 * on which to change the AREG.
2410 * areg The AREG to set the address in (0 - 3).
2411 * mac A pointer to an array of chars. Each
2412 * element stores one byte of the address.
2413 * IE, it isn't in ascii.
2414 *
2415 * This function transfers a MAC address to one of the
2416 * TLAN AREGs (address registers). The TLAN chip locks
2417 * the register on writing to offset 0 and unlocks the
2418 * register after writing to offset 5. If NULL is passed
2419 * in mac, then the AREG is filled with 0's.
2420 *
2421 **************************************************************/
2422
2423 void TLan_SetMac( struct net_device *dev, int areg, char *mac )
2424 {
2425 int i;
2426
2427 areg *= 6;
2428
2429 if ( mac != NULL ) {
2430 for ( i = 0; i < 6; i++ )
2431 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, mac[i] );
2432 } else {
2433 for ( i = 0; i < 6; i++ )
2434 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, 0 );
2435 }
2436
2437 } /* TLan_SetMac */
2438
2439
2440
2441
2442 /*****************************************************************************
2443 ******************************************************************************
2444
2445 ThunderLAN Driver PHY Layer Routines
2446
2447 ******************************************************************************
2448 *****************************************************************************/
2449
2450
2451
2452 /*********************************************************************
2453 * TLan_PhyPrint
2454 *
2455 * Returns:
2456 * Nothing
2457 * Parms:
2458 * dev A pointer to the device structure of the
2459 * TLAN device having the PHYs to be detailed.
2460 *
2461 * This function prints the registers a PHY (aka transceiver).
2462 *
2463 ********************************************************************/
2464
2465 void TLan_PhyPrint( struct net_device *dev )
2466 {
2467 TLanPrivateInfo *priv = dev->priv;
2468 u16 i, data0, data1, data2, data3, phy;
2469
2470 phy = priv->phy[priv->phyNum];
2471
2472 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2473 printk( "TLAN: Device %s, Unmanaged PHY.\n", dev->name );
2474 } else if ( phy <= TLAN_PHY_MAX_ADDR ) {
2475 printk( "TLAN: Device %s, PHY 0x%02x.\n", dev->name, phy );
2476 printk( "TLAN: Off. +0 +1 +2 +3 \n" );
2477 for ( i = 0; i < 0x20; i+= 4 ) {
2478 printk( "TLAN: 0x%02x", i );
2479 TLan_MiiReadReg( dev, phy, i, &data0 );
2480 printk( " 0x%04hx", data0 );
2481 TLan_MiiReadReg( dev, phy, i + 1, &data1 );
2482 printk( " 0x%04hx", data1 );
2483 TLan_MiiReadReg( dev, phy, i + 2, &data2 );
2484 printk( " 0x%04hx", data2 );
2485 TLan_MiiReadReg( dev, phy, i + 3, &data3 );
2486 printk( " 0x%04hx\n", data3 );
2487 }
2488 } else {
2489 printk( "TLAN: Device %s, Invalid PHY.\n", dev->name );
2490 }
2491
2492 } /* TLan_PhyPrint */
2493
2494
2495
2496
2497 /*********************************************************************
2498 * TLan_PhyDetect
2499 *
2500 * Returns:
2501 * Nothing
2502 * Parms:
2503 * dev A pointer to the device structure of the adapter
2504 * for which the PHY needs determined.
2505 *
2506 * So far I've found that adapters which have external PHYs
2507 * may also use the internal PHY for part of the functionality.
2508 * (eg, AUI/Thinnet). This function finds out if this TLAN
2509 * chip has an internal PHY, and then finds the first external
2510 * PHY (starting from address 0) if it exists).
2511 *
2512 ********************************************************************/
2513
2514 void TLan_PhyDetect( struct net_device *dev )
2515 {
2516 TLanPrivateInfo *priv = dev->priv;
2517 u16 control;
2518 u16 hi;
2519 u16 lo;
2520 u32 phy;
2521
2522 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2523 priv->phyNum = 0xFFFF;
2524 return;
2525 }
2526
2527 TLan_MiiReadReg( dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi );
2528
2529 if ( hi != 0xFFFF ) {
2530 priv->phy[0] = TLAN_PHY_MAX_ADDR;
2531 } else {
2532 priv->phy[0] = TLAN_PHY_NONE;
2533 }
2534
2535 priv->phy[1] = TLAN_PHY_NONE;
2536 for ( phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++ ) {
2537 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &control );
2538 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &hi );
2539 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &lo );
2540 if ( ( control != 0xFFFF ) || ( hi != 0xFFFF ) || ( lo != 0xFFFF ) ) {
2541 TLAN_DBG( TLAN_DEBUG_GNRL, "PHY found at %02x %04x %04x %04x\n", phy, control, hi, lo );
2542 if ( ( priv->phy[1] == TLAN_PHY_NONE ) && ( phy != TLAN_PHY_MAX_ADDR ) ) {
2543 priv->phy[1] = phy;
2544 }
2545 }
2546 }
2547
2548 if ( priv->phy[1] != TLAN_PHY_NONE ) {
2549 priv->phyNum = 1;
2550 } else if ( priv->phy[0] != TLAN_PHY_NONE ) {
2551 priv->phyNum = 0;
2552 } else {
2553 printk( "TLAN: Cannot initialize device, no PHY was found!\n" );
2554 }
2555
2556 } /* TLan_PhyDetect */
2557
2558
2559
2560
2561 void TLan_PhyPowerDown( struct net_device *dev )
2562 {
2563 TLanPrivateInfo *priv = dev->priv;
2564 u16 value;
2565
2566 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering down PHY(s).\n", dev->name );
2567 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
2568 TLan_MiiSync( dev->base_addr );
2569 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2570 if ( ( priv->phyNum == 0 ) && ( priv->phy[1] != TLAN_PHY_NONE ) && ( ! ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) ) ) {
2571 TLan_MiiSync( dev->base_addr );
2572 TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value );
2573 }
2574
2575 /* Wait for 50 ms and powerup
2576 * This is abitrary. It is intended to make sure the
2577 * transceiver settles.
2578 */
2579 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_PUP );
2580
2581 } /* TLan_PhyPowerDown */
2582
2583
2584
2585
2586 void TLan_PhyPowerUp( struct net_device *dev )
2587 {
2588 TLanPrivateInfo *priv = dev->priv;
2589 u16 value;
2590
2591 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering up PHY.\n", dev->name );
2592 TLan_MiiSync( dev->base_addr );
2593 value = MII_GC_LOOPBK;
2594 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2595 TLan_MiiSync(dev->base_addr);
2596 /* Wait for 500 ms and reset the
2597 * transceiver. The TLAN docs say both 50 ms and
2598 * 500 ms, so do the longer, just in case.
2599 */
2600 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_RESET );
2601
2602 } /* TLan_PhyPowerUp */
2603
2604
2605
2606
2607 void TLan_PhyReset( struct net_device *dev )
2608 {
2609 TLanPrivateInfo *priv = dev->priv;
2610 u16 phy;
2611 u16 value;
2612
2613 phy = priv->phy[priv->phyNum];
2614
2615 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Reseting PHY.\n", dev->name );
2616 TLan_MiiSync( dev->base_addr );
2617 value = MII_GC_LOOPBK | MII_GC_RESET;
2618 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, value );
2619 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2620 while ( value & MII_GC_RESET ) {
2621 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2622 }
2623
2624 /* Wait for 500 ms and initialize.
2625 * I don't remember why I wait this long.
2626 * I've changed this to 50ms, as it seems long enough.
2627 */
2628 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_START_LINK );
2629
2630 } /* TLan_PhyReset */
2631
2632
2633
2634
2635 void TLan_PhyStartLink( struct net_device *dev )
2636 {
2637 TLanPrivateInfo *priv = dev->priv;
2638 u16 ability;
2639 u16 control;
2640 u16 data;
2641 u16 phy;
2642 u16 status;
2643 u16 tctl;
2644
2645 phy = priv->phy[priv->phyNum];
2646 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Trying to activate link.\n", dev->name );
2647 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2648 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &ability );
2649
2650 if ( ( status & MII_GS_AUTONEG ) &&
2651 ( ! priv->aui ) ) {
2652 ability = status >> 11;
2653 if ( priv->speed == TLAN_SPEED_10 &&
2654 priv->duplex == TLAN_DUPLEX_HALF) {
2655 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0000);
2656 } else if ( priv->speed == TLAN_SPEED_10 &&
2657 priv->duplex == TLAN_DUPLEX_FULL) {
2658 priv->tlanFullDuplex = TRUE;
2659 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0100);
2660 } else if ( priv->speed == TLAN_SPEED_100 &&
2661 priv->duplex == TLAN_DUPLEX_HALF) {
2662 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2000);
2663 } else if ( priv->speed == TLAN_SPEED_100 &&
2664 priv->duplex == TLAN_DUPLEX_FULL) {
2665 priv->tlanFullDuplex = TRUE;
2666 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2100);
2667 } else {
2668
2669 /* Set Auto-Neg advertisement */
2670 TLan_MiiWriteReg( dev, phy, MII_AN_ADV, (ability << 5) | 1);
2671 /* Enablee Auto-Neg */
2672 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1000 );
2673 /* Restart Auto-Neg */
2674 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1200 );
2675 /* Wait for 4 sec for autonegotiation
2676 * to complete. The max spec time is less than this
2677 * but the card need additional time to start AN.
2678 * .5 sec should be plenty extra.
2679 */
2680 printk( "TLAN: %s: Starting autonegotiation.\n", dev->name );
2681 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN );
2682 return;
2683 }
2684
2685 }
2686
2687 if ( ( priv->aui ) && ( priv->phyNum != 0 ) ) {
2688 priv->phyNum = 0;
2689 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2690 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2691 TLan_SetTimer( dev, (40*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2692 return;
2693 } else if ( priv->phyNum == 0 ) {
2694 control = 0;
2695 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tctl );
2696 if ( priv->aui ) {
2697 tctl |= TLAN_TC_AUISEL;
2698 } else {
2699 tctl &= ~TLAN_TC_AUISEL;
2700 if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2701 control |= MII_GC_DUPLEX;
2702 priv->tlanFullDuplex = TRUE;
2703 }
2704 if ( priv->speed == TLAN_SPEED_100 ) {
2705 control |= MII_GC_SPEEDSEL;
2706 }
2707 }
2708 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, control );
2709 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tctl );
2710 }
2711
2712 /* Wait for 2 sec to give the transceiver time
2713 * to establish link.
2714 */
2715 TLan_SetTimer( dev, (4*HZ), TLAN_TIMER_FINISH_RESET );
2716
2717 } /* TLan_PhyStartLink */
2718
2719
2720
2721
2722 void TLan_PhyFinishAutoNeg( struct net_device *dev )
2723 {
2724 TLanPrivateInfo *priv = dev->priv;
2725 u16 an_adv;
2726 u16 an_lpa;
2727 u16 data;
2728 u16 mode;
2729 u16 phy;
2730 u16 status;
2731
2732 phy = priv->phy[priv->phyNum];
2733
2734 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2735 udelay( 1000 );
2736 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2737
2738 if ( ! ( status & MII_GS_AUTOCMPLT ) ) {
2739 /* Wait for 8 sec to give the process
2740 * more time. Perhaps we should fail after a while.
2741 */
2742 if (!priv->neg_be_verbose++) {
2743 printk(KERN_INFO "TLAN: Giving autonegotiation more time.\n");
2744 printk(KERN_INFO "TLAN: Please check that your adapter has\n");
2745 printk(KERN_INFO "TLAN: been properly connected to a HUB or Switch.\n");
2746 printk(KERN_INFO "TLAN: Trying to establish link in the background...\n");
2747 }
2748 TLan_SetTimer( dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN );
2749 return;
2750 }
2751
2752 printk( "TLAN: %s: Autonegotiation complete.\n", dev->name );
2753 TLan_MiiReadReg( dev, phy, MII_AN_ADV, &an_adv );
2754 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &an_lpa );
2755 mode = an_adv & an_lpa & 0x03E0;
2756 if ( mode & 0x0100 ) {
2757 priv->tlanFullDuplex = TRUE;
2758 } else if ( ! ( mode & 0x0080 ) && ( mode & 0x0040 ) ) {
2759 priv->tlanFullDuplex = TRUE;
2760 }
2761
2762 if ( ( ! ( mode & 0x0180 ) ) && ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) && ( priv->phyNum != 0 ) ) {
2763 priv->phyNum = 0;
2764 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2765 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2766 TLan_SetTimer( dev, (400*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2767 return;
2768 }
2769
2770 if ( priv->phyNum == 0 ) {
2771 if ( ( priv->duplex == TLAN_DUPLEX_FULL ) || ( an_adv & an_lpa & 0x0040 ) ) {
2772 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB | MII_GC_DUPLEX );
2773 printk( "TLAN: Starting internal PHY with FULL-DUPLEX\n" );
2774 } else {
2775 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB );
2776 printk( "TLAN: Starting internal PHY with HALF-DUPLEX\n" );
2777 }
2778 }
2779
2780 /* Wait for 100 ms. No reason in partiticular.
2781 */
2782 TLan_SetTimer( dev, (HZ/10), TLAN_TIMER_FINISH_RESET );
2783
2784 } /* TLan_PhyFinishAutoNeg */
2785
2786 #ifdef MONITOR
2787
2788 /*********************************************************************
2789 *
2790 * TLan_phyMonitor
2791 *
2792 * Returns:
2793 * None
2794 *
2795 * Params:
2796 * dev The device structure of this device.
2797 *
2798 *
2799 * This function monitors PHY condition by reading the status
2800 * register via the MII bus. This can be used to give info
2801 * about link changes (up/down), and possible switch to alternate
2802 * media.
2803 *
2804 * ******************************************************************/
2805
2806 void TLan_PhyMonitor( struct net_device *dev )
2807 {
2808 TLanPrivateInfo *priv = dev->priv;
2809 u16 phy;
2810 u16 phy_status;
2811
2812 phy = priv->phy[priv->phyNum];
2813
2814 /* Get PHY status register */
2815 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &phy_status );
2816
2817 /* Check if link has been lost */
2818 if (!(phy_status & MII_GS_LINK)) {
2819 if (priv->link) {
2820 priv->link = 0;
2821 printk(KERN_DEBUG "TLAN: %s has lost link\n", dev->name);
2822 dev->flags &= ~IFF_RUNNING;
2823 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
2824 return;
2825 }
2826 }
2827
2828 /* Link restablished? */
2829 if ((phy_status & MII_GS_LINK) && !priv->link) {
2830 priv->link = 1;
2831 printk(KERN_DEBUG "TLAN: %s has reestablished link\n", dev->name);
2832 dev->flags |= IFF_RUNNING;
2833 }
2834
2835 /* Setup a new monitor */
2836 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
2837 }
2838
2839 #endif /* MONITOR */
2840
2841
2842 /*****************************************************************************
2843 ******************************************************************************
2844
2845 ThunderLAN Driver MII Routines
2846
2847 These routines are based on the information in Chap. 2 of the
2848 "ThunderLAN Programmer's Guide", pp. 15-24.
2849
2850 ******************************************************************************
2851 *****************************************************************************/
2852
2853
2854 /***************************************************************
2855 * TLan_MiiReadReg
2856 *
2857 * Returns:
2858 * 0 if ack received ok
2859 * 1 otherwise.
2860 *
2861 * Parms:
2862 * dev The device structure containing
2863 * The io address and interrupt count
2864 * for this device.
2865 * phy The address of the PHY to be queried.
2866 * reg The register whose contents are to be
2867 * retreived.
2868 * val A pointer to a variable to store the
2869 * retrieved value.
2870 *
2871 * This function uses the TLAN's MII bus to retreive the contents
2872 * of a given register on a PHY. It sends the appropriate info
2873 * and then reads the 16-bit register value from the MII bus via
2874 * the TLAN SIO register.
2875 *
2876 **************************************************************/
2877
2878 int TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val )
2879 {
2880 u8 nack;
2881 u16 sio, tmp;
2882 u32 i;
2883 int err;
2884 int minten;
2885 TLanPrivateInfo *priv = dev->priv;
2886 unsigned long flags = 0;
2887
2888 err = FALSE;
2889 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2890 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2891
2892 if (!in_irq())
2893 spin_lock_irqsave(&priv->lock, flags);
2894
2895 TLan_MiiSync(dev->base_addr);
2896
2897 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
2898 if ( minten )
2899 TLan_ClearBit(TLAN_NET_SIO_MINTEN, sio);
2900
2901 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
2902 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Read ( 10b ) */
2903 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
2904 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
2905
2906
2907 TLan_ClearBit(TLAN_NET_SIO_MTXEN, sio); /* Change direction */
2908
2909 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Clock Idle bit */
2910 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2911 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Wait 300ns */
2912
2913 nack = TLan_GetBit(TLAN_NET_SIO_MDATA, sio); /* Check for ACK */
2914 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); /* Finish ACK */
2915 if (nack) { /* No ACK, so fake it */
2916 for (i = 0; i < 16; i++) {
2917 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2918 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2919 }
2920 tmp = 0xffff;
2921 err = TRUE;
2922 } else { /* ACK, so read data */
2923 for (tmp = 0, i = 0x8000; i; i >>= 1) {
2924 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2925 if (TLan_GetBit(TLAN_NET_SIO_MDATA, sio))
2926 tmp |= i;
2927 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2928 }
2929 }
2930
2931
2932 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Idle cycle */
2933 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2934
2935 if ( minten )
2936 TLan_SetBit(TLAN_NET_SIO_MINTEN, sio);
2937
2938 *val = tmp;
2939
2940 if (!in_irq())
2941 spin_unlock_irqrestore(&priv->lock, flags);
2942
2943 return err;
2944
2945 } /* TLan_MiiReadReg */
2946
2947
2948
2949
2950 /***************************************************************
2951 * TLan_MiiSendData
2952 *
2953 * Returns:
2954 * Nothing
2955 * Parms:
2956 * base_port The base IO port of the adapter in
2957 * question.
2958 * dev The address of the PHY to be queried.
2959 * data The value to be placed on the MII bus.
2960 * num_bits The number of bits in data that are to
2961 * be placed on the MII bus.
2962 *
2963 * This function sends on sequence of bits on the MII
2964 * configuration bus.
2965 *
2966 **************************************************************/
2967
2968 void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits )
2969 {
2970 u16 sio;
2971 u32 i;
2972
2973 if ( num_bits == 0 )
2974 return;
2975
2976 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
2977 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
2978 TLan_SetBit( TLAN_NET_SIO_MTXEN, sio );
2979
2980 for ( i = ( 0x1 << ( num_bits - 1 ) ); i; i >>= 1 ) {
2981 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
2982 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
2983 if ( data & i )
2984 TLan_SetBit( TLAN_NET_SIO_MDATA, sio );
2985 else
2986 TLan_ClearBit( TLAN_NET_SIO_MDATA, sio );
2987 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
2988 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
2989 }
2990
2991 } /* TLan_MiiSendData */
2992
2993
2994
2995
2996 /***************************************************************
2997 * TLan_MiiSync
2998 *
2999 * Returns:
3000 * Nothing
3001 * Parms:
3002 * base_port The base IO port of the adapter in
3003 * question.
3004 *
3005 * This functions syncs all PHYs in terms of the MII configuration
3006 * bus.
3007 *
3008 **************************************************************/
3009
3010 void TLan_MiiSync( u16 base_port )
3011 {
3012 int i;
3013 u16 sio;
3014
3015 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
3016 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
3017
3018 TLan_ClearBit( TLAN_NET_SIO_MTXEN, sio );
3019 for ( i = 0; i < 32; i++ ) {
3020 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
3021 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3022 }
3023
3024 } /* TLan_MiiSync */
3025
3026
3027
3028
3029 /***************************************************************
3030 * TLan_MiiWriteReg
3031 *
3032 * Returns:
3033 * Nothing
3034 * Parms:
3035 * dev The device structure for the device
3036 * to write to.
3037 * phy The address of the PHY to be written to.
3038 * reg The register whose contents are to be
3039 * written.
3040 * val The value to be written to the register.
3041 *
3042 * This function uses the TLAN's MII bus to write the contents of a
3043 * given register on a PHY. It sends the appropriate info and then
3044 * writes the 16-bit register value from the MII configuration bus
3045 * via the TLAN SIO register.
3046 *
3047 **************************************************************/
3048
3049 void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val )
3050 {
3051 u16 sio;
3052 int minten;
3053 unsigned long flags = 0;
3054 TLanPrivateInfo *priv = dev->priv;
3055
3056 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
3057 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
3058
3059 if (!in_irq())
3060 spin_lock_irqsave(&priv->lock, flags);
3061
3062 TLan_MiiSync( dev->base_addr );
3063
3064 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
3065 if ( minten )
3066 TLan_ClearBit( TLAN_NET_SIO_MINTEN, sio );
3067
3068 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
3069 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Write ( 01b ) */
3070 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
3071 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
3072
3073 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Send ACK */
3074 TLan_MiiSendData( dev->base_addr, val, 16 ); /* Send Data */
3075
3076 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); /* Idle cycle */
3077 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3078
3079 if ( minten )
3080 TLan_SetBit( TLAN_NET_SIO_MINTEN, sio );
3081
3082 if (!in_irq())
3083 spin_unlock_irqrestore(&priv->lock, flags);
3084
3085 } /* TLan_MiiWriteReg */
3086
3087
3088
3089
3090 /*****************************************************************************
3091 ******************************************************************************
3092
3093 ThunderLAN Driver Eeprom routines
3094
3095 The Compaq Netelligent 10 and 10/100 cards use a Microchip 24C02A
3096 EEPROM. These functions are based on information in Microchip's
3097 data sheet. I don't know how well this functions will work with
3098 other EEPROMs.
3099
3100 ******************************************************************************
3101 *****************************************************************************/
3102
3103
3104 /***************************************************************
3105 * TLan_EeSendStart
3106 *
3107 * Returns:
3108 * Nothing
3109 * Parms:
3110 * io_base The IO port base address for the
3111 * TLAN device with the EEPROM to
3112 * use.
3113 *
3114 * This function sends a start cycle to an EEPROM attached
3115 * to a TLAN chip.
3116 *
3117 **************************************************************/
3118
3119 void TLan_EeSendStart( u16 io_base )
3120 {
3121 u16 sio;
3122
3123 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3124 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3125
3126 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3127 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3128 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3129 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3130 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3131
3132 } /* TLan_EeSendStart */
3133
3134
3135
3136
3137 /***************************************************************
3138 * TLan_EeSendByte
3139 *
3140 * Returns:
3141 * If the correct ack was received, 0, otherwise 1
3142 * Parms: io_base The IO port base address for the
3143 * TLAN device with the EEPROM to
3144 * use.
3145 * data The 8 bits of information to
3146 * send to the EEPROM.
3147 * stop If TLAN_EEPROM_STOP is passed, a
3148 * stop cycle is sent after the
3149 * byte is sent after the ack is
3150 * read.
3151 *
3152 * This function sends a byte on the serial EEPROM line,
3153 * driving the clock to send each bit. The function then
3154 * reverses transmission direction and reads an acknowledge
3155 * bit.
3156 *
3157 **************************************************************/
3158
3159 int TLan_EeSendByte( u16 io_base, u8 data, int stop )
3160 {
3161 int err;
3162 u8 place;
3163 u16 sio;
3164
3165 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3166 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3167
3168 /* Assume clock is low, tx is enabled; */
3169 for ( place = 0x80; place != 0; place >>= 1 ) {
3170 if ( place & data )
3171 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3172 else
3173 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3174 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3175 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3176 }
3177 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3178 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3179 err = TLan_GetBit( TLAN_NET_SIO_EDATA, sio );
3180 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3181 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3182
3183 if ( ( ! err ) && stop ) {
3184 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
3185 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3186 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3187 }
3188
3189 return ( err );
3190
3191 } /* TLan_EeSendByte */
3192
3193
3194
3195
3196 /***************************************************************
3197 * TLan_EeReceiveByte
3198 *
3199 * Returns:
3200 * Nothing
3201 * Parms:
3202 * io_base The IO port base address for the
3203 * TLAN device with the EEPROM to
3204 * use.
3205 * data An address to a char to hold the
3206 * data sent from the EEPROM.
3207 * stop If TLAN_EEPROM_STOP is passed, a
3208 * stop cycle is sent after the
3209 * byte is received, and no ack is
3210 * sent.
3211 *
3212 * This function receives 8 bits of data from the EEPROM
3213 * over the serial link. It then sends and ack bit, or no
3214 * ack and a stop bit. This function is used to retrieve
3215 * data after the address of a byte in the EEPROM has been
3216 * sent.
3217 *
3218 **************************************************************/
3219
3220 void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop )
3221 {
3222 u8 place;
3223 u16 sio;
3224
3225 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3226 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3227 *data = 0;
3228
3229 /* Assume clock is low, tx is enabled; */
3230 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3231 for ( place = 0x80; place; place >>= 1 ) {
3232 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3233 if ( TLan_GetBit( TLAN_NET_SIO_EDATA, sio ) )
3234 *data |= place;
3235 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3236 }
3237
3238 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3239 if ( ! stop ) {
3240 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* Ack = 0 */
3241 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3242 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3243 } else {
3244 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); /* No ack = 1 (?) */
3245 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3246 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3247 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
3248 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3249 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3250 }
3251
3252 } /* TLan_EeReceiveByte */
3253
3254
3255
3256
3257 /***************************************************************
3258 * TLan_EeReadByte
3259 *
3260 * Returns:
3261 * No error = 0, else, the stage at which the error
3262 * occurred.
3263 * Parms:
3264 * io_base The IO port base address for the
3265 * TLAN device with the EEPROM to
3266 * use.
3267 * ee_addr The address of the byte in the
3268 * EEPROM whose contents are to be
3269 * retrieved.
3270 * data An address to a char to hold the
3271 * data obtained from the EEPROM.
3272 *
3273 * This function reads a byte of information from an byte
3274 * cell in the EEPROM.
3275 *
3276 **************************************************************/
3277
3278 int TLan_EeReadByte( struct net_device *dev, u8 ee_addr, u8 *data )
3279 {
3280 int err;
3281 TLanPrivateInfo *priv = dev->priv;
3282 unsigned long flags = 0;
3283 int ret=0;
3284
3285 spin_lock_irqsave(&priv->lock, flags);
3286
3287 TLan_EeSendStart( dev->base_addr );
3288 err = TLan_EeSendByte( dev->base_addr, 0xA0, TLAN_EEPROM_ACK );
3289 if (err)
3290 {
3291 ret=1;
3292 goto fail;
3293 }
3294 err = TLan_EeSendByte( dev->base_addr, ee_addr, TLAN_EEPROM_ACK );
3295 if (err)
3296 {
3297 ret=2;
3298 goto fail;
3299 }
3300 TLan_EeSendStart( dev->base_addr );
3301 err = TLan_EeSendByte( dev->base_addr, 0xA1, TLAN_EEPROM_ACK );
3302 if (err)
3303 {
3304 ret=3;
3305 goto fail;
3306 }
3307 TLan_EeReceiveByte( dev->base_addr, data, TLAN_EEPROM_STOP );
3308 fail:
3309 spin_unlock_irqrestore(&priv->lock, flags);
3310
3311 return ret;
3312
3313 } /* TLan_EeReadByte */
3314
3315
3316
MOXA 2.6.9 from sdlinux-moxaart.tgz