drivers/i2c/busses/i2c-ibm_iic.c

   1 /*
   2  * drivers/i2c/i2c-ibm_iic.c
   3  *
   4  * Support for the IIC peripheral on IBM PPC 4xx
   5  *
   6  * Copyright (c) 2003, 2004 Zultys Technologies.
   7  * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
   8  *
   9  * Based on original work by
  10  *      Ian DaSilva  <idasilva@mvista.com>
  11  *      Armin Kuster <akuster@mvista.com>
  12  *      Matt Porter  <mporter@mvista.com>
  13  *
  14  *      Copyright 2000-2003 MontaVista Software Inc.
  15  *
  16  * Original driver version was highly leveraged from i2c-elektor.c
  17  *
  18  *      Copyright 1995-97 Simon G. Vogl
  19  *                1998-99 Hans Berglund
  20  *
  21  *      With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi>
  22  *      and even Frodo Looijaard <frodol@dds.nl>
  23  *
  24  * This program is free software; you can redistribute  it and/or modify it
  25  * under  the terms of  the GNU General  Public License as published by the
  26  * Free Software Foundation;  either version 2 of the  License, or (at your
  27  * option) any later version.
  28  *
  29  */
  30
  31 #include <linux/config.h>
  32 #include <linux/module.h>
  33 #include <linux/kernel.h>
  34 #include <linux/ioport.h>
  35 #include <linux/delay.h>
  36 #include <linux/slab.h>
  37 #include <linux/init.h>
  38 #include <linux/interrupt.h>
  39 #include <asm/irq.h>
  40 #include <asm/io.h>
  41 #include <linux/i2c.h>
  42 #include <linux/i2c-id.h>
  43 #include <asm/ocp.h>
  44 #include <asm/ibm4xx.h>
  45
  46 #include "i2c-ibm_iic.h"
  47
  48 #define DRIVER_VERSION "2.1"
  49
  50 MODULE_DESCRIPTION("IBM IIC driver v" DRIVER_VERSION);
  51 MODULE_LICENSE("GPL");
  52
  53 static int iic_force_poll;
  54 module_param(iic_force_poll, bool, 0);
  55 MODULE_PARM_DESC(iic_force_poll, "Force polling mode");
  56
  57 static int iic_force_fast;
  58 module_param(iic_force_fast, bool, 0);
  59 MODULE_PARM_DESC(iic_fast_poll, "Force fast mode (400 kHz)");
  60
  61 #define DBG_LEVEL 0
  62
  63 #ifdef DBG
  64 #undef DBG
  65 #endif
  66
  67 #ifdef DBG2
  68 #undef DBG2
  69 #endif
  70
  71 #if DBG_LEVEL > 0
  72 #  define DBG(f,x...)   printk(KERN_DEBUG "ibm-iic" f, ##x)
  73 #else
  74 #  define DBG(f,x...)   ((void)0)
  75 #endif
  76 #if DBG_LEVEL > 1
  77 #  define DBG2(f,x...)  DBG(f, ##x)
  78 #else
  79 #  define DBG2(f,x...)  ((void)0)
  80 #endif
  81 #if DBG_LEVEL > 2
  82 static void dump_iic_regs(const char* header, struct ibm_iic_private* dev)
  83 {
  84         volatile struct iic_regs *iic = dev->vaddr;
  85         printk(KERN_DEBUG "ibm-iic%d: %s\n", dev->idx, header);
  86         printk(KERN_DEBUG "  cntl     = 0x%02x, mdcntl = 0x%02x\n"
  87                KERN_DEBUG "  sts      = 0x%02x, extsts = 0x%02x\n"
  88                KERN_DEBUG "  clkdiv   = 0x%02x, xfrcnt = 0x%02x\n"
  89                KERN_DEBUG "  xtcntlss = 0x%02x, directcntl = 0x%02x\n",
  90                 in_8(&iic->cntl), in_8(&iic->mdcntl), in_8(&iic->sts),
  91                 in_8(&iic->extsts), in_8(&iic->clkdiv), in_8(&iic->xfrcnt),
  92                 in_8(&iic->xtcntlss), in_8(&iic->directcntl));
  93 }
  94 #  define DUMP_REGS(h,dev)      dump_iic_regs((h),(dev))
  95 #else
  96 #  define DUMP_REGS(h,dev)      ((void)0)
  97 #endif
  98
  99 /* Bus timings (in ns) for bit-banging */
 100 static struct i2c_timings {
 101         unsigned int hd_sta;
 102         unsigned int su_sto;
 103         unsigned int low;
 104         unsigned int high;
 105         unsigned int buf;
 106 } timings [] = {
 107 /* Standard mode (100 KHz) */
 108 {
 109         .hd_sta = 4000,
 110         .su_sto = 4000,
 111         .low    = 4700,
 112         .high   = 4000,
 113         .buf    = 4700,
 114 },
 115 /* Fast mode (400 KHz) */
 116 {
 117         .hd_sta = 600,
 118         .su_sto = 600,
 119         .low    = 1300,
 120         .high   = 600,
 121         .buf    = 1300,
 122 }};
 123
 124 /* Enable/disable interrupt generation */
 125 static inline void iic_interrupt_mode(struct ibm_iic_private* dev, int enable)
 126 {
 127         out_8(&dev->vaddr->intmsk, enable ? INTRMSK_EIMTC : 0);
 128 }
 129
 130 /*
 131  * Initialize IIC interface.
 132  */
 133 static void iic_dev_init(struct ibm_iic_private* dev)
 134 {
 135         volatile struct iic_regs *iic = dev->vaddr;
 136
 137         DBG("%d: init\n", dev->idx);
 138
 139         /* Clear master address */
 140         out_8(&iic->lmadr, 0);
 141         out_8(&iic->hmadr, 0);
 142
 143         /* Clear slave address */
 144         out_8(&iic->lsadr, 0);
 145         out_8(&iic->hsadr, 0);
 146
 147         /* Clear status & extended status */
 148         out_8(&iic->sts, STS_SCMP | STS_IRQA);
 149         out_8(&iic->extsts, EXTSTS_IRQP | EXTSTS_IRQD | EXTSTS_LA
 150                             | EXTSTS_ICT | EXTSTS_XFRA);
 151
 152         /* Set clock divider */
 153         out_8(&iic->clkdiv, dev->clckdiv);
 154
 155         /* Clear transfer count */
 156         out_8(&iic->xfrcnt, 0);
 157
 158         /* Clear extended control and status */
 159         out_8(&iic->xtcntlss, XTCNTLSS_SRC | XTCNTLSS_SRS | XTCNTLSS_SWC
 160                             | XTCNTLSS_SWS);
 161
 162         /* Clear control register */
 163         out_8(&iic->cntl, 0);
 164
 165         /* Enable interrupts if possible */
 166         iic_interrupt_mode(dev, dev->irq >= 0);
 167
 168         /* Set mode control */
 169         out_8(&iic->mdcntl, MDCNTL_FMDB | MDCNTL_EINT | MDCNTL_EUBS
 170                             | (dev->fast_mode ? MDCNTL_FSM : 0));
 171
 172         DUMP_REGS("iic_init", dev);
 173 }
 174
 175 /*
 176  * Reset IIC interface
 177  */
 178 static void iic_dev_reset(struct ibm_iic_private* dev)
 179 {
 180         volatile struct iic_regs *iic = dev->vaddr;
 181         int i;
 182         u8 dc;
 183
 184         DBG("%d: soft reset\n", dev->idx);
 185         DUMP_REGS("reset", dev);
 186
 187         /* Place chip in the reset state */
 188         out_8(&iic->xtcntlss, XTCNTLSS_SRST);
 189
 190         /* Check if bus is free */
 191         dc = in_8(&iic->directcntl);
 192         if (!DIRCTNL_FREE(dc)){
 193                 DBG("%d: trying to regain bus control\n", dev->idx);
 194
 195                 /* Try to set bus free state */
 196                 out_8(&iic->directcntl, DIRCNTL_SDAC | DIRCNTL_SCC);
 197
 198                 /* Wait until we regain bus control */
 199                 for (i = 0; i < 100; ++i){
 200                         dc = in_8(&iic->directcntl);
 201                         if (DIRCTNL_FREE(dc))
 202                                 break;
 203
 204                         /* Toggle SCL line */
 205                         dc ^= DIRCNTL_SCC;
 206                         out_8(&iic->directcntl, dc);
 207                         udelay(10);
 208                         dc ^= DIRCNTL_SCC;
 209                         out_8(&iic->directcntl, dc);
 210
 211                         /* be nice */
 212                         cond_resched();
 213                 }
 214         }
 215
 216         /* Remove reset */
 217         out_8(&iic->xtcntlss, 0);
 218
 219         /* Reinitialize interface */
 220         iic_dev_init(dev);
 221 }
 222
 223 /*
 224  * Do 0-length transaction using bit-banging through IIC_DIRECTCNTL register.
 225  */
 226
 227 /* Wait for SCL and/or SDA to be high */
 228 static int iic_dc_wait(volatile struct iic_regs *iic, u8 mask)
 229 {
 230         unsigned long x = jiffies + HZ / 28 + 2;
 231         while ((in_8(&iic->directcntl) & mask) != mask){
 232                 if (unlikely(time_after(jiffies, x)))
 233                         return -1;
 234                 cond_resched();
 235         }
 236         return 0;
 237 }
 238
 239 static int iic_smbus_quick(struct ibm_iic_private* dev, const struct i2c_msg* p)
 240 {
 241         volatile struct iic_regs* iic = dev->vaddr;
 242         const struct i2c_timings* t = &timings[dev->fast_mode ? 1 : 0];
 243         u8 mask, v, sda;
 244         int i, res;
 245
 246         /* Only 7-bit addresses are supported */
 247         if (unlikely(p->flags & I2C_M_TEN)){
 248                 DBG("%d: smbus_quick - 10 bit addresses are not supported\n",
 249                         dev->idx);
 250                 return -EINVAL;
 251         }
 252
 253         DBG("%d: smbus_quick(0x%02x)\n", dev->idx, p->addr);
 254
 255         /* Reset IIC interface */
 256         out_8(&iic->xtcntlss, XTCNTLSS_SRST);
 257
 258         /* Wait for bus to become free */
 259         out_8(&iic->directcntl, DIRCNTL_SDAC | DIRCNTL_SCC);
 260         if (unlikely(iic_dc_wait(iic, DIRCNTL_MSDA | DIRCNTL_MSC)))
 261                 goto err;
 262         ndelay(t->buf);
 263
 264         /* START */
 265         out_8(&iic->directcntl, DIRCNTL_SCC);
 266         sda = 0;
 267         ndelay(t->hd_sta);
 268
 269         /* Send address */
 270         v = (u8)((p->addr << 1) | ((p->flags & I2C_M_RD) ? 1 : 0));
 271         for (i = 0, mask = 0x80; i < 8; ++i, mask >>= 1){
 272                 out_8(&iic->directcntl, sda);
 273                 ndelay(t->low / 2);
 274                 sda = (v & mask) ? DIRCNTL_SDAC : 0;
 275                 out_8(&iic->directcntl, sda);
 276                 ndelay(t->low / 2);
 277
 278                 out_8(&iic->directcntl, DIRCNTL_SCC | sda);
 279                 if (unlikely(iic_dc_wait(iic, DIRCNTL_MSC)))
 280                         goto err;
 281                 ndelay(t->high);
 282         }
 283
 284         /* ACK */
 285         out_8(&iic->directcntl, sda);
 286         ndelay(t->low / 2);
 287         out_8(&iic->directcntl, DIRCNTL_SDAC);
 288         ndelay(t->low / 2);
 289         out_8(&iic->directcntl, DIRCNTL_SDAC | DIRCNTL_SCC);
 290         if (unlikely(iic_dc_wait(iic, DIRCNTL_MSC)))
 291                 goto err;
 292         res = (in_8(&iic->directcntl) & DIRCNTL_MSDA) ? -EREMOTEIO : 1;
 293         ndelay(t->high);
 294
 295         /* STOP */
 296         out_8(&iic->directcntl, 0);
 297         ndelay(t->low);
 298         out_8(&iic->directcntl, DIRCNTL_SCC);
 299         if (unlikely(iic_dc_wait(iic, DIRCNTL_MSC)))
 300                 goto err;
 301         ndelay(t->su_sto);
 302         out_8(&iic->directcntl, DIRCNTL_SDAC | DIRCNTL_SCC);
 303
 304         ndelay(t->buf);
 305
 306         DBG("%d: smbus_quick -> %s\n", dev->idx, res ? "NACK" : "ACK");
 307 out:
 308         /* Remove reset */
 309         out_8(&iic->xtcntlss, 0);
 310
 311         /* Reinitialize interface */
 312         iic_dev_init(dev);
 313
 314         return res;
 315 err:
 316         DBG("%d: smbus_quick - bus is stuck\n", dev->idx);
 317         res = -EREMOTEIO;
 318         goto out;
 319 }
 320
 321 /*
 322  * IIC interrupt handler
 323  */
 324 static irqreturn_t iic_handler(int irq, void *dev_id, struct pt_regs *regs)
 325 {
 326         struct ibm_iic_private* dev = (struct ibm_iic_private*)dev_id;
 327         volatile struct iic_regs* iic = dev->vaddr;
 328
 329         DBG2("%d: irq handler, STS = 0x%02x, EXTSTS = 0x%02x\n",
 330              dev->idx, in_8(&iic->sts), in_8(&iic->extsts));
 331
 332         /* Acknowledge IRQ and wakeup iic_wait_for_tc */
 333         out_8(&iic->sts, STS_IRQA | STS_SCMP);
 334         wake_up_interruptible(&dev->wq);
 335
 336         return IRQ_HANDLED;
 337 }
 338
 339 /*
 340  * Get master transfer result and clear errors if any.
 341  * Returns the number of actually transferred bytes or error (<0)
 342  */
 343 static int iic_xfer_result(struct ibm_iic_private* dev)
 344 {
 345         volatile struct iic_regs *iic = dev->vaddr;
 346
 347         if (unlikely(in_8(&iic->sts) & STS_ERR)){
 348                 DBG("%d: xfer error, EXTSTS = 0x%02x\n", dev->idx,
 349                         in_8(&iic->extsts));
 350
 351                 /* Clear errors and possible pending IRQs */
 352                 out_8(&iic->extsts, EXTSTS_IRQP | EXTSTS_IRQD |
 353                         EXTSTS_LA | EXTSTS_ICT | EXTSTS_XFRA);
 354
 355                 /* Flush master data buffer */
 356                 out_8(&iic->mdcntl, in_8(&iic->mdcntl) | MDCNTL_FMDB);
 357
 358                 /* Is bus free?
 359                  * If error happened during combined xfer
 360                  * IIC interface is usually stuck in some strange
 361                  * state, the only way out - soft reset.
 362                  */
 363                 if ((in_8(&iic->extsts) & EXTSTS_BCS_MASK) != EXTSTS_BCS_FREE){
 364                         DBG("%d: bus is stuck, resetting\n", dev->idx);
 365                         iic_dev_reset(dev);
 366                 }
 367                 return -EREMOTEIO;
 368         }
 369         else
 370                 return in_8(&iic->xfrcnt) & XFRCNT_MTC_MASK;
 371 }
 372
 373 /*
 374  * Try to abort active transfer.
 375  */
 376 static void iic_abort_xfer(struct ibm_iic_private* dev)
 377 {
 378         volatile struct iic_regs *iic = dev->vaddr;
 379         unsigned long x;
 380
 381         DBG("%d: iic_abort_xfer\n", dev->idx);
 382
 383         out_8(&iic->cntl, CNTL_HMT);
 384
 385         /*
 386          * Wait for the abort command to complete.
 387          * It's not worth to be optimized, just poll (timeout >= 1 tick)
 388          */
 389         x = jiffies + 2;
 390         while ((in_8(&iic->extsts) & EXTSTS_BCS_MASK) != EXTSTS_BCS_FREE){
 391                 if (time_after(jiffies, x)){
 392                         DBG("%d: abort timeout, resetting...\n", dev->idx);
 393                         iic_dev_reset(dev);
 394                         return;
 395                 }
 396                 schedule();
 397         }
 398
 399         /* Just to clear errors */
 400         iic_xfer_result(dev);
 401 }
 402
 403 /*
 404  * Wait for master transfer to complete.
 405  * It puts current process to sleep until we get interrupt or timeout expires.
 406  * Returns the number of transferred bytes or error (<0)
 407  */
 408 static int iic_wait_for_tc(struct ibm_iic_private* dev){
 409
 410         volatile struct iic_regs *iic = dev->vaddr;
 411         int ret = 0;
 412
 413         if (dev->irq >= 0){
 414                 /* Interrupt mode */
 415                 wait_queue_t wait;
 416                 init_waitqueue_entry(&wait, current);
 417
 418                 add_wait_queue(&dev->wq, &wait);
 419                 set_current_state(TASK_INTERRUPTIBLE);
 420                 if (in_8(&iic->sts) & STS_PT)
 421                         schedule_timeout(dev->adap.timeout * HZ);
 422                 set_current_state(TASK_RUNNING);
 423                 remove_wait_queue(&dev->wq, &wait);
 424
 425                 if (unlikely(signal_pending(current))){
 426                         DBG("%d: wait interrupted\n", dev->idx);
 427                         ret = -ERESTARTSYS;
 428                 } else if (unlikely(in_8(&iic->sts) & STS_PT)){
 429                         DBG("%d: wait timeout\n", dev->idx);
 430                         ret = -ETIMEDOUT;
 431                 }
 432         }
 433         else {
 434                 /* Polling mode */
 435                 unsigned long x = jiffies + dev->adap.timeout * HZ;
 436
 437                 while (in_8(&iic->sts) & STS_PT){
 438                         if (unlikely(time_after(jiffies, x))){
 439                                 DBG("%d: poll timeout\n", dev->idx);
 440                                 ret = -ETIMEDOUT;
 441                                 break;
 442                         }
 443
 444                         if (unlikely(signal_pending(current))){
 445                                 DBG("%d: poll interrupted\n", dev->idx);
 446                                 ret = -ERESTARTSYS;
 447                                 break;
 448                         }
 449                         schedule();
 450                 }
 451         }
 452
 453         if (unlikely(ret < 0))
 454                 iic_abort_xfer(dev);
 455         else
 456                 ret = iic_xfer_result(dev);
 457
 458         DBG2("%d: iic_wait_for_tc -> %d\n", dev->idx, ret);
 459
 460         return ret;
 461 }
 462
 463 /*
 464  * Low level master transfer routine
 465  */
 466 static int iic_xfer_bytes(struct ibm_iic_private* dev, struct i2c_msg* pm,
 467                           int combined_xfer)
 468 {
 469         volatile struct iic_regs *iic = dev->vaddr;
 470         char* buf = pm->buf;
 471         int i, j, loops, ret = 0;
 472         int len = pm->len;
 473
 474         u8 cntl = (in_8(&iic->cntl) & CNTL_AMD) | CNTL_PT;
 475         if (pm->flags & I2C_M_RD)
 476                 cntl |= CNTL_RW;
 477
 478         loops = (len + 3) / 4;
 479         for (i = 0; i < loops; ++i, len -= 4){
 480                 int count = len > 4 ? 4 : len;
 481                 u8 cmd = cntl | ((count - 1) << CNTL_TCT_SHIFT);
 482
 483                 if (!(cntl & CNTL_RW))
 484                         for (j = 0; j < count; ++j)
 485                                 out_8((volatile u8*)&iic->mdbuf, *buf++);
 486
 487                 if (i < loops - 1)
 488                         cmd |= CNTL_CHT;
 489                 else if (combined_xfer)
 490                         cmd |= CNTL_RPST;
 491
 492                 DBG2("%d: xfer_bytes, %d, CNTL = 0x%02x\n", dev->idx, count, cmd);
 493
 494                 /* Start transfer */
 495                 out_8(&iic->cntl, cmd);
 496
 497                 /* Wait for completion */
 498                 ret = iic_wait_for_tc(dev);
 499
 500                 if (unlikely(ret < 0))
 501                         break;
 502                 else if (unlikely(ret != count)){
 503                         DBG("%d: xfer_bytes, requested %d, transfered %d\n",
 504                                 dev->idx, count, ret);
 505
 506                         /* If it's not a last part of xfer, abort it */
 507                         if (combined_xfer || (i < loops - 1))
 508                                 iic_abort_xfer(dev);
 509
 510                         ret = -EREMOTEIO;
 511                         break;
 512                 }
 513
 514                 if (cntl & CNTL_RW)
 515                         for (j = 0; j < count; ++j)
 516                                 *buf++ = in_8((volatile u8*)&iic->mdbuf);
 517         }
 518
 519         return ret > 0 ? 0 : ret;
 520 }
 521
 522 /*
 523  * Set target slave address for master transfer
 524  */
 525 static inline void iic_address(struct ibm_iic_private* dev, struct i2c_msg* msg)
 526 {
 527         volatile struct iic_regs *iic = dev->vaddr;
 528         u16 addr = msg->addr;
 529
 530         DBG2("%d: iic_address, 0x%03x (%d-bit)\n", dev->idx,
 531                 addr, msg->flags & I2C_M_TEN ? 10 : 7);
 532
 533         if (msg->flags & I2C_M_TEN){
 534             out_8(&iic->cntl, CNTL_AMD);
 535             out_8(&iic->lmadr, addr);
 536             out_8(&iic->hmadr, 0xf0 | ((addr >> 7) & 0x06));
 537         }
 538         else {
 539             out_8(&iic->cntl, 0);
 540             out_8(&iic->lmadr, addr << 1);
 541         }
 542 }
 543
 544 static inline int iic_invalid_address(const struct i2c_msg* p)
 545 {
 546         return (p->addr > 0x3ff) || (!(p->flags & I2C_M_TEN) && (p->addr > 0x7f));
 547 }
 548
 549 static inline int iic_address_neq(const struct i2c_msg* p1,
 550                                   const struct i2c_msg* p2)
 551 {
 552         return (p1->addr != p2->addr)
 553                 || ((p1->flags & I2C_M_TEN) != (p2->flags & I2C_M_TEN));
 554 }
 555
 556 /*
 557  * Generic master transfer entrypoint.
 558  * Returns the number of processed messages or error (<0)
 559  */
 560 static int iic_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
 561 {
 562         struct ibm_iic_private* dev = (struct ibm_iic_private*)(i2c_get_adapdata(adap));
 563         volatile struct iic_regs *iic = dev->vaddr;
 564         int i, ret = 0;
 565
 566         DBG2("%d: iic_xfer, %d msg(s)\n", dev->idx, num);
 567
 568         if (!num)
 569                 return 0;
 570
 571         /* Check the sanity of the passed messages.
 572          * Uhh, generic i2c layer is more suitable place for such code...
 573          */
 574         if (unlikely(iic_invalid_address(&msgs[0]))){
 575                 DBG("%d: invalid address 0x%03x (%d-bit)\n", dev->idx,
 576                         msgs[0].addr, msgs[0].flags & I2C_M_TEN ? 10 : 7);
 577                 return -EINVAL;
 578         }
 579         for (i = 0; i < num; ++i){
 580                 if (unlikely(msgs[i].len <= 0)){
 581                         if (num == 1 && !msgs[0].len){
 582                                 /* Special case for I2C_SMBUS_QUICK emulation.
 583                                  * IBM IIC doesn't support 0-length transactions
 584                                  * so we have to emulate them using bit-banging.
 585                                  */
 586                                 return iic_smbus_quick(dev, &msgs[0]);
 587                         }
 588                         DBG("%d: invalid len %d in msg[%d]\n", dev->idx,
 589                                 msgs[i].len, i);
 590                         return -EINVAL;
 591                 }
 592                 if (unlikely(iic_address_neq(&msgs[0], &msgs[i]))){
 593                         DBG("%d: invalid addr in msg[%d]\n", dev->idx, i);
 594                         return -EINVAL;
 595                 }
 596         }
 597
 598         /* Check bus state */
 599         if (unlikely((in_8(&iic->extsts) & EXTSTS_BCS_MASK) != EXTSTS_BCS_FREE)){
 600                 DBG("%d: iic_xfer, bus is not free\n", dev->idx);
 601
 602                 /* Usually it means something serious has happend.
 603                  * We *cannot* have unfinished previous transfer
 604                  * so it doesn't make any sense to try to stop it.
 605                  * Probably we were not able to recover from the
 606                  * previous error.
 607                  * The only *reasonable* thing I can think of here
 608                  * is soft reset.  --ebs
 609                  */
 610                 iic_dev_reset(dev);
 611
 612                 if ((in_8(&iic->extsts) & EXTSTS_BCS_MASK) != EXTSTS_BCS_FREE){
 613                         DBG("%d: iic_xfer, bus is still not free\n", dev->idx);
 614                         return -EREMOTEIO;
 615                 }
 616         }
 617         else {
 618                 /* Flush master data buffer (just in case) */
 619                 out_8(&iic->mdcntl, in_8(&iic->mdcntl) | MDCNTL_FMDB);
 620         }
 621
 622         /* Load slave address */
 623         iic_address(dev, &msgs[0]);
 624
 625         /* Do real transfer */
 626         for (i = 0; i < num && !ret; ++i)
 627                 ret = iic_xfer_bytes(dev, &msgs[i], i < num - 1);
 628
 629         return ret < 0 ? ret : num;
 630 }
 631
 632 static u32 iic_func(struct i2c_adapter *adap)
 633 {
 634         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR;
 635 }
 636
 637 static struct i2c_algorithm iic_algo = {
 638         .name           = "IBM IIC algorithm",
 639         .id             = I2C_ALGO_OCP,
 640         .master_xfer    = iic_xfer,
 641         .smbus_xfer     = NULL,
 642         .slave_send     = NULL,
 643         .slave_recv     = NULL,
 644         .algo_control   = NULL,
 645         .functionality  = iic_func
 646 };
 647
 648 /*
 649  * Calculates IICx_CLCKDIV value for a specific OPB clock frequency
 650  */
 651 static inline u8 iic_clckdiv(unsigned int opb)
 652 {
 653         /* Compatibility kludge, should go away after all cards
 654          * are fixed to fill correct value for opbfreq.
 655          * Previous driver version used hardcoded divider value 4,
 656          * it corresponds to OPB frequency from the range (40, 50] MHz
 657          */
 658         if (!opb){
 659                 printk(KERN_WARNING "ibm-iic: using compatibility value for OPB freq,"
 660                         " fix your board specific setup\n");
 661                 opb = 50000000;
 662         }
 663
 664         /* Convert to MHz */
 665         opb /= 1000000;
 666
 667         if (opb < 20 || opb > 150){
 668                 printk(KERN_CRIT "ibm-iic: invalid OPB clock frequency %u MHz\n",
 669                         opb);
 670                 opb = opb < 20 ? 20 : 150;
 671         }
 672         return (u8)((opb + 9) / 10 - 1);
 673 }
 674
 675 /*
 676  * Register single IIC interface
 677  */
 678 static int __devinit iic_probe(struct ocp_device *ocp){
 679
 680         struct ibm_iic_private* dev;
 681         struct i2c_adapter* adap;
 682         struct ocp_func_iic_data* iic_data = ocp->def->additions;
 683         int ret;
 684
 685         if (!iic_data)
 686                 printk(KERN_WARNING"ibm-iic%d: missing additional data!\n",
 687                         ocp->def->index);
 688
 689         if (!(dev = kmalloc(sizeof(*dev), GFP_KERNEL))){
 690                 printk(KERN_CRIT "ibm-iic%d: failed to allocate device data\n",
 691                         ocp->def->index);
 692                 return -ENOMEM;
 693         }
 694
 695         memset(dev, 0, sizeof(*dev));
 696         dev->idx = ocp->def->index;
 697         ocp_set_drvdata(ocp, dev);
 698
 699         if (!(dev->vaddr = ioremap(ocp->def->paddr, sizeof(struct iic_regs)))){
 700                 printk(KERN_CRIT "ibm-iic%d: failed to ioremap device registers\n",
 701                         dev->idx);
 702                 ret = -ENXIO;
 703                 goto fail2;
 704         }
 705
 706         init_waitqueue_head(&dev->wq);
 707
 708         dev->irq = iic_force_poll ? -1 : ocp->def->irq;
 709         if (dev->irq >= 0){
 710                 /* Disable interrupts until we finish intialization,
 711                    assumes level-sensitive IRQ setup...
 712                  */
 713                 iic_interrupt_mode(dev, 0);
 714                 if (request_irq(dev->irq, iic_handler, 0, "IBM IIC", dev)){
 715                         printk(KERN_ERR "ibm-iic%d: request_irq %d failed\n",
 716                                 dev->idx, dev->irq);
 717                         /* Fallback to the polling mode */
 718                         dev->irq = -1;
 719                 }
 720         }
 721
 722         if (dev->irq < 0)
 723                 printk(KERN_WARNING "ibm-iic%d: using polling mode\n",
 724                         dev->idx);
 725
 726         /* Board specific settings */
 727         dev->fast_mode = iic_force_fast ? 1 : (iic_data ? iic_data->fast_mode : 0);
 728
 729         /* clckdiv is the same for *all* IIC interfaces,
 730          * but I'd rather make a copy than introduce another global. --ebs
 731          */
 732         dev->clckdiv = iic_clckdiv(ocp_sys_info.opb_bus_freq);
 733         DBG("%d: clckdiv = %d\n", dev->idx, dev->clckdiv);
 734
 735         /* Initialize IIC interface */
 736         iic_dev_init(dev);
 737
 738         /* Register it with i2c layer */
 739         adap = &dev->adap;
 740         strcpy(adap->name, "IBM IIC");
 741         i2c_set_adapdata(adap, dev);
 742         adap->id = I2C_HW_OCP | iic_algo.id;
 743         adap->algo = &iic_algo;
 744         adap->client_register = NULL;
 745         adap->client_unregister = NULL;
 746         adap->timeout = 1;
 747         adap->retries = 1;
 748
 749         if ((ret = i2c_add_adapter(adap)) != 0){
 750                 printk(KERN_CRIT "ibm-iic%d: failed to register i2c adapter\n",
 751                         dev->idx);
 752                 goto fail;
 753         }
 754
 755         printk(KERN_INFO "ibm-iic%d: using %s mode\n", dev->idx,
 756                 dev->fast_mode ? "fast (400 kHz)" : "standard (100 kHz)");
 757
 758         return 0;
 759
 760 fail:
 761         if (dev->irq >= 0){
 762                 iic_interrupt_mode(dev, 0);
 763                 free_irq(dev->irq, dev);
 764         }
 765
 766         iounmap((void*)dev->vaddr);
 767 fail2:
 768         ocp_set_drvdata(ocp, 0);
 769         kfree(dev);
 770         return ret;
 771 }
 772
 773 /*
 774  * Cleanup initialized IIC interface
 775  */
 776 static void __devexit iic_remove(struct ocp_device *ocp)
 777 {
 778         struct ibm_iic_private* dev = (struct ibm_iic_private*)ocp_get_drvdata(ocp);
 779         BUG_ON(dev == NULL);
 780         if (i2c_del_adapter(&dev->adap)){
 781                 printk(KERN_CRIT "ibm-iic%d: failed to delete i2c adapter :(\n",
 782                         dev->idx);
 783                 /* That's *very* bad, just shutdown IRQ ... */
 784                 if (dev->irq >= 0){
 785                     iic_interrupt_mode(dev, 0);
 786                     free_irq(dev->irq, dev);
 787                     dev->irq = -1;
 788                 }
 789         } else {
 790                 if (dev->irq >= 0){
 791                     iic_interrupt_mode(dev, 0);
 792                     free_irq(dev->irq, dev);
 793                 }
 794                 iounmap((void*)dev->vaddr);
 795                 kfree(dev);
 796         }
 797 }
 798
 799 static struct ocp_device_id ibm_iic_ids[] __devinitdata =
 800 {
 801         { .vendor = OCP_VENDOR_IBM, .function = OCP_FUNC_IIC },
 802         { .vendor = OCP_VENDOR_INVALID }
 803 };
 804
 805 MODULE_DEVICE_TABLE(ocp, ibm_iic_ids);
 806
 807 static struct ocp_driver ibm_iic_driver =
 808 {
 809         .name           = "iic",
 810         .id_table       = ibm_iic_ids,
 811         .probe          = iic_probe,
 812         .remove         = __devexit_p(iic_remove),
 813 #if defined(CONFIG_PM)
 814         .suspend        = NULL,
 815         .resume         = NULL,
 816 #endif
 817 };
 818
 819 static int __init iic_init(void)
 820 {
 821         printk(KERN_INFO "IBM IIC driver v" DRIVER_VERSION "\n");
 822         return ocp_register_driver(&ibm_iic_driver);
 823 }
 824
 825 static void __exit iic_exit(void)
 826 {
 827         ocp_unregister_driver(&ibm_iic_driver);
 828 }
 829
 830 module_init(iic_init);
 831 module_exit(iic_exit);