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[linux-2.6.9-moxart.git] / drivers / atm / ambassador.c
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1 /*
2 Madge Ambassador ATM Adapter driver.
3 Copyright (C) 1995-1999 Madge Networks Ltd.
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian
20 system and in the file COPYING in the Linux kernel source.
23 /* * dedicated to the memory of Graham Gordon 1971-1998 * */
25 #include <linux/module.h>
26 #include <linux/types.h>
27 #include <linux/pci.h>
28 #include <linux/kernel.h>
29 #include <linux/init.h>
30 #include <linux/ioport.h>
31 #include <linux/atmdev.h>
32 #include <linux/delay.h>
33 #include <linux/interrupt.h>
35 #include <asm/atomic.h>
36 #include <asm/io.h>
37 #include <asm/byteorder.h>
39 #include "ambassador.h"
41 #define maintainer_string "Giuliano Procida at Madge Networks <gprocida@madge.com>"
42 #define description_string "Madge ATM Ambassador driver"
43 #define version_string "1.2.4"
45 static inline void __init show_version (void) {
46 printk ("%s version %s\n", description_string, version_string);
51 Theory of Operation
53 I Hardware, detection, initialisation and shutdown.
55 1. Supported Hardware
57 This driver is for the PCI ATMizer-based Ambassador card (except
58 very early versions). It is not suitable for the similar EISA "TR7"
59 card. Commercially, both cards are known as Collage Server ATM
60 adapters.
62 The loader supports image transfer to the card, image start and few
63 other miscellaneous commands.
65 Only AAL5 is supported with vpi = 0 and vci in the range 0 to 1023.
67 The cards are big-endian.
69 2. Detection
71 Standard PCI stuff, the early cards are detected and rejected.
73 3. Initialisation
75 The cards are reset and the self-test results are checked. The
76 microcode image is then transferred and started. This waits for a
77 pointer to a descriptor containing details of the host-based queues
78 and buffers and various parameters etc. Once they are processed
79 normal operations may begin. The BIA is read using a microcode
80 command.
82 4. Shutdown
84 This may be accomplished either by a card reset or via the microcode
85 shutdown command. Further investigation required.
87 5. Persistent state
89 The card reset does not affect PCI configuration (good) or the
90 contents of several other "shared run-time registers" (bad) which
91 include doorbell and interrupt control as well as EEPROM and PCI
92 control. The driver must be careful when modifying these registers
93 not to touch bits it does not use and to undo any changes at exit.
95 II Driver software
97 0. Generalities
99 The adapter is quite intelligent (fast) and has a simple interface
100 (few features). VPI is always zero, 1024 VCIs are supported. There
101 is limited cell rate support. UBR channels can be capped and ABR
102 (explicit rate, but not EFCI) is supported. There is no CBR or VBR
103 support.
105 1. Driver <-> Adapter Communication
107 Apart from the basic loader commands, the driver communicates
108 through three entities: the command queue (CQ), the transmit queue
109 pair (TXQ) and the receive queue pairs (RXQ). These three entities
110 are set up by the host and passed to the microcode just after it has
111 been started.
113 All queues are host-based circular queues. They are contiguous and
114 (due to hardware limitations) have some restrictions as to their
115 locations in (bus) memory. They are of the "full means the same as
116 empty so don't do that" variety since the adapter uses pointers
117 internally.
119 The queue pairs work as follows: one queue is for supply to the
120 adapter, items in it are pending and are owned by the adapter; the
121 other is the queue for return from the adapter, items in it have
122 been dealt with by the adapter. The host adds items to the supply
123 (TX descriptors and free RX buffer descriptors) and removes items
124 from the return (TX and RX completions). The adapter deals with out
125 of order completions.
127 Interrupts (card to host) and the doorbell (host to card) are used
128 for signalling.
130 1. CQ
132 This is to communicate "open VC", "close VC", "get stats" etc. to
133 the adapter. At most one command is retired every millisecond by the
134 card. There is no out of order completion or notification. The
135 driver needs to check the return code of the command, waiting as
136 appropriate.
138 2. TXQ
140 TX supply items are of variable length (scatter gather support) and
141 so the queue items are (more or less) pointers to the real thing.
142 Each TX supply item contains a unique, host-supplied handle (the skb
143 bus address seems most sensible as this works for Alphas as well,
144 there is no need to do any endian conversions on the handles).
146 TX return items consist of just the handles above.
148 3. RXQ (up to 4 of these with different lengths and buffer sizes)
150 RX supply items consist of a unique, host-supplied handle (the skb
151 bus address again) and a pointer to the buffer data area.
153 RX return items consist of the handle above, the VC, length and a
154 status word. This just screams "oh so easy" doesn't it?
156 Note on RX pool sizes:
158 Each pool should have enough buffers to handle a back-to-back stream
159 of minimum sized frames on a single VC. For example:
161 frame spacing = 3us (about right)
163 delay = IRQ lat + RX handling + RX buffer replenish = 20 (us) (a guess)
165 min number of buffers for one VC = 1 + delay/spacing (buffers)
167 delay/spacing = latency = (20+2)/3 = 7 (buffers) (rounding up)
169 The 20us delay assumes that there is no need to sleep; if we need to
170 sleep to get buffers we are going to drop frames anyway.
172 In fact, each pool should have enough buffers to support the
173 simultaneous reassembly of a separate frame on each VC and cope with
174 the case in which frames complete in round robin cell fashion on
175 each VC.
177 Only one frame can complete at each cell arrival, so if "n" VCs are
178 open, the worst case is to have them all complete frames together
179 followed by all starting new frames together.
181 desired number of buffers = n + delay/spacing
183 These are the extreme requirements, however, they are "n+k" for some
184 "k" so we have only the constant to choose. This is the argument
185 rx_lats which current defaults to 7.
187 Actually, "n ? n+k : 0" is better and this is what is implemented,
188 subject to the limit given by the pool size.
190 4. Driver locking
192 Simple spinlocks are used around the TX and RX queue mechanisms.
193 Anyone with a faster, working method is welcome to implement it.
195 The adapter command queue is protected with a spinlock. We always
196 wait for commands to complete.
198 A more complex form of locking is used around parts of the VC open
199 and close functions. There are three reasons for a lock: 1. we need
200 to do atomic rate reservation and release (not used yet), 2. Opening
201 sometimes involves two adapter commands which must not be separated
202 by another command on the same VC, 3. the changes to RX pool size
203 must be atomic. The lock needs to work over context switches, so we
204 use a semaphore.
206 III Hardware Features and Microcode Bugs
208 1. Byte Ordering
210 *%^"$&%^$*&^"$(%^$#&^%$(&#%$*(&^#%!"!"!*!
212 2. Memory access
214 All structures that are not accessed using DMA must be 4-byte
215 aligned (not a problem) and must not cross 4MB boundaries.
217 There is a DMA memory hole at E0000000-E00000FF (groan).
219 TX fragments (DMA read) must not cross 4MB boundaries (would be 16MB
220 but for a hardware bug).
222 RX buffers (DMA write) must not cross 16MB boundaries and must
223 include spare trailing bytes up to the next 4-byte boundary; they
224 will be written with rubbish.
226 The PLX likes to prefetch; if reading up to 4 u32 past the end of
227 each TX fragment is not a problem, then TX can be made to go a
228 little faster by passing a flag at init that disables a prefetch
229 workaround. We do not pass this flag. (new microcode only)
231 Now we:
232 . Note that alloc_skb rounds up size to a 16byte boundary.
233 . Ensure all areas do not traverse 4MB boundaries.
234 . Ensure all areas do not start at a E00000xx bus address.
235 (I cannot be certain, but this may always hold with Linux)
236 . Make all failures cause a loud message.
237 . Discard non-conforming SKBs (causes TX failure or RX fill delay).
238 . Discard non-conforming TX fragment descriptors (the TX fails).
239 In the future we could:
240 . Allow RX areas that traverse 4MB (but not 16MB) boundaries.
241 . Segment TX areas into some/more fragments, when necessary.
242 . Relax checks for non-DMA items (ignore hole).
243 . Give scatter-gather (iovec) requirements using ???. (?)
245 3. VC close is broken (only for new microcode)
247 The VC close adapter microcode command fails to do anything if any
248 frames have been received on the VC but none have been transmitted.
249 Frames continue to be reassembled and passed (with IRQ) to the
250 driver.
252 IV To Do List
254 . Fix bugs!
256 . Timer code may be broken.
258 . Deal with buggy VC close (somehow) in microcode 12.
260 . Handle interrupted and/or non-blocking writes - is this a job for
261 the protocol layer?
263 . Add code to break up TX fragments when they span 4MB boundaries.
265 . Add SUNI phy layer (need to know where SUNI lives on card).
267 . Implement a tx_alloc fn to (a) satisfy TX alignment etc. and (b)
268 leave extra headroom space for Ambassador TX descriptors.
270 . Understand these elements of struct atm_vcc: recvq (proto?),
271 sleep, callback, listenq, backlog_quota, reply and user_back.
273 . Adjust TX/RX skb allocation to favour IP with LANE/CLIP (configurable).
275 . Impose a TX-pending limit (2?) on each VC, help avoid TX q overflow.
277 . Decide whether RX buffer recycling is or can be made completely safe;
278 turn it back on. It looks like Werner is going to axe this.
280 . Implement QoS changes on open VCs (involves extracting parts of VC open
281 and close into separate functions and using them to make changes).
283 . Hack on command queue so that someone can issue multiple commands and wait
284 on the last one (OR only "no-op" or "wait" commands are waited for).
286 . Eliminate need for while-schedule around do_command.
290 /********** microcode **********/
292 #ifdef AMB_NEW_MICROCODE
293 #define UCODE(x) UCODE2(atmsar12.x)
294 #else
295 #define UCODE(x) UCODE2(atmsar11.x)
296 #endif
297 #define UCODE2(x) #x
299 static u32 __initdata ucode_start =
300 #include UCODE(start)
303 static region __initdata ucode_regions[] = {
304 #include UCODE(regions)
305 { 0, 0 }
308 static u32 __initdata ucode_data[] = {
309 #include UCODE(data)
310 0xdeadbeef
313 static void do_housekeeping (unsigned long arg);
314 /********** globals **********/
316 static amb_dev * amb_devs = NULL;
317 static struct timer_list housekeeping = TIMER_INITIALIZER(do_housekeeping, 0, 1);
319 static unsigned short debug = 0;
320 static unsigned int cmds = 8;
321 static unsigned int txs = 32;
322 static unsigned int rxs[NUM_RX_POOLS] = { 64, 64, 64, 64 };
323 static unsigned int rxs_bs[NUM_RX_POOLS] = { 4080, 12240, 36720, 65535 };
324 static unsigned int rx_lats = 7;
325 static unsigned char pci_lat = 0;
327 static const unsigned long onegigmask = -1 << 30;
329 /********** access to adapter **********/
331 static inline void wr_plain (const amb_dev * dev, size_t addr, u32 data) {
332 PRINTD (DBG_FLOW|DBG_REGS, "wr: %08zx <- %08x", addr, data);
333 #ifdef AMB_MMIO
334 dev->membase[addr / sizeof(u32)] = data;
335 #else
336 outl (data, dev->iobase + addr);
337 #endif
340 static inline u32 rd_plain (const amb_dev * dev, size_t addr) {
341 #ifdef AMB_MMIO
342 u32 data = dev->membase[addr / sizeof(u32)];
343 #else
344 u32 data = inl (dev->iobase + addr);
345 #endif
346 PRINTD (DBG_FLOW|DBG_REGS, "rd: %08zx -> %08x", addr, data);
347 return data;
350 static inline void wr_mem (const amb_dev * dev, size_t addr, u32 data) {
351 u32 be = cpu_to_be32 (data);
352 PRINTD (DBG_FLOW|DBG_REGS, "wr: %08zx <- %08x b[%08x]", addr, data, be);
353 #ifdef AMB_MMIO
354 dev->membase[addr / sizeof(u32)] = be;
355 #else
356 outl (be, dev->iobase + addr);
357 #endif
360 static inline u32 rd_mem (const amb_dev * dev, size_t addr) {
361 #ifdef AMB_MMIO
362 u32 be = dev->membase[addr / sizeof(u32)];
363 #else
364 u32 be = inl (dev->iobase + addr);
365 #endif
366 u32 data = be32_to_cpu (be);
367 PRINTD (DBG_FLOW|DBG_REGS, "rd: %08zx -> %08x b[%08x]", addr, data, be);
368 return data;
371 /********** dump routines **********/
373 static inline void dump_registers (const amb_dev * dev) {
374 #ifdef DEBUG_AMBASSADOR
375 if (debug & DBG_REGS) {
376 size_t i;
377 PRINTD (DBG_REGS, "reading PLX control: ");
378 for (i = 0x00; i < 0x30; i += sizeof(u32))
379 rd_mem (dev, i);
380 PRINTD (DBG_REGS, "reading mailboxes: ");
381 for (i = 0x40; i < 0x60; i += sizeof(u32))
382 rd_mem (dev, i);
383 PRINTD (DBG_REGS, "reading doorb irqev irqen reset:");
384 for (i = 0x60; i < 0x70; i += sizeof(u32))
385 rd_mem (dev, i);
387 #else
388 (void) dev;
389 #endif
390 return;
393 static inline void dump_loader_block (volatile loader_block * lb) {
394 #ifdef DEBUG_AMBASSADOR
395 unsigned int i;
396 PRINTDB (DBG_LOAD, "lb @ %p; res: %d, cmd: %d, pay:",
397 lb, be32_to_cpu (lb->result), be32_to_cpu (lb->command));
398 for (i = 0; i < MAX_COMMAND_DATA; ++i)
399 PRINTDM (DBG_LOAD, " %08x", be32_to_cpu (lb->payload.data[i]));
400 PRINTDE (DBG_LOAD, ", vld: %08x", be32_to_cpu (lb->valid));
401 #else
402 (void) lb;
403 #endif
404 return;
407 static inline void dump_command (command * cmd) {
408 #ifdef DEBUG_AMBASSADOR
409 unsigned int i;
410 PRINTDB (DBG_CMD, "cmd @ %p, req: %08x, pars:",
411 cmd, /*be32_to_cpu*/ (cmd->request));
412 for (i = 0; i < 3; ++i)
413 PRINTDM (DBG_CMD, " %08x", /*be32_to_cpu*/ (cmd->args.par[i]));
414 PRINTDE (DBG_CMD, "");
415 #else
416 (void) cmd;
417 #endif
418 return;
421 static inline void dump_skb (char * prefix, unsigned int vc, struct sk_buff * skb) {
422 #ifdef DEBUG_AMBASSADOR
423 unsigned int i;
424 unsigned char * data = skb->data;
425 PRINTDB (DBG_DATA, "%s(%u) ", prefix, vc);
426 for (i=0; i<skb->len && i < 256;i++)
427 PRINTDM (DBG_DATA, "%02x ", data[i]);
428 PRINTDE (DBG_DATA,"");
429 #else
430 (void) prefix;
431 (void) vc;
432 (void) skb;
433 #endif
434 return;
437 /********** check memory areas for use by Ambassador **********/
439 /* see limitations under Hardware Features */
441 static inline int check_area (void * start, size_t length) {
442 // assumes length > 0
443 const u32 fourmegmask = -1 << 22;
444 const u32 twofivesixmask = -1 << 8;
445 const u32 starthole = 0xE0000000;
446 u32 startaddress = virt_to_bus (start);
447 u32 lastaddress = startaddress+length-1;
448 if ((startaddress ^ lastaddress) & fourmegmask ||
449 (startaddress & twofivesixmask) == starthole) {
450 PRINTK (KERN_ERR, "check_area failure: [%x,%x] - mail maintainer!",
451 startaddress, lastaddress);
452 return -1;
453 } else {
454 return 0;
458 /********** free an skb (as per ATM device driver documentation) **********/
460 static inline void amb_kfree_skb (struct sk_buff * skb) {
461 if (ATM_SKB(skb)->vcc->pop) {
462 ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb);
463 } else {
464 dev_kfree_skb_any (skb);
468 /********** TX completion **********/
470 static inline void tx_complete (amb_dev * dev, tx_out * tx) {
471 tx_simple * tx_descr = bus_to_virt (tx->handle);
472 struct sk_buff * skb = tx_descr->skb;
474 PRINTD (DBG_FLOW|DBG_TX, "tx_complete %p %p", dev, tx);
476 // VC layer stats
477 atomic_inc(&ATM_SKB(skb)->vcc->stats->tx);
479 // free the descriptor
480 kfree (tx_descr);
482 // free the skb
483 amb_kfree_skb (skb);
485 dev->stats.tx_ok++;
486 return;
489 /********** RX completion **********/
491 static void rx_complete (amb_dev * dev, rx_out * rx) {
492 struct sk_buff * skb = bus_to_virt (rx->handle);
493 u16 vc = be16_to_cpu (rx->vc);
494 // unused: u16 lec_id = be16_to_cpu (rx->lec_id);
495 u16 status = be16_to_cpu (rx->status);
496 u16 rx_len = be16_to_cpu (rx->length);
498 PRINTD (DBG_FLOW|DBG_RX, "rx_complete %p %p (len=%hu)", dev, rx, rx_len);
500 // XXX move this in and add to VC stats ???
501 if (!status) {
502 struct atm_vcc * atm_vcc = dev->rxer[vc];
503 dev->stats.rx.ok++;
505 if (atm_vcc) {
507 if (rx_len <= atm_vcc->qos.rxtp.max_sdu) {
509 if (atm_charge (atm_vcc, skb->truesize)) {
511 // prepare socket buffer
512 ATM_SKB(skb)->vcc = atm_vcc;
513 skb_put (skb, rx_len);
515 dump_skb ("<<<", vc, skb);
517 // VC layer stats
518 atomic_inc(&atm_vcc->stats->rx);
519 do_gettimeofday(&skb->stamp);
520 // end of our responsability
521 atm_vcc->push (atm_vcc, skb);
522 return;
524 } else {
525 // someone fix this (message), please!
526 PRINTD (DBG_INFO|DBG_RX, "dropped thanks to atm_charge (vc %hu, truesize %u)", vc, skb->truesize);
527 // drop stats incremented in atm_charge
530 } else {
531 PRINTK (KERN_INFO, "dropped over-size frame");
532 // should we count this?
533 atomic_inc(&atm_vcc->stats->rx_drop);
536 } else {
537 PRINTD (DBG_WARN|DBG_RX, "got frame but RX closed for channel %hu", vc);
538 // this is an adapter bug, only in new version of microcode
541 } else {
542 dev->stats.rx.error++;
543 if (status & CRC_ERR)
544 dev->stats.rx.badcrc++;
545 if (status & LEN_ERR)
546 dev->stats.rx.toolong++;
547 if (status & ABORT_ERR)
548 dev->stats.rx.aborted++;
549 if (status & UNUSED_ERR)
550 dev->stats.rx.unused++;
553 dev_kfree_skb_any (skb);
554 return;
559 Note on queue handling.
561 Here "give" and "take" refer to queue entries and a queue (pair)
562 rather than frames to or from the host or adapter. Empty frame
563 buffers are given to the RX queue pair and returned unused or
564 containing RX frames. TX frames (well, pointers to TX fragment
565 lists) are given to the TX queue pair, completions are returned.
569 /********** command queue **********/
571 // I really don't like this, but it's the best I can do at the moment
573 // also, the callers are responsible for byte order as the microcode
574 // sometimes does 16-bit accesses (yuk yuk yuk)
576 static int command_do (amb_dev * dev, command * cmd) {
577 amb_cq * cq = &dev->cq;
578 volatile amb_cq_ptrs * ptrs = &cq->ptrs;
579 command * my_slot;
580 unsigned long timeout;
582 PRINTD (DBG_FLOW|DBG_CMD, "command_do %p", dev);
584 if (test_bit (dead, &dev->flags))
585 return 0;
587 spin_lock (&cq->lock);
589 // if not full...
590 if (cq->pending < cq->maximum) {
591 // remember my slot for later
592 my_slot = ptrs->in;
593 PRINTD (DBG_CMD, "command in slot %p", my_slot);
595 dump_command (cmd);
597 // copy command in
598 *ptrs->in = *cmd;
599 cq->pending++;
600 ptrs->in = NEXTQ (ptrs->in, ptrs->start, ptrs->limit);
602 // mail the command
603 wr_mem (dev, offsetof(amb_mem, mb.adapter.cmd_address), virt_to_bus (ptrs->in));
605 // prepare to wait for cq->pending milliseconds
606 // effectively one centisecond on i386
607 timeout = (cq->pending*HZ+999)/1000;
609 if (cq->pending > cq->high)
610 cq->high = cq->pending;
611 spin_unlock (&cq->lock);
613 while (timeout) {
614 // go to sleep
615 // PRINTD (DBG_CMD, "wait: sleeping %lu for command", timeout);
616 set_current_state(TASK_UNINTERRUPTIBLE);
617 timeout = schedule_timeout (timeout);
620 // wait for my slot to be reached (all waiters are here or above, until...)
621 while (ptrs->out != my_slot) {
622 PRINTD (DBG_CMD, "wait: command slot (now at %p)", ptrs->out);
623 set_current_state(TASK_UNINTERRUPTIBLE);
624 schedule();
627 // wait on my slot (... one gets to its slot, and... )
628 while (ptrs->out->request != cpu_to_be32 (SRB_COMPLETE)) {
629 PRINTD (DBG_CMD, "wait: command slot completion");
630 set_current_state(TASK_UNINTERRUPTIBLE);
631 schedule();
634 PRINTD (DBG_CMD, "command complete");
635 // update queue (... moves the queue along to the next slot)
636 spin_lock (&cq->lock);
637 cq->pending--;
638 // copy command out
639 *cmd = *ptrs->out;
640 ptrs->out = NEXTQ (ptrs->out, ptrs->start, ptrs->limit);
641 spin_unlock (&cq->lock);
643 return 0;
644 } else {
645 cq->filled++;
646 spin_unlock (&cq->lock);
647 return -EAGAIN;
652 /********** TX queue pair **********/
654 static inline int tx_give (amb_dev * dev, tx_in * tx) {
655 amb_txq * txq = &dev->txq;
656 unsigned long flags;
658 PRINTD (DBG_FLOW|DBG_TX, "tx_give %p", dev);
660 if (test_bit (dead, &dev->flags))
661 return 0;
663 spin_lock_irqsave (&txq->lock, flags);
665 if (txq->pending < txq->maximum) {
666 PRINTD (DBG_TX, "TX in slot %p", txq->in.ptr);
668 *txq->in.ptr = *tx;
669 txq->pending++;
670 txq->in.ptr = NEXTQ (txq->in.ptr, txq->in.start, txq->in.limit);
671 // hand over the TX and ring the bell
672 wr_mem (dev, offsetof(amb_mem, mb.adapter.tx_address), virt_to_bus (txq->in.ptr));
673 wr_mem (dev, offsetof(amb_mem, doorbell), TX_FRAME);
675 if (txq->pending > txq->high)
676 txq->high = txq->pending;
677 spin_unlock_irqrestore (&txq->lock, flags);
678 return 0;
679 } else {
680 txq->filled++;
681 spin_unlock_irqrestore (&txq->lock, flags);
682 return -EAGAIN;
686 static inline int tx_take (amb_dev * dev) {
687 amb_txq * txq = &dev->txq;
688 unsigned long flags;
690 PRINTD (DBG_FLOW|DBG_TX, "tx_take %p", dev);
692 spin_lock_irqsave (&txq->lock, flags);
694 if (txq->pending && txq->out.ptr->handle) {
695 // deal with TX completion
696 tx_complete (dev, txq->out.ptr);
697 // mark unused again
698 txq->out.ptr->handle = 0;
699 // remove item
700 txq->pending--;
701 txq->out.ptr = NEXTQ (txq->out.ptr, txq->out.start, txq->out.limit);
703 spin_unlock_irqrestore (&txq->lock, flags);
704 return 0;
705 } else {
707 spin_unlock_irqrestore (&txq->lock, flags);
708 return -1;
712 /********** RX queue pairs **********/
714 static inline int rx_give (amb_dev * dev, rx_in * rx, unsigned char pool) {
715 amb_rxq * rxq = &dev->rxq[pool];
716 unsigned long flags;
718 PRINTD (DBG_FLOW|DBG_RX, "rx_give %p[%hu]", dev, pool);
720 spin_lock_irqsave (&rxq->lock, flags);
722 if (rxq->pending < rxq->maximum) {
723 PRINTD (DBG_RX, "RX in slot %p", rxq->in.ptr);
725 *rxq->in.ptr = *rx;
726 rxq->pending++;
727 rxq->in.ptr = NEXTQ (rxq->in.ptr, rxq->in.start, rxq->in.limit);
728 // hand over the RX buffer
729 wr_mem (dev, offsetof(amb_mem, mb.adapter.rx_address[pool]), virt_to_bus (rxq->in.ptr));
731 spin_unlock_irqrestore (&rxq->lock, flags);
732 return 0;
733 } else {
734 spin_unlock_irqrestore (&rxq->lock, flags);
735 return -1;
739 static inline int rx_take (amb_dev * dev, unsigned char pool) {
740 amb_rxq * rxq = &dev->rxq[pool];
741 unsigned long flags;
743 PRINTD (DBG_FLOW|DBG_RX, "rx_take %p[%hu]", dev, pool);
745 spin_lock_irqsave (&rxq->lock, flags);
747 if (rxq->pending && (rxq->out.ptr->status || rxq->out.ptr->length)) {
748 // deal with RX completion
749 rx_complete (dev, rxq->out.ptr);
750 // mark unused again
751 rxq->out.ptr->status = 0;
752 rxq->out.ptr->length = 0;
753 // remove item
754 rxq->pending--;
755 rxq->out.ptr = NEXTQ (rxq->out.ptr, rxq->out.start, rxq->out.limit);
757 if (rxq->pending < rxq->low)
758 rxq->low = rxq->pending;
759 spin_unlock_irqrestore (&rxq->lock, flags);
760 return 0;
761 } else {
762 if (!rxq->pending && rxq->buffers_wanted)
763 rxq->emptied++;
764 spin_unlock_irqrestore (&rxq->lock, flags);
765 return -1;
769 /********** RX Pool handling **********/
771 /* pre: buffers_wanted = 0, post: pending = 0 */
772 static inline void drain_rx_pool (amb_dev * dev, unsigned char pool) {
773 amb_rxq * rxq = &dev->rxq[pool];
775 PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pool %p %hu", dev, pool);
777 if (test_bit (dead, &dev->flags))
778 return;
780 /* we are not quite like the fill pool routines as we cannot just
781 remove one buffer, we have to remove all of them, but we might as
782 well pretend... */
783 if (rxq->pending > rxq->buffers_wanted) {
784 command cmd;
785 cmd.request = cpu_to_be32 (SRB_FLUSH_BUFFER_Q);
786 cmd.args.flush.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT);
787 while (command_do (dev, &cmd))
788 schedule();
789 /* the pool may also be emptied via the interrupt handler */
790 while (rxq->pending > rxq->buffers_wanted)
791 if (rx_take (dev, pool))
792 schedule();
795 return;
798 static void drain_rx_pools (amb_dev * dev) {
799 unsigned char pool;
801 PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pools %p", dev);
803 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
804 drain_rx_pool (dev, pool);
807 static inline void fill_rx_pool (amb_dev * dev, unsigned char pool, int priority) {
808 rx_in rx;
809 amb_rxq * rxq;
811 PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pool %p %hu %x", dev, pool, priority);
813 if (test_bit (dead, &dev->flags))
814 return;
816 rxq = &dev->rxq[pool];
817 while (rxq->pending < rxq->maximum && rxq->pending < rxq->buffers_wanted) {
819 struct sk_buff * skb = alloc_skb (rxq->buffer_size, priority);
820 if (!skb) {
821 PRINTD (DBG_SKB|DBG_POOL, "failed to allocate skb for RX pool %hu", pool);
822 return;
824 if (check_area (skb->data, skb->truesize)) {
825 dev_kfree_skb_any (skb);
826 return;
828 // cast needed as there is no %? for pointer differences
829 PRINTD (DBG_SKB, "allocated skb at %p, head %p, area %li",
830 skb, skb->head, (long) (skb->end - skb->head));
831 rx.handle = virt_to_bus (skb);
832 rx.host_address = cpu_to_be32 (virt_to_bus (skb->data));
833 if (rx_give (dev, &rx, pool))
834 dev_kfree_skb_any (skb);
838 return;
841 // top up all RX pools (can also be called as a bottom half)
842 static void fill_rx_pools (amb_dev * dev) {
843 unsigned char pool;
845 PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pools %p", dev);
847 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
848 fill_rx_pool (dev, pool, GFP_ATOMIC);
850 return;
853 /********** enable host interrupts **********/
855 static inline void interrupts_on (amb_dev * dev) {
856 wr_plain (dev, offsetof(amb_mem, interrupt_control),
857 rd_plain (dev, offsetof(amb_mem, interrupt_control))
858 | AMB_INTERRUPT_BITS);
861 /********** disable host interrupts **********/
863 static inline void interrupts_off (amb_dev * dev) {
864 wr_plain (dev, offsetof(amb_mem, interrupt_control),
865 rd_plain (dev, offsetof(amb_mem, interrupt_control))
866 &~ AMB_INTERRUPT_BITS);
869 /********** interrupt handling **********/
871 static irqreturn_t interrupt_handler(int irq, void *dev_id,
872 struct pt_regs *pt_regs) {
873 amb_dev * dev = amb_devs;
874 (void) pt_regs;
876 PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler: %p", dev_id);
878 if (!dev_id) {
879 PRINTD (DBG_IRQ|DBG_ERR, "irq with NULL dev_id: %d", irq);
880 return IRQ_NONE;
882 // Did one of our cards generate the interrupt?
883 while (dev) {
884 if (dev == dev_id)
885 break;
886 dev = dev->prev;
888 // impossible - unless we add the device to our list after both
889 // registering the IRQ handler for it and enabling interrupts, AND
890 // the card generates an IRQ at startup - should not happen again
891 if (!dev) {
892 PRINTD (DBG_IRQ, "irq for unknown device: %d", irq);
893 return IRQ_NONE;
895 // impossible - unless we have memory corruption of dev or kernel
896 if (irq != dev->irq) {
897 PRINTD (DBG_IRQ|DBG_ERR, "irq mismatch: %d", irq);
898 return IRQ_NONE;
902 u32 interrupt = rd_plain (dev, offsetof(amb_mem, interrupt));
904 // for us or someone else sharing the same interrupt
905 if (!interrupt) {
906 PRINTD (DBG_IRQ, "irq not for me: %d", irq);
907 return IRQ_NONE;
910 // definitely for us
911 PRINTD (DBG_IRQ, "FYI: interrupt was %08x", interrupt);
912 wr_plain (dev, offsetof(amb_mem, interrupt), -1);
916 unsigned int irq_work = 0;
917 unsigned char pool;
918 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
919 while (!rx_take (dev, pool))
920 ++irq_work;
921 while (!tx_take (dev))
922 ++irq_work;
924 if (irq_work) {
925 #ifdef FILL_RX_POOLS_IN_BH
926 schedule_work (&dev->bh);
927 #else
928 fill_rx_pools (dev);
929 #endif
931 PRINTD (DBG_IRQ, "work done: %u", irq_work);
932 } else {
933 PRINTD (DBG_IRQ|DBG_WARN, "no work done");
937 PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler done: %p", dev_id);
938 return IRQ_HANDLED;
941 /********** make rate (not quite as much fun as Horizon) **********/
943 static unsigned int make_rate (unsigned int rate, rounding r,
944 u16 * bits, unsigned int * actual) {
945 unsigned char exp = -1; // hush gcc
946 unsigned int man = -1; // hush gcc
948 PRINTD (DBG_FLOW|DBG_QOS, "make_rate %u", rate);
950 // rates in cells per second, ITU format (nasty 16-bit floating-point)
951 // given 5-bit e and 9-bit m:
952 // rate = EITHER (1+m/2^9)*2^e OR 0
953 // bits = EITHER 1<<14 | e<<9 | m OR 0
954 // (bit 15 is "reserved", bit 14 "non-zero")
955 // smallest rate is 0 (special representation)
956 // largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1)
957 // smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0)
958 // simple algorithm:
959 // find position of top bit, this gives e
960 // remove top bit and shift (rounding if feeling clever) by 9-e
962 // ucode bug: please don't set bit 14! so 0 rate not representable
964 if (rate > 0xffc00000U) {
965 // larger than largest representable rate
967 if (r == round_up) {
968 return -EINVAL;
969 } else {
970 exp = 31;
971 man = 511;
974 } else if (rate) {
975 // representable rate
977 exp = 31;
978 man = rate;
980 // invariant: rate = man*2^(exp-31)
981 while (!(man & (1<<31))) {
982 exp = exp - 1;
983 man = man<<1;
986 // man has top bit set
987 // rate = (2^31+(man-2^31))*2^(exp-31)
988 // rate = (1+(man-2^31)/2^31)*2^exp
989 man = man<<1;
990 man &= 0xffffffffU; // a nop on 32-bit systems
991 // rate = (1+man/2^32)*2^exp
993 // exp is in the range 0 to 31, man is in the range 0 to 2^32-1
994 // time to lose significance... we want m in the range 0 to 2^9-1
995 // rounding presents a minor problem... we first decide which way
996 // we are rounding (based on given rounding direction and possibly
997 // the bits of the mantissa that are to be discarded).
999 switch (r) {
1000 case round_down: {
1001 // just truncate
1002 man = man>>(32-9);
1003 break;
1005 case round_up: {
1006 // check all bits that we are discarding
1007 if (man & (-1>>9)) {
1008 man = (man>>(32-9)) + 1;
1009 if (man == (1<<9)) {
1010 // no need to check for round up outside of range
1011 man = 0;
1012 exp += 1;
1014 } else {
1015 man = (man>>(32-9));
1017 break;
1019 case round_nearest: {
1020 // check msb that we are discarding
1021 if (man & (1<<(32-9-1))) {
1022 man = (man>>(32-9)) + 1;
1023 if (man == (1<<9)) {
1024 // no need to check for round up outside of range
1025 man = 0;
1026 exp += 1;
1028 } else {
1029 man = (man>>(32-9));
1031 break;
1035 } else {
1036 // zero rate - not representable
1038 if (r == round_down) {
1039 return -EINVAL;
1040 } else {
1041 exp = 0;
1042 man = 0;
1047 PRINTD (DBG_QOS, "rate: man=%u, exp=%hu", man, exp);
1049 if (bits)
1050 *bits = /* (1<<14) | */ (exp<<9) | man;
1052 if (actual)
1053 *actual = (exp >= 9)
1054 ? (1 << exp) + (man << (exp-9))
1055 : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp));
1057 return 0;
1060 /********** Linux ATM Operations **********/
1062 // some are not yet implemented while others do not make sense for
1063 // this device
1065 /********** Open a VC **********/
1067 static int amb_open (struct atm_vcc * atm_vcc)
1069 int error;
1071 struct atm_qos * qos;
1072 struct atm_trafprm * txtp;
1073 struct atm_trafprm * rxtp;
1074 u16 tx_rate_bits;
1075 u16 tx_vc_bits = -1; // hush gcc
1076 u16 tx_frame_bits = -1; // hush gcc
1078 amb_dev * dev = AMB_DEV(atm_vcc->dev);
1079 amb_vcc * vcc;
1080 unsigned char pool = -1; // hush gcc
1081 short vpi = atm_vcc->vpi;
1082 int vci = atm_vcc->vci;
1084 PRINTD (DBG_FLOW|DBG_VCC, "amb_open %x %x", vpi, vci);
1086 #ifdef ATM_VPI_UNSPEC
1087 // UNSPEC is deprecated, remove this code eventually
1088 if (vpi == ATM_VPI_UNSPEC || vci == ATM_VCI_UNSPEC) {
1089 PRINTK (KERN_WARNING, "rejecting open with unspecified VPI/VCI (deprecated)");
1090 return -EINVAL;
1092 #endif
1094 if (!(0 <= vpi && vpi < (1<<NUM_VPI_BITS) &&
1095 0 <= vci && vci < (1<<NUM_VCI_BITS))) {
1096 PRINTD (DBG_WARN|DBG_VCC, "VPI/VCI out of range: %hd/%d", vpi, vci);
1097 return -EINVAL;
1100 qos = &atm_vcc->qos;
1102 if (qos->aal != ATM_AAL5) {
1103 PRINTD (DBG_QOS, "AAL not supported");
1104 return -EINVAL;
1107 // traffic parameters
1109 PRINTD (DBG_QOS, "TX:");
1110 txtp = &qos->txtp;
1111 if (txtp->traffic_class != ATM_NONE) {
1112 switch (txtp->traffic_class) {
1113 case ATM_UBR: {
1114 // we take "the PCR" as a rate-cap
1115 int pcr = atm_pcr_goal (txtp);
1116 if (!pcr) {
1117 // no rate cap
1118 tx_rate_bits = 0;
1119 tx_vc_bits = TX_UBR;
1120 tx_frame_bits = TX_FRAME_NOTCAP;
1121 } else {
1122 rounding r;
1123 if (pcr < 0) {
1124 r = round_down;
1125 pcr = -pcr;
1126 } else {
1127 r = round_up;
1129 error = make_rate (pcr, r, &tx_rate_bits, NULL);
1130 tx_vc_bits = TX_UBR_CAPPED;
1131 tx_frame_bits = TX_FRAME_CAPPED;
1133 break;
1135 #if 0
1136 case ATM_ABR: {
1137 pcr = atm_pcr_goal (txtp);
1138 PRINTD (DBG_QOS, "pcr goal = %d", pcr);
1139 break;
1141 #endif
1142 default: {
1143 // PRINTD (DBG_QOS, "request for non-UBR/ABR denied");
1144 PRINTD (DBG_QOS, "request for non-UBR denied");
1145 return -EINVAL;
1148 PRINTD (DBG_QOS, "tx_rate_bits=%hx, tx_vc_bits=%hx",
1149 tx_rate_bits, tx_vc_bits);
1152 PRINTD (DBG_QOS, "RX:");
1153 rxtp = &qos->rxtp;
1154 if (rxtp->traffic_class == ATM_NONE) {
1155 // do nothing
1156 } else {
1157 // choose an RX pool (arranged in increasing size)
1158 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
1159 if ((unsigned int) rxtp->max_sdu <= dev->rxq[pool].buffer_size) {
1160 PRINTD (DBG_VCC|DBG_QOS|DBG_POOL, "chose pool %hu (max_sdu %u <= %u)",
1161 pool, rxtp->max_sdu, dev->rxq[pool].buffer_size);
1162 break;
1164 if (pool == NUM_RX_POOLS) {
1165 PRINTD (DBG_WARN|DBG_VCC|DBG_QOS|DBG_POOL,
1166 "no pool suitable for VC (RX max_sdu %d is too large)",
1167 rxtp->max_sdu);
1168 return -EINVAL;
1171 switch (rxtp->traffic_class) {
1172 case ATM_UBR: {
1173 break;
1175 #if 0
1176 case ATM_ABR: {
1177 pcr = atm_pcr_goal (rxtp);
1178 PRINTD (DBG_QOS, "pcr goal = %d", pcr);
1179 break;
1181 #endif
1182 default: {
1183 // PRINTD (DBG_QOS, "request for non-UBR/ABR denied");
1184 PRINTD (DBG_QOS, "request for non-UBR denied");
1185 return -EINVAL;
1190 // get space for our vcc stuff
1191 vcc = kmalloc (sizeof(amb_vcc), GFP_KERNEL);
1192 if (!vcc) {
1193 PRINTK (KERN_ERR, "out of memory!");
1194 return -ENOMEM;
1196 atm_vcc->dev_data = (void *) vcc;
1198 // no failures beyond this point
1200 // we are not really "immediately before allocating the connection
1201 // identifier in hardware", but it will just have to do!
1202 set_bit(ATM_VF_ADDR,&atm_vcc->flags);
1204 if (txtp->traffic_class != ATM_NONE) {
1205 command cmd;
1207 vcc->tx_frame_bits = tx_frame_bits;
1209 down (&dev->vcc_sf);
1210 if (dev->rxer[vci]) {
1211 // RXer on the channel already, just modify rate...
1212 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE);
1213 cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0
1214 cmd.args.modify_rate.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT);
1215 while (command_do (dev, &cmd))
1216 schedule();
1217 // ... and TX flags, preserving the RX pool
1218 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1219 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1220 cmd.args.modify_flags.flags = cpu_to_be32
1221 ( (AMB_VCC(dev->rxer[vci])->rx_info.pool << SRB_POOL_SHIFT)
1222 | (tx_vc_bits << SRB_FLAGS_SHIFT) );
1223 while (command_do (dev, &cmd))
1224 schedule();
1225 } else {
1226 // no RXer on the channel, just open (with pool zero)
1227 cmd.request = cpu_to_be32 (SRB_OPEN_VC);
1228 cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0
1229 cmd.args.open.flags = cpu_to_be32 (tx_vc_bits << SRB_FLAGS_SHIFT);
1230 cmd.args.open.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT);
1231 while (command_do (dev, &cmd))
1232 schedule();
1234 dev->txer[vci].tx_present = 1;
1235 up (&dev->vcc_sf);
1238 if (rxtp->traffic_class != ATM_NONE) {
1239 command cmd;
1241 vcc->rx_info.pool = pool;
1243 down (&dev->vcc_sf);
1244 /* grow RX buffer pool */
1245 if (!dev->rxq[pool].buffers_wanted)
1246 dev->rxq[pool].buffers_wanted = rx_lats;
1247 dev->rxq[pool].buffers_wanted += 1;
1248 fill_rx_pool (dev, pool, GFP_KERNEL);
1250 if (dev->txer[vci].tx_present) {
1251 // TXer on the channel already
1252 // switch (from pool zero) to this pool, preserving the TX bits
1253 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1254 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1255 cmd.args.modify_flags.flags = cpu_to_be32
1256 ( (pool << SRB_POOL_SHIFT)
1257 | (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT) );
1258 } else {
1259 // no TXer on the channel, open the VC (with no rate info)
1260 cmd.request = cpu_to_be32 (SRB_OPEN_VC);
1261 cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0
1262 cmd.args.open.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT);
1263 cmd.args.open.rate = cpu_to_be32 (0);
1265 while (command_do (dev, &cmd))
1266 schedule();
1267 // this link allows RX frames through
1268 dev->rxer[vci] = atm_vcc;
1269 up (&dev->vcc_sf);
1272 // indicate readiness
1273 set_bit(ATM_VF_READY,&atm_vcc->flags);
1275 return 0;
1278 /********** Close a VC **********/
1280 static void amb_close (struct atm_vcc * atm_vcc) {
1281 amb_dev * dev = AMB_DEV (atm_vcc->dev);
1282 amb_vcc * vcc = AMB_VCC (atm_vcc);
1283 u16 vci = atm_vcc->vci;
1285 PRINTD (DBG_VCC|DBG_FLOW, "amb_close");
1287 // indicate unreadiness
1288 clear_bit(ATM_VF_READY,&atm_vcc->flags);
1290 // disable TXing
1291 if (atm_vcc->qos.txtp.traffic_class != ATM_NONE) {
1292 command cmd;
1294 down (&dev->vcc_sf);
1295 if (dev->rxer[vci]) {
1296 // RXer still on the channel, just modify rate... XXX not really needed
1297 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE);
1298 cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0
1299 cmd.args.modify_rate.rate = cpu_to_be32 (0);
1300 // ... and clear TX rate flags (XXX to stop RM cell output?), preserving RX pool
1301 } else {
1302 // no RXer on the channel, close channel
1303 cmd.request = cpu_to_be32 (SRB_CLOSE_VC);
1304 cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0
1306 dev->txer[vci].tx_present = 0;
1307 while (command_do (dev, &cmd))
1308 schedule();
1309 up (&dev->vcc_sf);
1312 // disable RXing
1313 if (atm_vcc->qos.rxtp.traffic_class != ATM_NONE) {
1314 command cmd;
1316 // this is (the?) one reason why we need the amb_vcc struct
1317 unsigned char pool = vcc->rx_info.pool;
1319 down (&dev->vcc_sf);
1320 if (dev->txer[vci].tx_present) {
1321 // TXer still on the channel, just go to pool zero XXX not really needed
1322 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1323 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1324 cmd.args.modify_flags.flags = cpu_to_be32
1325 (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT);
1326 } else {
1327 // no TXer on the channel, close the VC
1328 cmd.request = cpu_to_be32 (SRB_CLOSE_VC);
1329 cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0
1331 // forget the rxer - no more skbs will be pushed
1332 if (atm_vcc != dev->rxer[vci])
1333 PRINTK (KERN_ERR, "%s vcc=%p rxer[vci]=%p",
1334 "arghhh! we're going to die!",
1335 vcc, dev->rxer[vci]);
1336 dev->rxer[vci] = NULL;
1337 while (command_do (dev, &cmd))
1338 schedule();
1340 /* shrink RX buffer pool */
1341 dev->rxq[pool].buffers_wanted -= 1;
1342 if (dev->rxq[pool].buffers_wanted == rx_lats) {
1343 dev->rxq[pool].buffers_wanted = 0;
1344 drain_rx_pool (dev, pool);
1346 up (&dev->vcc_sf);
1349 // free our structure
1350 kfree (vcc);
1352 // say the VPI/VCI is free again
1353 clear_bit(ATM_VF_ADDR,&atm_vcc->flags);
1355 return;
1358 /********** Set socket options for a VC **********/
1360 // int amb_getsockopt (struct atm_vcc * atm_vcc, int level, int optname, void * optval, int optlen);
1362 /********** Set socket options for a VC **********/
1364 // int amb_setsockopt (struct atm_vcc * atm_vcc, int level, int optname, void * optval, int optlen);
1366 /********** Send **********/
1368 static int amb_send (struct atm_vcc * atm_vcc, struct sk_buff * skb) {
1369 amb_dev * dev = AMB_DEV(atm_vcc->dev);
1370 amb_vcc * vcc = AMB_VCC(atm_vcc);
1371 u16 vc = atm_vcc->vci;
1372 unsigned int tx_len = skb->len;
1373 unsigned char * tx_data = skb->data;
1374 tx_simple * tx_descr;
1375 tx_in tx;
1377 if (test_bit (dead, &dev->flags))
1378 return -EIO;
1380 PRINTD (DBG_FLOW|DBG_TX, "amb_send vc %x data %p len %u",
1381 vc, tx_data, tx_len);
1383 dump_skb (">>>", vc, skb);
1385 if (!dev->txer[vc].tx_present) {
1386 PRINTK (KERN_ERR, "attempt to send on RX-only VC %x", vc);
1387 return -EBADFD;
1390 // this is a driver private field so we have to set it ourselves,
1391 // despite the fact that we are _required_ to use it to check for a
1392 // pop function
1393 ATM_SKB(skb)->vcc = atm_vcc;
1395 if (skb->len > (size_t) atm_vcc->qos.txtp.max_sdu) {
1396 PRINTK (KERN_ERR, "sk_buff length greater than agreed max_sdu, dropping...");
1397 return -EIO;
1400 if (check_area (skb->data, skb->len)) {
1401 atomic_inc(&atm_vcc->stats->tx_err);
1402 return -ENOMEM; // ?
1405 // allocate memory for fragments
1406 tx_descr = kmalloc (sizeof(tx_simple), GFP_KERNEL);
1407 if (!tx_descr) {
1408 PRINTK (KERN_ERR, "could not allocate TX descriptor");
1409 return -ENOMEM;
1411 if (check_area (tx_descr, sizeof(tx_simple))) {
1412 kfree (tx_descr);
1413 return -ENOMEM;
1415 PRINTD (DBG_TX, "fragment list allocated at %p", tx_descr);
1417 tx_descr->skb = skb;
1419 tx_descr->tx_frag.bytes = cpu_to_be32 (tx_len);
1420 tx_descr->tx_frag.address = cpu_to_be32 (virt_to_bus (tx_data));
1422 tx_descr->tx_frag_end.handle = virt_to_bus (tx_descr);
1423 tx_descr->tx_frag_end.vc = 0;
1424 tx_descr->tx_frag_end.next_descriptor_length = 0;
1425 tx_descr->tx_frag_end.next_descriptor = 0;
1426 #ifdef AMB_NEW_MICROCODE
1427 tx_descr->tx_frag_end.cpcs_uu = 0;
1428 tx_descr->tx_frag_end.cpi = 0;
1429 tx_descr->tx_frag_end.pad = 0;
1430 #endif
1432 tx.vc = cpu_to_be16 (vcc->tx_frame_bits | vc);
1433 tx.tx_descr_length = cpu_to_be16 (sizeof(tx_frag)+sizeof(tx_frag_end));
1434 tx.tx_descr_addr = cpu_to_be32 (virt_to_bus (&tx_descr->tx_frag));
1436 while (tx_give (dev, &tx))
1437 schedule();
1438 return 0;
1441 /********** Change QoS on a VC **********/
1443 // int amb_change_qos (struct atm_vcc * atm_vcc, struct atm_qos * qos, int flags);
1445 /********** Free RX Socket Buffer **********/
1447 #if 0
1448 static void amb_free_rx_skb (struct atm_vcc * atm_vcc, struct sk_buff * skb) {
1449 amb_dev * dev = AMB_DEV (atm_vcc->dev);
1450 amb_vcc * vcc = AMB_VCC (atm_vcc);
1451 unsigned char pool = vcc->rx_info.pool;
1452 rx_in rx;
1454 // This may be unsafe for various reasons that I cannot really guess
1455 // at. However, I note that the ATM layer calls kfree_skb rather
1456 // than dev_kfree_skb at this point so we are least covered as far
1457 // as buffer locking goes. There may be bugs if pcap clones RX skbs.
1459 PRINTD (DBG_FLOW|DBG_SKB, "amb_rx_free skb %p (atm_vcc %p, vcc %p)",
1460 skb, atm_vcc, vcc);
1462 rx.handle = virt_to_bus (skb);
1463 rx.host_address = cpu_to_be32 (virt_to_bus (skb->data));
1465 skb->data = skb->head;
1466 skb->tail = skb->head;
1467 skb->len = 0;
1469 if (!rx_give (dev, &rx, pool)) {
1470 // success
1471 PRINTD (DBG_SKB|DBG_POOL, "recycled skb for pool %hu", pool);
1472 return;
1475 // just do what the ATM layer would have done
1476 dev_kfree_skb_any (skb);
1478 return;
1480 #endif
1482 /********** Proc File Output **********/
1484 static int amb_proc_read (struct atm_dev * atm_dev, loff_t * pos, char * page) {
1485 amb_dev * dev = AMB_DEV (atm_dev);
1486 int left = *pos;
1487 unsigned char pool;
1489 PRINTD (DBG_FLOW, "amb_proc_read");
1491 /* more diagnostics here? */
1493 if (!left--) {
1494 amb_stats * s = &dev->stats;
1495 return sprintf (page,
1496 "frames: TX OK %lu, RX OK %lu, RX bad %lu "
1497 "(CRC %lu, long %lu, aborted %lu, unused %lu).\n",
1498 s->tx_ok, s->rx.ok, s->rx.error,
1499 s->rx.badcrc, s->rx.toolong,
1500 s->rx.aborted, s->rx.unused);
1503 if (!left--) {
1504 amb_cq * c = &dev->cq;
1505 return sprintf (page, "cmd queue [cur/hi/max]: %u/%u/%u. ",
1506 c->pending, c->high, c->maximum);
1509 if (!left--) {
1510 amb_txq * t = &dev->txq;
1511 return sprintf (page, "TX queue [cur/max high full]: %u/%u %u %u.\n",
1512 t->pending, t->maximum, t->high, t->filled);
1515 if (!left--) {
1516 unsigned int count = sprintf (page, "RX queues [cur/max/req low empty]:");
1517 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1518 amb_rxq * r = &dev->rxq[pool];
1519 count += sprintf (page+count, " %u/%u/%u %u %u",
1520 r->pending, r->maximum, r->buffers_wanted, r->low, r->emptied);
1522 count += sprintf (page+count, ".\n");
1523 return count;
1526 if (!left--) {
1527 unsigned int count = sprintf (page, "RX buffer sizes:");
1528 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1529 amb_rxq * r = &dev->rxq[pool];
1530 count += sprintf (page+count, " %u", r->buffer_size);
1532 count += sprintf (page+count, ".\n");
1533 return count;
1536 #if 0
1537 if (!left--) {
1538 // suni block etc?
1540 #endif
1542 return 0;
1545 /********** Operation Structure **********/
1547 static const struct atmdev_ops amb_ops = {
1548 .open = amb_open,
1549 .close = amb_close,
1550 .send = amb_send,
1551 .proc_read = amb_proc_read,
1552 .owner = THIS_MODULE,
1555 /********** housekeeping **********/
1556 static void do_housekeeping (unsigned long arg) {
1557 amb_dev * dev = amb_devs;
1558 // data is set to zero at module unload
1559 (void) arg;
1561 if (housekeeping.data) {
1562 while (dev) {
1564 // could collect device-specific (not driver/atm-linux) stats here
1566 // last resort refill once every ten seconds
1567 fill_rx_pools (dev);
1569 dev = dev->prev;
1571 mod_timer(&housekeeping, jiffies + 10*HZ);
1574 return;
1577 /********** creation of communication queues **********/
1579 static int __init create_queues (amb_dev * dev, unsigned int cmds,
1580 unsigned int txs, unsigned int * rxs,
1581 unsigned int * rx_buffer_sizes) {
1582 unsigned char pool;
1583 size_t total = 0;
1584 void * memory;
1585 void * limit;
1587 PRINTD (DBG_FLOW, "create_queues %p", dev);
1589 total += cmds * sizeof(command);
1591 total += txs * (sizeof(tx_in) + sizeof(tx_out));
1593 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
1594 total += rxs[pool] * (sizeof(rx_in) + sizeof(rx_out));
1596 memory = kmalloc (total, GFP_KERNEL);
1597 if (!memory) {
1598 PRINTK (KERN_ERR, "could not allocate queues");
1599 return -ENOMEM;
1601 if (check_area (memory, total)) {
1602 PRINTK (KERN_ERR, "queues allocated in nasty area");
1603 kfree (memory);
1604 return -ENOMEM;
1607 limit = memory + total;
1608 PRINTD (DBG_INIT, "queues from %p to %p", memory, limit);
1610 PRINTD (DBG_CMD, "command queue at %p", memory);
1613 command * cmd = memory;
1614 amb_cq * cq = &dev->cq;
1616 cq->pending = 0;
1617 cq->high = 0;
1618 cq->maximum = cmds - 1;
1620 cq->ptrs.start = cmd;
1621 cq->ptrs.in = cmd;
1622 cq->ptrs.out = cmd;
1623 cq->ptrs.limit = cmd + cmds;
1625 memory = cq->ptrs.limit;
1628 PRINTD (DBG_TX, "TX queue pair at %p", memory);
1631 tx_in * in = memory;
1632 tx_out * out;
1633 amb_txq * txq = &dev->txq;
1635 txq->pending = 0;
1636 txq->high = 0;
1637 txq->filled = 0;
1638 txq->maximum = txs - 1;
1640 txq->in.start = in;
1641 txq->in.ptr = in;
1642 txq->in.limit = in + txs;
1644 memory = txq->in.limit;
1645 out = memory;
1647 txq->out.start = out;
1648 txq->out.ptr = out;
1649 txq->out.limit = out + txs;
1651 memory = txq->out.limit;
1654 PRINTD (DBG_RX, "RX queue pairs at %p", memory);
1656 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1657 rx_in * in = memory;
1658 rx_out * out;
1659 amb_rxq * rxq = &dev->rxq[pool];
1661 rxq->buffer_size = rx_buffer_sizes[pool];
1662 rxq->buffers_wanted = 0;
1664 rxq->pending = 0;
1665 rxq->low = rxs[pool] - 1;
1666 rxq->emptied = 0;
1667 rxq->maximum = rxs[pool] - 1;
1669 rxq->in.start = in;
1670 rxq->in.ptr = in;
1671 rxq->in.limit = in + rxs[pool];
1673 memory = rxq->in.limit;
1674 out = memory;
1676 rxq->out.start = out;
1677 rxq->out.ptr = out;
1678 rxq->out.limit = out + rxs[pool];
1680 memory = rxq->out.limit;
1683 if (memory == limit) {
1684 return 0;
1685 } else {
1686 PRINTK (KERN_ERR, "bad queue alloc %p != %p (tell maintainer)", memory, limit);
1687 kfree (limit - total);
1688 return -ENOMEM;
1693 /********** destruction of communication queues **********/
1695 static void destroy_queues (amb_dev * dev) {
1696 // all queues assumed empty
1697 void * memory = dev->cq.ptrs.start;
1698 // includes txq.in, txq.out, rxq[].in and rxq[].out
1700 PRINTD (DBG_FLOW, "destroy_queues %p", dev);
1702 PRINTD (DBG_INIT, "freeing queues at %p", memory);
1703 kfree (memory);
1705 return;
1708 /********** basic loader commands and error handling **********/
1709 // centisecond timeouts - guessing away here
1710 static unsigned int command_timeouts [] = {
1711 [host_memory_test] = 15,
1712 [read_adapter_memory] = 2,
1713 [write_adapter_memory] = 2,
1714 [adapter_start] = 50,
1715 [get_version_number] = 10,
1716 [interrupt_host] = 1,
1717 [flash_erase_sector] = 1,
1718 [adap_download_block] = 1,
1719 [adap_erase_flash] = 1,
1720 [adap_run_in_iram] = 1,
1721 [adap_end_download] = 1
1725 unsigned int command_successes [] = {
1726 [host_memory_test] = COMMAND_PASSED_TEST,
1727 [read_adapter_memory] = COMMAND_READ_DATA_OK,
1728 [write_adapter_memory] = COMMAND_WRITE_DATA_OK,
1729 [adapter_start] = COMMAND_COMPLETE,
1730 [get_version_number] = COMMAND_COMPLETE,
1731 [interrupt_host] = COMMAND_COMPLETE,
1732 [flash_erase_sector] = COMMAND_COMPLETE,
1733 [adap_download_block] = COMMAND_COMPLETE,
1734 [adap_erase_flash] = COMMAND_COMPLETE,
1735 [adap_run_in_iram] = COMMAND_COMPLETE,
1736 [adap_end_download] = COMMAND_COMPLETE
1739 static int decode_loader_result (loader_command cmd, u32 result)
1741 int res;
1742 const char *msg;
1744 if (result == command_successes[cmd])
1745 return 0;
1747 switch (result) {
1748 case BAD_COMMAND:
1749 res = -EINVAL;
1750 msg = "bad command";
1751 break;
1752 case COMMAND_IN_PROGRESS:
1753 res = -ETIMEDOUT;
1754 msg = "command in progress";
1755 break;
1756 case COMMAND_PASSED_TEST:
1757 res = 0;
1758 msg = "command passed test";
1759 break;
1760 case COMMAND_FAILED_TEST:
1761 res = -EIO;
1762 msg = "command failed test";
1763 break;
1764 case COMMAND_READ_DATA_OK:
1765 res = 0;
1766 msg = "command read data ok";
1767 break;
1768 case COMMAND_READ_BAD_ADDRESS:
1769 res = -EINVAL;
1770 msg = "command read bad address";
1771 break;
1772 case COMMAND_WRITE_DATA_OK:
1773 res = 0;
1774 msg = "command write data ok";
1775 break;
1776 case COMMAND_WRITE_BAD_ADDRESS:
1777 res = -EINVAL;
1778 msg = "command write bad address";
1779 break;
1780 case COMMAND_WRITE_FLASH_FAILURE:
1781 res = -EIO;
1782 msg = "command write flash failure";
1783 break;
1784 case COMMAND_COMPLETE:
1785 res = 0;
1786 msg = "command complete";
1787 break;
1788 case COMMAND_FLASH_ERASE_FAILURE:
1789 res = -EIO;
1790 msg = "command flash erase failure";
1791 break;
1792 case COMMAND_WRITE_BAD_DATA:
1793 res = -EINVAL;
1794 msg = "command write bad data";
1795 break;
1796 default:
1797 res = -EINVAL;
1798 msg = "unknown error";
1799 PRINTD (DBG_LOAD|DBG_ERR,
1800 "decode_loader_result got %d=%x !",
1801 result, result);
1802 break;
1805 PRINTK (KERN_ERR, "%s", msg);
1806 return res;
1809 static int __init do_loader_command (volatile loader_block * lb,
1810 const amb_dev * dev, loader_command cmd) {
1812 unsigned long timeout;
1814 PRINTD (DBG_FLOW|DBG_LOAD, "do_loader_command");
1816 /* do a command
1818 Set the return value to zero, set the command type and set the
1819 valid entry to the right magic value. The payload is already
1820 correctly byte-ordered so we leave it alone. Hit the doorbell
1821 with the bus address of this structure.
1825 lb->result = 0;
1826 lb->command = cpu_to_be32 (cmd);
1827 lb->valid = cpu_to_be32 (DMA_VALID);
1828 // dump_registers (dev);
1829 // dump_loader_block (lb);
1830 wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (lb) & ~onegigmask);
1832 timeout = command_timeouts[cmd] * HZ/100;
1834 while (!lb->result || lb->result == cpu_to_be32 (COMMAND_IN_PROGRESS))
1835 if (timeout) {
1836 set_current_state(TASK_UNINTERRUPTIBLE);
1837 timeout = schedule_timeout (timeout);
1838 } else {
1839 PRINTD (DBG_LOAD|DBG_ERR, "command %d timed out", cmd);
1840 dump_registers (dev);
1841 dump_loader_block (lb);
1842 return -ETIMEDOUT;
1845 if (cmd == adapter_start) {
1846 // wait for start command to acknowledge...
1847 timeout = HZ/10;
1848 while (rd_plain (dev, offsetof(amb_mem, doorbell)))
1849 if (timeout) {
1850 timeout = schedule_timeout (timeout);
1851 } else {
1852 PRINTD (DBG_LOAD|DBG_ERR, "start command did not clear doorbell, res=%08x",
1853 be32_to_cpu (lb->result));
1854 dump_registers (dev);
1855 return -ETIMEDOUT;
1857 return 0;
1858 } else {
1859 return decode_loader_result (cmd, be32_to_cpu (lb->result));
1864 /* loader: determine loader version */
1866 static int __init get_loader_version (loader_block * lb,
1867 const amb_dev * dev, u32 * version) {
1868 int res;
1870 PRINTD (DBG_FLOW|DBG_LOAD, "get_loader_version");
1872 res = do_loader_command (lb, dev, get_version_number);
1873 if (res)
1874 return res;
1875 if (version)
1876 *version = be32_to_cpu (lb->payload.version);
1877 return 0;
1880 /* loader: write memory data blocks */
1882 static int __init loader_write (loader_block * lb,
1883 const amb_dev * dev, const u32 * data,
1884 u32 address, unsigned int count) {
1885 unsigned int i;
1886 transfer_block * tb = &lb->payload.transfer;
1888 PRINTD (DBG_FLOW|DBG_LOAD, "loader_write");
1890 if (count > MAX_TRANSFER_DATA)
1891 return -EINVAL;
1892 tb->address = cpu_to_be32 (address);
1893 tb->count = cpu_to_be32 (count);
1894 for (i = 0; i < count; ++i)
1895 tb->data[i] = cpu_to_be32 (data[i]);
1896 return do_loader_command (lb, dev, write_adapter_memory);
1899 /* loader: verify memory data blocks */
1901 static int __init loader_verify (loader_block * lb,
1902 const amb_dev * dev, const u32 * data,
1903 u32 address, unsigned int count) {
1904 unsigned int i;
1905 transfer_block * tb = &lb->payload.transfer;
1906 int res;
1908 PRINTD (DBG_FLOW|DBG_LOAD, "loader_verify");
1910 if (count > MAX_TRANSFER_DATA)
1911 return -EINVAL;
1912 tb->address = cpu_to_be32 (address);
1913 tb->count = cpu_to_be32 (count);
1914 res = do_loader_command (lb, dev, read_adapter_memory);
1915 if (!res)
1916 for (i = 0; i < count; ++i)
1917 if (tb->data[i] != cpu_to_be32 (data[i])) {
1918 res = -EINVAL;
1919 break;
1921 return res;
1924 /* loader: start microcode */
1926 static int __init loader_start (loader_block * lb,
1927 const amb_dev * dev, u32 address) {
1928 PRINTD (DBG_FLOW|DBG_LOAD, "loader_start");
1930 lb->payload.start = cpu_to_be32 (address);
1931 return do_loader_command (lb, dev, adapter_start);
1934 /********** reset card **********/
1936 static inline void sf (const char * msg)
1938 PRINTK (KERN_ERR, "self-test failed: %s", msg);
1941 static int amb_reset (amb_dev * dev, int diags) {
1942 u32 word;
1944 PRINTD (DBG_FLOW|DBG_LOAD, "amb_reset");
1946 word = rd_plain (dev, offsetof(amb_mem, reset_control));
1947 // put card into reset state
1948 wr_plain (dev, offsetof(amb_mem, reset_control), word | AMB_RESET_BITS);
1949 // wait a short while
1950 udelay (10);
1951 #if 1
1952 // put card into known good state
1953 wr_plain (dev, offsetof(amb_mem, interrupt_control), AMB_DOORBELL_BITS);
1954 // clear all interrupts just in case
1955 wr_plain (dev, offsetof(amb_mem, interrupt), -1);
1956 #endif
1957 // clear self-test done flag
1958 wr_plain (dev, offsetof(amb_mem, mb.loader.ready), 0);
1959 // take card out of reset state
1960 wr_plain (dev, offsetof(amb_mem, reset_control), word &~ AMB_RESET_BITS);
1962 if (diags) {
1963 unsigned long timeout;
1964 // 4.2 second wait
1965 timeout = HZ*42/10;
1966 while (timeout) {
1967 set_current_state(TASK_UNINTERRUPTIBLE);
1968 timeout = schedule_timeout (timeout);
1970 // half second time-out
1971 timeout = HZ/2;
1972 while (!rd_plain (dev, offsetof(amb_mem, mb.loader.ready)))
1973 if (timeout) {
1974 set_current_state(TASK_UNINTERRUPTIBLE);
1975 timeout = schedule_timeout (timeout);
1976 } else {
1977 PRINTD (DBG_LOAD|DBG_ERR, "reset timed out");
1978 return -ETIMEDOUT;
1981 // get results of self-test
1982 // XXX double check byte-order
1983 word = rd_mem (dev, offsetof(amb_mem, mb.loader.result));
1984 if (word & SELF_TEST_FAILURE) {
1985 if (word & GPINT_TST_FAILURE)
1986 sf ("interrupt");
1987 if (word & SUNI_DATA_PATTERN_FAILURE)
1988 sf ("SUNI data pattern");
1989 if (word & SUNI_DATA_BITS_FAILURE)
1990 sf ("SUNI data bits");
1991 if (word & SUNI_UTOPIA_FAILURE)
1992 sf ("SUNI UTOPIA interface");
1993 if (word & SUNI_FIFO_FAILURE)
1994 sf ("SUNI cell buffer FIFO");
1995 if (word & SRAM_FAILURE)
1996 sf ("bad SRAM");
1997 // better return value?
1998 return -EIO;
2002 return 0;
2005 /********** transfer and start the microcode **********/
2007 static int __init ucode_init (loader_block * lb, amb_dev * dev) {
2008 unsigned int i = 0;
2009 unsigned int total = 0;
2010 const u32 * pointer = ucode_data;
2011 u32 address;
2012 unsigned int count;
2013 int res;
2015 PRINTD (DBG_FLOW|DBG_LOAD, "ucode_init");
2017 while (address = ucode_regions[i].start,
2018 count = ucode_regions[i].count) {
2019 PRINTD (DBG_LOAD, "starting region (%x, %u)", address, count);
2020 while (count) {
2021 unsigned int words;
2022 if (count <= MAX_TRANSFER_DATA)
2023 words = count;
2024 else
2025 words = MAX_TRANSFER_DATA;
2026 total += words;
2027 res = loader_write (lb, dev, pointer, address, words);
2028 if (res)
2029 return res;
2030 res = loader_verify (lb, dev, pointer, address, words);
2031 if (res)
2032 return res;
2033 count -= words;
2034 address += sizeof(u32) * words;
2035 pointer += words;
2037 i += 1;
2039 if (*pointer == 0xdeadbeef) {
2040 return loader_start (lb, dev, ucode_start);
2041 } else {
2042 // cast needed as there is no %? for pointer differnces
2043 PRINTD (DBG_LOAD|DBG_ERR,
2044 "offset=%li, *pointer=%x, address=%x, total=%u",
2045 (long) (pointer - ucode_data), *pointer, address, total);
2046 PRINTK (KERN_ERR, "incorrect microcode data");
2047 return -ENOMEM;
2051 /********** give adapter parameters **********/
2053 static inline u32 bus_addr(void * addr) {
2054 return cpu_to_be32 (virt_to_bus (addr));
2057 static int __init amb_talk (amb_dev * dev) {
2058 adap_talk_block a;
2059 unsigned char pool;
2060 unsigned long timeout;
2062 PRINTD (DBG_FLOW, "amb_talk %p", dev);
2064 a.command_start = bus_addr (dev->cq.ptrs.start);
2065 a.command_end = bus_addr (dev->cq.ptrs.limit);
2066 a.tx_start = bus_addr (dev->txq.in.start);
2067 a.tx_end = bus_addr (dev->txq.in.limit);
2068 a.txcom_start = bus_addr (dev->txq.out.start);
2069 a.txcom_end = bus_addr (dev->txq.out.limit);
2071 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
2072 // the other "a" items are set up by the adapter
2073 a.rec_struct[pool].buffer_start = bus_addr (dev->rxq[pool].in.start);
2074 a.rec_struct[pool].buffer_end = bus_addr (dev->rxq[pool].in.limit);
2075 a.rec_struct[pool].rx_start = bus_addr (dev->rxq[pool].out.start);
2076 a.rec_struct[pool].rx_end = bus_addr (dev->rxq[pool].out.limit);
2077 a.rec_struct[pool].buffer_size = cpu_to_be32 (dev->rxq[pool].buffer_size);
2080 #ifdef AMB_NEW_MICROCODE
2081 // disable fast PLX prefetching
2082 a.init_flags = 0;
2083 #endif
2085 // pass the structure
2086 wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (&a));
2088 // 2.2 second wait (must not touch doorbell during 2 second DMA test)
2089 timeout = HZ*22/10;
2090 while (timeout)
2091 timeout = schedule_timeout (timeout);
2092 // give the adapter another half second?
2093 timeout = HZ/2;
2094 while (rd_plain (dev, offsetof(amb_mem, doorbell)))
2095 if (timeout) {
2096 timeout = schedule_timeout (timeout);
2097 } else {
2098 PRINTD (DBG_INIT|DBG_ERR, "adapter init timed out");
2099 return -ETIMEDOUT;
2102 return 0;
2105 // get microcode version
2106 static void __init amb_ucode_version (amb_dev * dev) {
2107 u32 major;
2108 u32 minor;
2109 command cmd;
2110 cmd.request = cpu_to_be32 (SRB_GET_VERSION);
2111 while (command_do (dev, &cmd)) {
2112 set_current_state(TASK_UNINTERRUPTIBLE);
2113 schedule();
2115 major = be32_to_cpu (cmd.args.version.major);
2116 minor = be32_to_cpu (cmd.args.version.minor);
2117 PRINTK (KERN_INFO, "microcode version is %u.%u", major, minor);
2120 // swap bits within byte to get Ethernet ordering
2121 u8 bit_swap (u8 byte)
2123 const u8 swap[] = {
2124 0x0, 0x8, 0x4, 0xc,
2125 0x2, 0xa, 0x6, 0xe,
2126 0x1, 0x9, 0x5, 0xd,
2127 0x3, 0xb, 0x7, 0xf
2129 return ((swap[byte & 0xf]<<4) | swap[byte>>4]);
2132 // get end station address
2133 static void __init amb_esi (amb_dev * dev, u8 * esi) {
2134 u32 lower4;
2135 u16 upper2;
2136 command cmd;
2138 cmd.request = cpu_to_be32 (SRB_GET_BIA);
2139 while (command_do (dev, &cmd)) {
2140 set_current_state(TASK_UNINTERRUPTIBLE);
2141 schedule();
2143 lower4 = be32_to_cpu (cmd.args.bia.lower4);
2144 upper2 = be32_to_cpu (cmd.args.bia.upper2);
2145 PRINTD (DBG_LOAD, "BIA: lower4: %08x, upper2 %04x", lower4, upper2);
2147 if (esi) {
2148 unsigned int i;
2150 PRINTDB (DBG_INIT, "ESI:");
2151 for (i = 0; i < ESI_LEN; ++i) {
2152 if (i < 4)
2153 esi[i] = bit_swap (lower4>>(8*i));
2154 else
2155 esi[i] = bit_swap (upper2>>(8*(i-4)));
2156 PRINTDM (DBG_INIT, " %02x", esi[i]);
2159 PRINTDE (DBG_INIT, "");
2162 return;
2165 static void fixup_plx_window (amb_dev *dev, loader_block *lb)
2167 // fix up the PLX-mapped window base address to match the block
2168 unsigned long blb;
2169 u32 mapreg;
2170 blb = virt_to_bus(lb);
2171 // the kernel stack had better not ever cross a 1Gb boundary!
2172 mapreg = rd_plain (dev, offsetof(amb_mem, stuff[10]));
2173 mapreg &= ~onegigmask;
2174 mapreg |= blb & onegigmask;
2175 wr_plain (dev, offsetof(amb_mem, stuff[10]), mapreg);
2176 return;
2179 static int __init amb_init (amb_dev * dev)
2181 loader_block lb;
2183 u32 version;
2185 if (amb_reset (dev, 1)) {
2186 PRINTK (KERN_ERR, "card reset failed!");
2187 } else {
2188 fixup_plx_window (dev, &lb);
2190 if (get_loader_version (&lb, dev, &version)) {
2191 PRINTK (KERN_INFO, "failed to get loader version");
2192 } else {
2193 PRINTK (KERN_INFO, "loader version is %08x", version);
2195 if (ucode_init (&lb, dev)) {
2196 PRINTK (KERN_ERR, "microcode failure");
2197 } else if (create_queues (dev, cmds, txs, rxs, rxs_bs)) {
2198 PRINTK (KERN_ERR, "failed to get memory for queues");
2199 } else {
2201 if (amb_talk (dev)) {
2202 PRINTK (KERN_ERR, "adapter did not accept queues");
2203 } else {
2205 amb_ucode_version (dev);
2206 return 0;
2208 } /* amb_talk */
2210 destroy_queues (dev);
2211 } /* create_queues, ucode_init */
2213 amb_reset (dev, 0);
2214 } /* get_loader_version */
2216 } /* amb_reset */
2218 return -EINVAL;
2221 static void setup_dev(amb_dev *dev, struct pci_dev *pci_dev)
2223 unsigned char pool;
2224 memset (dev, 0, sizeof(amb_dev));
2226 // set up known dev items straight away
2227 dev->pci_dev = pci_dev;
2229 dev->iobase = pci_resource_start (pci_dev, 1);
2230 dev->irq = pci_dev->irq;
2231 dev->membase = bus_to_virt(pci_resource_start(pci_dev, 0));
2233 // flags (currently only dead)
2234 dev->flags = 0;
2236 // Allocate cell rates (fibre)
2237 // ATM_OC3_PCR = 1555200000/8/270*260/53 - 29/53
2238 // to be really pedantic, this should be ATM_OC3c_PCR
2239 dev->tx_avail = ATM_OC3_PCR;
2240 dev->rx_avail = ATM_OC3_PCR;
2242 #ifdef FILL_RX_POOLS_IN_BH
2243 // initialise bottom half
2244 INIT_WORK(&dev->bh, (void (*)(void *)) fill_rx_pools, dev);
2245 #endif
2247 // semaphore for txer/rxer modifications - we cannot use a
2248 // spinlock as the critical region needs to switch processes
2249 init_MUTEX (&dev->vcc_sf);
2250 // queue manipulation spinlocks; we want atomic reads and
2251 // writes to the queue descriptors (handles IRQ and SMP)
2252 // consider replacing "int pending" -> "atomic_t available"
2253 // => problem related to who gets to move queue pointers
2254 spin_lock_init (&dev->cq.lock);
2255 spin_lock_init (&dev->txq.lock);
2256 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2257 spin_lock_init (&dev->rxq[pool].lock);
2260 static int setup_pci_dev(struct pci_dev *pci_dev)
2262 unsigned char lat;
2263 int ret;
2265 // enable bus master accesses
2266 pci_set_master(pci_dev);
2268 ret = pci_enable_device(pci_dev);
2269 if (ret < 0)
2270 goto out;
2272 // frobnicate latency (upwards, usually)
2273 pci_read_config_byte (pci_dev, PCI_LATENCY_TIMER, &lat);
2275 if (!pci_lat)
2276 pci_lat = (lat < MIN_PCI_LATENCY) ? MIN_PCI_LATENCY : lat;
2278 if (lat != pci_lat) {
2279 PRINTK (KERN_INFO, "Changing PCI latency timer from %hu to %hu",
2280 lat, pci_lat);
2281 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, pci_lat);
2283 out:
2284 return ret;
2287 static int __init do_pci_device(struct pci_dev *pci_dev)
2289 amb_dev * dev;
2290 int err;
2292 // read resources from PCI configuration space
2293 u8 irq = pci_dev->irq;
2295 PRINTD (DBG_INFO, "found Madge ATM adapter (amb) at"
2296 " IO %x, IRQ %u, MEM %p", pci_resource_start(pci_dev, 1),
2297 irq, bus_to_virt(pci_resource_start(pci_dev, 0)));
2299 // check IO region
2300 err = pci_request_region(pci_dev, 1, DEV_LABEL);
2301 if (err < 0) {
2302 PRINTK (KERN_ERR, "IO range already in use!");
2303 goto out;
2306 dev = kmalloc (sizeof(amb_dev), GFP_KERNEL);
2307 if (!dev) {
2308 PRINTK (KERN_ERR, "out of memory!");
2309 err = -ENOMEM;
2310 goto out_release;
2313 setup_dev(dev, pci_dev);
2315 err = amb_init(dev);
2316 if (err < 0) {
2317 PRINTK (KERN_ERR, "adapter initialisation failure");
2318 goto out_free;
2321 err = setup_pci_dev(pci_dev);
2322 if (err < 0)
2323 goto out_reset;
2325 // grab (but share) IRQ and install handler
2326 err = request_irq(irq, interrupt_handler, SA_SHIRQ, DEV_LABEL, dev);
2327 if (err < 0) {
2328 PRINTK (KERN_ERR, "request IRQ failed!");
2329 goto out_disable;
2332 dev->atm_dev = atm_dev_register (DEV_LABEL, &amb_ops, -1, NULL);
2333 if (!dev->atm_dev) {
2334 PRINTD (DBG_ERR, "failed to register Madge ATM adapter");
2335 err = -EINVAL;
2336 goto out_free_irq;
2339 PRINTD (DBG_INFO, "registered Madge ATM adapter (no. %d) (%p) at %p",
2340 dev->atm_dev->number, dev, dev->atm_dev);
2341 dev->atm_dev->dev_data = (void *) dev;
2343 // register our address
2344 amb_esi (dev, dev->atm_dev->esi);
2346 // 0 bits for vpi, 10 bits for vci
2347 dev->atm_dev->ci_range.vpi_bits = NUM_VPI_BITS;
2348 dev->atm_dev->ci_range.vci_bits = NUM_VCI_BITS;
2350 // update linked list
2351 dev->prev = amb_devs;
2352 amb_devs = dev;
2354 // enable host interrupts
2355 interrupts_on (dev);
2357 out:
2358 return err;
2360 out_free_irq:
2361 free_irq(irq, dev);
2362 out_disable:
2363 pci_disable_device(pci_dev);
2364 out_reset:
2365 amb_reset(dev, 0);
2366 out_free:
2367 kfree(dev);
2368 out_release:
2369 pci_release_region(pci_dev, 1);
2370 goto out;
2373 static int __init amb_probe (void) {
2374 struct pci_dev * pci_dev;
2375 int devs;
2377 PRINTD (DBG_FLOW, "amb_probe");
2379 devs = 0;
2380 pci_dev = NULL;
2381 while ((pci_dev = pci_find_device
2382 (PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR, pci_dev)
2383 )) {
2384 if (do_pci_device(pci_dev) == 0)
2385 devs++;
2389 pci_dev = NULL;
2390 while ((pci_dev = pci_find_device
2391 (PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR_BAD, pci_dev)
2393 PRINTK (KERN_ERR, "skipped broken (PLX rev 2) card");
2395 return devs;
2398 static void __init amb_check_args (void) {
2399 unsigned char pool;
2400 unsigned int max_rx_size;
2402 #ifdef DEBUG_AMBASSADOR
2403 PRINTK (KERN_NOTICE, "debug bitmap is %hx", debug &= DBG_MASK);
2404 #else
2405 if (debug)
2406 PRINTK (KERN_NOTICE, "no debugging support");
2407 #endif
2409 if (cmds < MIN_QUEUE_SIZE)
2410 PRINTK (KERN_NOTICE, "cmds has been raised to %u",
2411 cmds = MIN_QUEUE_SIZE);
2413 if (txs < MIN_QUEUE_SIZE)
2414 PRINTK (KERN_NOTICE, "txs has been raised to %u",
2415 txs = MIN_QUEUE_SIZE);
2417 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2418 if (rxs[pool] < MIN_QUEUE_SIZE)
2419 PRINTK (KERN_NOTICE, "rxs[%hu] has been raised to %u",
2420 pool, rxs[pool] = MIN_QUEUE_SIZE);
2422 // buffers sizes should be greater than zero and strictly increasing
2423 max_rx_size = 0;
2424 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2425 if (rxs_bs[pool] <= max_rx_size)
2426 PRINTK (KERN_NOTICE, "useless pool (rxs_bs[%hu] = %u)",
2427 pool, rxs_bs[pool]);
2428 else
2429 max_rx_size = rxs_bs[pool];
2431 if (rx_lats < MIN_RX_BUFFERS)
2432 PRINTK (KERN_NOTICE, "rx_lats has been raised to %u",
2433 rx_lats = MIN_RX_BUFFERS);
2435 return;
2438 /********** module stuff **********/
2440 MODULE_AUTHOR(maintainer_string);
2441 MODULE_DESCRIPTION(description_string);
2442 MODULE_LICENSE("GPL");
2443 MODULE_PARM(debug, "h");
2444 MODULE_PARM(cmds, "i");
2445 MODULE_PARM(txs, "i");
2446 MODULE_PARM(rxs, __MODULE_STRING(NUM_RX_POOLS) "i");
2447 MODULE_PARM(rxs_bs, __MODULE_STRING(NUM_RX_POOLS) "i");
2448 MODULE_PARM(rx_lats, "i");
2449 MODULE_PARM(pci_lat, "b");
2450 MODULE_PARM_DESC(debug, "debug bitmap, see .h file");
2451 MODULE_PARM_DESC(cmds, "number of command queue entries");
2452 MODULE_PARM_DESC(txs, "number of TX queue entries");
2453 MODULE_PARM_DESC(rxs, "number of RX queue entries [" __MODULE_STRING(NUM_RX_POOLS) "]");
2454 MODULE_PARM_DESC(rxs_bs, "size of RX buffers [" __MODULE_STRING(NUM_RX_POOLS) "]");
2455 MODULE_PARM_DESC(rx_lats, "number of extra buffers to cope with RX latencies");
2456 MODULE_PARM_DESC(pci_lat, "PCI latency in bus cycles");
2458 /********** module entry **********/
2460 static int __init amb_module_init (void) {
2461 int devs;
2463 PRINTD (DBG_FLOW|DBG_INIT, "init_module");
2465 // sanity check - cast needed as printk does not support %Zu
2466 if (sizeof(amb_mem) != 4*16 + 4*12) {
2467 PRINTK (KERN_ERR, "Fix amb_mem (is %lu words).",
2468 (unsigned long) sizeof(amb_mem));
2469 return -ENOMEM;
2472 show_version();
2474 amb_check_args();
2476 // get the juice
2477 devs = amb_probe();
2479 if (devs) {
2480 mod_timer (&housekeeping, jiffies);
2481 } else {
2482 PRINTK (KERN_INFO, "no (usable) adapters found");
2485 return devs ? 0 : -ENODEV;
2488 /********** module exit **********/
2490 static void __exit amb_module_exit (void) {
2491 amb_dev * dev;
2493 PRINTD (DBG_FLOW|DBG_INIT, "cleanup_module");
2495 // paranoia
2496 housekeeping.data = 0;
2497 del_timer_sync(&housekeeping);
2499 while (amb_devs) {
2500 struct pci_dev *pdev;
2502 dev = amb_devs;
2503 pdev = dev->pci_dev;
2504 amb_devs = dev->prev;
2506 PRINTD (DBG_INFO|DBG_INIT, "closing %p (atm_dev = %p)", dev, dev->atm_dev);
2507 // the drain should not be necessary
2508 drain_rx_pools (dev);
2509 interrupts_off (dev);
2510 amb_reset (dev, 0);
2511 free_irq (dev->irq, dev);
2512 pci_disable_device (pdev);
2513 destroy_queues (dev);
2514 atm_dev_deregister (dev->atm_dev);
2515 kfree (dev);
2516 pci_release_region (pdev, 1);
2519 return;
2522 module_init(amb_module_init);
2523 module_exit(amb_module_exit);