arch/sh/kernel/cpu/irq_imask.c

   1 /* $Id: irq_imask.c,v 1.1.2.1 2002/11/17 10:53:43 mrbrown Exp $
   2  *
   3  * linux/arch/sh/kernel/irq_imask.c
   4  *
   5  * Copyright (C) 1999, 2000  Niibe Yutaka
   6  *
   7  * Simple interrupt handling using IMASK of SR register.
   8  *
   9  */
  10
  11 /* NOTE: Will not work on level 15 */
  12
  13
  14 #include <linux/ptrace.h>
  15 #include <linux/errno.h>
  16 #include <linux/kernel_stat.h>
  17 #include <linux/signal.h>
  18 #include <linux/sched.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/init.h>
  21
  22 #include <asm/system.h>
  23 #include <asm/irq.h>
  24 #include <asm/bitops.h>
  25
  26 #include <linux/spinlock.h>
  27 #include <linux/cache.h>
  28 #include <linux/irq.h>
  29
  30 /* Bitmap of IRQ masked */
  31 static unsigned long imask_mask = 0x7fff;
  32 static int interrupt_priority = 0;
  33
  34 static void enable_imask_irq(unsigned int irq);
  35 static void disable_imask_irq(unsigned int irq);
  36 static void shutdown_imask_irq(unsigned int irq);
  37 static void mask_and_ack_imask(unsigned int);
  38 static void end_imask_irq(unsigned int irq);
  39
  40 #define IMASK_PRIORITY  15
  41
  42 static unsigned int startup_imask_irq(unsigned int irq)
  43 {
  44         /* Nothing to do */
  45         return 0; /* never anything pending */
  46 }
  47
  48 static struct hw_interrupt_type imask_irq_type = {
  49         "SR.IMASK",
  50         startup_imask_irq,
  51         shutdown_imask_irq,
  52         enable_imask_irq,
  53         disable_imask_irq,
  54         mask_and_ack_imask,
  55         end_imask_irq
  56 };
  57
  58 void static inline set_interrupt_registers(int ip)
  59 {
  60         unsigned long __dummy;
  61
  62         asm volatile("ldc       %2, r6_bank\n\t"
  63                      "stc       sr, %0\n\t"
  64                      "and       #0xf0, %0\n\t"
  65                      "shlr2     %0\n\t"
  66                      "cmp/eq    #0x3c, %0\n\t"
  67                      "bt/s      1f      ! CLI-ed\n\t"
  68                      " stc      sr, %0\n\t"
  69                      "and       %1, %0\n\t"
  70                      "or        %2, %0\n\t"
  71                      "ldc       %0, sr\n"
  72                      "1:"
  73                      : "=&z" (__dummy)
  74                      : "r" (~0xf0), "r" (ip << 4)
  75                      : "t");
  76 }
  77
  78 static void disable_imask_irq(unsigned int irq)
  79 {
  80         clear_bit(irq, &imask_mask);
  81         if (interrupt_priority < IMASK_PRIORITY - irq)
  82                 interrupt_priority = IMASK_PRIORITY - irq;
  83
  84         set_interrupt_registers(interrupt_priority);
  85 }
  86
  87 static void enable_imask_irq(unsigned int irq)
  88 {
  89         set_bit(irq, &imask_mask);
  90         interrupt_priority = IMASK_PRIORITY - ffz(imask_mask);
  91
  92         set_interrupt_registers(interrupt_priority);
  93 }
  94
  95 static void mask_and_ack_imask(unsigned int irq)
  96 {
  97         disable_imask_irq(irq);
  98 }
  99
 100 static void end_imask_irq(unsigned int irq)
 101 {
 102         if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 103                 enable_imask_irq(irq);
 104 }
 105
 106 static void shutdown_imask_irq(unsigned int irq)
 107 {
 108         /* Nothing to do */
 109 }
 110
 111 void make_imask_irq(unsigned int irq)
 112 {
 113         disable_irq_nosync(irq);
 114         irq_desc[irq].handler = &imask_irq_type;
 115         enable_irq(irq);
 116 }