2 * Driver for Digigram VXpocket soundcards
4 * lowlevel routines for VXpocket soundcards
6 * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <sound/driver.h>
24 #include <linux/delay.h>
25 #include <sound/core.h>
30 static int vxp_reg_offset
[VX_REG_MAX
] = {
31 [VX_ICR
] = 0x00, // ICR
32 [VX_CVR
] = 0x01, // CVR
33 [VX_ISR
] = 0x02, // ISR
34 [VX_IVR
] = 0x03, // IVR
35 [VX_RXH
] = 0x05, // RXH
36 [VX_RXM
] = 0x06, // RXM
37 [VX_RXL
] = 0x07, // RXL
38 [VX_DMA
] = 0x04, // DMA
39 [VX_CDSP
] = 0x08, // CDSP
40 [VX_LOFREQ
] = 0x09, // LFREQ
41 [VX_HIFREQ
] = 0x0a, // HFREQ
42 [VX_DATA
] = 0x0b, // DATA
43 [VX_MICRO
] = 0x0c, // MICRO
44 [VX_DIALOG
] = 0x0d, // DIALOG
45 [VX_CSUER
] = 0x0e, // CSUER
46 [VX_RUER
] = 0x0f, // RUER
50 inline static unsigned long vxp_reg_addr(vx_core_t
*_chip
, int reg
)
52 struct snd_vxpocket
*chip
= (struct snd_vxpocket
*)_chip
;
53 return chip
->port
+ vxp_reg_offset
[reg
];
57 * snd_vx_inb - read a byte from the register
58 * @offset: register offset
60 static unsigned char vxp_inb(vx_core_t
*chip
, int offset
)
62 return inb(vxp_reg_addr(chip
, offset
));
66 * snd_vx_outb - write a byte on the register
67 * @offset: the register offset
68 * @val: the value to write
70 static void vxp_outb(vx_core_t
*chip
, int offset
, unsigned char val
)
72 outb(val
, vxp_reg_addr(chip
, offset
));
76 * redefine macros to call directly
79 #define vx_inb(chip,reg) vxp_inb((vx_core_t*)(chip), VX_##reg)
81 #define vx_outb(chip,reg,val) vxp_outb((vx_core_t*)(chip), VX_##reg,val)
85 * vx_check_magic - check the magic word on xilinx
87 * returns zero if a magic word is detected, or a negative error code.
89 static int vx_check_magic(vx_core_t
*chip
)
91 unsigned long end_time
= jiffies
+ HZ
/ 5;
94 c
= vx_inb(chip
, CDSP
);
97 snd_vx_delay(chip
, 10);
98 } while (time_after_eq(end_time
, jiffies
));
99 snd_printk(KERN_ERR
"cannot find xilinx magic word (%x)\n", c
);
105 * vx_reset_dsp - reset the DSP
108 #define XX_DSP_RESET_WAIT_TIME 2 /* ms */
110 static void vxp_reset_dsp(vx_core_t
*_chip
)
112 struct snd_vxpocket
*chip
= (struct snd_vxpocket
*)_chip
;
114 /* set the reset dsp bit to 1 */
115 vx_outb(chip
, CDSP
, chip
->regCDSP
| VXP_CDSP_DSP_RESET_MASK
);
117 mdelay(XX_DSP_RESET_WAIT_TIME
);
119 chip
->regCDSP
&= ~VXP_CDSP_DSP_RESET_MASK
;
120 vx_outb(chip
, CDSP
, chip
->regCDSP
);
122 mdelay(XX_DSP_RESET_WAIT_TIME
);
128 static void vxp_reset_codec(vx_core_t
*_chip
)
130 struct snd_vxpocket
*chip
= (struct snd_vxpocket
*)_chip
;
132 /* Set the reset CODEC bit to 1. */
133 vx_outb(chip
, CDSP
, chip
->regCDSP
| VXP_CDSP_CODEC_RESET_MASK
);
135 snd_vx_delay(_chip
, 10);
136 /* Set the reset CODEC bit to 0. */
137 chip
->regCDSP
&= ~VXP_CDSP_CODEC_RESET_MASK
;
138 vx_outb(chip
, CDSP
, chip
->regCDSP
);
140 snd_vx_delay(_chip
, 1);
144 * vx_load_xilinx_binary - load the xilinx binary image
145 * the binary image is the binary array converted from the bitstream file.
147 static int vxp_load_xilinx_binary(vx_core_t
*_chip
, const snd_hwdep_dsp_image_t
*xilinx
)
149 struct snd_vxpocket
*chip
= (struct snd_vxpocket
*)_chip
;
152 int regCSUER
, regRUER
;
153 unsigned char __user
*image
;
156 /* Switch to programmation mode */
157 chip
->regDIALOG
|= VXP_DLG_XILINX_REPROG_MASK
;
158 vx_outb(chip
, DIALOG
, chip
->regDIALOG
);
160 /* Save register CSUER and RUER */
161 regCSUER
= vx_inb(chip
, CSUER
);
162 regRUER
= vx_inb(chip
, RUER
);
164 /* reset HF0 and HF1 */
165 vx_outb(chip
, ICR
, 0);
167 /* Wait for answer HF2 equal to 1 */
168 snd_printdd(KERN_DEBUG
"check ISR_HF2\n");
169 if (vx_check_isr(_chip
, ISR_HF2
, ISR_HF2
, 20) < 0)
172 /* set HF1 for loading xilinx binary */
173 vx_outb(chip
, ICR
, ICR_HF1
);
174 image
= xilinx
->image
;
175 for (i
= 0; i
< xilinx
->length
; i
++, image
++) {
176 __get_user(data
, image
);
177 if (vx_wait_isr_bit(_chip
, ISR_TX_EMPTY
) < 0)
179 vx_outb(chip
, TXL
, data
);
180 /* wait for reading */
181 if (vx_wait_for_rx_full(_chip
) < 0)
183 c
= vx_inb(chip
, RXL
);
185 snd_printk(KERN_ERR
"vxpocket: load xilinx mismatch at %d: 0x%x != 0x%x\n", i
, c
, (int)data
);
189 vx_outb(chip
, ICR
, 0);
192 if (vx_check_isr(_chip
, ISR_HF3
, ISR_HF3
, 20) < 0)
195 /* read the number of bytes received */
196 if (vx_wait_for_rx_full(_chip
) < 0)
199 c
= (int)vx_inb(chip
, RXH
) << 16;
200 c
|= (int)vx_inb(chip
, RXM
) << 8;
201 c
|= vx_inb(chip
, RXL
);
203 snd_printdd(KERN_DEBUG
"xilinx: dsp size received 0x%x, orig 0x%x\n", c
, xilinx
->length
);
205 vx_outb(chip
, ICR
, ICR_HF0
);
207 /* TEMPO 250ms : wait until Xilinx is downloaded */
208 snd_vx_delay(_chip
, 300);
210 /* test magical word */
211 if (vx_check_magic(_chip
) < 0)
214 /* Restore register 0x0E and 0x0F (thus replacing COR and FCSR) */
215 vx_outb(chip
, CSUER
, regCSUER
);
216 vx_outb(chip
, RUER
, regRUER
);
218 /* Reset the Xilinx's signal enabling IO access */
219 chip
->regDIALOG
|= VXP_DLG_XILINX_REPROG_MASK
;
220 vx_outb(chip
, DIALOG
, chip
->regDIALOG
);
221 vx_inb(chip
, DIALOG
);
222 snd_vx_delay(_chip
, 10);
223 chip
->regDIALOG
&= ~VXP_DLG_XILINX_REPROG_MASK
;
224 vx_outb(chip
, DIALOG
, chip
->regDIALOG
);
225 vx_inb(chip
, DIALOG
);
227 /* Reset of the Codec */
228 vxp_reset_codec(_chip
);
234 vx_outb(chip
, CSUER
, regCSUER
);
235 vx_outb(chip
, RUER
, regRUER
);
236 chip
->regDIALOG
&= ~VXP_DLG_XILINX_REPROG_MASK
;
237 vx_outb(chip
, DIALOG
, chip
->regDIALOG
);
243 * vxp_load_dsp - load_dsp callback
245 static int vxp_load_dsp(vx_core_t
*vx
, const snd_hwdep_dsp_image_t
*dsp
)
250 snd_printdd("loading dsp [%d] %s, size = %d\n", dsp
->index
, dsp
->name
, dsp
->length
);
252 switch (dsp
->index
) {
255 if ((err
= vx_check_magic(vx
)) < 0)
257 if ((err
= snd_vx_load_boot_image(vx
, dsp
)) < 0)
262 return vxp_load_xilinx_binary(vx
, dsp
);
265 return snd_vx_dsp_boot(vx
, dsp
);
268 return snd_vx_dsp_load(vx
, dsp
);
277 * vx_test_and_ack - test and acknowledge interrupt
279 * called from irq hander, too
283 static int vxp_test_and_ack(vx_core_t
*_chip
)
285 struct snd_vxpocket
*chip
= (struct snd_vxpocket
*)_chip
;
287 /* not booted yet? */
288 if (! (_chip
->chip_status
& VX_STAT_XILINX_LOADED
))
291 if (! (vx_inb(chip
, DIALOG
) & VXP_DLG_MEMIRQ_MASK
))
294 /* ok, interrupts generated, now ack it */
295 /* set ACQUIT bit up and down */
296 vx_outb(chip
, DIALOG
, chip
->regDIALOG
| VXP_DLG_ACK_MEMIRQ_MASK
);
297 /* useless read just to spend some time and maintain
298 * the ACQUIT signal up for a while ( a bus cycle )
300 vx_inb(chip
, DIALOG
);
301 vx_outb(chip
, DIALOG
, chip
->regDIALOG
& ~VXP_DLG_ACK_MEMIRQ_MASK
);
308 * vx_validate_irq - enable/disable IRQ
310 static void vxp_validate_irq(vx_core_t
*_chip
, int enable
)
312 struct snd_vxpocket
*chip
= (struct snd_vxpocket
*)_chip
;
314 /* Set the interrupt enable bit to 1 in CDSP register */
316 chip
->regCDSP
|= VXP_CDSP_VALID_IRQ_MASK
;
318 chip
->regCDSP
&= ~VXP_CDSP_VALID_IRQ_MASK
;
319 vx_outb(chip
, CDSP
, chip
->regCDSP
);
323 * vx_setup_pseudo_dma - set up the pseudo dma read/write mode.
324 * @do_write: 0 = read, 1 = set up for DMA write
326 static void vx_setup_pseudo_dma(vx_core_t
*_chip
, int do_write
)
328 struct snd_vxpocket
*chip
= (struct snd_vxpocket
*)_chip
;
330 /* Interrupt mode and HREQ pin enabled for host transmit / receive data transfers */
331 vx_outb(chip
, ICR
, do_write
? ICR_TREQ
: ICR_RREQ
);
332 /* Reset the pseudo-dma register */
334 vx_outb(chip
, ISR
, 0);
336 /* Select DMA in read/write transfer mode and in 16-bit accesses */
337 chip
->regDIALOG
|= VXP_DLG_DMA16_SEL_MASK
;
338 chip
->regDIALOG
|= do_write
? VXP_DLG_DMAWRITE_SEL_MASK
: VXP_DLG_DMAREAD_SEL_MASK
;
339 vx_outb(chip
, DIALOG
, chip
->regDIALOG
);
344 * vx_release_pseudo_dma - disable the pseudo-DMA mode
346 static void vx_release_pseudo_dma(vx_core_t
*_chip
)
348 struct snd_vxpocket
*chip
= (struct snd_vxpocket
*)_chip
;
350 /* Disable DMA and 16-bit accesses */
351 chip
->regDIALOG
&= ~(VXP_DLG_DMAWRITE_SEL_MASK
|
352 VXP_DLG_DMAREAD_SEL_MASK
|
353 VXP_DLG_DMA16_SEL_MASK
);
354 vx_outb(chip
, DIALOG
, chip
->regDIALOG
);
355 /* HREQ pin disabled. */
356 vx_outb(chip
, ICR
, 0);
360 * vx_pseudo_dma_write - write bulk data on pseudo-DMA mode
361 * @count: data length to transfer in bytes
363 * data size must be aligned to 6 bytes to ensure the 24bit alignment on DSP.
364 * NB: call with a certain lock!
366 static void vxp_dma_write(vx_core_t
*chip
, snd_pcm_runtime_t
*runtime
,
367 vx_pipe_t
*pipe
, int count
)
369 long port
= vxp_reg_addr(chip
, VX_DMA
);
370 int offset
= pipe
->hw_ptr
;
371 unsigned short *addr
= (unsigned short *)(runtime
->dma_area
+ offset
);
373 vx_setup_pseudo_dma(chip
, 1);
374 if (offset
+ count
> pipe
->buffer_bytes
) {
375 int length
= pipe
->buffer_bytes
- offset
;
377 length
>>= 1; /* in 16bit words */
378 /* Transfer using pseudo-dma. */
379 while (length
-- > 0) {
380 outw(cpu_to_le16(*addr
), port
);
383 addr
= (unsigned short *)runtime
->dma_area
;
386 pipe
->hw_ptr
+= count
;
387 count
>>= 1; /* in 16bit words */
388 /* Transfer using pseudo-dma. */
389 while (count
-- > 0) {
390 outw(cpu_to_le16(*addr
), port
);
393 vx_release_pseudo_dma(chip
);
398 * vx_pseudo_dma_read - read bulk data on pseudo DMA mode
399 * @offset: buffer offset in bytes
400 * @count: data length to transfer in bytes
402 * the read length must be aligned to 6 bytes, as well as write.
403 * NB: call with a certain lock!
405 static void vxp_dma_read(vx_core_t
*chip
, snd_pcm_runtime_t
*runtime
,
406 vx_pipe_t
*pipe
, int count
)
408 struct snd_vxpocket
*pchip
= (struct snd_vxpocket
*)chip
;
409 long port
= vxp_reg_addr(chip
, VX_DMA
);
410 int offset
= pipe
->hw_ptr
;
411 unsigned short *addr
= (unsigned short *)(runtime
->dma_area
+ offset
);
413 snd_assert(count
% 2 == 0, return);
414 vx_setup_pseudo_dma(chip
, 0);
415 if (offset
+ count
> pipe
->buffer_bytes
) {
416 int length
= pipe
->buffer_bytes
- offset
;
418 length
>>= 1; /* in 16bit words */
419 /* Transfer using pseudo-dma. */
421 *addr
++ = le16_to_cpu(inw(port
));
422 addr
= (unsigned short *)runtime
->dma_area
;
425 pipe
->hw_ptr
+= count
;
426 count
>>= 1; /* in 16bit words */
427 /* Transfer using pseudo-dma. */
429 *addr
++ = le16_to_cpu(inw(port
));
431 pchip
->regDIALOG
&= ~VXP_DLG_DMAREAD_SEL_MASK
;
432 vx_outb(chip
, DIALOG
, pchip
->regDIALOG
);
433 /* Read the last word (16 bits) */
434 *addr
= le16_to_cpu(inw(port
));
435 /* Disable 16-bit accesses */
436 pchip
->regDIALOG
&= ~VXP_DLG_DMA16_SEL_MASK
;
437 vx_outb(chip
, DIALOG
, pchip
->regDIALOG
);
438 /* HREQ pin disabled. */
439 vx_outb(chip
, ICR
, 0);
444 * write a codec data (24bit)
446 static void vxp_write_codec_reg(vx_core_t
*chip
, int codec
, unsigned int data
)
450 /* Activate access to the corresponding codec register */
452 vx_inb(chip
, LOFREQ
);
454 vx_inb(chip
, CODEC2
);
456 /* We have to send 24 bits (3 x 8 bits). Start with most signif. Bit */
457 for (i
= 0; i
< 24; i
++, data
<<= 1)
458 vx_outb(chip
, DATA
, ((data
& 0x800000) ? VX_DATA_CODEC_MASK
: 0));
460 /* Terminate access to codec registers */
461 vx_inb(chip
, HIFREQ
);
466 * vx_set_mic_boost - set mic boost level (on vxp440 only)
467 * @boost: 0 = 20dB, 1 = +38dB
469 void vx_set_mic_boost(vx_core_t
*chip
, int boost
)
471 struct snd_vxpocket
*pchip
= (struct snd_vxpocket
*)chip
;
474 if (chip
->chip_status
& VX_STAT_IS_STALE
)
477 spin_lock_irqsave(&chip
->lock
, flags
);
478 if (pchip
->regCDSP
& P24_CDSP_MICS_SEL_MASK
) {
481 pchip
->regCDSP
&= ~P24_CDSP_MIC20_SEL_MASK
;
482 pchip
->regCDSP
|= P24_CDSP_MIC38_SEL_MASK
;
484 /* minimum value: 20 dB */
485 pchip
->regCDSP
|= P24_CDSP_MIC20_SEL_MASK
;
486 pchip
->regCDSP
&= ~P24_CDSP_MIC38_SEL_MASK
;
488 vx_outb(chip
, CDSP
, pchip
->regCDSP
);
490 spin_unlock_irqrestore(&chip
->lock
, flags
);
494 * remap the linear value (0-8) to the actual value (0-15)
496 static int vx_compute_mic_level(int level
)
499 case 5: level
= 6 ; break;
500 case 6: level
= 8 ; break;
501 case 7: level
= 11; break;
502 case 8: level
= 15; break;
509 * vx_set_mic_level - set mic level (on vxpocket only)
510 * @level: the mic level = 0 - 8 (max)
512 void vx_set_mic_level(vx_core_t
*chip
, int level
)
514 struct snd_vxpocket
*pchip
= (struct snd_vxpocket
*)chip
;
517 if (chip
->chip_status
& VX_STAT_IS_STALE
)
520 spin_lock_irqsave(&chip
->lock
, flags
);
521 if (pchip
->regCDSP
& VXP_CDSP_MIC_SEL_MASK
) {
522 level
= vx_compute_mic_level(level
);
523 vx_outb(chip
, MICRO
, level
);
525 spin_unlock_irqrestore(&chip
->lock
, flags
);
530 * change the input audio source
532 static void vxp_change_audio_source(vx_core_t
*_chip
, int src
)
534 struct snd_vxpocket
*chip
= (struct snd_vxpocket
*)_chip
;
537 case VX_AUDIO_SRC_DIGITAL
:
538 chip
->regCDSP
|= VXP_CDSP_DATAIN_SEL_MASK
;
539 vx_outb(chip
, CDSP
, chip
->regCDSP
);
541 case VX_AUDIO_SRC_LINE
:
542 chip
->regCDSP
&= ~VXP_CDSP_DATAIN_SEL_MASK
;
543 if (_chip
->type
== VX_TYPE_VXP440
)
544 chip
->regCDSP
&= ~P24_CDSP_MICS_SEL_MASK
;
546 chip
->regCDSP
&= ~VXP_CDSP_MIC_SEL_MASK
;
547 vx_outb(chip
, CDSP
, chip
->regCDSP
);
549 case VX_AUDIO_SRC_MIC
:
550 chip
->regCDSP
&= ~VXP_CDSP_DATAIN_SEL_MASK
;
551 /* reset mic levels */
552 if (_chip
->type
== VX_TYPE_VXP440
) {
553 chip
->regCDSP
&= ~P24_CDSP_MICS_SEL_MASK
;
555 chip
->regCDSP
|= P24_CDSP_MIC38_SEL_MASK
;
557 chip
->regCDSP
|= P24_CDSP_MIC20_SEL_MASK
;
558 vx_outb(chip
, CDSP
, chip
->regCDSP
);
560 chip
->regCDSP
|= VXP_CDSP_MIC_SEL_MASK
;
561 vx_outb(chip
, CDSP
, chip
->regCDSP
);
562 vx_outb(chip
, MICRO
, vx_compute_mic_level(chip
->mic_level
));
569 * change the clock source
570 * source = INTERNAL_QUARTZ or UER_SYNC
572 static void vxp_set_clock_source(vx_core_t
*_chip
, int source
)
574 struct snd_vxpocket
*chip
= (struct snd_vxpocket
*)_chip
;
576 if (source
== INTERNAL_QUARTZ
)
577 chip
->regCDSP
&= ~VXP_CDSP_CLOCKIN_SEL_MASK
;
579 chip
->regCDSP
|= VXP_CDSP_CLOCKIN_SEL_MASK
;
580 vx_outb(chip
, CDSP
, chip
->regCDSP
);
587 static void vxp_reset_board(vx_core_t
*_chip
, int cold_reset
)
589 struct snd_vxpocket
*chip
= (struct snd_vxpocket
*)_chip
;
600 struct snd_vx_ops snd_vxpocket_ops
= {
603 .test_and_ack
= vxp_test_and_ack
,
604 .validate_irq
= vxp_validate_irq
,
605 .write_codec
= vxp_write_codec_reg
,
606 .reset_codec
= vxp_reset_codec
,
607 .change_audio_source
= vxp_change_audio_source
,
608 .set_clock_source
= vxp_set_clock_source
,
609 .load_dsp
= vxp_load_dsp
,
610 .add_controls
= vxp_add_mic_controls
,
611 .reset_dsp
= vxp_reset_dsp
,
612 .reset_board
= vxp_reset_board
,
613 .dma_write
= vxp_dma_write
,
614 .dma_read
= vxp_dma_read
,