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initial commit with v2.6.9
[linux-2.6.9-moxart.git] / sound / pci / ice1712 / ice1724.c
blobb3b63219408d71a14129699a42fafd3e6ca96d2d
1 /*
2 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
3 * VIA VT1720 (Envy24PT)
4 *
5 * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
6 * 2002 James Stafford <jstafford@ampltd.com>
7 * 2003 Takashi Iwai <tiwai@suse.de>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25 #include <sound/driver.h>
26 #include <asm/io.h>
27 #include <linux/delay.h>
28 #include <linux/interrupt.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/slab.h>
32 #include <linux/moduleparam.h>
33 #include <sound/core.h>
34 #include <sound/info.h>
35 #include <sound/mpu401.h>
36 #include <sound/initval.h>
37
38 #include <sound/asoundef.h>
39
40 #include "ice1712.h"
41 #include "envy24ht.h"
42
43 /* lowlevel routines */
44 #include "amp.h"
45 #include "revo.h"
46 #include "aureon.h"
47 #include "vt1720_mobo.h"
48 #include "pontis.h"
49
50
51 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
52 MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
53 MODULE_LICENSE("GPL");
54 MODULE_SUPPORTED_DEVICE("{"
55 REVO_DEVICE_DESC
56 AMP_AUDIO2000_DEVICE_DESC
57 AUREON_DEVICE_DESC
58 VT1720_MOBO_DEVICE_DESC
59 PONTIS_DEVICE_DESC
60 "{VIA,VT1720},"
61 "{VIA,VT1724},"
62 "{ICEnsemble,Generic ICE1724},"
63 "{ICEnsemble,Generic Envy24HT}"
64 "{ICEnsemble,Generic Envy24PT}}");
65
66 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
67 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
68 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
69 static char *model[SNDRV_CARDS];
70 static int boot_devs;
71
72 module_param_array(index, int, boot_devs, 0444);
73 MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
74 module_param_array(id, charp, boot_devs, 0444);
75 MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
76 module_param_array(enable, bool, boot_devs, 0444);
77 MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
78 module_param_array(model, charp, boot_devs, 0444);
79 MODULE_PARM_DESC(model, "Use the given board model.");
80
81 #ifndef PCI_VENDOR_ID_ICE
82 #define PCI_VENDOR_ID_ICE 0x1412
83 #endif
84 #ifndef PCI_DEVICE_ID_VT1724
85 #define PCI_DEVICE_ID_VT1724 0x1724
86 #endif
87
88 /* Both VT1720 and VT1724 have the same PCI IDs */
89 static struct pci_device_id snd_vt1724_ids[] = {
90 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
91 { 0, }
92 };
93
94 MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
95
96
97 static int PRO_RATE_LOCKED;
98 static int PRO_RATE_RESET = 1;
99 static unsigned int PRO_RATE_DEFAULT = 44100;
100
101 /*
102 * Basic I/O
103 */
104
105 /* check whether the clock mode is spdif-in */
106 static inline int is_spdif_master(ice1712_t *ice)
107 {
108 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
109 }
110
111 static inline int is_pro_rate_locked(ice1712_t *ice)
112 {
113 return is_spdif_master(ice) || PRO_RATE_LOCKED;
114 }
115
116 /*
117 * ac97 section
118 */
119
120 static unsigned char snd_vt1724_ac97_ready(ice1712_t *ice)
121 {
122 unsigned char old_cmd;
123 int tm;
124 for (tm = 0; tm < 0x10000; tm++) {
125 old_cmd = inb(ICEMT1724(ice, AC97_CMD));
126 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
127 continue;
128 if (!(old_cmd & VT1724_AC97_READY))
129 continue;
130 return old_cmd;
131 }
132 snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
133 return old_cmd;
134 }
135
136 static int snd_vt1724_ac97_wait_bit(ice1712_t *ice, unsigned char bit)
137 {
138 int tm;
139 for (tm = 0; tm < 0x10000; tm++)
140 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
141 return 0;
142 snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
143 return -EIO;
144 }
145
146 static void snd_vt1724_ac97_write(ac97_t *ac97,
147 unsigned short reg,
148 unsigned short val)
149 {
150 ice1712_t *ice = (ice1712_t *)ac97->private_data;
151 unsigned char old_cmd;
152
153 old_cmd = snd_vt1724_ac97_ready(ice);
154 old_cmd &= ~VT1724_AC97_ID_MASK;
155 old_cmd |= ac97->num;
156 outb(reg, ICEMT1724(ice, AC97_INDEX));
157 outw(val, ICEMT1724(ice, AC97_DATA));
158 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
159 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
160 }
161
162 static unsigned short snd_vt1724_ac97_read(ac97_t *ac97, unsigned short reg)
163 {
164 ice1712_t *ice = (ice1712_t *)ac97->private_data;
165 unsigned char old_cmd;
166
167 old_cmd = snd_vt1724_ac97_ready(ice);
168 old_cmd &= ~VT1724_AC97_ID_MASK;
169 old_cmd |= ac97->num;
170 outb(reg, ICEMT1724(ice, AC97_INDEX));
171 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
172 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
173 return ~0;
174 return inw(ICEMT1724(ice, AC97_DATA));
175 }
176
177
178 /*
179 * GPIO operations
180 */
181
182 /* set gpio direction 0 = read, 1 = write */
183 static void snd_vt1724_set_gpio_dir(ice1712_t *ice, unsigned int data)
184 {
185 outl(data, ICEREG1724(ice, GPIO_DIRECTION));
186 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
187 }
188
189 /* set the gpio mask (0 = writable) */
190 static void snd_vt1724_set_gpio_mask(ice1712_t *ice, unsigned int data)
191 {
192 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
193 if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */
194 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
195 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
196 }
197
198 static void snd_vt1724_set_gpio_data(ice1712_t *ice, unsigned int data)
199 {
200 outw(data, ICEREG1724(ice, GPIO_DATA));
201 if (! ice->vt1720)
202 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
203 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
204 }
205
206 static unsigned int snd_vt1724_get_gpio_data(ice1712_t *ice)
207 {
208 unsigned int data;
209 if (! ice->vt1720)
210 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
211 else
212 data = 0;
213 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
214 return data;
215 }
216
217 /*
218 * Interrupt handler
219 */
220
221 static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id, struct pt_regs *regs)
222 {
223 ice1712_t *ice = dev_id;
224 unsigned char status;
225 int handled = 0;
226
227 while (1) {
228 status = inb(ICEREG1724(ice, IRQSTAT));
229 if (status == 0)
230 break;
231
232 handled = 1;
233 /* these should probably be separated at some point,
234 but as we don't currently have MPU support on the board I will leave it */
235 if ((status & VT1724_IRQ_MPU_RX)||(status & VT1724_IRQ_MPU_TX)) {
236 if (ice->rmidi[0])
237 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
238 outb(status & (VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX), ICEREG1724(ice, IRQSTAT));
239 status &= ~(VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX);
240 }
241 if (status & VT1724_IRQ_MTPCM) {
242 /*
243 * Multi-track PCM
244 * PCM assignment are:
245 * Playback DMA0 (M/C) = playback_pro_substream
246 * Playback DMA1 = playback_con_substream_ds[0]
247 * Playback DMA2 = playback_con_substream_ds[1]
248 * Playback DMA3 = playback_con_substream_ds[2]
249 * Playback DMA4 (SPDIF) = playback_con_substream
250 * Record DMA0 = capture_pro_substream
251 * Record DMA1 = capture_con_substream
252 */
253 unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
254 if (mtstat & VT1724_MULTI_PDMA0) {
255 if (ice->playback_pro_substream)
256 snd_pcm_period_elapsed(ice->playback_pro_substream);
257 }
258 if (mtstat & VT1724_MULTI_RDMA0) {
259 if (ice->capture_pro_substream)
260 snd_pcm_period_elapsed(ice->capture_pro_substream);
261 }
262 if (mtstat & VT1724_MULTI_PDMA1) {
263 if (ice->playback_con_substream_ds[0])
264 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
265 }
266 if (mtstat & VT1724_MULTI_PDMA2) {
267 if (ice->playback_con_substream_ds[1])
268 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
269 }
270 if (mtstat & VT1724_MULTI_PDMA3) {
271 if (ice->playback_con_substream_ds[2])
272 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
273 }
274 if (mtstat & VT1724_MULTI_PDMA4) {
275 if (ice->playback_con_substream)
276 snd_pcm_period_elapsed(ice->playback_con_substream);
277 }
278 if (mtstat & VT1724_MULTI_RDMA1) {
279 if (ice->capture_con_substream)
280 snd_pcm_period_elapsed(ice->capture_con_substream);
281 }
282 /* ack anyway to avoid freeze */
283 outb(mtstat, ICEMT1724(ice, IRQ));
284 /* ought to really handle this properly */
285 if (mtstat & VT1724_MULTI_FIFO_ERR) {
286 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
287 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
288 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
289 /* If I don't do this, I get machine lockup due to continual interrupts */
290 }
291
292 }
293 }
294 return IRQ_RETVAL(handled);
295 }
296
297 /*
298 * PCM code - professional part (multitrack)
299 */
300
301 static unsigned int rates[] = {
302 8000, 9600, 11025, 12000, 16000, 22050, 24000,
303 32000, 44100, 48000, 64000, 88200, 96000,
304 176400, 192000,
305 };
306
307 static snd_pcm_hw_constraint_list_t hw_constraints_rates_96 = {
308 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
309 .list = rates,
310 .mask = 0,
311 };
312
313 static snd_pcm_hw_constraint_list_t hw_constraints_rates_48 = {
314 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
315 .list = rates,
316 .mask = 0,
317 };
318
319 static snd_pcm_hw_constraint_list_t hw_constraints_rates_192 = {
320 .count = ARRAY_SIZE(rates),
321 .list = rates,
322 .mask = 0,
323 };
324
325 struct vt1724_pcm_reg {
326 unsigned int addr; /* ADDR register offset */
327 unsigned int size; /* SIZE register offset */
328 unsigned int count; /* COUNT register offset */
329 unsigned int start; /* start & pause bit */
330 };
331
332 static int snd_vt1724_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
333 {
334 ice1712_t *ice = snd_pcm_substream_chip(substream);
335 unsigned char what;
336 unsigned char old;
337 struct list_head *pos;
338 snd_pcm_substream_t *s;
339
340 what = 0;
341 snd_pcm_group_for_each(pos, substream) {
342 struct vt1724_pcm_reg *reg;
343 s = snd_pcm_group_substream_entry(pos);
344 reg = s->runtime->private_data;
345 what |= reg->start;
346 snd_pcm_trigger_done(s, substream);
347 }
348
349 switch (cmd) {
350 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
351 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
352 spin_lock(&ice->reg_lock);
353 old = inb(ICEMT1724(ice, DMA_PAUSE));
354 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
355 old |= what;
356 else
357 old &= ~what;
358 outb(old, ICEMT1724(ice, DMA_PAUSE));
359 spin_unlock(&ice->reg_lock);
360 break;
361
362 case SNDRV_PCM_TRIGGER_START:
363 case SNDRV_PCM_TRIGGER_STOP:
364 spin_lock(&ice->reg_lock);
365 old = inb(ICEMT1724(ice, DMA_CONTROL));
366 if (cmd == SNDRV_PCM_TRIGGER_START)
367 old |= what;
368 else
369 old &= ~what;
370 outb(old, ICEMT1724(ice, DMA_CONTROL));
371 spin_unlock(&ice->reg_lock);
372 break;
373
374 default:
375 return -EINVAL;
376 }
377 return 0;
378 }
379
380 /*
381 */
382
383 #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
384 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
385 #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
386 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
387
388 static int get_max_rate(ice1712_t *ice)
389 {
390 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
391 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
392 return 192000;
393 else
394 return 96000;
395 } else
396 return 48000;
397 }
398
399 static void snd_vt1724_set_pro_rate(ice1712_t *ice, unsigned int rate, int force)
400 {
401 unsigned long flags;
402 unsigned char val, old;
403 unsigned int i;
404
405 if (rate > get_max_rate(ice))
406 return;
407
408 spin_lock_irqsave(&ice->reg_lock, flags);
409 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
410 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
411 /* running? we cannot change the rate now... */
412 spin_unlock_irqrestore(&ice->reg_lock, flags);
413 return;
414 }
415 if (!force && is_pro_rate_locked(ice)) {
416 spin_unlock_irqrestore(&ice->reg_lock, flags);
417 return;
418 }
419
420 switch (rate) {
421 case 8000: val = 6; break;
422 case 9600: val = 3; break;
423 case 11025: val = 10; break;
424 case 12000: val = 2; break;
425 case 16000: val = 5; break;
426 case 22050: val = 9; break;
427 case 24000: val = 1; break;
428 case 32000: val = 4; break;
429 case 44100: val = 8; break;
430 case 48000: val = 0; break;
431 case 64000: val = 15; break;
432 case 88200: val = 11; break;
433 case 96000: val = 7; break;
434 case 176400: val = 12; break;
435 case 192000: val = 14; break;
436 default:
437 snd_BUG();
438 val = 0;
439 break;
440 }
441 old = inb(ICEMT1724(ice, RATE));
442 if (old != val)
443 outb(val, ICEMT1724(ice, RATE));
444 else if (rate == ice->cur_rate) {
445 spin_unlock_irqrestore(&ice->reg_lock, flags);
446 return;
447 }
448
449 ice->cur_rate = rate;
450
451 /* check MT02 */
452 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
453 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
454 if (rate > 96000)
455 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
456 else
457 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
458 if (val != old) {
459 outb(val, ICEMT1724(ice, I2S_FORMAT));
460 if (ice->eeprom.subvendor == VT1724_SUBDEVICE_REVOLUTION71) {
461 /* FIXME: is this revo only? */
462 /* assert PRST# to converters; MT05 bit 7 */
463 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
464 spin_unlock_irqrestore(&ice->reg_lock, flags);
465 mdelay(5);
466 spin_lock_irqsave(&ice->reg_lock, flags);
467 /* deassert PRST# */
468 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
469 }
470 }
471 }
472 spin_unlock_irqrestore(&ice->reg_lock, flags);
473
474 /* set up codecs */
475 for (i = 0; i < ice->akm_codecs; i++) {
476 if (ice->akm[i].ops.set_rate_val)
477 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
478 }
479 }
480
481 static int snd_vt1724_pcm_hw_params(snd_pcm_substream_t * substream,
482 snd_pcm_hw_params_t * hw_params)
483 {
484 ice1712_t *ice = snd_pcm_substream_chip(substream);
485 int i, chs;
486
487 chs = params_channels(hw_params);
488 down(&ice->open_mutex);
489 /* mark surround channels */
490 if (substream == ice->playback_pro_substream) {
491 /* PDMA0 can be multi-channel up to 8 */
492 chs = chs / 2 - 1;
493 for (i = 0; i < chs; i++) {
494 if (ice->pcm_reserved[i] && ice->pcm_reserved[i] != substream) {
495 up(&ice->open_mutex);
496 return -EBUSY;
497 }
498 ice->pcm_reserved[i] = substream;
499 }
500 for (; i < 3; i++) {
501 if (ice->pcm_reserved[i] == substream)
502 ice->pcm_reserved[i] = NULL;
503 }
504 } else {
505 for (i = 0; i < 3; i++) {
506 /* check individual playback stream */
507 if (ice->playback_con_substream_ds[i] == substream) {
508 if (ice->pcm_reserved[i] && ice->pcm_reserved[i] != substream) {
509 up(&ice->open_mutex);
510 return -EBUSY;
511 }
512 ice->pcm_reserved[i] = substream;
513 break;
514 }
515 }
516 }
517 up(&ice->open_mutex);
518 snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
519 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
520 }
521
522 static int snd_vt1724_pcm_hw_free(snd_pcm_substream_t * substream)
523 {
524 ice1712_t *ice = snd_pcm_substream_chip(substream);
525 int i;
526
527 down(&ice->open_mutex);
528 /* unmark surround channels */
529 for (i = 0; i < 3; i++)
530 if (ice->pcm_reserved[i] == substream)
531 ice->pcm_reserved[i] = NULL;
532 up(&ice->open_mutex);
533 return snd_pcm_lib_free_pages(substream);
534 }
535
536 static int snd_vt1724_playback_pro_prepare(snd_pcm_substream_t * substream)
537 {
538 ice1712_t *ice = snd_pcm_substream_chip(substream);
539 unsigned char val;
540 unsigned int size;
541
542 spin_lock_irq(&ice->reg_lock);
543 val = (8 - substream->runtime->channels) >> 1;
544 outb(val, ICEMT1724(ice, BURST));
545
546 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
547
548 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
549 // outl(size, ICEMT1724(ice, PLAYBACK_SIZE));
550 outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
551 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
552 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
553 // outl(size, ICEMT1724(ice, PLAYBACK_COUNT));
554 outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
555 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
556
557 spin_unlock_irq(&ice->reg_lock);
558
559 // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream));
560 return 0;
561 }
562
563 static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(snd_pcm_substream_t * substream)
564 {
565 ice1712_t *ice = snd_pcm_substream_chip(substream);
566 size_t ptr;
567
568 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
569 return 0;
570 #if 0 /* read PLAYBACK_ADDR */
571 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
572 if (ptr < substream->runtime->dma_addr) {
573 snd_printd("ice1724: invalid negative ptr\n");
574 return 0;
575 }
576 ptr -= substream->runtime->dma_addr;
577 ptr = bytes_to_frames(substream->runtime, ptr);
578 if (ptr >= substream->runtime->buffer_size) {
579 snd_printd("ice1724: invalid ptr %d (size=%d)\n", (int)ptr, (int)substream->runtime->period_size);
580 return 0;
581 }
582 #else /* read PLAYBACK_SIZE */
583 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
584 ptr = (ptr + 1) << 2;
585 ptr = bytes_to_frames(substream->runtime, ptr);
586 if (! ptr)
587 ;
588 else if (ptr <= substream->runtime->buffer_size)
589 ptr = substream->runtime->buffer_size - ptr;
590 else {
591 snd_printd("ice1724: invalid ptr %d (size=%d)\n", (int)ptr, (int)substream->runtime->buffer_size);
592 ptr = 0;
593 }
594 #endif
595 return ptr;
596 }
597
598 static int snd_vt1724_pcm_prepare(snd_pcm_substream_t *substream)
599 {
600 ice1712_t *ice = snd_pcm_substream_chip(substream);
601 struct vt1724_pcm_reg *reg = substream->runtime->private_data;
602
603 spin_lock_irq(&ice->reg_lock);
604 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
605 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1, ice->profi_port + reg->size);
606 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ice->profi_port + reg->count);
607 spin_unlock_irq(&ice->reg_lock);
608 return 0;
609 }
610
611 static snd_pcm_uframes_t snd_vt1724_pcm_pointer(snd_pcm_substream_t *substream)
612 {
613 ice1712_t *ice = snd_pcm_substream_chip(substream);
614 struct vt1724_pcm_reg *reg = substream->runtime->private_data;
615 size_t ptr;
616
617 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
618 return 0;
619 #if 0 /* use ADDR register */
620 ptr = inl(ice->profi_port + reg->addr);
621 ptr -= substream->runtime->dma_addr;
622 return bytes_to_frames(substream->runtime, ptr);
623 #else /* use SIZE register */
624 ptr = inw(ice->profi_port + reg->size);
625 ptr = (ptr + 1) << 2;
626 ptr = bytes_to_frames(substream->runtime, ptr);
627 if (! ptr)
628 ;
629 else if (ptr <= substream->runtime->buffer_size)
630 ptr = substream->runtime->buffer_size - ptr;
631 else {
632 snd_printd("ice1724: invalid ptr %d (size=%d)\n", (int)ptr, (int)substream->runtime->buffer_size);
633 ptr = 0;
634 }
635 return ptr;
636 #endif
637 }
638
639 static struct vt1724_pcm_reg vt1724_playback_pro_reg = {
640 .addr = VT1724_MT_PLAYBACK_ADDR,
641 .size = VT1724_MT_PLAYBACK_SIZE,
642 .count = VT1724_MT_PLAYBACK_COUNT,
643 .start = VT1724_PDMA0_START,
644 };
645
646 static struct vt1724_pcm_reg vt1724_capture_pro_reg = {
647 .addr = VT1724_MT_CAPTURE_ADDR,
648 .size = VT1724_MT_CAPTURE_SIZE,
649 .count = VT1724_MT_CAPTURE_COUNT,
650 .start = VT1724_RDMA0_START,
651 };
652
653 static snd_pcm_hardware_t snd_vt1724_playback_pro =
654 {
655 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
656 SNDRV_PCM_INFO_BLOCK_TRANSFER |
657 SNDRV_PCM_INFO_MMAP_VALID |
658 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
659 .formats = SNDRV_PCM_FMTBIT_S32_LE,
660 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
661 .rate_min = 8000,
662 .rate_max = 192000,
663 .channels_min = 2,
664 .channels_max = 8,
665 .buffer_bytes_max = (1UL << 21), /* 19bits dword */
666 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
667 .period_bytes_max = (1UL << 21),
668 .periods_min = 2,
669 .periods_max = 1024,
670 };
671
672 static snd_pcm_hardware_t snd_vt1724_spdif =
673 {
674 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
675 SNDRV_PCM_INFO_BLOCK_TRANSFER |
676 SNDRV_PCM_INFO_MMAP_VALID |
677 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
678 .formats = SNDRV_PCM_FMTBIT_S32_LE,
679 .rates = SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|SNDRV_PCM_RATE_48000,
680 .rate_min = 32000,
681 .rate_max = 48000,
682 .channels_min = 2,
683 .channels_max = 2,
684 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
685 .period_bytes_min = 2 * 4 * 2,
686 .period_bytes_max = (1UL << 18),
687 .periods_min = 2,
688 .periods_max = 1024,
689 };
690
691 static snd_pcm_hardware_t snd_vt1724_2ch_stereo =
692 {
693 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
694 SNDRV_PCM_INFO_BLOCK_TRANSFER |
695 SNDRV_PCM_INFO_MMAP_VALID |
696 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
697 .formats = SNDRV_PCM_FMTBIT_S32_LE,
698 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
699 .rate_min = 8000,
700 .rate_max = 192000,
701 .channels_min = 2,
702 .channels_max = 2,
703 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
704 .period_bytes_min = 2 * 4 * 2,
705 .period_bytes_max = (1UL << 18),
706 .periods_min = 2,
707 .periods_max = 1024,
708 };
709
710 /*
711 * set rate constraints
712 */
713 static int set_rate_constraints(ice1712_t *ice, snd_pcm_substream_t *substream)
714 {
715 snd_pcm_runtime_t *runtime = substream->runtime;
716 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
717 /* I2S */
718 /* VT1720 doesn't support more than 96kHz */
719 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
720 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_192);
721 else {
722 runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000;
723 runtime->hw.rate_max = 96000;
724 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_96);
725 }
726 } else if (ice->ac97) {
727 /* ACLINK */
728 runtime->hw.rate_max = 48000;
729 runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
730 return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_48);
731 }
732 return 0;
733 }
734
735 /* multi-channel playback needs alignment 8x32bit regardless of the channels
736 * actually used
737 */
738 #define VT1724_BUFFER_ALIGN 0x20
739
740 static int snd_vt1724_playback_pro_open(snd_pcm_substream_t * substream)
741 {
742 snd_pcm_runtime_t *runtime = substream->runtime;
743 ice1712_t *ice = snd_pcm_substream_chip(substream);
744 int chs;
745
746 runtime->private_data = &vt1724_playback_pro_reg;
747 ice->playback_pro_substream = substream;
748 runtime->hw = snd_vt1724_playback_pro;
749 snd_pcm_set_sync(substream);
750 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
751 set_rate_constraints(ice, substream);
752 down(&ice->open_mutex);
753 /* calculate the currently available channels */
754 for (chs = 0; chs < 3; chs++) {
755 if (ice->pcm_reserved[chs])
756 break;
757 }
758 chs = (chs + 1) * 2;
759 runtime->hw.channels_max = chs;
760 if (chs > 2) /* channels must be even */
761 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
762 up(&ice->open_mutex);
763 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
764 VT1724_BUFFER_ALIGN);
765 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
766 VT1724_BUFFER_ALIGN);
767 return 0;
768 }
769
770 static int snd_vt1724_capture_pro_open(snd_pcm_substream_t * substream)
771 {
772 ice1712_t *ice = snd_pcm_substream_chip(substream);
773 snd_pcm_runtime_t *runtime = substream->runtime;
774
775 runtime->private_data = &vt1724_capture_pro_reg;
776 ice->capture_pro_substream = substream;
777 runtime->hw = snd_vt1724_2ch_stereo;
778 snd_pcm_set_sync(substream);
779 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
780 set_rate_constraints(ice, substream);
781 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
782 VT1724_BUFFER_ALIGN);
783 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
784 VT1724_BUFFER_ALIGN);
785 return 0;
786 }
787
788 static int snd_vt1724_playback_pro_close(snd_pcm_substream_t * substream)
789 {
790 ice1712_t *ice = snd_pcm_substream_chip(substream);
791
792 if (PRO_RATE_RESET)
793 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
794 ice->playback_pro_substream = NULL;
795
796 return 0;
797 }
798
799 static int snd_vt1724_capture_pro_close(snd_pcm_substream_t * substream)
800 {
801 ice1712_t *ice = snd_pcm_substream_chip(substream);
802
803 if (PRO_RATE_RESET)
804 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
805 ice->capture_pro_substream = NULL;
806 return 0;
807 }
808
809 static snd_pcm_ops_t snd_vt1724_playback_pro_ops = {
810 .open = snd_vt1724_playback_pro_open,
811 .close = snd_vt1724_playback_pro_close,
812 .ioctl = snd_pcm_lib_ioctl,
813 .hw_params = snd_vt1724_pcm_hw_params,
814 .hw_free = snd_vt1724_pcm_hw_free,
815 .prepare = snd_vt1724_playback_pro_prepare,
816 .trigger = snd_vt1724_pcm_trigger,
817 .pointer = snd_vt1724_playback_pro_pointer,
818 };
819
820 static snd_pcm_ops_t snd_vt1724_capture_pro_ops = {
821 .open = snd_vt1724_capture_pro_open,
822 .close = snd_vt1724_capture_pro_close,
823 .ioctl = snd_pcm_lib_ioctl,
824 .hw_params = snd_vt1724_pcm_hw_params,
825 .hw_free = snd_vt1724_pcm_hw_free,
826 .prepare = snd_vt1724_pcm_prepare,
827 .trigger = snd_vt1724_pcm_trigger,
828 .pointer = snd_vt1724_pcm_pointer,
829 };
830
831 static int __devinit snd_vt1724_pcm_profi(ice1712_t * ice, int device)
832 {
833 snd_pcm_t *pcm;
834 int err;
835
836 err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
837 if (err < 0)
838 return err;
839
840 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
841 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
842
843 pcm->private_data = ice;
844 pcm->info_flags = 0;
845 strcpy(pcm->name, "ICE1724");
846
847 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
848 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
849
850 ice->pcm_pro = pcm;
851
852 return 0;
853 }
854
855
856 /*
857 * SPDIF PCM
858 */
859
860 static struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
861 .addr = VT1724_MT_PDMA4_ADDR,
862 .size = VT1724_MT_PDMA4_SIZE,
863 .count = VT1724_MT_PDMA4_COUNT,
864 .start = VT1724_PDMA4_START,
865 };
866
867 static struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
868 .addr = VT1724_MT_RDMA1_ADDR,
869 .size = VT1724_MT_RDMA1_SIZE,
870 .count = VT1724_MT_RDMA1_COUNT,
871 .start = VT1724_RDMA1_START,
872 };
873
874 /* update spdif control bits; call with reg_lock */
875 static void update_spdif_bits(ice1712_t *ice, unsigned int val)
876 {
877 unsigned char cbit, disabled;
878
879 cbit = inb(ICEREG1724(ice, SPDIF_CFG));
880 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
881 if (cbit != disabled)
882 outb(disabled, ICEREG1724(ice, SPDIF_CFG));
883 outw(val, ICEMT1724(ice, SPDIF_CTRL));
884 if (cbit != disabled)
885 outb(cbit, ICEREG1724(ice, SPDIF_CFG));
886 outw(val, ICEMT1724(ice, SPDIF_CTRL));
887 }
888
889 /* update SPDIF control bits according to the given rate */
890 static void update_spdif_rate(ice1712_t *ice, unsigned int rate)
891 {
892 unsigned int val, nval;
893 unsigned long flags;
894
895 spin_lock_irqsave(&ice->reg_lock, flags);
896 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
897 nval &= ~(7 << 12);
898 switch (rate) {
899 case 44100: break;
900 case 48000: nval |= 2 << 12; break;
901 case 32000: nval |= 3 << 12; break;
902 }
903 if (val != nval)
904 update_spdif_bits(ice, nval);
905 spin_unlock_irqrestore(&ice->reg_lock, flags);
906 }
907
908 static int snd_vt1724_playback_spdif_prepare(snd_pcm_substream_t * substream)
909 {
910 ice1712_t *ice = snd_pcm_substream_chip(substream);
911 if (! ice->force_pdma4)
912 update_spdif_rate(ice, substream->runtime->rate);
913 return snd_vt1724_pcm_prepare(substream);
914 }
915
916 static int snd_vt1724_playback_spdif_open(snd_pcm_substream_t *substream)
917 {
918 ice1712_t *ice = snd_pcm_substream_chip(substream);
919 snd_pcm_runtime_t *runtime = substream->runtime;
920
921 runtime->private_data = &vt1724_playback_spdif_reg;
922 ice->playback_con_substream = substream;
923 if (ice->force_pdma4) {
924 runtime->hw = snd_vt1724_2ch_stereo;
925 set_rate_constraints(ice, substream);
926 } else
927 runtime->hw = snd_vt1724_spdif;
928 snd_pcm_set_sync(substream);
929 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
930 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
931 VT1724_BUFFER_ALIGN);
932 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
933 VT1724_BUFFER_ALIGN);
934 return 0;
935 }
936
937 static int snd_vt1724_playback_spdif_close(snd_pcm_substream_t * substream)
938 {
939 ice1712_t *ice = snd_pcm_substream_chip(substream);
940
941 if (PRO_RATE_RESET)
942 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
943 ice->playback_con_substream = NULL;
944
945 return 0;
946 }
947
948 static int snd_vt1724_capture_spdif_open(snd_pcm_substream_t *substream)
949 {
950 ice1712_t *ice = snd_pcm_substream_chip(substream);
951 snd_pcm_runtime_t *runtime = substream->runtime;
952
953 runtime->private_data = &vt1724_capture_spdif_reg;
954 ice->capture_con_substream = substream;
955 if (ice->force_rdma1) {
956 runtime->hw = snd_vt1724_2ch_stereo;
957 set_rate_constraints(ice, substream);
958 } else
959 runtime->hw = snd_vt1724_spdif;
960 snd_pcm_set_sync(substream);
961 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
962 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
963 VT1724_BUFFER_ALIGN);
964 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
965 VT1724_BUFFER_ALIGN);
966 return 0;
967 }
968
969 static int snd_vt1724_capture_spdif_close(snd_pcm_substream_t * substream)
970 {
971 ice1712_t *ice = snd_pcm_substream_chip(substream);
972
973 if (PRO_RATE_RESET)
974 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
975 ice->capture_con_substream = NULL;
976
977 return 0;
978 }
979
980 static snd_pcm_ops_t snd_vt1724_playback_spdif_ops = {
981 .open = snd_vt1724_playback_spdif_open,
982 .close = snd_vt1724_playback_spdif_close,
983 .ioctl = snd_pcm_lib_ioctl,
984 .hw_params = snd_vt1724_pcm_hw_params,
985 .hw_free = snd_vt1724_pcm_hw_free,
986 .prepare = snd_vt1724_playback_spdif_prepare,
987 .trigger = snd_vt1724_pcm_trigger,
988 .pointer = snd_vt1724_pcm_pointer,
989 };
990
991 static snd_pcm_ops_t snd_vt1724_capture_spdif_ops = {
992 .open = snd_vt1724_capture_spdif_open,
993 .close = snd_vt1724_capture_spdif_close,
994 .ioctl = snd_pcm_lib_ioctl,
995 .hw_params = snd_vt1724_pcm_hw_params,
996 .hw_free = snd_vt1724_pcm_hw_free,
997 .prepare = snd_vt1724_pcm_prepare,
998 .trigger = snd_vt1724_pcm_trigger,
999 .pointer = snd_vt1724_pcm_pointer,
1000 };
1001
1002
1003 static int __devinit snd_vt1724_pcm_spdif(ice1712_t * ice, int device)
1004 {
1005 char *name;
1006 snd_pcm_t *pcm;
1007 int play, capt;
1008 int err;
1009
1010 if (ice->force_pdma4 ||
1011 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
1012 play = 1;
1013 ice->has_spdif = 1;
1014 } else
1015 play = 0;
1016 if (ice->force_rdma1 ||
1017 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
1018 capt = 1;
1019 ice->has_spdif = 1;
1020 } else
1021 capt = 0;
1022 if (! play && ! capt)
1023 return 0; /* no spdif device */
1024
1025 if (ice->force_pdma4 || ice->force_rdma1)
1026 name = "ICE1724 Secondary";
1027 else
1028 name = "IEC1724 IEC958";
1029 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
1030 if (err < 0)
1031 return err;
1032
1033 if (play)
1034 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1035 &snd_vt1724_playback_spdif_ops);
1036 if (capt)
1037 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1038 &snd_vt1724_capture_spdif_ops);
1039
1040 pcm->private_data = ice;
1041 pcm->info_flags = 0;
1042 strcpy(pcm->name, name);
1043
1044 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1045 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
1046
1047 ice->pcm = pcm;
1048
1049 return 0;
1050 }
1051
1052
1053 /*
1054 * independent surround PCMs
1055 */
1056
1057 static struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
1058 {
1059 .addr = VT1724_MT_PDMA1_ADDR,
1060 .size = VT1724_MT_PDMA1_SIZE,
1061 .count = VT1724_MT_PDMA1_COUNT,
1062 .start = VT1724_PDMA1_START,
1063 },
1064 {
1065 .addr = VT1724_MT_PDMA2_ADDR,
1066 .size = VT1724_MT_PDMA2_SIZE,
1067 .count = VT1724_MT_PDMA2_COUNT,
1068 .start = VT1724_PDMA2_START,
1069 },
1070 {
1071 .addr = VT1724_MT_PDMA3_ADDR,
1072 .size = VT1724_MT_PDMA3_SIZE,
1073 .count = VT1724_MT_PDMA3_COUNT,
1074 .start = VT1724_PDMA3_START,
1075 },
1076 };
1077
1078 static int snd_vt1724_playback_indep_prepare(snd_pcm_substream_t * substream)
1079 {
1080 ice1712_t *ice = snd_pcm_substream_chip(substream);
1081 unsigned char val;
1082
1083 spin_lock_irq(&ice->reg_lock);
1084 val = 3 - substream->number;
1085 if (inb(ICEMT1724(ice, BURST)) < val)
1086 outb(val, ICEMT1724(ice, BURST));
1087 spin_unlock_irq(&ice->reg_lock);
1088 return snd_vt1724_pcm_prepare(substream);
1089 }
1090
1091 static int snd_vt1724_playback_indep_open(snd_pcm_substream_t *substream)
1092 {
1093 ice1712_t *ice = snd_pcm_substream_chip(substream);
1094 snd_pcm_runtime_t *runtime = substream->runtime;
1095
1096 down(&ice->open_mutex);
1097 /* already used by PDMA0? */
1098 if (ice->pcm_reserved[substream->number]) {
1099 up(&ice->open_mutex);
1100 return -EBUSY; /* FIXME: should handle blocking mode properly */
1101 }
1102 up(&ice->open_mutex);
1103 runtime->private_data = &vt1724_playback_dma_regs[substream->number];
1104 ice->playback_con_substream_ds[substream->number] = substream;
1105 runtime->hw = snd_vt1724_2ch_stereo;
1106 snd_pcm_set_sync(substream);
1107 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1108 set_rate_constraints(ice, substream);
1109 return 0;
1110 }
1111
1112 static int snd_vt1724_playback_indep_close(snd_pcm_substream_t * substream)
1113 {
1114 ice1712_t *ice = snd_pcm_substream_chip(substream);
1115
1116 if (PRO_RATE_RESET)
1117 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1118 ice->playback_con_substream_ds[substream->number] = NULL;
1119 ice->pcm_reserved[substream->number] = NULL;
1120
1121 return 0;
1122 }
1123
1124 static snd_pcm_ops_t snd_vt1724_playback_indep_ops = {
1125 .open = snd_vt1724_playback_indep_open,
1126 .close = snd_vt1724_playback_indep_close,
1127 .ioctl = snd_pcm_lib_ioctl,
1128 .hw_params = snd_vt1724_pcm_hw_params,
1129 .hw_free = snd_vt1724_pcm_hw_free,
1130 .prepare = snd_vt1724_playback_indep_prepare,
1131 .trigger = snd_vt1724_pcm_trigger,
1132 .pointer = snd_vt1724_pcm_pointer,
1133 };
1134
1135
1136 static int __devinit snd_vt1724_pcm_indep(ice1712_t * ice, int device)
1137 {
1138 snd_pcm_t *pcm;
1139 int play;
1140 int err;
1141
1142 play = ice->num_total_dacs / 2 - 1;
1143 if (play <= 0)
1144 return 0;
1145
1146 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
1147 if (err < 0)
1148 return err;
1149
1150 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1151 &snd_vt1724_playback_indep_ops);
1152
1153 pcm->private_data = ice;
1154 pcm->info_flags = 0;
1155 strcpy(pcm->name, "ICE1724 Surround PCM");
1156
1157 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1158 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
1159
1160 ice->pcm_ds = pcm;
1161
1162 return 0;
1163 }
1164
1165
1166 /*
1167 * Mixer section
1168 */
1169
1170 static int __devinit snd_vt1724_ac97_mixer(ice1712_t * ice)
1171 {
1172 int err;
1173
1174 if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
1175 ac97_bus_t *pbus;
1176 ac97_template_t ac97;
1177 static ac97_bus_ops_t ops = {
1178 .write = snd_vt1724_ac97_write,
1179 .read = snd_vt1724_ac97_read,
1180 };
1181
1182 /* cold reset */
1183 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
1184 mdelay(5); /* FIXME */
1185 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
1186
1187 if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0)
1188 return err;
1189 memset(&ac97, 0, sizeof(ac97));
1190 ac97.private_data = ice;
1191 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1192 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1193 else
1194 return 0;
1195 }
1196 /* I2S mixer only */
1197 strcat(ice->card->mixername, "ICE1724 - multitrack");
1198 return 0;
1199 }
1200
1201 /*
1202 *
1203 */
1204
1205 static inline unsigned int eeprom_triple(ice1712_t *ice, int idx)
1206 {
1207 return (unsigned int)ice->eeprom.data[idx] | \
1208 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
1209 ((unsigned int)ice->eeprom.data[idx + 2] << 16);
1210 }
1211
1212 static void snd_vt1724_proc_read(snd_info_entry_t *entry,
1213 snd_info_buffer_t * buffer)
1214 {
1215 ice1712_t *ice = entry->private_data;
1216 unsigned int idx;
1217
1218 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1219 snd_iprintf(buffer, "EEPROM:\n");
1220
1221 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1222 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1223 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1224 snd_iprintf(buffer, " System Config : 0x%x\n", ice->eeprom.data[ICE_EEP2_SYSCONF]);
1225 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP2_ACLINK]);
1226 snd_iprintf(buffer, " I2S : 0x%x\n", ice->eeprom.data[ICE_EEP2_I2S]);
1227 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP2_SPDIF]);
1228 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1229 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1230 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1231 for (idx = 0x12; idx < ice->eeprom.size; idx++)
1232 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1233
1234 snd_iprintf(buffer, "\nRegisters:\n");
1235
1236 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n", (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
1237 for (idx = 0x0; idx < 0x20 ; idx++)
1238 snd_iprintf(buffer, " CCS%02x : 0x%02x\n", idx, inb(ice->port+idx));
1239 for (idx = 0x0; idx < 0x30 ; idx++)
1240 snd_iprintf(buffer, " MT%02x : 0x%02x\n", idx, inb(ice->profi_port+idx));
1241 }
1242
1243 static void __devinit snd_vt1724_proc_init(ice1712_t * ice)
1244 {
1245 snd_info_entry_t *entry;
1246
1247 if (! snd_card_proc_new(ice->card, "ice1724", &entry))
1248 snd_info_set_text_ops(entry, ice, 1024, snd_vt1724_proc_read);
1249 }
1250
1251 /*
1252 *
1253 */
1254
1255 static int snd_vt1724_eeprom_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1256 {
1257 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1258 uinfo->count = sizeof(ice1712_eeprom_t);
1259 return 0;
1260 }
1261
1262 static int snd_vt1724_eeprom_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1263 {
1264 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1265
1266 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1267 return 0;
1268 }
1269
1270 static snd_kcontrol_new_t snd_vt1724_eeprom __devinitdata = {
1271 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1272 .name = "ICE1724 EEPROM",
1273 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1274 .info = snd_vt1724_eeprom_info,
1275 .get = snd_vt1724_eeprom_get
1276 };
1277
1278 /*
1279 */
1280 static int snd_vt1724_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1281 {
1282 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1283 uinfo->count = 1;
1284 return 0;
1285 }
1286
1287 static unsigned int encode_spdif_bits(snd_aes_iec958_t *diga)
1288 {
1289 unsigned int val;
1290
1291 val = diga->status[0] & 0x03; /* professional, non-audio */
1292 if (val & 0x01) {
1293 /* professional */
1294 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) == IEC958_AES0_PRO_EMPHASIS_5015)
1295 val |= 1U << 3;
1296 switch (diga->status[0] & IEC958_AES0_PRO_FS) {
1297 case IEC958_AES0_PRO_FS_44100:
1298 break;
1299 case IEC958_AES0_PRO_FS_32000:
1300 val |= 3U << 12;
1301 break;
1302 default:
1303 val |= 2U << 12;
1304 break;
1305 }
1306 } else {
1307 /* consumer */
1308 val |= diga->status[1] & 0x04; /* copyright */
1309 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS)== IEC958_AES0_CON_EMPHASIS_5015)
1310 val |= 1U << 3;
1311 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
1312 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
1313 }
1314 return val;
1315 }
1316
1317 static void decode_spdif_bits(snd_aes_iec958_t *diga, unsigned int val)
1318 {
1319 memset(diga->status, 0, sizeof(diga->status));
1320 diga->status[0] = val & 0x03; /* professional, non-audio */
1321 if (val & 0x01) {
1322 /* professional */
1323 if (val & (1U << 3))
1324 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
1325 switch ((val >> 12) & 0x7) {
1326 case 0:
1327 break;
1328 case 2:
1329 diga->status[0] |= IEC958_AES0_PRO_FS_32000;
1330 break;
1331 default:
1332 diga->status[0] |= IEC958_AES0_PRO_FS_48000;
1333 break;
1334 }
1335 } else {
1336 /* consumer */
1337 diga->status[0] |= val & (1U << 2); /* copyright */
1338 if (val & (1U << 3))
1339 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
1340 diga->status[1] |= (val >> 4) & 0x3f; /* category */
1341 diga->status[3] |= (val >> 12) & 0x07; /* fs */
1342 }
1343 }
1344
1345 static int snd_vt1724_spdif_default_get(snd_kcontrol_t * kcontrol,
1346 snd_ctl_elem_value_t * ucontrol)
1347 {
1348 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1349 unsigned int val;
1350 val = inw(ICEMT1724(ice, SPDIF_CTRL));
1351 decode_spdif_bits(&ucontrol->value.iec958, val);
1352 return 0;
1353 }
1354
1355 static int snd_vt1724_spdif_default_put(snd_kcontrol_t * kcontrol,
1356 snd_ctl_elem_value_t * ucontrol)
1357 {
1358 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1359 unsigned int val, old;
1360
1361 val = encode_spdif_bits(&ucontrol->value.iec958);
1362 spin_lock_irq(&ice->reg_lock);
1363 old = inw(ICEMT1724(ice, SPDIF_CTRL));
1364 if (val != old)
1365 update_spdif_bits(ice, val);
1366 spin_unlock_irq(&ice->reg_lock);
1367 return (val != old);
1368 }
1369
1370 static snd_kcontrol_new_t snd_vt1724_spdif_default __devinitdata =
1371 {
1372 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1373 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1374 .info = snd_vt1724_spdif_info,
1375 .get = snd_vt1724_spdif_default_get,
1376 .put = snd_vt1724_spdif_default_put
1377 };
1378
1379 static int snd_vt1724_spdif_maskc_get(snd_kcontrol_t * kcontrol,
1380 snd_ctl_elem_value_t * ucontrol)
1381 {
1382 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1383 IEC958_AES0_PROFESSIONAL |
1384 IEC958_AES0_CON_NOT_COPYRIGHT |
1385 IEC958_AES0_CON_EMPHASIS;
1386 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1387 IEC958_AES1_CON_CATEGORY;
1388 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1389 return 0;
1390 }
1391
1392 static int snd_vt1724_spdif_maskp_get(snd_kcontrol_t * kcontrol,
1393 snd_ctl_elem_value_t * ucontrol)
1394 {
1395 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1396 IEC958_AES0_PROFESSIONAL |
1397 IEC958_AES0_PRO_FS |
1398 IEC958_AES0_PRO_EMPHASIS;
1399 return 0;
1400 }
1401
1402 static snd_kcontrol_new_t snd_vt1724_spdif_maskc __devinitdata =
1403 {
1404 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1405 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1406 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1407 .info = snd_vt1724_spdif_info,
1408 .get = snd_vt1724_spdif_maskc_get,
1409 };
1410
1411 static snd_kcontrol_new_t snd_vt1724_spdif_maskp __devinitdata =
1412 {
1413 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1414 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1415 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1416 .info = snd_vt1724_spdif_info,
1417 .get = snd_vt1724_spdif_maskp_get,
1418 };
1419
1420 static int snd_vt1724_spdif_sw_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1421 {
1422 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1423 uinfo->count = 1;
1424 uinfo->value.integer.min = 0;
1425 uinfo->value.integer.max = 1;
1426 return 0;
1427 }
1428
1429 static int snd_vt1724_spdif_sw_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1430 {
1431 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1432 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) & VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
1433 return 0;
1434 }
1435
1436 static int snd_vt1724_spdif_sw_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1437 {
1438 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1439 unsigned char old, val;
1440
1441 spin_lock_irq(&ice->reg_lock);
1442 old = val = inb(ICEREG1724(ice, SPDIF_CFG));
1443 val &= ~VT1724_CFG_SPDIF_OUT_EN;
1444 if (ucontrol->value.integer.value[0])
1445 val |= VT1724_CFG_SPDIF_OUT_EN;
1446 if (old != val)
1447 outb(val, ICEREG1724(ice, SPDIF_CFG));
1448 spin_unlock_irq(&ice->reg_lock);
1449 return old != val;
1450 }
1451
1452 static snd_kcontrol_new_t snd_vt1724_spdif_switch __devinitdata =
1453 {
1454 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1455 /* FIXME: the following conflict with IEC958 Playback Route */
1456 // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),
1457 .name = "IEC958 Output Switch",
1458 .info = snd_vt1724_spdif_sw_info,
1459 .get = snd_vt1724_spdif_sw_get,
1460 .put = snd_vt1724_spdif_sw_put
1461 };
1462
1463
1464 #if 0 /* NOT USED YET */
1465 /*
1466 * GPIO access from extern
1467 */
1468
1469 int snd_vt1724_gpio_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1470 {
1471 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1472 uinfo->count = 1;
1473 uinfo->value.integer.min = 0;
1474 uinfo->value.integer.max = 1;
1475 return 0;
1476 }
1477
1478 int snd_vt1724_gpio_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1479 {
1480 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1481 int shift = kcontrol->private_value & 0xff;
1482 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1483
1484 snd_ice1712_save_gpio_status(ice);
1485 ucontrol->value.integer.value[0] = (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
1486 snd_ice1712_restore_gpio_status(ice);
1487 return 0;
1488 }
1489
1490 int snd_ice1712_gpio_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1491 {
1492 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1493 int shift = kcontrol->private_value & 0xff;
1494 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1495 unsigned int val, nval;
1496
1497 if (kcontrol->private_value & (1 << 31))
1498 return -EPERM;
1499 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
1500 snd_ice1712_save_gpio_status(ice);
1501 val = snd_ice1712_gpio_read(ice);
1502 nval |= val & ~(1 << shift);
1503 if (val != nval)
1504 snd_ice1712_gpio_write(ice, nval);
1505 snd_ice1712_restore_gpio_status(ice);
1506 return val != nval;
1507 }
1508 #endif /* NOT USED YET */
1509
1510 /*
1511 * rate
1512 */
1513 static int snd_vt1724_pro_internal_clock_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1514 {
1515 static char *texts_1724[] = {
1516 "8000", /* 0: 6 */
1517 "9600", /* 1: 3 */
1518 "11025", /* 2: 10 */
1519 "12000", /* 3: 2 */
1520 "16000", /* 4: 5 */
1521 "22050", /* 5: 9 */
1522 "24000", /* 6: 1 */
1523 "32000", /* 7: 4 */
1524 "44100", /* 8: 8 */
1525 "48000", /* 9: 0 */
1526 "64000", /* 10: 15 */
1527 "88200", /* 11: 11 */
1528 "96000", /* 12: 7 */
1529 "176400", /* 13: 12 */
1530 "192000", /* 14: 14 */
1531 "IEC958 Input", /* 15: -- */
1532 };
1533 static char *texts_1720[] = {
1534 "8000", /* 0: 6 */
1535 "9600", /* 1: 3 */
1536 "11025", /* 2: 10 */
1537 "12000", /* 3: 2 */
1538 "16000", /* 4: 5 */
1539 "22050", /* 5: 9 */
1540 "24000", /* 6: 1 */
1541 "32000", /* 7: 4 */
1542 "44100", /* 8: 8 */
1543 "48000", /* 9: 0 */
1544 "64000", /* 10: 15 */
1545 "88200", /* 11: 11 */
1546 "96000", /* 12: 7 */
1547 "IEC958 Input", /* 13: -- */
1548 };
1549 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1550
1551 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1552 uinfo->count = 1;
1553 uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16;
1554 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1555 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1556 strcpy(uinfo->value.enumerated.name,
1557 ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] :
1558 texts_1724[uinfo->value.enumerated.item]);
1559 return 0;
1560 }
1561
1562 static int snd_vt1724_pro_internal_clock_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1563 {
1564 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1565 static unsigned char xlate[16] = {
1566 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10
1567 };
1568 unsigned char val;
1569
1570 spin_lock_irq(&ice->reg_lock);
1571 if (is_spdif_master(ice)) {
1572 ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15;
1573 } else {
1574 val = xlate[inb(ICEMT1724(ice, RATE)) & 15];
1575 if (val == 255) {
1576 snd_BUG();
1577 val = 0;
1578 }
1579 ucontrol->value.enumerated.item[0] = val;
1580 }
1581 spin_unlock_irq(&ice->reg_lock);
1582 return 0;
1583 }
1584
1585 static int snd_vt1724_pro_internal_clock_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1586 {
1587 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1588 unsigned char oval;
1589 int rate;
1590 int change = 0;
1591 int spdif = ice->vt1720 ? 13 : 15;
1592
1593 spin_lock_irq(&ice->reg_lock);
1594 oval = inb(ICEMT1724(ice, RATE));
1595 if (ucontrol->value.enumerated.item[0] == spdif) {
1596 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1597 } else {
1598 rate = rates[ucontrol->value.integer.value[0] % 15];
1599 if (rate <= get_max_rate(ice)) {
1600 PRO_RATE_DEFAULT = rate;
1601 spin_unlock_irq(&ice->reg_lock);
1602 snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1603 spin_lock_irq(&ice->reg_lock);
1604 }
1605 }
1606 change = inb(ICEMT1724(ice, RATE)) != oval;
1607 spin_unlock_irq(&ice->reg_lock);
1608
1609 if ((oval & VT1724_SPDIF_MASTER) != (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) {
1610 /* notify akm chips as well */
1611 if (is_spdif_master(ice)) {
1612 unsigned int i;
1613 for (i = 0; i < ice->akm_codecs; i++) {
1614 if (ice->akm[i].ops.set_rate_val)
1615 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1616 }
1617 }
1618 }
1619 return change;
1620 }
1621
1622 static snd_kcontrol_new_t snd_vt1724_pro_internal_clock __devinitdata = {
1623 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1624 .name = "Multi Track Internal Clock",
1625 .info = snd_vt1724_pro_internal_clock_info,
1626 .get = snd_vt1724_pro_internal_clock_get,
1627 .put = snd_vt1724_pro_internal_clock_put
1628 };
1629
1630 static int snd_vt1724_pro_rate_locking_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1631 {
1632 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1633 uinfo->count = 1;
1634 uinfo->value.integer.min = 0;
1635 uinfo->value.integer.max = 1;
1636 return 0;
1637 }
1638
1639 static int snd_vt1724_pro_rate_locking_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1640 {
1641 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1642 return 0;
1643 }
1644
1645 static int snd_vt1724_pro_rate_locking_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1646 {
1647 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1648 int change = 0, nval;
1649
1650 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1651 spin_lock_irq(&ice->reg_lock);
1652 change = PRO_RATE_LOCKED != nval;
1653 PRO_RATE_LOCKED = nval;
1654 spin_unlock_irq(&ice->reg_lock);
1655 return change;
1656 }
1657
1658 static snd_kcontrol_new_t snd_vt1724_pro_rate_locking __devinitdata = {
1659 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1660 .name = "Multi Track Rate Locking",
1661 .info = snd_vt1724_pro_rate_locking_info,
1662 .get = snd_vt1724_pro_rate_locking_get,
1663 .put = snd_vt1724_pro_rate_locking_put
1664 };
1665
1666 static int snd_vt1724_pro_rate_reset_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1667 {
1668 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1669 uinfo->count = 1;
1670 uinfo->value.integer.min = 0;
1671 uinfo->value.integer.max = 1;
1672 return 0;
1673 }
1674
1675 static int snd_vt1724_pro_rate_reset_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1676 {
1677 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
1678 return 0;
1679 }
1680
1681 static int snd_vt1724_pro_rate_reset_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1682 {
1683 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1684 int change = 0, nval;
1685
1686 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1687 spin_lock_irq(&ice->reg_lock);
1688 change = PRO_RATE_RESET != nval;
1689 PRO_RATE_RESET = nval;
1690 spin_unlock_irq(&ice->reg_lock);
1691 return change;
1692 }
1693
1694 static snd_kcontrol_new_t snd_vt1724_pro_rate_reset __devinitdata = {
1695 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1696 .name = "Multi Track Rate Reset",
1697 .info = snd_vt1724_pro_rate_reset_info,
1698 .get = snd_vt1724_pro_rate_reset_get,
1699 .put = snd_vt1724_pro_rate_reset_put
1700 };
1701
1702
1703 /*
1704 * routing
1705 */
1706 static int snd_vt1724_pro_route_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1707 {
1708 static char *texts[] = {
1709 "PCM Out", /* 0 */
1710 "H/W In 0", "H/W In 1", /* 1-2 */
1711 "IEC958 In L", "IEC958 In R", /* 3-4 */
1712 };
1713
1714 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1715 uinfo->count = 1;
1716 uinfo->value.enumerated.items = 5;
1717 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1718 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1719 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1720 return 0;
1721 }
1722
1723 static inline int analog_route_shift(int idx)
1724 {
1725 return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
1726 }
1727
1728 static inline int digital_route_shift(int idx)
1729 {
1730 return idx * 3;
1731 }
1732
1733 static int get_route_val(ice1712_t *ice, int shift)
1734 {
1735 unsigned long val;
1736 unsigned char eitem;
1737 static unsigned char xlate[8] = {
1738 0, 255, 1, 2, 255, 255, 3, 4,
1739 };
1740
1741 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1742 val >>= shift;
1743 val &= 7; //we now have 3 bits per output
1744 eitem = xlate[val];
1745 if (eitem == 255) {
1746 snd_BUG();
1747 return 0;
1748 }
1749 return eitem;
1750 }
1751
1752 static int put_route_val(ice1712_t *ice, unsigned int val, int shift)
1753 {
1754 unsigned int old_val, nval;
1755 int change;
1756 static unsigned char xroute[8] = {
1757 0, /* PCM */
1758 2, /* PSDIN0 Left */
1759 3, /* PSDIN0 Right */
1760 6, /* SPDIN Left */
1761 7, /* SPDIN Right */
1762 };
1763
1764 nval = xroute[val % 5];
1765 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1766 val &= ~(0x07 << shift);
1767 val |= nval << shift;
1768 change = val != old_val;
1769 if (change)
1770 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
1771 return change;
1772 }
1773
1774 static int snd_vt1724_pro_route_analog_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
1775 {
1776 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1777 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1778 ucontrol->value.enumerated.item[0] = get_route_val(ice, analog_route_shift(idx));
1779 return 0;
1780 }
1781
1782 static int snd_vt1724_pro_route_analog_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
1783 {
1784 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1785 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1786 return put_route_val(ice, ucontrol->value.enumerated.item[0],
1787 analog_route_shift(idx));
1788 }
1789
1790 static int snd_vt1724_pro_route_spdif_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
1791 {
1792 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1793 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1794 ucontrol->value.enumerated.item[0] = get_route_val(ice, digital_route_shift(idx));
1795 return 0;
1796 }
1797
1798 static int snd_vt1724_pro_route_spdif_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
1799 {
1800 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1801 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1802 return put_route_val(ice, ucontrol->value.enumerated.item[0],
1803 digital_route_shift(idx));
1804 }
1805
1806 static snd_kcontrol_new_t snd_vt1724_mixer_pro_analog_route __devinitdata = {
1807 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1808 .name = "H/W Playback Route",
1809 .info = snd_vt1724_pro_route_info,
1810 .get = snd_vt1724_pro_route_analog_get,
1811 .put = snd_vt1724_pro_route_analog_put,
1812 };
1813
1814 static snd_kcontrol_new_t snd_vt1724_mixer_pro_spdif_route __devinitdata = {
1815 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1816 .name = "IEC958 Playback Route",
1817 .info = snd_vt1724_pro_route_info,
1818 .get = snd_vt1724_pro_route_spdif_get,
1819 .put = snd_vt1724_pro_route_spdif_put,
1820 .count = 2,
1821 };
1822
1823
1824 static int snd_vt1724_pro_peak_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1825 {
1826 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1827 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
1828 uinfo->value.integer.min = 0;
1829 uinfo->value.integer.max = 255;
1830 return 0;
1831 }
1832
1833 static int snd_vt1724_pro_peak_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1834 {
1835 ice1712_t *ice = snd_kcontrol_chip(kcontrol);
1836 int idx;
1837
1838 spin_lock_irq(&ice->reg_lock);
1839 for (idx = 0; idx < 22; idx++) {
1840 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
1841 ucontrol->value.integer.value[idx] = inb(ICEMT1724(ice, MONITOR_PEAKDATA));
1842 }
1843 spin_unlock_irq(&ice->reg_lock);
1844 return 0;
1845 }
1846
1847 static snd_kcontrol_new_t snd_vt1724_mixer_pro_peak __devinitdata = {
1848 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1849 .name = "Multi Track Peak",
1850 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
1851 .info = snd_vt1724_pro_peak_info,
1852 .get = snd_vt1724_pro_peak_get
1853 };
1854
1855 /*
1856 *
1857 */
1858
1859 static struct snd_ice1712_card_info no_matched __devinitdata;
1860
1861 static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
1862 snd_vt1724_revo_cards,
1863 snd_vt1724_amp_cards,
1864 snd_vt1724_aureon_cards,
1865 snd_vt1720_mobo_cards,
1866 snd_vt1720_pontis_cards,
1867 NULL,
1868 };
1869
1870
1871 /*
1872 */
1873
1874 static void wait_i2c_busy(ice1712_t *ice)
1875 {
1876 int t = 0x10000;
1877 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
1878 ;
1879 }
1880
1881 unsigned char snd_vt1724_read_i2c(ice1712_t *ice, unsigned char dev, unsigned char addr)
1882 {
1883 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
1884 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
1885 wait_i2c_busy(ice);
1886 return inb(ICEREG1724(ice, I2C_DATA));
1887 }
1888
1889 void snd_vt1724_write_i2c(ice1712_t *ice, unsigned char dev, unsigned char addr, unsigned char data)
1890 {
1891 wait_i2c_busy(ice);
1892 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
1893 outb(data, ICEREG1724(ice, I2C_DATA));
1894 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
1895 wait_i2c_busy(ice);
1896 }
1897
1898 static int __devinit snd_vt1724_read_eeprom(ice1712_t *ice, const char *modelname)
1899 {
1900 const int dev = 0xa0; /* EEPROM device address */
1901 unsigned int i, size;
1902 struct snd_ice1712_card_info **tbl, *c;
1903
1904 if (! modelname || ! *modelname) {
1905 ice->eeprom.subvendor = 0;
1906 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
1907 ice->eeprom.subvendor = (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
1908 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
1909 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
1910 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
1911 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
1912 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
1913 u16 vendor, device;
1914 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
1915 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
1916 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
1917 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
1918 printk(KERN_ERR "ice1724: No valid ID is found\n");
1919 return -ENXIO;
1920 }
1921 }
1922 }
1923 for (tbl = card_tables; *tbl; tbl++) {
1924 for (c = *tbl; c->subvendor; c++) {
1925 if (modelname && c->model && ! strcmp(modelname, c->model)) {
1926 printk(KERN_INFO "ice1724: Using board model %s\n", c->name);
1927 ice->eeprom.subvendor = c->subvendor;
1928 } else if (c->subvendor != ice->eeprom.subvendor)
1929 continue;
1930 if (! c->eeprom_size || ! c->eeprom_data)
1931 goto found;
1932 /* if the EEPROM is given by the driver, use it */
1933 snd_printdd("using the defined eeprom..\n");
1934 ice->eeprom.version = 2;
1935 ice->eeprom.size = c->eeprom_size + 6;
1936 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
1937 goto read_skipped;
1938 }
1939 }
1940 printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n", ice->eeprom.subvendor);
1941
1942 found:
1943 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
1944 if (ice->eeprom.size < 6)
1945 ice->eeprom.size = 32;
1946 else if (ice->eeprom.size > 32) {
1947 printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n", ice->eeprom.size);
1948 return -EIO;
1949 }
1950 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
1951 if (ice->eeprom.version != 2)
1952 printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n", ice->eeprom.version);
1953 size = ice->eeprom.size - 6;
1954 for (i = 0; i < size; i++)
1955 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
1956
1957 read_skipped:
1958 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
1959 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
1960 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
1961
1962 return 0;
1963 }
1964
1965
1966
1967 static int __devinit snd_vt1724_chip_init(ice1712_t *ice)
1968 {
1969 outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
1970 udelay(200);
1971 outb(0, ICEREG1724(ice, CONTROL));
1972 udelay(200);
1973 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
1974 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
1975 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
1976 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
1977
1978 ice->gpio.write_mask = ice->eeprom.gpiomask;
1979 ice->gpio.direction = ice->eeprom.gpiodir;
1980 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
1981 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
1982 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
1983
1984 outb(0, ICEREG1724(ice, POWERDOWN));
1985
1986 return 0;
1987 }
1988
1989 static int __devinit snd_vt1724_spdif_build_controls(ice1712_t *ice)
1990 {
1991 int err;
1992 snd_kcontrol_t *kctl;
1993
1994 snd_assert(ice->pcm != NULL, return -EIO);
1995
1996 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
1997 if (err < 0)
1998 return err;
1999
2000 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
2001 if (err < 0)
2002 return err;
2003
2004 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
2005 if (err < 0)
2006 return err;
2007 kctl->id.device = ice->pcm->device;
2008 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
2009 if (err < 0)
2010 return err;
2011 kctl->id.device = ice->pcm->device;
2012 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
2013 if (err < 0)
2014 return err;
2015 kctl->id.device = ice->pcm->device;
2016 #if 0 /* use default only */
2017 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
2018 if (err < 0)
2019 return err;
2020 kctl->id.device = ice->pcm->device;
2021 ice->spdif.stream_ctl = kctl;
2022 #endif
2023 return 0;
2024 }
2025
2026
2027 static int __devinit snd_vt1724_build_controls(ice1712_t *ice)
2028 {
2029 int err;
2030
2031 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
2032 if (err < 0)
2033 return err;
2034 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
2035 if (err < 0)
2036 return err;
2037
2038 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
2039 if (err < 0)
2040 return err;
2041 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
2042 if (err < 0)
2043 return err;
2044
2045 if (ice->num_total_dacs > 0) {
2046 snd_kcontrol_new_t tmp = snd_vt1724_mixer_pro_analog_route;
2047 tmp.count = ice->num_total_dacs;
2048 if (ice->vt1720 && tmp.count > 2)
2049 tmp.count = 2;
2050 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2051 if (err < 0)
2052 return err;
2053 }
2054
2055 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
2056 if (err < 0)
2057 return err;
2058
2059 return 0;
2060 }
2061
2062 static int snd_vt1724_free(ice1712_t *ice)
2063 {
2064 if (! ice->port)
2065 goto __hw_end;
2066 /* mask all interrupts */
2067 outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
2068 outb(0xff, ICEREG1724(ice, IRQMASK));
2069 /* --- */
2070 __hw_end:
2071 if (ice->irq >= 0) {
2072 synchronize_irq(ice->irq);
2073 free_irq(ice->irq, (void *) ice);
2074 }
2075 pci_release_regions(ice->pci);
2076 snd_ice1712_akm4xxx_free(ice);
2077 kfree(ice);
2078 return 0;
2079 }
2080
2081 static int snd_vt1724_dev_free(snd_device_t *device)
2082 {
2083 ice1712_t *ice = device->device_data;
2084 return snd_vt1724_free(ice);
2085 }
2086
2087 static int __devinit snd_vt1724_create(snd_card_t * card,
2088 struct pci_dev *pci,
2089 const char *modelname,
2090 ice1712_t ** r_ice1712)
2091 {
2092 ice1712_t *ice;
2093 int err;
2094 unsigned char mask;
2095 static snd_device_ops_t ops = {
2096 .dev_free = snd_vt1724_dev_free,
2097 };
2098
2099 *r_ice1712 = NULL;
2100
2101 /* enable PCI device */
2102 if ((err = pci_enable_device(pci)) < 0)
2103 return err;
2104
2105 ice = kcalloc(1, sizeof(*ice), GFP_KERNEL);
2106 if (ice == NULL)
2107 return -ENOMEM;
2108 ice->vt1724 = 1;
2109 spin_lock_init(&ice->reg_lock);
2110 init_MUTEX(&ice->gpio_mutex);
2111 init_MUTEX(&ice->open_mutex);
2112 ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
2113 ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
2114 ice->gpio.set_data = snd_vt1724_set_gpio_data;
2115 ice->gpio.get_data = snd_vt1724_get_gpio_data;
2116 ice->card = card;
2117 ice->pci = pci;
2118 ice->irq = -1;
2119 pci_set_master(pci);
2120 snd_vt1724_proc_init(ice);
2121 synchronize_irq(pci->irq);
2122
2123 if ((err = pci_request_regions(pci, "ICE1724")) < 0) {
2124 kfree(ice);
2125 return err;
2126 }
2127 ice->port = pci_resource_start(pci, 0);
2128 ice->profi_port = pci_resource_start(pci, 1);
2129
2130 if (request_irq(pci->irq, snd_vt1724_interrupt, SA_INTERRUPT|SA_SHIRQ, "ICE1724", (void *) ice)) {
2131 snd_printk("unable to grab IRQ %d\n", pci->irq);
2132 snd_vt1724_free(ice);
2133 return -EIO;
2134 }
2135
2136 ice->irq = pci->irq;
2137
2138 if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
2139 snd_vt1724_free(ice);
2140 return -EIO;
2141 }
2142 if (snd_vt1724_chip_init(ice) < 0) {
2143 snd_vt1724_free(ice);
2144 return -EIO;
2145 }
2146
2147 /* unmask used interrupts */
2148 if (! (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401))
2149 mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
2150 else
2151 mask = 0;
2152 outb(mask, ICEREG1724(ice, IRQMASK));
2153 /* don't handle FIFO overrun/underruns (just yet), since they cause machine lockups */
2154 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
2155
2156 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
2157 snd_vt1724_free(ice);
2158 return err;
2159 }
2160
2161 snd_card_set_dev(card, &pci->dev);
2162
2163 *r_ice1712 = ice;
2164 return 0;
2165 }
2166
2167
2168 /*
2169 *
2170 * Registration
2171 *
2172 */
2173
2174 static int __devinit snd_vt1724_probe(struct pci_dev *pci,
2175 const struct pci_device_id *pci_id)
2176 {
2177 static int dev;
2178 snd_card_t *card;
2179 ice1712_t *ice;
2180 int pcm_dev = 0, err;
2181 struct snd_ice1712_card_info **tbl, *c;
2182
2183 if (dev >= SNDRV_CARDS)
2184 return -ENODEV;
2185 if (!enable[dev]) {
2186 dev++;
2187 return -ENOENT;
2188 }
2189
2190 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
2191 if (card == NULL)
2192 return -ENOMEM;
2193
2194 strcpy(card->driver, "ICE1724");
2195 strcpy(card->shortname, "ICEnsemble ICE1724");
2196
2197 if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) {
2198 snd_card_free(card);
2199 return err;
2200 }
2201
2202 for (tbl = card_tables; *tbl; tbl++) {
2203 for (c = *tbl; c->subvendor; c++) {
2204 if (c->subvendor == ice->eeprom.subvendor) {
2205 strcpy(card->shortname, c->name);
2206 if (c->driver) /* specific driver? */
2207 strcpy(card->driver, c->driver);
2208 if (c->chip_init) {
2209 if ((err = c->chip_init(ice)) < 0) {
2210 snd_card_free(card);
2211 return err;
2212 }
2213 }
2214 goto __found;
2215 }
2216 }
2217 }
2218 c = &no_matched;
2219 __found:
2220
2221 if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
2222 snd_card_free(card);
2223 return err;
2224 }
2225
2226 if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) {
2227 snd_card_free(card);
2228 return err;
2229 }
2230
2231 if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) {
2232 snd_card_free(card);
2233 return err;
2234 }
2235
2236 if ((err = snd_vt1724_ac97_mixer(ice)) < 0) {
2237 snd_card_free(card);
2238 return err;
2239 }
2240
2241 if ((err = snd_vt1724_build_controls(ice)) < 0) {
2242 snd_card_free(card);
2243 return err;
2244 }
2245
2246 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
2247 if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) {
2248 snd_card_free(card);
2249 return err;
2250 }
2251 }
2252
2253 if (c->build_controls) {
2254 if ((err = c->build_controls(ice)) < 0) {
2255 snd_card_free(card);
2256 return err;
2257 }
2258 }
2259
2260 if (! c->no_mpu401) {
2261 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
2262 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2263 ICEREG1724(ice, MPU_CTRL), 1,
2264 ice->irq, 0,
2265 &ice->rmidi[0])) < 0) {
2266 snd_card_free(card);
2267 return err;
2268 }
2269 }
2270 }
2271
2272 sprintf(card->longname, "%s at 0x%lx, irq %i",
2273 card->shortname, ice->port, ice->irq);
2274
2275 if ((err = snd_card_register(card)) < 0) {
2276 snd_card_free(card);
2277 return err;
2278 }
2279 pci_set_drvdata(pci, card);
2280 dev++;
2281 return 0;
2282 }
2283
2284 static void __devexit snd_vt1724_remove(struct pci_dev *pci)
2285 {
2286 snd_card_free(pci_get_drvdata(pci));
2287 pci_set_drvdata(pci, NULL);
2288 }
2289
2290 static struct pci_driver driver = {
2291 .name = "ICE1724",
2292 .id_table = snd_vt1724_ids,
2293 .probe = snd_vt1724_probe,
2294 .remove = __devexit_p(snd_vt1724_remove),
2295 };
2296
2297 static int __init alsa_card_ice1724_init(void)
2298 {
2299 return pci_module_init(&driver);
2300 }
2301
2302 static void __exit alsa_card_ice1724_exit(void)
2303 {
2304 pci_unregister_driver(&driver);
2305 }
2306
2307 module_init(alsa_card_ice1724_init)
2308 module_exit(alsa_card_ice1724_exit)
MOXA 2.6.9 from sdlinux-moxaart.tgz