2 // Copyright(c) by Benny Sjostrand (benny@hostmobility.com)
4 // This program is free software; you can redistribute it and/or modify
5 // it under the terms of the GNU General Public License as published by
6 // the Free Software Foundation; either version
2 of the License, or
7 // (at your option) any later version.
9 // This program is distributed in the hope that it will be useful,
10 // but WITHOUT ANY WARRANTY; without even the implied warranty of
11 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 // GNU General Public License for more details.
14 // You should have received a copy of the GNU General Public License
15 // along with this program; if not, write to the Free Software
16 // Foundation, Inc.,
59 Temple Place, Suite
330, Boston, MA
02111-
1307 USA
21 // This code runs inside the DSP (cs4610, cs4612, cs4624, or cs4630),
22 // to compile it you need a tool named SPASM
3.0 and DSP code owned by
23 // Cirrus Logic(R). The SPASM program will generate a object file (cwcdma.osp),
24 // the
"ospparser" tool will genereate the cwcdma.h file it's included from
25 // the cs46xx_lib.c file.
28 // The purpose of this code is very simple: make it possible to tranfser
29 // the samples 'as they are' with no alteration from a PCMreader SCB (DMA from host)
30 // to any other SCB. This is useful for AC3 throug SPDIF. SRC (source rate converters)
31 // task always alters the samples in some how, however it's from
48khz -
> 48khz. The
32 // alterations are not audible, but AC3 wont work.
56 long dma_reserved1[
3];
58 short dma_reserved2:dma_outBufPtr;
60 short dma_unused1:dma_unused2;
62 long dma_reserved3[
4];
64 short dma_subListPtr:dma_nextSCB;
65 short dma_SPBptr:dma_entryPoint;
67 long dma_strmRsConfig;
72 VolumeControl s2m_volume;
79 r2 = r0-
>dma_subListPtr;
82 rsConfig01 = r2-
>strmRsConfig;
83 // Load rsConfig for input buffer
85 rsDMA01 = r2-
>basicReq.daw, , tb = Z(
0 - rf);
86 // Load rsDMA in case input buffer is a DMA buffer Test to see if there is any data to transfer
88 if (tb) goto execSibling_2ind1 after {
90 r6 = r1-
>dma_entryPoint; // r6 = entry point of sibling task
91 r1 = r1-
>dma_SPBptr, // r1 = pointer to sibling task's SPB
92 , ind = r6; // Load entry point of sibling task
95 rsConfig23 = r0-
>dma_strmRsConfig;
96 // Load rsConfig for output buffer (never a DMA buffer)
98 r4 = r0-
>dma_outBufPtr;
100 rsa0 = r2-
>strmBufPtr;
101 // rsa0 = input buffer pointer
103 for (i = r5; i
>=
0; --i)
106 // rsa2 = output buffer pointer
111 //*****************************
112 // TODO: cycles to this point *
113 //*****************************
115 acc0 = (rsd0 = *rsa0++
1);
118 nop; // Those
"nop"'s are really uggly, but there's
119 nop; // something with DSP's pipelines which I don't
120 nop; // understand, resulting this code to fail without
121 // having those
"nop"'s (Benny)
124 // Trigger DMA transfer on input stream,
125 // if needed to replenish input buffer
128 // Yet another magic
"nop" to make stuff work
131 // store sample in ALU
134 // latency on load register.
135 // (this one is understandable)
138 // store sample in output buffer
140 nop; // The same story
141 nop; // as above again ...
144 // TODO: cycles per loop iteration
146 r2-
>strmBufPtr = rsa0,, ;
147 // Update the modified buffer pointers
150 // Load output pointer position into r4
155 goto execSibling_2ind1 // takes
6 cycles
157 r98 = r2-
>thisSPB:entryPoint;
158 // Load child routine entry and data address
163 r0-
>dma_outBufPtr = r4,,
164 // Store updated output buffer pointer
167 // r8 is r2-
>entryPoint