include/asm-sh/processor.h

   1 /*
   2  * include/asm-sh/processor.h
   3  *
   4  * Copyright (C) 1999, 2000  Niibe Yutaka
   5  * Copyright (C) 2002, 2003  Paul Mundt
   6  */
   7
   8 #ifndef __ASM_SH_PROCESSOR_H
   9 #define __ASM_SH_PROCESSOR_H
  10
  11 #include <asm/page.h>
  12 #include <asm/types.h>
  13 #include <asm/cache.h>
  14 #include <linux/threads.h>
  15 #include <asm/ptrace.h>
  16
  17 /*
  18  * Default implementation of macro that returns current
  19  * instruction pointer ("program counter").
  20  */
  21 #define current_text_addr() ({ void *pc; __asm__("mova  1f, %0\n1:":"=z" (pc)); pc; })
  22
  23 /* Core Processor Version Register */
  24 #define CCN_PVR         0xff000030
  25 #define CCN_CVR         0xff000040
  26 #define CCN_PRR         0xff000044
  27
  28 /*
  29  *  CPU type and hardware bug flags. Kept separately for each CPU.
  30  *
  31  *  Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
  32  *  in arch/sh/Kconfig, as well as an entry in arch/sh/kernel/setup.c
  33  *  for parsing the subtype in get_cpu_subtype().
  34  */
  35 enum cpu_type {
  36         /* SH-2 types */
  37         CPU_SH7604,
  38
  39         /* SH-3 types */
  40         CPU_SH7705, CPU_SH7707,  CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
  41         CPU_SH7709, CPU_SH7709A, CPU_SH7729, CPU_SH7300,
  42
  43         /* SH-4 types */
  44         CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
  45         CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,
  46
  47         /* Unknown subtype */
  48         CPU_SH_NONE
  49 };
  50
  51 struct sh_cpuinfo {
  52         enum cpu_type type;
  53         char    hard_math;
  54         unsigned long loops_per_jiffy;
  55
  56         unsigned int cpu_clock, master_clock, bus_clock, module_clock;
  57 #ifdef CONFIG_CPU_SUBTYPE_ST40STB1
  58         unsigned int memory_clock;
  59 #endif
  60
  61         struct cache_info icache;
  62         struct cache_info dcache;
  63
  64         unsigned long flags;
  65 };
  66
  67 extern struct sh_cpuinfo boot_cpu_data;
  68
  69 #ifdef CONFIG_SMP
  70 extern struct sh_cpuinfo cpu_data[];
  71 #define current_cpu_data cpu_data[smp_processor_id()]
  72 #else
  73 #define cpu_data (&boot_cpu_data)
  74 #define current_cpu_data boot_cpu_data
  75 #endif
  76
  77 /*
  78  * User space process size: 2GB.
  79  *
  80  * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
  81  */
  82 #define TASK_SIZE       0x7c000000UL
  83
  84 /* This decides where the kernel will search for a free chunk of vm
  85  * space during mmap's.
  86  */
  87 #define TASK_UNMAPPED_BASE      (TASK_SIZE / 3)
  88
  89 /*
  90  * Bit of SR register
  91  *
  92  * FD-bit:
  93  *     When it's set, it means the processor doesn't have right to use FPU,
  94  *     and it results exception when the floating operation is executed.
  95  *
  96  * IMASK-bit:
  97  *     Interrupt level mask
  98  */
  99 #define SR_FD           0x00008000
 100 #define SR_DSP          0x00001000
 101 #define SR_IMASK        0x000000f0
 102
 103 /*
 104  * FPU structure and data
 105  */
 106
 107 struct sh_fpu_hard_struct {
 108         unsigned long fp_regs[16];
 109         unsigned long xfp_regs[16];
 110         unsigned long fpscr;
 111         unsigned long fpul;
 112
 113         long status; /* software status information */
 114 };
 115
 116 /* Dummy fpu emulator  */
 117 struct sh_fpu_soft_struct {
 118         unsigned long fp_regs[16];
 119         unsigned long xfp_regs[16];
 120         unsigned long fpscr;
 121         unsigned long fpul;
 122
 123         unsigned char lookahead;
 124         unsigned long entry_pc;
 125 };
 126
 127 union sh_fpu_union {
 128         struct sh_fpu_hard_struct hard;
 129         struct sh_fpu_soft_struct soft;
 130 };
 131
 132 /*
 133  * Processor flags
 134  */
 135
 136 #define CPU_HAS_FPU             0x0001  /* Hardware FPU support */
 137 #define CPU_HAS_P2_FLUSH_BUG    0x0002  /* Need to flush the cache in P2 area */
 138 #define CPU_HAS_MMU_PAGE_ASSOC  0x0004  /* SH3: TLB way selection bit support */
 139 #define CPU_HAS_DSP             0x0008  /* SH-DSP: DSP support */
 140
 141 struct thread_struct {
 142         unsigned long sp;
 143         unsigned long pc;
 144
 145         unsigned long trap_no, error_code;
 146         unsigned long address;
 147         /* Hardware debugging registers may come here */
 148         unsigned long ubc_pc;
 149
 150         /* floating point info */
 151         union sh_fpu_union fpu;
 152 };
 153
 154 /* Count of active tasks with UBC settings */
 155 extern int ubc_usercnt;
 156
 157 #define INIT_THREAD  {                                          \
 158         sizeof(init_stack) + (long) &init_stack, /* sp */       \
 159         0,                                       /* pc */       \
 160         0, 0,                                                   \
 161         0,                                                      \
 162         0,                                                      \
 163         {{{0,}},}                               /* fpu state */ \
 164 }
 165
 166 /*
 167  * Do necessary setup to start up a newly executed thread.
 168  */
 169 #define start_thread(regs, new_pc, new_sp)       \
 170         set_fs(USER_DS);                         \
 171         regs->pr = 0;                            \
 172         regs->sr = SR_FD;       /* User mode. */ \
 173         regs->pc = new_pc;                       \
 174         regs->regs[15] = new_sp
 175
 176 /* Forward declaration, a strange C thing */
 177 struct task_struct;
 178 struct mm_struct;
 179
 180 /* Free all resources held by a thread. */
 181 extern void release_thread(struct task_struct *);
 182
 183 /* Prepare to copy thread state - unlazy all lazy status */
 184 #define prepare_to_copy(tsk)    do { } while (0)
 185
 186 /*
 187  * create a kernel thread without removing it from tasklists
 188  */
 189 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 190
 191 /*
 192  * Bus types
 193  */
 194 #define MCA_bus 0
 195 #define MCA_bus__is_a_macro /* for versions in ksyms.c */
 196
 197 /* Copy and release all segment info associated with a VM */
 198 #define copy_segments(p, mm)    do { } while(0)
 199 #define release_segments(mm)    do { } while(0)
 200
 201 /*
 202  * FPU lazy state save handling.
 203  */
 204
 205 static __inline__ void disable_fpu(void)
 206 {
 207         unsigned long __dummy;
 208
 209         /* Set FD flag in SR */
 210         __asm__ __volatile__("stc       sr, %0\n\t"
 211                              "or        %1, %0\n\t"
 212                              "ldc       %0, sr"
 213                              : "=&r" (__dummy)
 214                              : "r" (SR_FD));
 215 }
 216
 217 static __inline__ void enable_fpu(void)
 218 {
 219         unsigned long __dummy;
 220
 221         /* Clear out FD flag in SR */
 222         __asm__ __volatile__("stc       sr, %0\n\t"
 223                              "and       %1, %0\n\t"
 224                              "ldc       %0, sr"
 225                              : "=&r" (__dummy)
 226                              : "r" (~SR_FD));
 227 }
 228
 229 static __inline__ void release_fpu(struct pt_regs *regs)
 230 {
 231         regs->sr |= SR_FD;
 232 }
 233
 234 static __inline__ void grab_fpu(struct pt_regs *regs)
 235 {
 236         regs->sr &= ~SR_FD;
 237 }
 238
 239 #ifdef CONFIG_CPU_SH4
 240 extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);
 241 #else
 242 #define save_fpu(tsk)   do { } while (0)
 243 #endif
 244
 245 #define unlazy_fpu(tsk, regs) do {                              \
 246         if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) {   \
 247                 save_fpu(tsk, regs);                            \
 248         }                                               \
 249 } while (0)
 250
 251 #define clear_fpu(tsk, regs) do {                                       \
 252         if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) {           \
 253                 clear_tsk_thread_flag(tsk, TIF_USEDFPU);        \
 254                 release_fpu(regs);                                      \
 255         }                                                       \
 256 } while (0)
 257
 258 /* Double presision, NANS as NANS, rounding to nearest, no exceptions */
 259 #define FPSCR_INIT  0x00080000
 260
 261 #define FPSCR_CAUSE_MASK        0x0001f000      /* Cause bits */
 262 #define FPSCR_FLAG_MASK         0x0000007c      /* Flag bits */
 263
 264 /*
 265  * Return saved PC of a blocked thread.
 266  */
 267 #define thread_saved_pc(tsk)    (tsk->thread.pc)
 268
 269 extern unsigned long get_wchan(struct task_struct *p);
 270
 271 #define KSTK_EIP(tsk)  ((tsk)->thread.pc)
 272 #define KSTK_ESP(tsk)  ((tsk)->thread.sp)
 273
 274 #define cpu_sleep()     __asm__ __volatile__ ("sleep" : : : "memory")
 275 #define cpu_relax()     do { } while (0)
 276
 277 #endif /* __ASM_SH_PROCESSOR_H */