initial commit with v2.6.9
[linux-2.6.9-moxart.git] / include / asm-sh / pgtable.h
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1 #ifndef __ASM_SH_PGTABLE_H
2 #define __ASM_SH_PGTABLE_H
4 /*
5 * Copyright (C) 1999 Niibe Yutaka
6 * Copyright (C) 2002, 2003, 2004 Paul Mundt
7 */
9 #include <linux/config.h>
10 #include <asm/pgtable-2level.h>
13 * This file contains the functions and defines necessary to modify and use
14 * the SuperH page table tree.
16 #ifndef __ASSEMBLY__
17 #include <asm/processor.h>
18 #include <asm/addrspace.h>
19 #include <asm/fixmap.h>
20 #include <linux/threads.h>
22 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
23 extern void paging_init(void);
26 * Basically we have the same two-level (which is the logical three level
27 * Linux page table layout folded) page tables as the i386.
31 * ZERO_PAGE is a global shared page that is always zero: used
32 * for zero-mapped memory areas etc..
34 extern unsigned long empty_zero_page[1024];
35 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
37 #endif /* !__ASSEMBLY__ */
39 #define PMD_SIZE (1UL << PMD_SHIFT)
40 #define PMD_MASK (~(PMD_SIZE-1))
41 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
42 #define PGDIR_MASK (~(PGDIR_SIZE-1))
44 #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
45 #define FIRST_USER_PGD_NR 0
47 #define PTE_PHYS_MASK 0x1ffff000
49 #ifndef __ASSEMBLY__
51 * First 1MB map is used by fixed purpose.
52 * Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c)
54 #define VMALLOC_START (P3SEG+0x00100000)
55 #define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
57 #define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */
58 #define _PAGE_HW_SHARED 0x002 /* SH-bit : page is shared among processes */
59 #define _PAGE_DIRTY 0x004 /* D-bit : page changed */
60 #define _PAGE_CACHABLE 0x008 /* C-bit : cachable */
61 #define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */
62 #define _PAGE_RW 0x020 /* PR0-bit : write access allowed */
63 #define _PAGE_USER 0x040 /* PR1-bit : user space access allowed */
64 #define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */
65 #define _PAGE_PRESENT 0x100 /* V-bit : page is valid */
66 #define _PAGE_PROTNONE 0x200 /* software: if not present */
67 #define _PAGE_ACCESSED 0x400 /* software: page referenced */
68 #define _PAGE_U0_SHARED 0x800 /* software: page is shared in user space */
70 #define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */
72 /* software: moves to PTEA.TC (Timing Control) */
73 #define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */
74 #define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */
76 /* software: moves to PTEA.SA[2:0] (Space Attributes) */
77 #define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */
78 #define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */
79 #define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */
80 #define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */
81 #define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */
82 #define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */
83 #define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */
86 /* Mask which drop software flags
87 * We also drop WT bit since it is used for _PAGE_FILE
88 * bit in this implementation.
90 #define _PAGE_CLEAR_FLAGS (_PAGE_WT | _PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_U0_SHARED)
92 #if defined(CONFIG_CPU_SH3)
94 * MMU on SH-3 has bug on SH-bit: We can't use it if MMUCR.IX=1.
95 * Work around: Just drop SH-bit.
97 #define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS | _PAGE_HW_SHARED))
98 #else
99 #define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS))
100 #endif
102 /* Hardware flags: SZ0=1 (4k-byte) */
103 #define _PAGE_FLAGS_HARD _PAGE_SZ0
105 #if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
106 #define _PAGE_SZHUGE (_PAGE_SZ1)
107 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
108 #define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1)
109 #endif
111 #define _PAGE_SHARED _PAGE_U0_SHARED
113 #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
114 #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
115 #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_SHARED)
117 #ifdef CONFIG_MMU
118 #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
119 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_SHARED | _PAGE_FLAGS_HARD)
120 #define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
121 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
122 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
123 #define PAGE_KERNEL_NOCACHE \
124 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
125 #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
126 #define PAGE_KERNEL_PCC(slot, type) \
127 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_FLAGS_HARD | (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | (type))
128 #else /* no mmu */
129 #define PAGE_NONE __pgprot(0)
130 #define PAGE_SHARED __pgprot(0)
131 #define PAGE_COPY __pgprot(0)
132 #define PAGE_READONLY __pgprot(0)
133 #define PAGE_KERNEL __pgprot(0)
134 #define PAGE_KERNEL_NOCACHE __pgprot(0)
135 #define PAGE_KERNEL_RO __pgprot(0)
136 #define PAGE_KERNEL_PCC __pgprot(0)
137 #endif
140 * As i386 and MIPS, SuperH can't do page protection for execute, and
141 * considers that the same as a read. Also, write permissions imply
142 * read permissions. This is the closest we can get..
145 #define __P000 PAGE_NONE
146 #define __P001 PAGE_READONLY
147 #define __P010 PAGE_COPY
148 #define __P011 PAGE_COPY
149 #define __P100 PAGE_READONLY
150 #define __P101 PAGE_READONLY
151 #define __P110 PAGE_COPY
152 #define __P111 PAGE_COPY
154 #define __S000 PAGE_NONE
155 #define __S001 PAGE_READONLY
156 #define __S010 PAGE_SHARED
157 #define __S011 PAGE_SHARED
158 #define __S100 PAGE_READONLY
159 #define __S101 PAGE_READONLY
160 #define __S110 PAGE_SHARED
161 #define __S111 PAGE_SHARED
163 #define pte_none(x) (!pte_val(x))
164 #define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
165 #define pte_clear(xp) do { set_pte(xp, __pte(0)); } while (0)
167 #define pmd_none(x) (!pmd_val(x))
168 #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
169 #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
170 #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
172 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
173 #define pte_page(x) phys_to_page(pte_val(x)&PTE_PHYS_MASK)
176 * The following only work if pte_present() is true.
177 * Undefined behaviour if not..
179 static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
180 static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
181 static inline int pte_dirty(pte_t pte){ return pte_val(pte) & _PAGE_DIRTY; }
182 static inline int pte_young(pte_t pte){ return pte_val(pte) & _PAGE_ACCESSED; }
183 static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
184 static inline int pte_write(pte_t pte){ return pte_val(pte) & _PAGE_RW; }
185 static inline int pte_not_present(pte_t pte){ return !(pte_val(pte) & _PAGE_PRESENT); }
187 static inline pte_t pte_rdprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
188 static inline pte_t pte_exprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
189 static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
190 static inline pte_t pte_mkold(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
191 static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; }
192 static inline pte_t pte_mkread(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; }
193 static inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; }
194 static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
195 static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
196 static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
199 * Macro and implementation to make a page protection as uncachable.
201 #define pgprot_noncached pgprot_noncached
203 static inline pgprot_t pgprot_noncached(pgprot_t _prot)
205 unsigned long prot = pgprot_val(_prot);
207 prot &= ~_PAGE_CACHABLE;
208 return __pgprot(prot);
211 #define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
214 * Conversion functions: convert a page and protection to a page entry,
215 * and a page entry and page directory to the page they refer to.
217 * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
219 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
221 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
222 { set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; }
224 #define page_pte(page) page_pte_prot(page, __pgprot(0))
226 #define pmd_page_kernel(pmd) \
227 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
229 #define pmd_page(pmd) \
230 (phys_to_page(pmd_val(pmd)))
232 /* to find an entry in a page-table-directory. */
233 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
234 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
236 /* to find an entry in a kernel page-table-directory */
237 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
239 /* Find an entry in the third-level page table.. */
240 #define pte_index(address) \
241 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
242 #define pte_offset_kernel(dir, address) \
243 ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
244 #define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
245 #define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address)
246 #define pte_unmap(pte) do { } while (0)
247 #define pte_unmap_nested(pte) do { } while (0)
249 struct vm_area_struct;
250 extern void update_mmu_cache(struct vm_area_struct * vma,
251 unsigned long address, pte_t pte);
253 /* Encode and de-code a swap entry */
255 * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
256 * and _PAGE_PROTNONE bits
258 #define __swp_type(x) ((x).val & 0xff)
259 #define __swp_offset(x) ((x).val >> 10)
260 #define __swp_entry(type, offset) ((swp_entry_t) { (type) | ((offset) << 10) })
261 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 })
262 #define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 })
265 * Encode and decode a nonlinear file mapping entry
267 #define PTE_FILE_MAX_BITS 29
268 #define pte_to_pgoff(pte) (pte_val(pte) >> 1)
269 #define pgoff_to_pte(off) ((pte_t) { ((off) << 1) | _PAGE_FILE })
271 typedef pte_t *pte_addr_t;
273 #endif /* !__ASSEMBLY__ */
275 #define kern_addr_valid(addr) (1)
277 #define io_remap_page_range remap_page_range
280 * No page table caches to initialise
282 #define pgtable_cache_init() do { } while (0)
284 #ifndef CONFIG_MMU
285 extern unsigned int kobjsize(const void *objp);
286 #endif /* !CONFIG_MMU */
288 #ifdef CONFIG_CPU_SH4
289 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
290 extern inline pte_t ptep_get_and_clear(pte_t *ptep);
291 #endif
293 #include <asm-generic/pgtable.h>
295 #endif /* __ASM_SH_PAGE_H */