include/asm-parisc/pgtable.h

   1 #ifndef _PARISC_PGTABLE_H
   2 #define _PARISC_PGTABLE_H
   3
   4 #include <linux/config.h>
   5 #include <asm/fixmap.h>
   6
   7 #ifndef __ASSEMBLY__
   8 /*
   9  * we simulate an x86-style page table for the linux mm code
  10  */
  11
  12 #include <linux/spinlock.h>
  13 #include <asm/processor.h>
  14 #include <asm/cache.h>
  15 #include <asm/bitops.h>
  16
  17 /*
  18  * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
  19  * memory.  For the return value to be meaningful, ADDR must be >=
  20  * PAGE_OFFSET.  This operation can be relatively expensive (e.g.,
  21  * require a hash-, or multi-level tree-lookup or something of that
  22  * sort) but it guarantees to return TRUE only if accessing the page
  23  * at that address does not cause an error.  Note that there may be
  24  * addresses for which kern_addr_valid() returns FALSE even though an
  25  * access would not cause an error (e.g., this is typically true for
  26  * memory mapped I/O regions.
  27  *
  28  * XXX Need to implement this for parisc.
  29  */
  30 #define kern_addr_valid(addr)   (1)
  31
  32 /* Certain architectures need to do special things when PTEs
  33  * within a page table are directly modified.  Thus, the following
  34  * hook is made available.
  35  */
  36 #define set_pte(pteptr, pteval)                                 \
  37         do{                                                     \
  38                 *(pteptr) = (pteval);                           \
  39         } while(0)
  40
  41 #endif /* !__ASSEMBLY__ */
  42
  43 #define pte_ERROR(e) \
  44         printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
  45 #define pmd_ERROR(e) \
  46         printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, (unsigned long)pmd_val(e))
  47 #define pgd_ERROR(e) \
  48         printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e))
  49
  50  /* Note: If you change ISTACK_SIZE, you need to change the corresponding
  51   * values in vmlinux.lds and vmlinux64.lds (init_istack section). Also,
  52   * the "order" and size need to agree.
  53   */
  54
  55 #define  ISTACK_SIZE  32768 /* Interrupt Stack Size */
  56 #define  ISTACK_ORDER 3
  57
  58 /* This is the size of the initially mapped kernel memory (i.e. currently
  59  * 0 to 1<<23 == 8MB */
  60 #ifdef CONFIG_64BIT
  61 #define KERNEL_INITIAL_ORDER    24
  62 #else
  63 #define KERNEL_INITIAL_ORDER    23
  64 #endif
  65 #define KERNEL_INITIAL_SIZE     (1 << KERNEL_INITIAL_ORDER)
  66
  67 #ifdef CONFIG_64BIT
  68 #define PT_NLEVELS      3
  69 #define PGD_ORDER       1 /* Number of pages per pgd */
  70 #define PMD_ORDER       1 /* Number of pages per pmd */
  71 #define PGD_ALLOC_ORDER 2 /* first pgd contains pmd */
  72 #else
  73 #define PT_NLEVELS      2
  74 #define PGD_ORDER       1 /* Number of pages per pgd */
  75 #define PGD_ALLOC_ORDER PGD_ORDER
  76 #endif
  77
  78 /* Definitions for 3rd level (we use PLD here for Page Lower directory
  79  * because PTE_SHIFT is used lower down to mean shift that has to be
  80  * done to get usable bits out of the PTE) */
  81 #define PLD_SHIFT       PAGE_SHIFT
  82 #define PLD_SIZE        PAGE_SIZE
  83 #define BITS_PER_PTE    (PAGE_SHIFT - BITS_PER_PTE_ENTRY)
  84 #define PTRS_PER_PTE    (1UL << BITS_PER_PTE)
  85
  86 /* Definitions for 2nd level */
  87 #define pgtable_cache_init()    do { } while (0)
  88
  89 #define PMD_SHIFT       (PLD_SHIFT + BITS_PER_PTE)
  90 #define PMD_SIZE        (1UL << PMD_SHIFT)
  91 #define PMD_MASK        (~(PMD_SIZE-1))
  92 #if PT_NLEVELS == 3
  93 #define BITS_PER_PMD    (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY)
  94 #else
  95 #define BITS_PER_PMD    0
  96 #endif
  97 #define PTRS_PER_PMD    (1UL << BITS_PER_PMD)
  98
  99 /* Definitions for 1st level */
 100 #define PGDIR_SHIFT     (PMD_SHIFT + BITS_PER_PMD)
 101 #define BITS_PER_PGD    (PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY)
 102 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
 103 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
 104 #define PTRS_PER_PGD    (1UL << BITS_PER_PGD)
 105 #define USER_PTRS_PER_PGD       PTRS_PER_PGD
 106
 107 #define MAX_ADDRBITS    (PGDIR_SHIFT + BITS_PER_PGD)
 108 #define MAX_ADDRESS     (1UL << MAX_ADDRBITS)
 109
 110 #define SPACEID_SHIFT (MAX_ADDRBITS - 32)
 111
 112 /* This calculates the number of initial pages we need for the initial
 113  * page tables */
 114 #define PT_INITIAL      (1 << (KERNEL_INITIAL_ORDER - PMD_SHIFT))
 115
 116 /*
 117  * pgd entries used up by user/kernel:
 118  */
 119
 120 #define FIRST_USER_PGD_NR       0
 121
 122 #ifndef __ASSEMBLY__
 123 extern  void *vmalloc_start;
 124 #define PCXL_DMA_MAP_SIZE   (8*1024*1024)
 125 #define VMALLOC_START   ((unsigned long)vmalloc_start)
 126 /* this is a fixmap remnant, see fixmap.h */
 127 #define VMALLOC_END     (KERNEL_MAP_END)
 128 #endif
 129
 130 /* NB: The tlb miss handlers make certain assumptions about the order */
 131 /*     of the following bits, so be careful (One example, bits 25-31  */
 132 /*     are moved together in one instruction).                        */
 133
 134 #define _PAGE_READ_BIT     31   /* (0x001) read access allowed */
 135 #define _PAGE_WRITE_BIT    30   /* (0x002) write access allowed */
 136 #define _PAGE_EXEC_BIT     29   /* (0x004) execute access allowed */
 137 #define _PAGE_GATEWAY_BIT  28   /* (0x008) privilege promotion allowed */
 138 #define _PAGE_DMB_BIT      27   /* (0x010) Data Memory Break enable (B bit) */
 139 #define _PAGE_DIRTY_BIT    26   /* (0x020) Page Dirty (D bit) */
 140 #define _PAGE_FILE_BIT  _PAGE_DIRTY_BIT /* overload this bit */
 141 #define _PAGE_REFTRAP_BIT  25   /* (0x040) Page Ref. Trap enable (T bit) */
 142 #define _PAGE_NO_CACHE_BIT 24   /* (0x080) Uncached Page (U bit) */
 143 #define _PAGE_ACCESSED_BIT 23   /* (0x100) Software: Page Accessed */
 144 #define _PAGE_PRESENT_BIT  22   /* (0x200) Software: translation valid */
 145 #define _PAGE_FLUSH_BIT    21   /* (0x400) Software: translation valid */
 146                                 /*             for cache flushing only */
 147 #define _PAGE_USER_BIT     20   /* (0x800) Software: User accessible page */
 148
 149 /* N.B. The bits are defined in terms of a 32 bit word above, so the */
 150 /*      following macro is ok for both 32 and 64 bit.                */
 151
 152 #define xlate_pabit(x) (31 - x)
 153
 154 /* this defines the shift to the usable bits in the PTE it is set so
 155  * that the valid bits _PAGE_PRESENT_BIT and _PAGE_USER_BIT are set
 156  * to zero */
 157 #define PTE_SHIFT               xlate_pabit(_PAGE_USER_BIT)
 158
 159 /* this is how many bits may be used by the file functions */
 160 #define PTE_FILE_MAX_BITS       (BITS_PER_LONG - PTE_SHIFT)
 161
 162 #define pte_to_pgoff(pte) (pte_val(pte) >> PTE_SHIFT)
 163 #define pgoff_to_pte(off) ((pte_t) { ((off) << PTE_SHIFT) | _PAGE_FILE })
 164
 165 #define _PAGE_READ     (1 << xlate_pabit(_PAGE_READ_BIT))
 166 #define _PAGE_WRITE    (1 << xlate_pabit(_PAGE_WRITE_BIT))
 167 #define _PAGE_RW       (_PAGE_READ | _PAGE_WRITE)
 168 #define _PAGE_EXEC     (1 << xlate_pabit(_PAGE_EXEC_BIT))
 169 #define _PAGE_GATEWAY  (1 << xlate_pabit(_PAGE_GATEWAY_BIT))
 170 #define _PAGE_DMB      (1 << xlate_pabit(_PAGE_DMB_BIT))
 171 #define _PAGE_DIRTY    (1 << xlate_pabit(_PAGE_DIRTY_BIT))
 172 #define _PAGE_REFTRAP  (1 << xlate_pabit(_PAGE_REFTRAP_BIT))
 173 #define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
 174 #define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
 175 #define _PAGE_PRESENT  (1 << xlate_pabit(_PAGE_PRESENT_BIT))
 176 #define _PAGE_FLUSH    (1 << xlate_pabit(_PAGE_FLUSH_BIT))
 177 #define _PAGE_USER     (1 << xlate_pabit(_PAGE_USER_BIT))
 178 #define _PAGE_FILE     (1 << xlate_pabit(_PAGE_FILE_BIT))
 179
 180 #define _PAGE_TABLE     (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE |  _PAGE_DIRTY | _PAGE_ACCESSED)
 181 #define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
 182 #define _PAGE_KERNEL    (_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
 183
 184 /* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds
 185  * are page-aligned, we don't care about the PAGE_OFFSET bits, except
 186  * for a few meta-information bits, so we shift the address to be
 187  * able to effectively address 40-bits of physical address space. */
 188 #define _PxD_PRESENT_BIT   31
 189 #define _PxD_ATTACHED_BIT  30
 190 #define _PxD_VALID_BIT     29
 191
 192 #define PxD_FLAG_PRESENT  (1 << xlate_pabit(_PxD_PRESENT_BIT))
 193 #define PxD_FLAG_ATTACHED (1 << xlate_pabit(_PxD_ATTACHED_BIT))
 194 #define PxD_FLAG_VALID    (1 << xlate_pabit(_PxD_VALID_BIT))
 195 #define PxD_FLAG_MASK     (0xf)
 196 #define PxD_FLAG_SHIFT    (4)
 197 #define PxD_VALUE_SHIFT   (8)
 198
 199 #ifndef __ASSEMBLY__
 200
 201 #define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
 202 #define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_ACCESSED)
 203 /* Others seem to make this executable, I don't know if that's correct
 204    or not.  The stack is mapped this way though so this is necessary
 205    in the short term - dhd@linuxcare.com, 2000-08-08 */
 206 #define PAGE_READONLY   __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_ACCESSED)
 207 #define PAGE_WRITEONLY  __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_WRITE | _PAGE_ACCESSED)
 208 #define PAGE_EXECREAD   __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_EXEC |_PAGE_ACCESSED)
 209 #define PAGE_COPY       PAGE_EXECREAD
 210 #define PAGE_RWX        __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED)
 211 #define PAGE_KERNEL     __pgprot(_PAGE_KERNEL)
 212 #define PAGE_KERNEL_RO  __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_DIRTY | _PAGE_ACCESSED)
 213 #define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
 214 #define PAGE_GATEWAY    __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
 215 #define PAGE_FLUSH      __pgprot(_PAGE_FLUSH)
 216
 217
 218 /*
 219  * We could have an execute only page using "gateway - promote to priv
 220  * level 3", but that is kind of silly. So, the way things are defined
 221  * now, we must always have read permission for pages with execute
 222  * permission. For the fun of it we'll go ahead and support write only
 223  * pages.
 224  */
 225
 226          /*xwr*/
 227 #define __P000  PAGE_NONE
 228 #define __P001  PAGE_READONLY
 229 #define __P010  __P000 /* copy on write */
 230 #define __P011  __P001 /* copy on write */
 231 #define __P100  PAGE_EXECREAD
 232 #define __P101  PAGE_EXECREAD
 233 #define __P110  __P100 /* copy on write */
 234 #define __P111  __P101 /* copy on write */
 235
 236 #define __S000  PAGE_NONE
 237 #define __S001  PAGE_READONLY
 238 #define __S010  PAGE_WRITEONLY
 239 #define __S011  PAGE_SHARED
 240 #define __S100  PAGE_EXECREAD
 241 #define __S101  PAGE_EXECREAD
 242 #define __S110  PAGE_RWX
 243 #define __S111  PAGE_RWX
 244
 245 extern pgd_t swapper_pg_dir[]; /* declared in init_task.c */
 246
 247 /* initial page tables for 0-8MB for kernel */
 248
 249 extern pte_t pg0[];
 250
 251 /* zero page used for uninitialized stuff */
 252
 253 extern unsigned long *empty_zero_page;
 254
 255 /*
 256  * ZERO_PAGE is a global shared page that is always zero: used
 257  * for zero-mapped memory areas etc..
 258  */
 259
 260 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
 261
 262 #define pte_none(x)     ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH))
 263 #define pte_present(x)  (pte_val(x) & _PAGE_PRESENT)
 264 #define pte_clear(xp)   do { pte_val(*(xp)) = 0; } while (0)
 265
 266 #define pmd_flag(x)     (pmd_val(x) & PxD_FLAG_MASK)
 267 #define pmd_address(x)  ((unsigned long)(pmd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
 268 #define pgd_flag(x)     (pgd_val(x) & PxD_FLAG_MASK)
 269 #define pgd_address(x)  ((unsigned long)(pgd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
 270
 271 #ifdef CONFIG_64BIT
 272 /* The first entry of the permanent pmd is not there if it contains
 273  * the gateway marker */
 274 #define pmd_none(x)     (!pmd_val(x) || pmd_flag(x) == PxD_FLAG_ATTACHED)
 275 #else
 276 #define pmd_none(x)     (!pmd_val(x))
 277 #endif
 278 #define pmd_bad(x)      (!(pmd_flag(x) & PxD_FLAG_VALID))
 279 #define pmd_present(x)  (pmd_flag(x) & PxD_FLAG_PRESENT)
 280 static inline void pmd_clear(pmd_t *pmd) {
 281 #ifdef CONFIG_64BIT
 282         if (pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
 283                 /* This is the entry pointing to the permanent pmd
 284                  * attached to the pgd; cannot clear it */
 285                 __pmd_val_set(*pmd, PxD_FLAG_ATTACHED);
 286         else
 287 #endif
 288                 __pmd_val_set(*pmd,  0);
 289 }
 290
 291
 292
 293 #if PT_NLEVELS == 3
 294 #define pgd_page(pgd) ((unsigned long) __va(pgd_address(pgd)))
 295
 296 /* For 64 bit we have three level tables */
 297
 298 #define pgd_none(x)     (!pgd_val(x))
 299 #define pgd_bad(x)      (!(pgd_flag(x) & PxD_FLAG_VALID))
 300 #define pgd_present(x)  (pgd_flag(x) & PxD_FLAG_PRESENT)
 301 static inline void pgd_clear(pgd_t *pgd) {
 302 #ifdef CONFIG_64BIT
 303         if(pgd_flag(*pgd) & PxD_FLAG_ATTACHED)
 304                 /* This is the permanent pmd attached to the pgd; cannot
 305                  * free it */
 306                 return;
 307 #endif
 308         __pgd_val_set(*pgd, 0);
 309 }
 310 #else
 311 /*
 312  * The "pgd_xxx()" functions here are trivial for a folded two-level
 313  * setup: the pgd is never bad, and a pmd always exists (as it's folded
 314  * into the pgd entry)
 315  */
 316 extern inline int pgd_none(pgd_t pgd)           { return 0; }
 317 extern inline int pgd_bad(pgd_t pgd)            { return 0; }
 318 extern inline int pgd_present(pgd_t pgd)        { return 1; }
 319 extern inline void pgd_clear(pgd_t * pgdp)      { }
 320 #endif
 321
 322 /*
 323  * The following only work if pte_present() is true.
 324  * Undefined behaviour if not..
 325  */
 326 extern inline int pte_read(pte_t pte)           { return pte_val(pte) & _PAGE_READ; }
 327 extern inline int pte_dirty(pte_t pte)          { return pte_val(pte) & _PAGE_DIRTY; }
 328 extern inline int pte_young(pte_t pte)          { return pte_val(pte) & _PAGE_ACCESSED; }
 329 extern inline int pte_write(pte_t pte)          { return pte_val(pte) & _PAGE_WRITE; }
 330 extern inline int pte_file(pte_t pte)           { return pte_val(pte) & _PAGE_FILE; }
 331 extern inline int pte_user(pte_t pte)           { return pte_val(pte) & _PAGE_USER; }
 332
 333 extern inline pte_t pte_rdprotect(pte_t pte)    { pte_val(pte) &= ~_PAGE_READ; return pte; }
 334 extern inline pte_t pte_mkclean(pte_t pte)      { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
 335 extern inline pte_t pte_mkold(pte_t pte)        { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
 336 extern inline pte_t pte_wrprotect(pte_t pte)    { pte_val(pte) &= ~_PAGE_WRITE; return pte; }
 337 extern inline pte_t pte_mkread(pte_t pte)       { pte_val(pte) |= _PAGE_READ; return pte; }
 338 extern inline pte_t pte_mkdirty(pte_t pte)      { pte_val(pte) |= _PAGE_DIRTY; return pte; }
 339 extern inline pte_t pte_mkyoung(pte_t pte)      { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
 340 extern inline pte_t pte_mkwrite(pte_t pte)      { pte_val(pte) |= _PAGE_WRITE; return pte; }
 341
 342 /*
 343  * Conversion functions: convert a page and protection to a page entry,
 344  * and a page entry and page directory to the page they refer to.
 345  */
 346 #define __mk_pte(addr,pgprot) \
 347 ({                                                                      \
 348         pte_t __pte;                                                    \
 349                                                                         \
 350         pte_val(__pte) = ((addr)+pgprot_val(pgprot));                   \
 351                                                                         \
 352         __pte;                                                          \
 353 })
 354
 355 #define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
 356
 357 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
 358 {
 359         pte_t pte;
 360         pte_val(pte) = (pfn << PAGE_SHIFT) | pgprot_val(pgprot);
 361         return pte;
 362 }
 363
 364 /* This takes a physical page address that is used by the remapping functions */
 365 #define mk_pte_phys(physpage, pgprot) \
 366 ({ pte_t __pte; pte_val(__pte) = physpage + pgprot_val(pgprot); __pte; })
 367
 368 extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 369 { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
 370
 371 /* Permanent address of a page.  On parisc we don't have highmem. */
 372
 373 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
 374
 375 #define pte_page(pte)           (pfn_to_page(pte_pfn(pte)))
 376
 377 #define pmd_page_kernel(pmd)    ((unsigned long) __va(pmd_address(pmd)))
 378
 379 #define __pmd_page(pmd) ((unsigned long) __va(pmd_address(pmd)))
 380 #define pmd_page(pmd)   virt_to_page((void *)__pmd_page(pmd))
 381
 382 #define pgd_index(address) ((address) >> PGDIR_SHIFT)
 383
 384 /* to find an entry in a page-table-directory */
 385 #define pgd_offset(mm, address) \
 386 ((mm)->pgd + ((address) >> PGDIR_SHIFT))
 387
 388 /* to find an entry in a kernel page-table-directory */
 389 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
 390
 391 /* Find an entry in the second-level page table.. */
 392
 393 #if PT_NLEVELS == 3
 394 #define pmd_offset(dir,address) \
 395 ((pmd_t *) pgd_page(*(dir)) + (((address)>>PMD_SHIFT) & (PTRS_PER_PMD-1)))
 396 #else
 397 #define pmd_offset(dir,addr) ((pmd_t *) dir)
 398 #endif
 399
 400 /* Find an entry in the third-level page table.. */
 401 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
 402 #define pte_offset_kernel(pmd, address) \
 403         ((pte_t *) pmd_page_kernel(*(pmd)) + pte_index(address))
 404 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
 405 #define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
 406 #define pte_unmap(pte) do { } while (0)
 407 #define pte_unmap_nested(pte) do { } while (0)
 408
 409 #define pte_unmap(pte)                  do { } while (0)
 410 #define pte_unmap_nested(pte)           do { } while (0)
 411
 412 extern void paging_init (void);
 413
 414 /* Used for deferring calls to flush_dcache_page() */
 415
 416 #define PG_dcache_dirty         PG_arch_1
 417
 418 struct vm_area_struct; /* forward declaration (include/linux/mm.h) */
 419 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
 420
 421 /* Encode and de-code a swap entry */
 422
 423 #define __swp_type(x)                     ((x).val & 0x1f)
 424 #define __swp_offset(x)                   ( (((x).val >> 6) &  0x7) | \
 425                                           (((x).val >> 8) & ~0x7) )
 426 #define __swp_entry(type, offset)         ((swp_entry_t) { (type) | \
 427                                             ((offset &  0x7) << 6) | \
 428                                             ((offset & ~0x7) << 8) })
 429 #define __pte_to_swp_entry(pte)         ((swp_entry_t) { pte_val(pte) })
 430 #define __swp_entry_to_pte(x)           ((pte_t) { (x).val })
 431
 432 static inline int ptep_test_and_clear_young(pte_t *ptep)
 433 {
 434 #ifdef CONFIG_SMP
 435         if (!pte_young(*ptep))
 436                 return 0;
 437         return test_and_clear_bit(xlate_pabit(_PAGE_ACCESSED_BIT), &pte_val(*ptep));
 438 #else
 439         pte_t pte = *ptep;
 440         if (!pte_young(pte))
 441                 return 0;
 442         set_pte(ptep, pte_mkold(pte));
 443         return 1;
 444 #endif
 445 }
 446
 447 static inline int ptep_test_and_clear_dirty(pte_t *ptep)
 448 {
 449 #ifdef CONFIG_SMP
 450         if (!pte_dirty(*ptep))
 451                 return 0;
 452         return test_and_clear_bit(xlate_pabit(_PAGE_DIRTY_BIT), &pte_val(*ptep));
 453 #else
 454         pte_t pte = *ptep;
 455         if (!pte_dirty(pte))
 456                 return 0;
 457         set_pte(ptep, pte_mkclean(pte));
 458         return 1;
 459 #endif
 460 }
 461
 462 extern spinlock_t pa_dbit_lock;
 463
 464 static inline pte_t ptep_get_and_clear(pte_t *ptep)
 465 {
 466         pte_t old_pte;
 467         pte_t pte;
 468
 469         spin_lock(&pa_dbit_lock);
 470         pte = old_pte = *ptep;
 471         pte_val(pte) &= ~_PAGE_PRESENT;
 472         pte_val(pte) |= _PAGE_FLUSH;
 473         set_pte(ptep,pte);
 474         spin_unlock(&pa_dbit_lock);
 475
 476         return old_pte;
 477 }
 478
 479 static inline void ptep_set_wrprotect(pte_t *ptep)
 480 {
 481 #ifdef CONFIG_SMP
 482         unsigned long new, old;
 483
 484         do {
 485                 old = pte_val(*ptep);
 486                 new = pte_val(pte_wrprotect(__pte (old)));
 487         } while (cmpxchg((unsigned long *) ptep, old, new) != old);
 488 #else
 489         pte_t old_pte = *ptep;
 490         set_pte(ptep, pte_wrprotect(old_pte));
 491 #endif
 492 }
 493
 494 static inline void ptep_mkdirty(pte_t *ptep)
 495 {
 496 #ifdef CONFIG_SMP
 497         set_bit(xlate_pabit(_PAGE_DIRTY_BIT), &pte_val(*ptep));
 498 #else
 499         pte_t old_pte = *ptep;
 500         set_pte(ptep, pte_mkdirty(old_pte));
 501 #endif
 502 }
 503
 504 #define pte_same(A,B)   (pte_val(A) == pte_val(B))
 505
 506 #endif /* !__ASSEMBLY__ */
 507
 508 #define io_remap_page_range remap_page_range
 509
 510 /* We provide our own get_unmapped_area to provide cache coherency */
 511
 512 #define HAVE_ARCH_UNMAPPED_AREA
 513
 514 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
 515 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
 516 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 517 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
 518 #define __HAVE_ARCH_PTEP_MKDIRTY
 519 #define __HAVE_ARCH_PTE_SAME
 520 #include <asm-generic/pgtable.h>
 521
 522 #endif /* _PARISC_PGTABLE_H */