initial commit with v2.6.9
[linux-2.6.9-moxart.git] / include / asm-mips / elf.h
blobaad1db9e170e45008d35d4a7be9465ba6c422870
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 */
6 #ifndef _ASM_ELF_H
7 #define _ASM_ELF_H
9 #include <linux/config.h>
11 /* ELF header e_flags defines. */
12 /* MIPS architecture level. */
13 #define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
14 #define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
15 #define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
16 #define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
17 #define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
18 #define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */
19 #define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */
21 /* The ABI of a file. */
22 #define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */
23 #define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */
25 #define PT_MIPS_REGINFO 0x70000000
26 #define PT_MIPS_OPTIONS 0x70000001
28 /* Flags in the e_flags field of the header */
29 #define EF_MIPS_NOREORDER 0x00000001
30 #define EF_MIPS_PIC 0x00000002
31 #define EF_MIPS_CPIC 0x00000004
32 #define EF_MIPS_ABI2 0x00000020
33 #define EF_MIPS_OPTIONS_FIRST 0x00000080
34 #define EF_MIPS_32BITMODE 0x00000100
35 #define EF_MIPS_ABI 0x0000f000
36 #define EF_MIPS_ARCH 0xf0000000
38 #define DT_MIPS_RLD_VERSION 0x70000001
39 #define DT_MIPS_TIME_STAMP 0x70000002
40 #define DT_MIPS_ICHECKSUM 0x70000003
41 #define DT_MIPS_IVERSION 0x70000004
42 #define DT_MIPS_FLAGS 0x70000005
43 #define RHF_NONE 0
44 #define RHF_HARDWAY 1
45 #define RHF_NOTPOT 2
46 #define DT_MIPS_BASE_ADDRESS 0x70000006
47 #define DT_MIPS_CONFLICT 0x70000008
48 #define DT_MIPS_LIBLIST 0x70000009
49 #define DT_MIPS_LOCAL_GOTNO 0x7000000a
50 #define DT_MIPS_CONFLICTNO 0x7000000b
51 #define DT_MIPS_LIBLISTNO 0x70000010
52 #define DT_MIPS_SYMTABNO 0x70000011
53 #define DT_MIPS_UNREFEXTNO 0x70000012
54 #define DT_MIPS_GOTSYM 0x70000013
55 #define DT_MIPS_HIPAGENO 0x70000014
56 #define DT_MIPS_RLD_MAP 0x70000016
58 #define R_MIPS_NONE 0
59 #define R_MIPS_16 1
60 #define R_MIPS_32 2
61 #define R_MIPS_REL32 3
62 #define R_MIPS_26 4
63 #define R_MIPS_HI16 5
64 #define R_MIPS_LO16 6
65 #define R_MIPS_GPREL16 7
66 #define R_MIPS_LITERAL 8
67 #define R_MIPS_GOT16 9
68 #define R_MIPS_PC16 10
69 #define R_MIPS_CALL16 11
70 #define R_MIPS_GPREL32 12
71 /* The remaining relocs are defined on Irix, although they are not
72 in the MIPS ELF ABI. */
73 #define R_MIPS_UNUSED1 13
74 #define R_MIPS_UNUSED2 14
75 #define R_MIPS_UNUSED3 15
76 #define R_MIPS_SHIFT5 16
77 #define R_MIPS_SHIFT6 17
78 #define R_MIPS_64 18
79 #define R_MIPS_GOT_DISP 19
80 #define R_MIPS_GOT_PAGE 20
81 #define R_MIPS_GOT_OFST 21
83 * The following two relocation types are specified in the MIPS ABI
84 * conformance guide version 1.2 but not yet in the psABI.
86 #define R_MIPS_GOTHI16 22
87 #define R_MIPS_GOTLO16 23
88 #define R_MIPS_SUB 24
89 #define R_MIPS_INSERT_A 25
90 #define R_MIPS_INSERT_B 26
91 #define R_MIPS_DELETE 27
92 #define R_MIPS_HIGHER 28
93 #define R_MIPS_HIGHEST 29
95 * The following two relocation types are specified in the MIPS ABI
96 * conformance guide version 1.2 but not yet in the psABI.
98 #define R_MIPS_CALLHI16 30
99 #define R_MIPS_CALLLO16 31
101 * This range is reserved for vendor specific relocations.
103 #define R_MIPS_LOVENDOR 100
104 #define R_MIPS_HIVENDOR 127
106 #define SHN_MIPS_ACCOMON 0xff00
108 #define SHT_MIPS_LIST 0x70000000
109 #define SHT_MIPS_CONFLICT 0x70000002
110 #define SHT_MIPS_GPTAB 0x70000003
111 #define SHT_MIPS_UCODE 0x70000004
113 #define SHF_MIPS_GPREL 0x10000000
115 #ifndef ELF_ARCH
116 /* ELF register definitions */
117 #define ELF_NGREG 45
118 #define ELF_NFPREG 33
120 typedef unsigned long elf_greg_t;
121 typedef elf_greg_t elf_gregset_t[ELF_NGREG];
123 typedef double elf_fpreg_t;
124 typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
126 #ifdef CONFIG_MIPS32
129 * This is used to ensure we don't load something for the wrong architecture.
131 #define elf_check_arch(hdr) \
132 ({ \
133 int __res = 1; \
134 struct elfhdr *__h = (hdr); \
136 if (__h->e_machine != EM_MIPS) \
137 __res = 0; \
138 if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
139 __res = 0; \
140 if ((__h->e_flags & EF_MIPS_ABI2) != 0) \
141 __res = 0; \
142 if (((__h->e_flags & EF_MIPS_ABI) != 0) && \
143 ((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) \
144 __res = 0; \
146 __res; \
150 * These are used to set parameters in the core dumps.
152 #define ELF_CLASS ELFCLASS32
154 #endif /* CONFIG_MIPS32 */
156 #ifdef CONFIG_MIPS64
158 * This is used to ensure we don't load something for the wrong architecture.
160 #define elf_check_arch(hdr) \
161 ({ \
162 int __res = 1; \
163 struct elfhdr *__h = (hdr); \
165 if (__h->e_machine != EM_MIPS) \
166 __res = 0; \
167 if (__h->e_ident[EI_CLASS] != ELFCLASS64) \
168 __res = 0; \
170 __res; \
174 * These are used to set parameters in the core dumps.
176 #define ELF_CLASS ELFCLASS64
178 #endif /* CONFIG_MIPS64 */
181 * These are used to set parameters in the core dumps.
183 #ifdef __MIPSEB__
184 #define ELF_DATA ELFDATA2MSB
185 #elif __MIPSEL__
186 #define ELF_DATA ELFDATA2LSB
187 #endif
188 #define ELF_ARCH EM_MIPS
190 #endif /* !defined(ELF_ARCH) */
192 #ifdef __KERNEL__
194 #ifdef CONFIG_MIPS32
196 #define SET_PERSONALITY(ex, ibcs2) \
197 do { \
198 if (ibcs2) \
199 set_personality(PER_SVR4); \
200 set_personality(PER_LINUX); \
201 } while (0)
203 #endif /* CONFIG_MIPS32 */
205 #ifdef CONFIG_MIPS64
207 #define SET_PERSONALITY(ex, ibcs2) \
208 do { current->thread.mflags &= ~MF_ABI_MASK; \
209 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) { \
210 if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \
211 ((ex).e_flags & EF_MIPS_ABI) == 0) \
212 current->thread.mflags |= MF_N32; \
213 else \
214 current->thread.mflags |= MF_O32; \
215 } else \
216 current->thread.mflags |= MF_N64; \
217 if (ibcs2) \
218 set_personality(PER_SVR4); \
219 else if (current->personality != PER_LINUX32) \
220 set_personality(PER_LINUX); \
221 } while (0)
223 #endif /* CONFIG_MIPS64 */
225 #endif /* __KERNEL__ */
227 /* This one accepts IRIX binaries. */
228 #define irix_elf_check_arch(hdr) ((hdr)->e_machine == EM_MIPS)
230 #define USE_ELF_CORE_DUMP
231 #define ELF_EXEC_PAGESIZE PAGE_SIZE
233 #define ELF_CORE_COPY_REGS(_dest,_regs) \
234 memcpy((char *) &_dest, (char *) _regs, \
235 sizeof(struct pt_regs));
237 /* This yields a mask that user programs can use to figure out what
238 instruction set this cpu supports. This could be done in userspace,
239 but it's not easy, and we've already done it here. */
241 #define ELF_HWCAP (0)
243 /* This yields a string that ld.so will use to load implementation
244 specific libraries for optimization. This is more specific in
245 intent than poking at uname or /proc/cpuinfo.
247 For the moment, we have only optimizations for the Intel generations,
248 but that could change... */
250 #define ELF_PLATFORM (NULL)
253 * See comments in asm-alpha/elf.h, this is the same thing
254 * on the MIPS.
256 #define ELF_PLAT_INIT(_r, load_addr) do { \
257 _r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0; \
258 _r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0; \
259 _r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0; \
260 _r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0; \
261 _r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0; \
262 _r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0; \
263 _r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0; \
264 _r->regs[30] = _r->regs[31] = 0; \
265 } while (0)
267 /* This is the location that an ET_DYN program is loaded if exec'ed. Typical
268 use of this is to invoke "./ld.so someprog" to test out a new version of
269 the loader. We need to make sure that it is out of the way of the program
270 that it will "exec", and that there is sufficient room for the brk. */
272 #ifndef ELF_ET_DYN_BASE
273 #define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
274 #endif
276 #endif /* _ASM_ELF_H */