include/asm-ia64/sn/ksys/l1.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc.  All Rights Reserved.
   7  */
   8
   9 #ifndef _ASM_IA64_SN_KSYS_L1_H
  10 #define _ASM_IA64_SN_KSYS_L1_H
  11
  12 #include <asm/sn/types.h>
  13
  14 /* L1 Target Addresses */
  15 /*
  16  * L1 commands and responses use source/target addresses that are
  17  * 32 bits long.  These are broken up into multiple bitfields that
  18  * specify the type of the target controller (could actually be L2
  19  * L3, not just L1), the rack and bay of the target, and the task
  20  * id (L1 functionality is divided into several independent "tasks"
  21  * that can each receive command requests and transmit responses)
  22  */
  23 #define L1_ADDR_TYPE_L1         0x00    /* L1 system controller */
  24 #define L1_ADDR_TYPE_L2         0x01    /* L2 system controller */
  25 #define L1_ADDR_TYPE_L3         0x02    /* L3 system controller */
  26 #define L1_ADDR_TYPE_CBRICK     0x03    /* attached C brick     */
  27 #define L1_ADDR_TYPE_IOBRICK    0x04    /* attached I/O brick   */
  28 #define L1_ADDR_TASK_SHFT       0
  29 #define L1_ADDR_TASK_MASK       0x0000001F
  30 #define L1_ADDR_TASK_INVALID    0x00    /* invalid task         */
  31 #define L1_ADDR_TASK_IROUTER    0x01    /* iRouter              */
  32 #define L1_ADDR_TASK_SYS_MGMT   0x02    /* system management port */
  33 #define L1_ADDR_TASK_CMD        0x03    /* command interpreter  */
  34 #define L1_ADDR_TASK_ENV        0x04    /* environmental monitor */
  35 #define L1_ADDR_TASK_BEDROCK    0x05    /* bedrock              */
  36 #define L1_ADDR_TASK_GENERAL    0x06    /* general requests     */
  37
  38 /* response argument types */
  39 #define L1_ARG_INT              0x00    /* 4-byte integer (big-endian)  */
  40 #define L1_ARG_ASCII            0x01    /* null-terminated ASCII string */
  41 #define L1_ARG_UNKNOWN          0x80    /* unknown data type.  The low
  42                                          * 7 bits will contain the data
  43                                          * length.                      */
  44
  45 /* response codes */
  46 #define L1_RESP_OK          0   /* no problems encountered      */
  47 #define L1_RESP_IROUTER (-  1)  /* iRouter error                */
  48 #define L1_RESP_ARGC    (-100)  /* arg count mismatch           */
  49 #define L1_RESP_REQC    (-101)  /* bad request code             */
  50 #define L1_RESP_NAVAIL  (-104)  /* requested data not available */
  51 #define L1_RESP_ARGVAL  (-105)  /* arg value out of range       */
  52 #define L1_RESP_INVAL   (-107)  /* requested data invalid       */
  53
  54 /* L1 general requests */
  55
  56 /* request codes */
  57 #define L1_REQ_RDBG             0x0001  /* read debug switches  */
  58 #define L1_REQ_RRACK            0x0002  /* read brick rack & bay */
  59 #define L1_REQ_RRBT             0x0003  /* read brick rack, bay & type */
  60 #define L1_REQ_SER_NUM          0x0004  /* read brick serial number */
  61 #define L1_REQ_FW_REV           0x0005  /* read L1 firmware revision */
  62 #define L1_REQ_EEPROM           0x0006  /* read EEPROM info */
  63 #define L1_REQ_EEPROM_FMT       0x0007  /* get EEPROM data format & size */
  64 #define L1_REQ_SYS_SERIAL       0x0008  /* read system serial number */
  65 #define L1_REQ_PARTITION_GET    0x0009  /* read partition id */
  66 #define L1_REQ_PORTSPEED        0x000a  /* get ioport speed */
  67
  68 #define L1_REQ_CONS_SUBCH       0x1002  /* select this node's console
  69                                            subchannel */
  70 #define L1_REQ_CONS_NODE        0x1003  /* volunteer to be the master
  71                                            (console-hosting) node */
  72 #define L1_REQ_DISP1            0x1004  /* write line 1 of L1 display */
  73 #define L1_REQ_DISP2            0x1005  /* write line 2 of L1 display */
  74 #define L1_REQ_PARTITION_SET    0x1006  /* set partition id */
  75 #define L1_REQ_EVENT_SUBCH      0x1007  /* set the subchannel for system
  76                                            controller event transmission */
  77
  78 #define L1_REQ_RESET            0x2000  /* request a full system reset */
  79 #define L1_REQ_PCI_UP           0x2001  /* power up pci slot or bus */
  80 #define L1_REQ_PCI_DOWN         0x2002  /* power down pci slot or bus */
  81 #define L1_REQ_PCI_RESET        0x2003  /* reset pci bus or slot */
  82
  83 /* L1 command interpreter requests */
  84
  85 /* request codes */
  86 #define L1_REQ_EXEC_CMD         0x0000  /* interpret and execute an ASCII
  87                                            command string */
  88
  89 /* brick type response codes */
  90 #define L1_BRICKTYPE_PX         0x23            /* # */
  91 #define L1_BRICKTYPE_PE         0x25            /* % */
  92 #define L1_BRICKTYPE_N_p0       0x26            /* & */
  93 #define L1_BRICKTYPE_IP45       0x34            /* 4 */
  94 #define L1_BRICKTYPE_IP41       0x35            /* 5 */
  95 #define L1_BRICKTYPE_TWISTER    0x36            /* 6 */ /* IP53 & ROUTER */
  96 #define L1_BRICKTYPE_IX         0x3d            /* = */
  97 #define L1_BRICKTYPE_IP34       0x61            /* a */
  98 #define L1_BRICKTYPE_C          0x63            /* c */
  99 #define L1_BRICKTYPE_I          0x69            /* i */
 100 #define L1_BRICKTYPE_N          0x6e            /* n */
 101 #define L1_BRICKTYPE_OPUS       0x6f            /* o */
 102 #define L1_BRICKTYPE_P          0x70            /* p */
 103 #define L1_BRICKTYPE_R          0x72            /* r */
 104 #define L1_BRICKTYPE_CHI_CG     0x76            /* v */
 105 #define L1_BRICKTYPE_X          0x78            /* x */
 106 #define L1_BRICKTYPE_X2         0x79            /* y */
 107
 108 /* EEPROM codes (for the "read EEPROM" request) */
 109 /* c brick */
 110 #define L1_EEP_NODE             0x00    /* node board */
 111 #define L1_EEP_PIMM0            0x01
 112 #define L1_EEP_PIMM(x)          (L1_EEP_PIMM0+(x))
 113 #define L1_EEP_DIMM0            0x03
 114 #define L1_EEP_DIMM(x)          (L1_EEP_DIMM0+(x))
 115
 116 /* other brick types */
 117 #define L1_EEP_POWER            0x00    /* power board */
 118 #define L1_EEP_LOGIC            0x01    /* logic board */
 119
 120 /* info area types */
 121 #define L1_EEP_CHASSIS          1       /* chassis info area */
 122 #define L1_EEP_BOARD            2       /* board info area */
 123 #define L1_EEP_IUSE             3       /* internal use area */
 124 #define L1_EEP_SPD              4       /* serial presence detect record */
 125
 126 #define L1_DISPLAY_LINE_LENGTH  12      /* L1 display characters/line */
 127
 128 #ifdef L1_DISP_2LINES
 129 #define L1_DISPLAY_LINES        2       /* number of L1 display lines */
 130 #else
 131 #define L1_DISPLAY_LINES        1       /* number of L1 display lines available
 132                                          * to system software */
 133 #endif
 134
 135 int     elsc_display_line(nasid_t nasid, char *line, int lnum);
 136 int     iobrick_rack_bay_type_get( nasid_t nasid, unsigned int *rack,
 137                                    unsigned int *bay, unsigned int *brick_type );
 138 int     iomoduleid_get( nasid_t nasid );
 139
 140
 141 #endif /* _ASM_IA64_SN_KSYS_L1_H */