include/asm-arm/spinlock.h

   1 #ifndef __ASM_SPINLOCK_H
   2 #define __ASM_SPINLOCK_H
   3
   4 #if __LINUX_ARM_ARCH__ < 6
   5 #error SMP not supported on pre-ARMv6 CPUs
   6 #endif
   7
   8 /*
   9  * ARMv6 Spin-locking.
  10  *
  11  * We (exclusively) read the old value, and decrement it.  If it
  12  * hits zero, we may have won the lock, so we try (exclusively)
  13  * storing it.
  14  *
  15  * Unlocked value: 0
  16  * Locked value: 1
  17  */
  18 typedef struct {
  19         volatile unsigned int lock;
  20 } spinlock_t;
  21
  22 #define SPIN_LOCK_UNLOCKED      (spinlock_t) { 0 }
  23
  24 #define spin_lock_init(x)       do { *(x) = SPIN_LOCK_UNLOCKED; } while (0)
  25 #define spin_is_locked(x)       ((x)->lock != 0)
  26 #define spin_unlock_wait(x)     do { barrier(); } while (spin_is_locked(x))
  27 #define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock)
  28
  29 static inline void _raw_spin_lock(spinlock_t *lock)
  30 {
  31         unsigned long tmp;
  32
  33         __asm__ __volatile__(
  34 "1:     ldrex   %0, [%1]\n"
  35 "       teq     %0, #0\n"
  36 "       strexeq %0, %2, [%1]\n"
  37 "       teqeq   %0, #0\n"
  38 "       bne     1b"
  39         : "=&r" (tmp)
  40         : "r" (&lock->lock), "r" (1)
  41         : "cc", "memory");
  42 }
  43
  44 static inline int _raw_spin_trylock(spinlock_t *lock)
  45 {
  46         unsigned long tmp;
  47
  48         __asm__ __volatile__(
  49 "       ldrex   %0, [%1]\n"
  50 "       teq     %0, #0\n"
  51 "       strexeq %0, %2, [%1]"
  52         : "=&r" (tmp)
  53         : "r" (&lock->lock), "r" (1)
  54         : "cc", "memory");
  55
  56         return tmp == 0;
  57 }
  58
  59 static inline void _raw_spin_unlock(spinlock_t *lock)
  60 {
  61         __asm__ __volatile__(
  62 "       str     %1, [%0]"
  63         :
  64         : "r" (&lock->lock), "r" (0)
  65         : "cc", "memory");
  66 }
  67
  68 /*
  69  * RWLOCKS
  70  */
  71 typedef struct {
  72         volatile unsigned int lock;
  73 } rwlock_t;
  74
  75 #define RW_LOCK_UNLOCKED        (rwlock_t) { 0 }
  76 #define rwlock_init(x)          do { *(x) + RW_LOCK_UNLOCKED; } while (0)
  77
  78 /*
  79  * Write locks are easy - we just set bit 31.  When unlocking, we can
  80  * just write zero since the lock is exclusively held.
  81  */
  82 static inline void _raw_write_lock(rwlock_t *rw)
  83 {
  84         unsigned long tmp;
  85
  86         __asm__ __volatile__(
  87 "1:     ldrex   %0, [%1]\n"
  88 "       teq     %0, #0\n"
  89 "       strexeq %0, %2, [%1]\n"
  90 "       teq     %0, #0\n"
  91 "       bne     1b"
  92         : "=&r" (tmp)
  93         : "r" (&rw->lock), "r" (0x80000000)
  94         : "cc", "memory");
  95 }
  96
  97 static inline void _raw_write_unlock(rwlock_t *rw)
  98 {
  99         __asm__ __volatile__(
 100         "str    %1, [%0]"
 101         :
 102         : "r" (&rw->lock), "r" (0)
 103         : "cc", "memory");
 104 }
 105
 106 /*
 107  * Read locks are a bit more hairy:
 108  *  - Exclusively load the lock value.
 109  *  - Increment it.
 110  *  - Store new lock value if positive, and we still own this location.
 111  *    If the value is negative, we've already failed.
 112  *  - If we failed to store the value, we want a negative result.
 113  *  - If we failed, try again.
 114  * Unlocking is similarly hairy.  We may have multiple read locks
 115  * currently active.  However, we know we won't have any write
 116  * locks.
 117  */
 118 static inline void _raw_read_lock(rwlock_t *rw)
 119 {
 120         unsigned long tmp, tmp2;
 121
 122         __asm__ __volatile__(
 123 "1:     ldrex   %0, [%2]\n"
 124 "       adds    %0, %0, #1\n"
 125 "       strexpl %1, %0, [%2]\n"
 126 "       rsbpls  %0, %1, #0\n"
 127 "       bmi     1b"
 128         : "=&r" (tmp), "=&r" (tmp2)
 129         : "r" (&rw->lock)
 130         : "cc", "memory");
 131 }
 132
 133 static inline void _raw_read_unlock(rwlock_t *rw)
 134 {
 135         __asm__ __volatile__(
 136 "1:     ldrex   %0, [%2]\n"
 137 "       sub     %0, %0, #1\n"
 138 "       strex   %1, %0, [%2]\n"
 139 "       teq     %1, #0\n"
 140 "       bne     1b"
 141         : "=&r" (tmp), "=&r" (tmp2)
 142         : "r" (&rw->lock)
 143         : "cc", "memory");
 144 }
 145
 146 static inline int _raw_write_trylock(rwlock_t *rw)
 147 {
 148         unsigned long tmp;
 149
 150         __asm__ __volatile__(
 151 "1:     ldrex   %0, [%1]\n"
 152 "       teq     %0, #0\n"
 153 "       strexeq %0, %2, [%1]"
 154         : "=&r" (tmp)
 155         : "r" (&rw->lock), "r" (0x80000000)
 156         : "cc", "memory");
 157
 158         return tmp == 0;
 159 }
 160
 161 #endif /* __ASM_SPINLOCK_H */