2 * linux/include/asm-arm/ptrace.h
4 * Copyright (C) 1996-2003 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #ifndef __ASM_ARM_PTRACE_H
11 #define __ASM_ARM_PTRACE_H
13 #include <linux/config.h>
15 #define PTRACE_GETREGS 12
16 #define PTRACE_SETREGS 13
17 #define PTRACE_GETFPREGS 14
18 #define PTRACE_SETFPREGS 15
20 #define PTRACE_OLDSETOPTIONS 21
25 #define USR26_MODE 0x00000000
26 #define FIQ26_MODE 0x00000001
27 #define IRQ26_MODE 0x00000002
28 #define SVC26_MODE 0x00000003
29 #define USR_MODE 0x00000010
30 #define FIQ_MODE 0x00000011
31 #define IRQ_MODE 0x00000012
32 #define SVC_MODE 0x00000013
33 #define ABT_MODE 0x00000017
34 #define UND_MODE 0x0000001b
35 #define SYSTEM_MODE 0x0000001f
36 #define MODE32_BIT 0x00000010
37 #define MODE_MASK 0x0000001f
38 #define PSR_T_BIT 0x00000020
39 #define PSR_F_BIT 0x00000040
40 #define PSR_I_BIT 0x00000080
41 #define PSR_J_BIT 0x01000000
42 #define PSR_Q_BIT 0x08000000
43 #define PSR_V_BIT 0x10000000
44 #define PSR_C_BIT 0x20000000
45 #define PSR_Z_BIT 0x40000000
46 #define PSR_N_BIT 0x80000000
52 #define PSR_f 0xff000000 /* Flags */
53 #define PSR_s 0x00ff0000 /* Status */
54 #define PSR_x 0x0000ff00 /* Extension */
55 #define PSR_c 0x000000ff /* Control */
59 /* this struct defines the way the registers are stored on the
60 stack during a system call. */
66 #define ARM_cpsr uregs[16]
67 #define ARM_pc uregs[15]
68 #define ARM_lr uregs[14]
69 #define ARM_sp uregs[13]
70 #define ARM_ip uregs[12]
71 #define ARM_fp uregs[11]
72 #define ARM_r10 uregs[10]
73 #define ARM_r9 uregs[9]
74 #define ARM_r8 uregs[8]
75 #define ARM_r7 uregs[7]
76 #define ARM_r6 uregs[6]
77 #define ARM_r5 uregs[5]
78 #define ARM_r4 uregs[4]
79 #define ARM_r3 uregs[3]
80 #define ARM_r2 uregs[2]
81 #define ARM_r1 uregs[1]
82 #define ARM_r0 uregs[0]
83 #define ARM_ORIG_r0 uregs[17]
87 #define user_mode(regs) \
88 (((regs)->ARM_cpsr & 0xf) == 0)
90 #ifdef CONFIG_ARM_THUMB
91 #define thumb_mode(regs) \
92 (((regs)->ARM_cpsr & PSR_T_BIT))
94 #define thumb_mode(regs) (0)
97 #define processor_mode(regs) \
98 ((regs)->ARM_cpsr & MODE_MASK)
100 #define interrupts_enabled(regs) \
101 (!((regs)->ARM_cpsr & PSR_I_BIT))
103 #define fast_interrupts_enabled(regs) \
104 (!((regs)->ARM_cpsr & PSR_F_BIT))
106 #define condition_codes(regs) \
107 ((regs)->ARM_cpsr & (PSR_V_BIT|PSR_C_BIT|PSR_Z_BIT|PSR_N_BIT))
109 /* Are the current registers suitable for user mode?
110 * (used to maintain security in signal handlers)
112 static inline int valid_user_regs(struct pt_regs
*regs
)
114 if (user_mode(regs
) &&
115 (regs
->ARM_cpsr
& (PSR_F_BIT
|PSR_I_BIT
)) == 0)
119 * Force CPSR to something logical...
121 regs
->ARM_cpsr
&= PSR_f
| PSR_s
| PSR_x
| PSR_T_BIT
| MODE32_BIT
;
126 #endif /* __KERNEL__ */
128 #define pc_pointer(v) \
131 #define instruction_pointer(regs) \
132 (pc_pointer((regs)->ARM_pc))
135 extern unsigned long profile_pc(struct pt_regs
*regs
);
137 #define profile_pc(regs) instruction_pointer(regs)
141 extern void show_regs(struct pt_regs
*);
143 #define predicate(x) (x & 0xf0000000)
144 #define PREDICATE_ALWAYS 0xe0000000
148 #endif /* __ASSEMBLY__ */