include/asm-arm/io.h

   1 /*
   2  *  linux/include/asm-arm/io.h
   3  *
   4  *  Copyright (C) 1996-2000 Russell King
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * Modifications:
  11  *  16-Sep-1996 RMK     Inlined the inx/outx functions & optimised for both
  12  *                      constant addresses and variable addresses.
  13  *  04-Dec-1997 RMK     Moved a lot of this stuff to the new architecture
  14  *                      specific IO header files.
  15  *  27-Mar-1999 PJB     Second parameter of memcpy_toio is const..
  16  *  04-Apr-1999 PJB     Added check_signature.
  17  *  12-Dec-1999 RMK     More cleanups
  18  *  18-Jun-2000 RMK     Removed virt_to_* and friends definitions
  19  */
  20 #ifndef __ASM_ARM_IO_H
  21 #define __ASM_ARM_IO_H
  22
  23 #ifdef __KERNEL__
  24
  25 #include <linux/types.h>
  26 #include <asm/byteorder.h>
  27 #include <asm/memory.h>
  28 #include <asm/arch/hardware.h>
  29
  30 /*
  31  * ISA I/O bus memory addresses are 1:1 with the physical address.
  32  */
  33 #define isa_virt_to_bus virt_to_phys
  34 #define isa_page_to_bus page_to_phys
  35 #define isa_bus_to_virt phys_to_virt
  36
  37 /*
  38  * Generic IO read/write.  These perform native-endian accesses.  Note
  39  * that some architectures will want to re-define __raw_{read,write}w.
  40  */
  41 extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
  42 extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
  43 extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
  44
  45 extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
  46 extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
  47 extern void __raw_readsl(unsigned int addr, void *data, int longlen);
  48
  49 #define __raw_writeb(v,a)       (*(volatile unsigned char  *)(a) = (v))
  50 #define __raw_writew(v,a)       (*(volatile unsigned short *)(a) = (v))
  51 #define __raw_writel(v,a)       (*(volatile unsigned int   *)(a) = (v))
  52
  53 #define __raw_readb(a)          (*(volatile unsigned char  *)(a))
  54 #define __raw_readw(a)          (*(volatile unsigned short *)(a))
  55 #define __raw_readl(a)          (*(volatile unsigned int   *)(a))
  56
  57 /*
  58  * Bad read/write accesses...
  59  */
  60 extern void __readwrite_bug(const char *fn);
  61
  62 /*
  63  * Now, pick up the machine-defined IO definitions
  64  */
  65 #include <asm/arch/io.h>
  66
  67 #ifdef __io_pci
  68 #warning machine class uses buggy __io_pci
  69 #endif
  70 #if defined(__arch_putb) || defined(__arch_putw) || defined(__arch_putl) || \
  71     defined(__arch_getb) || defined(__arch_getw) || defined(__arch_getl)
  72 #warning machine class uses old __arch_putw or __arch_getw
  73 #endif
  74
  75 /*
  76  *  IO port access primitives
  77  *  -------------------------
  78  *
  79  * The ARM doesn't have special IO access instructions; all IO is memory
  80  * mapped.  Note that these are defined to perform little endian accesses
  81  * only.  Their primary purpose is to access PCI and ISA peripherals.
  82  *
  83  * Note that for a big endian machine, this implies that the following
  84  * big endian mode connectivity is in place, as described by numerious
  85  * ARM documents:
  86  *
  87  *    PCI:  D0-D7   D8-D15 D16-D23 D24-D31
  88  *    ARM: D24-D31 D16-D23  D8-D15  D0-D7
  89  *
  90  * The machine specific io.h include defines __io to translate an "IO"
  91  * address to a memory address.
  92  *
  93  * Note that we prevent GCC re-ordering or caching values in expressions
  94  * by introducing sequence points into the in*() definitions.  Note that
  95  * __raw_* do not guarantee this behaviour.
  96  *
  97  * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
  98  */
  99 #ifdef __io
 100 #define outb(v,p)               __raw_writeb(v,__io(p))
 101 #define outw(v,p)               __raw_writew(cpu_to_le16(v),__io(p))
 102 #define outl(v,p)               __raw_writel(cpu_to_le32(v),__io(p))
 103
 104 #define inb(p)  ({ unsigned int __v = __raw_readb(__io(p)); __v; })
 105 #define inw(p)  ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
 106 #define inl(p)  ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
 107
 108 #define outsb(p,d,l)            __raw_writesb(__io(p),d,l)
 109 #define outsw(p,d,l)            __raw_writesw(__io(p),d,l)
 110 #define outsl(p,d,l)            __raw_writesl(__io(p),d,l)
 111
 112 #define insb(p,d,l)             __raw_readsb(__io(p),d,l)
 113 #define insw(p,d,l)             __raw_readsw(__io(p),d,l)
 114 #define insl(p,d,l)             __raw_readsl(__io(p),d,l)
 115 #endif
 116
 117 #define outb_p(val,port)        outb((val),(port))
 118 #define outw_p(val,port)        outw((val),(port))
 119 #define outl_p(val,port)        outl((val),(port))
 120 #define inb_p(port)             inb((port))
 121 #define inw_p(port)             inw((port))
 122 #define inl_p(port)             inl((port))
 123
 124 #define outsb_p(port,from,len)  outsb(port,from,len)
 125 #define outsw_p(port,from,len)  outsw(port,from,len)
 126 #define outsl_p(port,from,len)  outsl(port,from,len)
 127 #define insb_p(port,to,len)     insb(port,to,len)
 128 #define insw_p(port,to,len)     insw(port,to,len)
 129 #define insl_p(port,to,len)     insl(port,to,len)
 130
 131 /*
 132  * String version of IO memory access ops:
 133  */
 134 extern void _memcpy_fromio(void *, unsigned long, size_t);
 135 extern void _memcpy_toio(unsigned long, const void *, size_t);
 136 extern void _memset_io(unsigned long, int, size_t);
 137
 138 /*
 139  *  Memory access primitives
 140  *  ------------------------
 141  *
 142  * These perform PCI memory accesses via an ioremap region.  They don't
 143  * take an address as such, but a cookie.
 144  *
 145  * Again, this are defined to perform little endian accesses.  See the
 146  * IO port primitives for more information.
 147  */
 148 #ifdef __mem_pci
 149 #define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; })
 150 #define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
 151 #define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
 152 #define readb_relaxed(addr) readb(addr)
 153 #define readw_relaxed(addr) readw(addr)
 154 #define readl_relaxed(addr) readl(addr)
 155
 156 #define readsb(p,d,l)           __raw_readsb((unsigned int)__mem_pci(p),d,l)
 157 #define readsw(p,d,l)           __raw_readsw((unsigned int)__mem_pci(p),d,l)
 158 #define readsl(p,d,l)           __raw_readsl((unsigned int)__mem_pci(p),d,l)
 159
 160 #define writeb(v,c)             __raw_writeb(v,__mem_pci(c))
 161 #define writew(v,c)             __raw_writew(cpu_to_le16(v),__mem_pci(c))
 162 #define writel(v,c)             __raw_writel(cpu_to_le32(v),__mem_pci(c))
 163
 164 #define writesb(p,d,l)          __raw_writesb((unsigned int)__mem_pci(p),d,l)
 165 #define writesw(p,d,l)          __raw_writesw((unsigned int)__mem_pci(p),d,l)
 166 #define writesl(p,d,l)          __raw_writesl((unsigned int)__mem_pci(p),d,l)
 167
 168 #define memset_io(c,v,l)        _memset_io(__mem_pci(c),(v),(l))
 169 #define memcpy_fromio(a,c,l)    _memcpy_fromio((a),__mem_pci(c),(l))
 170 #define memcpy_toio(c,a,l)      _memcpy_toio(__mem_pci(c),(a),(l))
 171
 172 #define eth_io_copy_and_sum(s,c,l,b) \
 173                                 eth_copy_and_sum((s),__mem_pci(c),(l),(b))
 174
 175 static inline int
 176 check_signature(unsigned long io_addr, const unsigned char *signature,
 177                 int length)
 178 {
 179         int retval = 0;
 180         do {
 181                 if (readb(io_addr) != *signature)
 182                         goto out;
 183                 io_addr++;
 184                 signature++;
 185                 length--;
 186         } while (length);
 187         retval = 1;
 188 out:
 189         return retval;
 190 }
 191
 192 #elif !defined(readb)
 193
 194 #define readb(c)                        (__readwrite_bug("readb"),0)
 195 #define readw(c)                        (__readwrite_bug("readw"),0)
 196 #define readl(c)                        (__readwrite_bug("readl"),0)
 197 #define writeb(v,c)                     __readwrite_bug("writeb")
 198 #define writew(v,c)                     __readwrite_bug("writew")
 199 #define writel(v,c)                     __readwrite_bug("writel")
 200
 201 #define eth_io_copy_and_sum(s,c,l,b)    __readwrite_bug("eth_io_copy_and_sum")
 202
 203 #define check_signature(io,sig,len)     (0)
 204
 205 #endif  /* __mem_pci */
 206
 207 /*
 208  * If this architecture has ISA IO, then define the isa_read/isa_write
 209  * macros.
 210  */
 211 #ifdef __mem_isa
 212
 213 #define isa_readb(addr)                 __raw_readb(__mem_isa(addr))
 214 #define isa_readw(addr)                 __raw_readw(__mem_isa(addr))
 215 #define isa_readl(addr)                 __raw_readl(__mem_isa(addr))
 216 #define isa_writeb(val,addr)            __raw_writeb(val,__mem_isa(addr))
 217 #define isa_writew(val,addr)            __raw_writew(val,__mem_isa(addr))
 218 #define isa_writel(val,addr)            __raw_writel(val,__mem_isa(addr))
 219 #define isa_memset_io(a,b,c)            _memset_io(__mem_isa(a),(b),(c))
 220 #define isa_memcpy_fromio(a,b,c)        _memcpy_fromio((a),__mem_isa(b),(c))
 221 #define isa_memcpy_toio(a,b,c)          _memcpy_toio(__mem_isa((a)),(b),(c))
 222
 223 #define isa_eth_io_copy_and_sum(a,b,c,d) \
 224                                 eth_copy_and_sum((a),__mem_isa(b),(c),(d))
 225
 226 static inline int
 227 isa_check_signature(unsigned long io_addr, const unsigned char *signature,
 228                     int length)
 229 {
 230         int retval = 0;
 231         do {
 232                 if (isa_readb(io_addr) != *signature)
 233                         goto out;
 234                 io_addr++;
 235                 signature++;
 236                 length--;
 237         } while (length);
 238         retval = 1;
 239 out:
 240         return retval;
 241 }
 242
 243 #else   /* __mem_isa */
 244
 245 #define isa_readb(addr)                 (__readwrite_bug("isa_readb"),0)
 246 #define isa_readw(addr)                 (__readwrite_bug("isa_readw"),0)
 247 #define isa_readl(addr)                 (__readwrite_bug("isa_readl"),0)
 248 #define isa_writeb(val,addr)            __readwrite_bug("isa_writeb")
 249 #define isa_writew(val,addr)            __readwrite_bug("isa_writew")
 250 #define isa_writel(val,addr)            __readwrite_bug("isa_writel")
 251 #define isa_memset_io(a,b,c)            __readwrite_bug("isa_memset_io")
 252 #define isa_memcpy_fromio(a,b,c)        __readwrite_bug("isa_memcpy_fromio")
 253 #define isa_memcpy_toio(a,b,c)          __readwrite_bug("isa_memcpy_toio")
 254
 255 #define isa_eth_io_copy_and_sum(a,b,c,d) \
 256                                 __readwrite_bug("isa_eth_io_copy_and_sum")
 257
 258 #define isa_check_signature(io,sig,len) (0)
 259
 260 #endif  /* __mem_isa */
 261
 262 /*
 263  * ioremap and friends.
 264  *
 265  * ioremap takes a PCI memory address, as specified in
 266  * Documentation/IO-mapping.txt.
 267  */
 268 extern void * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
 269 extern void __iounmap(void *addr);
 270
 271 #ifndef __arch_ioremap
 272 #define ioremap(cookie,size)            __ioremap(cookie,size,0,1)
 273 #define ioremap_nocache(cookie,size)    __ioremap(cookie,size,0,1)
 274 #define ioremap_cached(cookie,size)     __ioremap(cookie,size,L_PTE_CACHEABLE,1)
 275 #define iounmap(cookie)                 __iounmap(cookie)
 276 #else
 277 #define ioremap(cookie,size)            __arch_ioremap((cookie),(size),0,1)
 278 #define ioremap_nocache(cookie,size)    __arch_ioremap((cookie),(size),0,1)
 279 #define ioremap_cached(cookie,size)     __arch_ioremap((cookie),(size),L_PTE_CACHEABLE,1)
 280 #define iounmap(cookie)                 __arch_iounmap(cookie)
 281 #endif
 282
 283 /*
 284  * can the hardware map this into one segment or not, given no other
 285  * constraints.
 286  */
 287 #define BIOVEC_MERGEABLE(vec1, vec2)    \
 288         ((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2)))
 289
 290 #endif  /* __KERNEL__ */
 291 #endif  /* __ASM_ARM_IO_H */