include/asm-arm/arch-s3c2410/system.h

   1 /* linux/include/asm-arm/arch-s3c2410/system.h
   2  *
   3  * (c) 2003 Simtec Electronics
   4  *  Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * S3C2410 - System function defines and includes
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Changelog:
  13  *  12-May-2003 BJD  Created file
  14  *  14-May-2003 BJD  Removed idle to aid debugging
  15  *  12-Jun-2003 BJD  Added reset via watchdog
  16  *  04-Sep-2003 BJD  Moved to v2.6
  17  */
  18
  19 #include <asm/hardware.h>
  20 #include <asm/io.h>
  21
  22 #include <asm/arch/map.h>
  23
  24 #include <asm/arch/regs-watchdog.h>
  25 #include <asm/arch/regs-clock.h>
  26
  27 extern void printascii(const char *);
  28
  29 void
  30 arch_idle(void)
  31 {
  32         //unsigned long reg = S3C2410_CLKCON;
  33
  34         //printascii("arch_idle:\n");
  35
  36         /* idle the system by using the idle mode which will wait for an
  37          * interrupt to happen before restarting the system.
  38          */
  39
  40         /* going into idle state upsets the jtag, so don't do it
  41          * at the moment */
  42
  43 #if 0
  44         __raw_writel(__raw_readl(reg) | (1<<2), reg);
  45
  46         /* the samsung port seems to do a loop and then unset idle.. */
  47         for (i = 0; i < 50; i++) {
  48                 tmp = __raw_readl(reg); /* ensure loop not optimised out */
  49         }
  50
  51         //printascii("arch_idle: done\n");
  52
  53         __raw_writel(__raw_readl(reg) & ~(1<<2), reg);
  54 #endif
  55 }
  56
  57
  58 static void
  59 arch_reset(char mode)
  60 {
  61         if (mode == 's') {
  62                 cpu_reset(0);
  63         }
  64
  65         printk("arch_reset: attempting watchdog reset\n");
  66
  67         __raw_writel(0, S3C2410_WTCON);   /* disable watchdog, to be safe  */
  68
  69         /* put initial values into count and data */
  70         __raw_writel(0x100, S3C2410_WTCNT);
  71         __raw_writel(0x100, S3C2410_WTDAT);
  72
  73         /* set the watchdog to go and reset... */
  74         __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
  75                      S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON);
  76
  77         /* wait for reset to assert... */
  78         mdelay(5000);
  79
  80         panic("Watchdog reset failed to assert reset\n");
  81
  82         /* we'll take a jump through zero as a poor second */
  83         cpu_reset(0);
  84 }