initial commit with v2.6.9
[linux-2.6.9-moxart.git] / drivers / video / riva / rivafb-i2c.c
blob4b72002c0e45a02d3dc17efb144fcddfdf131c7e
1 /*
2 * linux/drivers/video/riva/fbdev-i2c.c - nVidia i2c
4 * Maintained by Ani Joshi <ajoshi@shell.unixbox.com>
6 * Copyright 2004 Antonino A. Daplas <adaplas @pol.net>
8 * Based on radeonfb-i2c.c
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive
12 * for more details.
15 #include <linux/config.h>
16 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/sched.h>
19 #include <linux/delay.h>
20 #include <linux/pci.h>
21 #include <linux/fb.h>
23 #include <asm/io.h>
25 #include "rivafb.h"
26 #include "../edid.h"
28 #define RIVA_DDC 0x50
30 static void riva_gpio_setscl(void* data, int state)
32 struct riva_i2c_chan *chan = (struct riva_i2c_chan *)data;
33 struct riva_par *par = chan->par;
34 u32 val;
36 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
37 val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0;
39 if (state)
40 val |= 0x20;
41 else
42 val &= ~0x20;
44 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
45 VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1);
48 static void riva_gpio_setsda(void* data, int state)
50 struct riva_i2c_chan *chan = (struct riva_i2c_chan *)data;
51 struct riva_par *par = chan->par;
52 u32 val;
54 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
55 val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0;
57 if (state)
58 val |= 0x10;
59 else
60 val &= ~0x10;
62 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1);
63 VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1);
66 static int riva_gpio_getscl(void* data)
68 struct riva_i2c_chan *chan = (struct riva_i2c_chan *)data;
69 struct riva_par *par = chan->par;
70 u32 val = 0;
72 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base);
73 if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x04)
74 val = 1;
76 val = VGA_RD08(par->riva.PCIO, 0x3d5);
78 return val;
81 static int riva_gpio_getsda(void* data)
83 struct riva_i2c_chan *chan = (struct riva_i2c_chan *)data;
84 struct riva_par *par = chan->par;
85 u32 val = 0;
87 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base);
88 if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x08)
89 val = 1;
91 return val;
94 #define I2C_ALGO_RIVA 0x0e0000
95 static int riva_setup_i2c_bus(struct riva_i2c_chan *chan, const char *name)
97 int rc;
99 strcpy(chan->adapter.name, name);
100 chan->adapter.owner = THIS_MODULE;
101 chan->adapter.id = I2C_ALGO_RIVA;
102 chan->adapter.algo_data = &chan->algo;
103 chan->adapter.dev.parent = &chan->par->pdev->dev;
104 chan->algo.setsda = riva_gpio_setsda;
105 chan->algo.setscl = riva_gpio_setscl;
106 chan->algo.getsda = riva_gpio_getsda;
107 chan->algo.getscl = riva_gpio_getscl;
108 chan->algo.udelay = 40;
109 chan->algo.mdelay = 5;
110 chan->algo.timeout = 20;
111 chan->algo.data = chan;
113 i2c_set_adapdata(&chan->adapter, chan);
115 /* Raise SCL and SDA */
116 riva_gpio_setsda(chan, 1);
117 riva_gpio_setscl(chan, 1);
118 udelay(20);
120 rc = i2c_bit_add_bus(&chan->adapter);
121 if (rc == 0)
122 dev_dbg(&chan->par->pdev->dev, "I2C bus %s registered.\n", name);
123 else
124 dev_warn(&chan->par->pdev->dev, "Failed to register I2C bus %s.\n", name);
125 return rc;
128 void riva_create_i2c_busses(struct riva_par *par)
130 par->chan[0].par = par;
131 par->chan[1].par = par;
132 par->chan[2].par = par;
134 par->bus = 0;
136 switch ((par->pdev->device >> 4) & 0xff) {
137 case 0x17:
138 case 0x18:
139 case 0x25:
140 case 0x28:
141 case 0x30:
142 case 0x31:
143 case 0x32:
144 case 0x33:
145 case 0x34:
146 par->chan[2].ddc_base = 0x50;
147 par->bus++;
148 riva_setup_i2c_bus(&par->chan[2], "BUS3");
149 case 0x04:
150 case 0x05:
151 case 0x10:
152 case 0x11:
153 case 0x15:
154 case 0x20:
155 par->chan[1].ddc_base = 0x36;
156 par->bus++;
157 riva_setup_i2c_bus(&par->chan[1], "BUS2");
158 case 0x03:
159 par->chan[0].ddc_base = 0x3e;
160 par->bus++;
161 riva_setup_i2c_bus(&par->chan[0], "BUS1");
165 void riva_delete_i2c_busses(struct riva_par *par)
167 if (par->chan[0].par)
168 i2c_bit_del_bus(&par->chan[0].adapter);
169 par->chan[0].par = NULL;
171 if (par->chan[1].par)
172 i2c_bit_del_bus(&par->chan[1].adapter);
173 par->chan[1].par = NULL;
177 static u8 *riva_do_probe_i2c_edid(struct riva_i2c_chan *chan)
179 u8 start = 0x0;
180 struct i2c_msg msgs[] = {
182 .addr = RIVA_DDC,
183 .len = 1,
184 .buf = &start,
185 }, {
186 .addr = RIVA_DDC,
187 .flags = I2C_M_RD,
188 .len = EDID_LENGTH,
191 u8 *buf;
193 buf = kmalloc(EDID_LENGTH, GFP_KERNEL);
194 if (!buf) {
195 dev_warn(&chan->par->pdev->dev, "Out of memory!\n");
196 return NULL;
198 msgs[1].buf = buf;
200 if (i2c_transfer(&chan->adapter, msgs, 2) == 2)
201 return buf;
202 dev_dbg(&chan->par->pdev->dev, "Unable to read EDID block.\n");
203 kfree(buf);
204 return NULL;
207 int riva_probe_i2c_connector(struct riva_par *par, int conn, u8 **out_edid)
209 u8 *edid = NULL;
210 int i;
212 for (i = 0; i < 3; i++) {
213 /* Do the real work */
214 edid = riva_do_probe_i2c_edid(&par->chan[conn-1]);
215 if (edid)
216 break;
218 if (out_edid)
219 *out_edid = edid;
220 if (!edid)
221 return 1;
223 return 0;