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initial commit with v2.6.9
[linux-2.6.9-moxart.git] / drivers / serial / sunsu.c
blob2446dd664adf94003d4ca78e3f1a3d4c8d89c2c2
1 /* $Id: su.c,v 1.55 2002/01/08 16:00:16 davem Exp $
2 * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
3 *
4 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
6 *
7 * This is mainly a variation of 8250.c, credits go to authors mentioned
8 * therein. In fact this driver should be merged into the generic 8250.c
9 * infrastructure perhaps using a 8250_sparc.c module.
10 *
11 * Fixed to use tty_get_baud_rate().
12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
13 *
14 * Converted to new 2.5.x UART layer.
15 * David S. Miller (davem@redhat.com), 2002-Jul-29
16 */
17
18 #include <linux/config.h>
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/spinlock.h>
23 #include <linux/errno.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
26 #include <linux/major.h>
27 #include <linux/string.h>
28 #include <linux/ptrace.h>
29 #include <linux/ioport.h>
30 #include <linux/circ_buf.h>
31 #include <linux/serial.h>
32 #include <linux/sysrq.h>
33 #include <linux/console.h>
34 #ifdef CONFIG_SERIO
35 #include <linux/serio.h>
36 #endif
37 #include <linux/serial_reg.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40
41 #include <asm/io.h>
42 #include <asm/irq.h>
43 #include <asm/oplib.h>
44 #include <asm/ebus.h>
45 #ifdef CONFIG_SPARC64
46 #include <asm/isa.h>
47 #endif
48
49 #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
50 #define SUPPORT_SYSRQ
51 #endif
52
53 #include <linux/serial_core.h>
54
55 #include "suncore.h"
56
57 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
58 * in a UART clock of 1.8462 MHz.
59 */
60 #define SU_BASE_BAUD (1846200 / 16)
61
62 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
63 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
64
65 /*
66 * Here we define the default xmit fifo size used for each type of UART.
67 */
68 static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
69 { "unknown", 1, 0 },
70 { "8250", 1, 0 },
71 { "16450", 1, 0 },
72 { "16550", 1, 0 },
73 { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
74 { "Cirrus", 1, 0 },
75 { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
76 { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
77 { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
78 { "Startech", 1, 0 },
79 { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
80 { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
81 { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
82 { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
83 };
84
85 struct uart_sunsu_port {
86 struct uart_port port;
87 unsigned char acr;
88 unsigned char ier;
89 unsigned short rev;
90 unsigned char lcr;
91 unsigned int lsr_break_flag;
92 unsigned int cflag;
93
94 /* Probing information. */
95 enum su_type su_type;
96 unsigned int type_probed; /* XXX Stupid */
97 int port_node;
98 unsigned int irq;
99
100 #ifdef CONFIG_SERIO
101 struct serio *serio;
102 int serio_open;
103 #endif
104 };
105
106 #define _INLINE_
107
108 static _INLINE_ unsigned int serial_in(struct uart_sunsu_port *up, int offset)
109 {
110 offset <<= up->port.regshift;
111
112 switch (up->port.iotype) {
113 case SERIAL_IO_HUB6:
114 outb(up->port.hub6 - 1 + offset, up->port.iobase);
115 return inb(up->port.iobase + 1);
116
117 case SERIAL_IO_MEM:
118 return readb(up->port.membase + offset);
119
120 default:
121 return inb(up->port.iobase + offset);
122 }
123 }
124
125 static _INLINE_ void
126 serial_out(struct uart_sunsu_port *up, int offset, int value)
127 {
128 #ifndef CONFIG_SPARC64
129 /*
130 * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
131 * connected with a gate then go to SlavIO. When IRQ4 goes tristated
132 * gate outputs a logical one. Since we use level triggered interrupts
133 * we have lockup and watchdog reset. We cannot mask IRQ because
134 * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
135 * This problem is similar to what Alpha people suffer, see serial.c.
136 */
137 if (offset == UART_MCR)
138 value |= UART_MCR_OUT2;
139 #endif
140 offset <<= up->port.regshift;
141
142 switch (up->port.iotype) {
143 case SERIAL_IO_HUB6:
144 outb(up->port.hub6 - 1 + offset, up->port.iobase);
145 outb(value, up->port.iobase + 1);
146 break;
147
148 case SERIAL_IO_MEM:
149 writeb(value, up->port.membase + offset);
150 break;
151
152 default:
153 outb(value, up->port.iobase + offset);
154 }
155 }
156
157 /*
158 * We used to support using pause I/O for certain machines. We
159 * haven't supported this for a while, but just in case it's badly
160 * needed for certain old 386 machines, I've left these #define's
161 * in....
162 */
163 #define serial_inp(up, offset) serial_in(up, offset)
164 #define serial_outp(up, offset, value) serial_out(up, offset, value)
165
166
167 /*
168 * For the 16C950
169 */
170 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
171 {
172 serial_out(up, UART_SCR, offset);
173 serial_out(up, UART_ICR, value);
174 }
175
176 #if 0 /* Unused currently */
177 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
178 {
179 unsigned int value;
180
181 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
182 serial_out(up, UART_SCR, offset);
183 value = serial_in(up, UART_ICR);
184 serial_icr_write(up, UART_ACR, up->acr);
185
186 return value;
187 }
188 #endif
189
190 #ifdef CONFIG_SERIAL_8250_RSA
191 /*
192 * Attempts to turn on the RSA FIFO. Returns zero on failure.
193 * We set the port uart clock rate if we succeed.
194 */
195 static int __enable_rsa(struct uart_sunsu_port *up)
196 {
197 unsigned char mode;
198 int result;
199
200 mode = serial_inp(up, UART_RSA_MSR);
201 result = mode & UART_RSA_MSR_FIFO;
202
203 if (!result) {
204 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
205 mode = serial_inp(up, UART_RSA_MSR);
206 result = mode & UART_RSA_MSR_FIFO;
207 }
208
209 if (result)
210 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
211
212 return result;
213 }
214
215 static void enable_rsa(struct uart_sunsu_port *up)
216 {
217 if (up->port.type == PORT_RSA) {
218 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
219 spin_lock_irq(&up->port.lock);
220 __enable_rsa(up);
221 spin_unlock_irq(&up->port.lock);
222 }
223 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
224 serial_outp(up, UART_RSA_FRR, 0);
225 }
226 }
227
228 /*
229 * Attempts to turn off the RSA FIFO. Returns zero on failure.
230 * It is unknown why interrupts were disabled in here. However,
231 * the caller is expected to preserve this behaviour by grabbing
232 * the spinlock before calling this function.
233 */
234 static void disable_rsa(struct uart_sunsu_port *up)
235 {
236 unsigned char mode;
237 int result;
238
239 if (up->port.type == PORT_RSA &&
240 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
241 spin_lock_irq(&up->port.lock);
242
243 mode = serial_inp(up, UART_RSA_MSR);
244 result = !(mode & UART_RSA_MSR_FIFO);
245
246 if (!result) {
247 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
248 mode = serial_inp(up, UART_RSA_MSR);
249 result = !(mode & UART_RSA_MSR_FIFO);
250 }
251
252 if (result)
253 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
254 spin_unlock_irq(&up->port.lock);
255 }
256 }
257 #endif /* CONFIG_SERIAL_8250_RSA */
258
259 static void sunsu_stop_tx(struct uart_port *port, unsigned int tty_stop)
260 {
261 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
262
263 if (up->ier & UART_IER_THRI) {
264 up->ier &= ~UART_IER_THRI;
265 serial_out(up, UART_IER, up->ier);
266 }
267 if (up->port.type == PORT_16C950 && tty_stop) {
268 up->acr |= UART_ACR_TXDIS;
269 serial_icr_write(up, UART_ACR, up->acr);
270 }
271 }
272
273 static void sunsu_start_tx(struct uart_port *port, unsigned int tty_start)
274 {
275 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
276
277 if (!(up->ier & UART_IER_THRI)) {
278 up->ier |= UART_IER_THRI;
279 serial_out(up, UART_IER, up->ier);
280 }
281 /*
282 * We only do this from uart_start
283 */
284 if (tty_start && up->port.type == PORT_16C950) {
285 up->acr &= ~UART_ACR_TXDIS;
286 serial_icr_write(up, UART_ACR, up->acr);
287 }
288 }
289
290 static void sunsu_stop_rx(struct uart_port *port)
291 {
292 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
293 unsigned long flags;
294
295 spin_lock_irqsave(&up->port.lock, flags);
296 up->ier &= ~UART_IER_RLSI;
297 up->port.read_status_mask &= ~UART_LSR_DR;
298 serial_out(up, UART_IER, up->ier);
299 spin_unlock_irqrestore(&up->port.lock, flags);
300 }
301
302 static void sunsu_enable_ms(struct uart_port *port)
303 {
304 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
305 unsigned long flags;
306
307 spin_lock_irqsave(&up->port.lock, flags);
308 up->ier |= UART_IER_MSI;
309 serial_out(up, UART_IER, up->ier);
310 spin_unlock_irqrestore(&up->port.lock, flags);
311 }
312
313 static _INLINE_ struct tty_struct *
314 receive_chars(struct uart_sunsu_port *up, unsigned char *status, struct pt_regs *regs)
315 {
316 struct tty_struct *tty = up->port.info->tty;
317 unsigned char ch;
318 int max_count = 256;
319 int saw_console_brk = 0;
320
321 do {
322 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
323 tty->flip.work.func((void *)tty);
324 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
325 return tty; // if TTY_DONT_FLIP is set
326 }
327 ch = serial_inp(up, UART_RX);
328 *tty->flip.char_buf_ptr = ch;
329 *tty->flip.flag_buf_ptr = TTY_NORMAL;
330 up->port.icount.rx++;
331
332 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
333 UART_LSR_FE | UART_LSR_OE))) {
334 /*
335 * For statistics only
336 */
337 if (*status & UART_LSR_BI) {
338 *status &= ~(UART_LSR_FE | UART_LSR_PE);
339 up->port.icount.brk++;
340 if (up->port.cons != NULL &&
341 up->port.line == up->port.cons->index)
342 saw_console_brk = 1;
343 /*
344 * We do the SysRQ and SAK checking
345 * here because otherwise the break
346 * may get masked by ignore_status_mask
347 * or read_status_mask.
348 */
349 if (uart_handle_break(&up->port))
350 goto ignore_char;
351 } else if (*status & UART_LSR_PE)
352 up->port.icount.parity++;
353 else if (*status & UART_LSR_FE)
354 up->port.icount.frame++;
355 if (*status & UART_LSR_OE)
356 up->port.icount.overrun++;
357
358 /*
359 * Mask off conditions which should be ingored.
360 */
361 *status &= up->port.read_status_mask;
362
363 if (up->port.cons != NULL &&
364 up->port.line == up->port.cons->index) {
365 /* Recover the break flag from console xmit */
366 *status |= up->lsr_break_flag;
367 up->lsr_break_flag = 0;
368 }
369
370 if (*status & UART_LSR_BI) {
371 *tty->flip.flag_buf_ptr = TTY_BREAK;
372 } else if (*status & UART_LSR_PE)
373 *tty->flip.flag_buf_ptr = TTY_PARITY;
374 else if (*status & UART_LSR_FE)
375 *tty->flip.flag_buf_ptr = TTY_FRAME;
376 }
377 if (uart_handle_sysrq_char(&up->port, ch, regs))
378 goto ignore_char;
379 if ((*status & up->port.ignore_status_mask) == 0) {
380 tty->flip.flag_buf_ptr++;
381 tty->flip.char_buf_ptr++;
382 tty->flip.count++;
383 }
384 if ((*status & UART_LSR_OE) &&
385 tty->flip.count < TTY_FLIPBUF_SIZE) {
386 /*
387 * Overrun is special, since it's reported
388 * immediately, and doesn't affect the current
389 * character.
390 */
391 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
392 tty->flip.flag_buf_ptr++;
393 tty->flip.char_buf_ptr++;
394 tty->flip.count++;
395 }
396 ignore_char:
397 *status = serial_inp(up, UART_LSR);
398 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
399
400 if (saw_console_brk)
401 sun_do_break();
402
403 return tty;
404 }
405
406 static _INLINE_ void transmit_chars(struct uart_sunsu_port *up)
407 {
408 struct circ_buf *xmit = &up->port.info->xmit;
409 int count;
410
411 if (up->port.x_char) {
412 serial_outp(up, UART_TX, up->port.x_char);
413 up->port.icount.tx++;
414 up->port.x_char = 0;
415 return;
416 }
417 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
418 sunsu_stop_tx(&up->port, 0);
419 return;
420 }
421
422 count = up->port.fifosize;
423 do {
424 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
425 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
426 up->port.icount.tx++;
427 if (uart_circ_empty(xmit))
428 break;
429 } while (--count > 0);
430
431 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
432 uart_write_wakeup(&up->port);
433
434 if (uart_circ_empty(xmit))
435 sunsu_stop_tx(&up->port, 0);
436 }
437
438 static _INLINE_ void check_modem_status(struct uart_sunsu_port *up)
439 {
440 int status;
441
442 status = serial_in(up, UART_MSR);
443
444 if ((status & UART_MSR_ANY_DELTA) == 0)
445 return;
446
447 if (status & UART_MSR_TERI)
448 up->port.icount.rng++;
449 if (status & UART_MSR_DDSR)
450 up->port.icount.dsr++;
451 if (status & UART_MSR_DDCD)
452 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
453 if (status & UART_MSR_DCTS)
454 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
455
456 wake_up_interruptible(&up->port.info->delta_msr_wait);
457 }
458
459 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id, struct pt_regs *regs)
460 {
461 struct uart_sunsu_port *up = dev_id;
462 unsigned long flags;
463 unsigned char status;
464
465 spin_lock_irqsave(&up->port.lock, flags);
466
467 do {
468 struct tty_struct *tty;
469
470 status = serial_inp(up, UART_LSR);
471 tty = NULL;
472 if (status & UART_LSR_DR)
473 tty = receive_chars(up, &status, regs);
474 check_modem_status(up);
475 if (status & UART_LSR_THRE)
476 transmit_chars(up);
477
478 spin_unlock_irqrestore(&up->port.lock, flags);
479
480 if (tty)
481 tty_flip_buffer_push(tty);
482
483 spin_lock_irqsave(&up->port.lock, flags);
484
485 } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
486
487 spin_unlock_irqrestore(&up->port.lock, flags);
488
489 return IRQ_HANDLED;
490 }
491
492 /* Separate interrupt handling path for keyboard/mouse ports. */
493
494 static void
495 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
496 unsigned int iflag, unsigned int quot);
497
498 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
499 {
500 unsigned int cur_cflag = up->cflag;
501 int quot, new_baud;
502
503 up->cflag &= ~CBAUD;
504 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
505
506 quot = up->port.uartclk / (16 * new_baud);
507
508 spin_unlock(&up->port.lock);
509
510 sunsu_change_speed(&up->port, up->cflag, 0, quot);
511
512 spin_lock(&up->port.lock);
513 }
514
515 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *regs, int is_break)
516 {
517 do {
518 unsigned char ch = serial_inp(up, UART_RX);
519
520 /* Stop-A is handled by drivers/char/keyboard.c now. */
521 if (up->su_type == SU_PORT_KBD) {
522 #ifdef CONFIG_SERIO
523 serio_interrupt(up->serio, ch, 0, regs);
524 #endif
525 } else if (up->su_type == SU_PORT_MS) {
526 int ret = suncore_mouse_baud_detection(ch, is_break);
527
528 switch (ret) {
529 case 2:
530 sunsu_change_mouse_baud(up);
531 /* fallthru */
532 case 1:
533 break;
534
535 case 0:
536 #ifdef CONFIG_SERIO
537 serio_interrupt(up->serio, ch, 0, regs);
538 #endif
539 break;
540 };
541 }
542 } while (serial_in(up, UART_LSR) & UART_LSR_DR);
543 }
544
545 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id, struct pt_regs *regs)
546 {
547 struct uart_sunsu_port *up = dev_id;
548
549 if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
550 unsigned char status = serial_inp(up, UART_LSR);
551
552 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
553 receive_kbd_ms_chars(up, regs,
554 (status & UART_LSR_BI) != 0);
555 }
556
557 return IRQ_HANDLED;
558 }
559
560 static unsigned int sunsu_tx_empty(struct uart_port *port)
561 {
562 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
563 unsigned long flags;
564 unsigned int ret;
565
566 spin_lock_irqsave(&up->port.lock, flags);
567 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
568 spin_unlock_irqrestore(&up->port.lock, flags);
569
570 return ret;
571 }
572
573 static unsigned int sunsu_get_mctrl(struct uart_port *port)
574 {
575 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
576 unsigned long flags;
577 unsigned char status;
578 unsigned int ret;
579
580 spin_lock_irqsave(&up->port.lock, flags);
581 status = serial_in(up, UART_MSR);
582 spin_unlock_irqrestore(&up->port.lock, flags);
583
584 ret = 0;
585 if (status & UART_MSR_DCD)
586 ret |= TIOCM_CAR;
587 if (status & UART_MSR_RI)
588 ret |= TIOCM_RNG;
589 if (status & UART_MSR_DSR)
590 ret |= TIOCM_DSR;
591 if (status & UART_MSR_CTS)
592 ret |= TIOCM_CTS;
593 return ret;
594 }
595
596 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
597 {
598 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
599 unsigned char mcr = 0;
600
601 if (mctrl & TIOCM_RTS)
602 mcr |= UART_MCR_RTS;
603 if (mctrl & TIOCM_DTR)
604 mcr |= UART_MCR_DTR;
605 if (mctrl & TIOCM_OUT1)
606 mcr |= UART_MCR_OUT1;
607 if (mctrl & TIOCM_OUT2)
608 mcr |= UART_MCR_OUT2;
609 if (mctrl & TIOCM_LOOP)
610 mcr |= UART_MCR_LOOP;
611
612 serial_out(up, UART_MCR, mcr);
613 }
614
615 static void sunsu_break_ctl(struct uart_port *port, int break_state)
616 {
617 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
618 unsigned long flags;
619
620 spin_lock_irqsave(&up->port.lock, flags);
621 if (break_state == -1)
622 up->lcr |= UART_LCR_SBC;
623 else
624 up->lcr &= ~UART_LCR_SBC;
625 serial_out(up, UART_LCR, up->lcr);
626 spin_unlock_irqrestore(&up->port.lock, flags);
627 }
628
629 static int sunsu_startup(struct uart_port *port)
630 {
631 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
632 unsigned long flags;
633 int retval;
634
635 if (up->port.type == PORT_16C950) {
636 /* Wake up and initialize UART */
637 up->acr = 0;
638 serial_outp(up, UART_LCR, 0xBF);
639 serial_outp(up, UART_EFR, UART_EFR_ECB);
640 serial_outp(up, UART_IER, 0);
641 serial_outp(up, UART_LCR, 0);
642 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
643 serial_outp(up, UART_LCR, 0xBF);
644 serial_outp(up, UART_EFR, UART_EFR_ECB);
645 serial_outp(up, UART_LCR, 0);
646 }
647
648 #ifdef CONFIG_SERIAL_8250_RSA
649 /*
650 * If this is an RSA port, see if we can kick it up to the
651 * higher speed clock.
652 */
653 enable_rsa(up);
654 #endif
655
656 /*
657 * Clear the FIFO buffers and disable them.
658 * (they will be reeanbled in set_termios())
659 */
660 if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
661 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
662 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
663 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
664 serial_outp(up, UART_FCR, 0);
665 }
666
667 /*
668 * Clear the interrupt registers.
669 */
670 (void) serial_inp(up, UART_LSR);
671 (void) serial_inp(up, UART_RX);
672 (void) serial_inp(up, UART_IIR);
673 (void) serial_inp(up, UART_MSR);
674
675 /*
676 * At this point, there's no way the LSR could still be 0xff;
677 * if it is, then bail out, because there's likely no UART
678 * here.
679 */
680 if (!(up->port.flags & ASYNC_BUGGY_UART) &&
681 (serial_inp(up, UART_LSR) == 0xff)) {
682 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
683 return -ENODEV;
684 }
685
686 if (up->su_type != SU_PORT_PORT) {
687 retval = request_irq(up->irq, sunsu_kbd_ms_interrupt,
688 SA_SHIRQ, su_typev[up->su_type], up);
689 } else {
690 retval = request_irq(up->irq, sunsu_serial_interrupt,
691 SA_SHIRQ, su_typev[up->su_type], up);
692 }
693 if (retval) {
694 printk("su: Cannot register IRQ %d\n", up->irq);
695 return retval;
696 }
697
698 /*
699 * Now, initialize the UART
700 */
701 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
702
703 spin_lock_irqsave(&up->port.lock, flags);
704
705 up->port.mctrl |= TIOCM_OUT2;
706
707 sunsu_set_mctrl(&up->port, up->port.mctrl);
708 spin_unlock_irqrestore(&up->port.lock, flags);
709
710 /*
711 * Finally, enable interrupts. Note: Modem status interrupts
712 * are set via set_termios(), which will be occurring imminently
713 * anyway, so we don't enable them here.
714 */
715 up->ier = UART_IER_RLSI | UART_IER_RDI;
716 serial_outp(up, UART_IER, up->ier);
717
718 if (up->port.flags & ASYNC_FOURPORT) {
719 unsigned int icp;
720 /*
721 * Enable interrupts on the AST Fourport board
722 */
723 icp = (up->port.iobase & 0xfe0) | 0x01f;
724 outb_p(0x80, icp);
725 (void) inb_p(icp);
726 }
727
728 /*
729 * And clear the interrupt registers again for luck.
730 */
731 (void) serial_inp(up, UART_LSR);
732 (void) serial_inp(up, UART_RX);
733 (void) serial_inp(up, UART_IIR);
734 (void) serial_inp(up, UART_MSR);
735
736 return 0;
737 }
738
739 static void sunsu_shutdown(struct uart_port *port)
740 {
741 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
742 unsigned long flags;
743
744 /*
745 * Disable interrupts from this port
746 */
747 up->ier = 0;
748 serial_outp(up, UART_IER, 0);
749
750 spin_lock_irqsave(&up->port.lock, flags);
751 if (up->port.flags & ASYNC_FOURPORT) {
752 /* reset interrupts on the AST Fourport board */
753 inb((up->port.iobase & 0xfe0) | 0x1f);
754 up->port.mctrl |= TIOCM_OUT1;
755 } else
756 up->port.mctrl &= ~TIOCM_OUT2;
757
758 sunsu_set_mctrl(&up->port, up->port.mctrl);
759 spin_unlock_irqrestore(&up->port.lock, flags);
760
761 /*
762 * Disable break condition and FIFOs
763 */
764 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
765 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
766 UART_FCR_CLEAR_RCVR |
767 UART_FCR_CLEAR_XMIT);
768 serial_outp(up, UART_FCR, 0);
769
770 #ifdef CONFIG_SERIAL_8250_RSA
771 /*
772 * Reset the RSA board back to 115kbps compat mode.
773 */
774 disable_rsa(up);
775 #endif
776
777 /*
778 * Read data port to reset things.
779 */
780 (void) serial_in(up, UART_RX);
781
782 free_irq(up->irq, up);
783 }
784
785 static void
786 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
787 unsigned int iflag, unsigned int quot)
788 {
789 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
790 unsigned char cval, fcr = 0;
791 unsigned long flags;
792
793 switch (cflag & CSIZE) {
794 case CS5:
795 cval = 0x00;
796 break;
797 case CS6:
798 cval = 0x01;
799 break;
800 case CS7:
801 cval = 0x02;
802 break;
803 default:
804 case CS8:
805 cval = 0x03;
806 break;
807 }
808
809 if (cflag & CSTOPB)
810 cval |= 0x04;
811 if (cflag & PARENB)
812 cval |= UART_LCR_PARITY;
813 if (!(cflag & PARODD))
814 cval |= UART_LCR_EPAR;
815 #ifdef CMSPAR
816 if (cflag & CMSPAR)
817 cval |= UART_LCR_SPAR;
818 #endif
819
820 /*
821 * Work around a bug in the Oxford Semiconductor 952 rev B
822 * chip which causes it to seriously miscalculate baud rates
823 * when DLL is 0.
824 */
825 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
826 up->rev == 0x5201)
827 quot ++;
828
829 if (uart_config[up->port.type].flags & UART_USE_FIFO) {
830 if ((up->port.uartclk / quot) < (2400 * 16))
831 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
832 #ifdef CONFIG_SERIAL_8250_RSA
833 else if (up->port.type == PORT_RSA)
834 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
835 #endif
836 else
837 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
838 }
839 if (up->port.type == PORT_16750)
840 fcr |= UART_FCR7_64BYTE;
841
842 /*
843 * Ok, we're now changing the port state. Do it with
844 * interrupts disabled.
845 */
846 spin_lock_irqsave(&up->port.lock, flags);
847
848 /*
849 * Update the per-port timeout.
850 */
851 uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
852
853 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
854 if (iflag & INPCK)
855 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
856 if (iflag & (BRKINT | PARMRK))
857 up->port.read_status_mask |= UART_LSR_BI;
858
859 /*
860 * Characteres to ignore
861 */
862 up->port.ignore_status_mask = 0;
863 if (iflag & IGNPAR)
864 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
865 if (iflag & IGNBRK) {
866 up->port.ignore_status_mask |= UART_LSR_BI;
867 /*
868 * If we're ignoring parity and break indicators,
869 * ignore overruns too (for real raw support).
870 */
871 if (iflag & IGNPAR)
872 up->port.ignore_status_mask |= UART_LSR_OE;
873 }
874
875 /*
876 * ignore all characters if CREAD is not set
877 */
878 if ((cflag & CREAD) == 0)
879 up->port.ignore_status_mask |= UART_LSR_DR;
880
881 /*
882 * CTS flow control flag and modem status interrupts
883 */
884 up->ier &= ~UART_IER_MSI;
885 if (UART_ENABLE_MS(&up->port, cflag))
886 up->ier |= UART_IER_MSI;
887
888 serial_out(up, UART_IER, up->ier);
889
890 if (uart_config[up->port.type].flags & UART_STARTECH) {
891 serial_outp(up, UART_LCR, 0xBF);
892 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
893 }
894 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
895 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
896 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
897 if (up->port.type == PORT_16750)
898 serial_outp(up, UART_FCR, fcr); /* set fcr */
899 serial_outp(up, UART_LCR, cval); /* reset DLAB */
900 up->lcr = cval; /* Save LCR */
901 if (up->port.type != PORT_16750) {
902 if (fcr & UART_FCR_ENABLE_FIFO) {
903 /* emulated UARTs (Lucent Venus 167x) need two steps */
904 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
905 }
906 serial_outp(up, UART_FCR, fcr); /* set fcr */
907 }
908
909 up->cflag = cflag;
910
911 spin_unlock_irqrestore(&up->port.lock, flags);
912 }
913
914 static void
915 sunsu_set_termios(struct uart_port *port, struct termios *termios,
916 struct termios *old)
917 {
918 unsigned int baud, quot;
919
920 /*
921 * Ask the core to calculate the divisor for us.
922 */
923 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
924 quot = uart_get_divisor(port, baud);
925
926 sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
927 }
928
929 static void sunsu_release_port(struct uart_port *port)
930 {
931 }
932
933 static int sunsu_request_port(struct uart_port *port)
934 {
935 return 0;
936 }
937
938 static void sunsu_config_port(struct uart_port *port, int flags)
939 {
940 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
941
942 if (flags & UART_CONFIG_TYPE) {
943 /*
944 * We are supposed to call autoconfig here, but this requires
945 * splitting all the OBP probing crap from the UART probing.
946 * We'll do it when we kill sunsu.c altogether.
947 */
948 port->type = up->type_probed; /* XXX */
949 }
950 }
951
952 static int
953 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
954 {
955 return -EINVAL;
956 }
957
958 static const char *
959 sunsu_type(struct uart_port *port)
960 {
961 int type = port->type;
962
963 if (type >= ARRAY_SIZE(uart_config))
964 type = 0;
965 return uart_config[type].name;
966 }
967
968 static struct uart_ops sunsu_pops = {
969 .tx_empty = sunsu_tx_empty,
970 .set_mctrl = sunsu_set_mctrl,
971 .get_mctrl = sunsu_get_mctrl,
972 .stop_tx = sunsu_stop_tx,
973 .start_tx = sunsu_start_tx,
974 .stop_rx = sunsu_stop_rx,
975 .enable_ms = sunsu_enable_ms,
976 .break_ctl = sunsu_break_ctl,
977 .startup = sunsu_startup,
978 .shutdown = sunsu_shutdown,
979 .set_termios = sunsu_set_termios,
980 .type = sunsu_type,
981 .release_port = sunsu_release_port,
982 .request_port = sunsu_request_port,
983 .config_port = sunsu_config_port,
984 .verify_port = sunsu_verify_port,
985 };
986
987 #define UART_NR 4
988
989 static struct uart_sunsu_port sunsu_ports[UART_NR];
990
991 #ifdef CONFIG_SERIO
992
993 static spinlock_t sunsu_serio_lock = SPIN_LOCK_UNLOCKED;
994
995 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
996 {
997 struct uart_sunsu_port *up = serio->port_data;
998 unsigned long flags;
999 int lsr;
1000
1001 spin_lock_irqsave(&sunsu_serio_lock, flags);
1002
1003 do {
1004 lsr = serial_in(up, UART_LSR);
1005 } while (!(lsr & UART_LSR_THRE));
1006
1007 /* Send the character out. */
1008 serial_out(up, UART_TX, ch);
1009
1010 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1011
1012 return 0;
1013 }
1014
1015 static int sunsu_serio_open(struct serio *serio)
1016 {
1017 struct uart_sunsu_port *up = serio->port_data;
1018 unsigned long flags;
1019 int ret;
1020
1021 spin_lock_irqsave(&sunsu_serio_lock, flags);
1022 if (!up->serio_open) {
1023 up->serio_open = 1;
1024 ret = 0;
1025 } else
1026 ret = -EBUSY;
1027 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1028
1029 return ret;
1030 }
1031
1032 static void sunsu_serio_close(struct serio *serio)
1033 {
1034 struct uart_sunsu_port *up = serio->port_data;
1035 unsigned long flags;
1036
1037 spin_lock_irqsave(&sunsu_serio_lock, flags);
1038 up->serio_open = 0;
1039 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1040 }
1041
1042 #endif /* CONFIG_SERIO */
1043
1044 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1045 {
1046 unsigned char status1, status2, scratch, scratch2, scratch3;
1047 unsigned char save_lcr, save_mcr;
1048 struct linux_ebus_device *dev = NULL;
1049 struct linux_ebus *ebus;
1050 #ifdef CONFIG_SPARC64
1051 struct sparc_isa_bridge *isa_br;
1052 struct sparc_isa_device *isa_dev;
1053 #endif
1054 #ifndef CONFIG_SPARC64
1055 struct linux_prom_registers reg0;
1056 #endif
1057 unsigned long flags;
1058
1059 if (!up->port_node || !up->su_type)
1060 return;
1061
1062 up->type_probed = PORT_UNKNOWN;
1063 up->port.iotype = SERIAL_IO_MEM;
1064
1065 /*
1066 * First we look for Ebus-bases su's
1067 */
1068 for_each_ebus(ebus) {
1069 for_each_ebusdev(dev, ebus) {
1070 if (dev->prom_node == up->port_node) {
1071 /*
1072 * The EBus is broken on sparc; it delivers
1073 * virtual addresses in resources. Oh well...
1074 * This is correct on sparc64, though.
1075 */
1076 up->port.membase = (char *) dev->resource[0].start;
1077 /*
1078 * This is correct on both architectures.
1079 */
1080 up->port.mapbase = dev->resource[0].start;
1081 up->irq = dev->irqs[0];
1082 goto ebus_done;
1083 }
1084 }
1085 }
1086
1087 #ifdef CONFIG_SPARC64
1088 for_each_isa(isa_br) {
1089 for_each_isadev(isa_dev, isa_br) {
1090 if (isa_dev->prom_node == up->port_node) {
1091 /* Same on sparc64. Cool architecure... */
1092 up->port.membase = (char *) isa_dev->resource.start;
1093 up->port.mapbase = isa_dev->resource.start;
1094 up->irq = isa_dev->irq;
1095 goto ebus_done;
1096 }
1097 }
1098 }
1099 #endif
1100
1101 #ifdef CONFIG_SPARC64
1102 /*
1103 * Not on Ebus, bailing.
1104 */
1105 return;
1106 #else
1107 /*
1108 * Not on Ebus, must be OBIO.
1109 */
1110 if (prom_getproperty(up->port_node, "reg",
1111 (char *)&reg0, sizeof(reg0)) == -1) {
1112 prom_printf("sunsu: no \"reg\" property\n");
1113 return;
1114 }
1115 prom_apply_obio_ranges(&reg0, 1);
1116 if (reg0.which_io != 0) { /* Just in case... */
1117 prom_printf("sunsu: bus number nonzero: 0x%x:%x\n",
1118 reg0.which_io, reg0.phys_addr);
1119 return;
1120 }
1121 up->port.mapbase = reg0.phys_addr;
1122 if ((up->port.membase = ioremap(reg0.phys_addr, reg0.reg_size)) == 0) {
1123 prom_printf("sunsu: Cannot map registers.\n");
1124 return;
1125 }
1126
1127 /*
1128 * 0x20 is sun4m thing, Dave Redman heritage.
1129 * See arch/sparc/kernel/irq.c.
1130 */
1131 #define IRQ_4M(n) ((n)|0x20)
1132
1133 /*
1134 * There is no intr property on MrCoffee, so hardwire it.
1135 */
1136 up->irq = IRQ_4M(13);
1137 #endif
1138
1139 ebus_done:
1140
1141 spin_lock_irqsave(&up->port.lock, flags);
1142
1143 if (!(up->port.flags & ASYNC_BUGGY_UART)) {
1144 /*
1145 * Do a simple existence test first; if we fail this, there's
1146 * no point trying anything else.
1147 *
1148 * 0x80 is used as a nonsense port to prevent against false
1149 * positives due to ISA bus float. The assumption is that
1150 * 0x80 is a non-existent port; which should be safe since
1151 * include/asm/io.h also makes this assumption.
1152 */
1153 scratch = serial_inp(up, UART_IER);
1154 serial_outp(up, UART_IER, 0);
1155 #ifdef __i386__
1156 outb(0xff, 0x080);
1157 #endif
1158 scratch2 = serial_inp(up, UART_IER);
1159 serial_outp(up, UART_IER, 0x0f);
1160 #ifdef __i386__
1161 outb(0, 0x080);
1162 #endif
1163 scratch3 = serial_inp(up, UART_IER);
1164 serial_outp(up, UART_IER, scratch);
1165 if (scratch2 != 0 || scratch3 != 0x0F)
1166 goto out; /* We failed; there's nothing here */
1167 }
1168
1169 save_mcr = serial_in(up, UART_MCR);
1170 save_lcr = serial_in(up, UART_LCR);
1171
1172 /*
1173 * Check to see if a UART is really there. Certain broken
1174 * internal modems based on the Rockwell chipset fail this
1175 * test, because they apparently don't implement the loopback
1176 * test mode. So this test is skipped on the COM 1 through
1177 * COM 4 ports. This *should* be safe, since no board
1178 * manufacturer would be stupid enough to design a board
1179 * that conflicts with COM 1-4 --- we hope!
1180 */
1181 if (!(up->port.flags & ASYNC_SKIP_TEST)) {
1182 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1183 status1 = serial_inp(up, UART_MSR) & 0xF0;
1184 serial_outp(up, UART_MCR, save_mcr);
1185 if (status1 != 0x90)
1186 goto out; /* We failed loopback test */
1187 }
1188 serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
1189 serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
1190 serial_outp(up, UART_LCR, 0);
1191 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1192 scratch = serial_in(up, UART_IIR) >> 6;
1193 switch (scratch) {
1194 case 0:
1195 up->port.type = PORT_16450;
1196 break;
1197 case 1:
1198 up->port.type = PORT_UNKNOWN;
1199 break;
1200 case 2:
1201 up->port.type = PORT_16550;
1202 break;
1203 case 3:
1204 up->port.type = PORT_16550A;
1205 break;
1206 }
1207 if (up->port.type == PORT_16550A) {
1208 /* Check for Startech UART's */
1209 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1210 if (serial_in(up, UART_EFR) == 0) {
1211 up->port.type = PORT_16650;
1212 } else {
1213 serial_outp(up, UART_LCR, 0xBF);
1214 if (serial_in(up, UART_EFR) == 0)
1215 up->port.type = PORT_16650V2;
1216 }
1217 }
1218 if (up->port.type == PORT_16550A) {
1219 /* Check for TI 16750 */
1220 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1221 serial_outp(up, UART_FCR,
1222 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1223 scratch = serial_in(up, UART_IIR) >> 5;
1224 if (scratch == 7) {
1225 /*
1226 * If this is a 16750, and not a cheap UART
1227 * clone, then it should only go into 64 byte
1228 * mode if the UART_FCR7_64BYTE bit was set
1229 * while UART_LCR_DLAB was latched.
1230 */
1231 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1232 serial_outp(up, UART_LCR, 0);
1233 serial_outp(up, UART_FCR,
1234 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1235 scratch = serial_in(up, UART_IIR) >> 5;
1236 if (scratch == 6)
1237 up->port.type = PORT_16750;
1238 }
1239 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1240 }
1241 serial_outp(up, UART_LCR, save_lcr);
1242 if (up->port.type == PORT_16450) {
1243 scratch = serial_in(up, UART_SCR);
1244 serial_outp(up, UART_SCR, 0xa5);
1245 status1 = serial_in(up, UART_SCR);
1246 serial_outp(up, UART_SCR, 0x5a);
1247 status2 = serial_in(up, UART_SCR);
1248 serial_outp(up, UART_SCR, scratch);
1249
1250 if ((status1 != 0xa5) || (status2 != 0x5a))
1251 up->port.type = PORT_8250;
1252 }
1253
1254 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1255
1256 if (up->port.type == PORT_UNKNOWN)
1257 goto out;
1258 up->type_probed = up->port.type; /* XXX */
1259
1260 /*
1261 * Reset the UART.
1262 */
1263 #ifdef CONFIG_SERIAL_8250_RSA
1264 if (up->port.type == PORT_RSA)
1265 serial_outp(up, UART_RSA_FRR, 0);
1266 #endif
1267 serial_outp(up, UART_MCR, save_mcr);
1268 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1269 UART_FCR_CLEAR_RCVR |
1270 UART_FCR_CLEAR_XMIT));
1271 serial_outp(up, UART_FCR, 0);
1272 (void)serial_in(up, UART_RX);
1273 serial_outp(up, UART_IER, 0);
1274
1275 out:
1276 spin_unlock_irqrestore(&up->port.lock, flags);
1277 }
1278
1279 static struct uart_driver sunsu_reg = {
1280 .owner = THIS_MODULE,
1281 .driver_name = "serial",
1282 .devfs_name = "tts/",
1283 .dev_name = "ttyS",
1284 .major = TTY_MAJOR,
1285 };
1286
1287 static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up, int channel)
1288 {
1289 struct serio *serio;
1290
1291 up->port.line = channel;
1292 up->port.type = PORT_UNKNOWN;
1293 up->port.uartclk = (SU_BASE_BAUD * 16);
1294
1295 if (up->su_type == SU_PORT_KBD)
1296 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1297 else
1298 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1299
1300 sunsu_autoconfig(up);
1301 if (up->port.type == PORT_UNKNOWN)
1302 return -1;
1303
1304 printk(KERN_INFO "su%d at 0x%p (irq = %s) is a %s\n",
1305 channel,
1306 up->port.membase, __irq_itoa(up->irq),
1307 sunsu_type(&up->port));
1308
1309 #ifdef CONFIG_SERIO
1310 up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
1311 if (serio) {
1312 memset(serio, 0, sizeof(*serio));
1313
1314 serio->port_data = up;
1315
1316 serio->type = SERIO_RS232;
1317 if (up->su_type == SU_PORT_KBD) {
1318 serio->type |= SERIO_SUNKBD;
1319 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1320 } else {
1321 serio->type |= (SERIO_SUN | (1 << 16));
1322 strlcpy(serio->name, "sums", sizeof(serio->name));
1323 }
1324 strlcpy(serio->phys, (channel == 0 ? "su/serio0" : "su/serio1"),
1325 sizeof(serio->phys));
1326
1327 serio->write = sunsu_serio_write;
1328 serio->open = sunsu_serio_open;
1329 serio->close = sunsu_serio_close;
1330
1331 serio_register_port(serio);
1332 } else {
1333 printk(KERN_WARNING "su%d: not enough memory for serio port\n",
1334 channel);
1335 }
1336 #endif
1337
1338 sunsu_startup(&up->port);
1339 return 0;
1340 }
1341
1342 /*
1343 * ------------------------------------------------------------
1344 * Serial console driver
1345 * ------------------------------------------------------------
1346 */
1347
1348 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1349
1350 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1351
1352 /*
1353 * Wait for transmitter & holding register to empty
1354 */
1355 static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1356 {
1357 unsigned int status, tmout = 10000;
1358
1359 /* Wait up to 10ms for the character(s) to be sent. */
1360 do {
1361 status = serial_in(up, UART_LSR);
1362
1363 if (status & UART_LSR_BI)
1364 up->lsr_break_flag = UART_LSR_BI;
1365
1366 if (--tmout == 0)
1367 break;
1368 udelay(1);
1369 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1370
1371 /* Wait up to 1s for flow control if necessary */
1372 if (up->port.flags & ASYNC_CONS_FLOW) {
1373 tmout = 1000000;
1374 while (--tmout &&
1375 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1376 udelay(1);
1377 }
1378 }
1379
1380 /*
1381 * Print a string to the serial port trying not to disturb
1382 * any possible real use of the port...
1383 */
1384 static void sunsu_console_write(struct console *co, const char *s,
1385 unsigned int count)
1386 {
1387 struct uart_sunsu_port *up = &sunsu_ports[co->index];
1388 unsigned int ier;
1389 int i;
1390
1391 /*
1392 * First save the UER then disable the interrupts
1393 */
1394 ier = serial_in(up, UART_IER);
1395 serial_out(up, UART_IER, 0);
1396
1397 /*
1398 * Now, do each character
1399 */
1400 for (i = 0; i < count; i++, s++) {
1401 wait_for_xmitr(up);
1402
1403 /*
1404 * Send the character out.
1405 * If a LF, also do CR...
1406 */
1407 serial_out(up, UART_TX, *s);
1408 if (*s == 10) {
1409 wait_for_xmitr(up);
1410 serial_out(up, UART_TX, 13);
1411 }
1412 }
1413
1414 /*
1415 * Finally, wait for transmitter to become empty
1416 * and restore the IER
1417 */
1418 wait_for_xmitr(up);
1419 serial_out(up, UART_IER, ier);
1420 }
1421
1422 /*
1423 * Setup initial baud/bits/parity. We do two things here:
1424 * - construct a cflag setting for the first su_open()
1425 * - initialize the serial port
1426 * Return non-zero if we didn't find a serial port.
1427 */
1428 static int __init sunsu_console_setup(struct console *co, char *options)
1429 {
1430 struct uart_port *port;
1431 int baud = 9600;
1432 int bits = 8;
1433 int parity = 'n';
1434 int flow = 'n';
1435
1436 printk("Console: ttyS%d (SU)\n",
1437 (sunsu_reg.minor - 64) + co->index);
1438
1439 /*
1440 * Check whether an invalid uart number has been specified, and
1441 * if so, search for the first available port that does have
1442 * console support.
1443 */
1444 if (co->index >= UART_NR)
1445 co->index = 0;
1446 port = &sunsu_ports[co->index].port;
1447
1448 /*
1449 * Temporary fix.
1450 */
1451 spin_lock_init(&port->lock);
1452
1453 if (options)
1454 uart_parse_options(options, &baud, &parity, &bits, &flow);
1455
1456 return uart_set_options(port, co, baud, parity, bits, flow);
1457 }
1458
1459 static struct console sunsu_cons = {
1460 .name = "ttyS",
1461 .write = sunsu_console_write,
1462 .device = uart_console_device,
1463 .setup = sunsu_console_setup,
1464 .flags = CON_PRINTBUFFER,
1465 .index = -1,
1466 .data = &sunsu_reg,
1467 };
1468 #define SUNSU_CONSOLE (&sunsu_cons)
1469
1470 /*
1471 * Register console.
1472 */
1473
1474 static int __init sunsu_serial_console_init(void)
1475 {
1476 int i;
1477
1478 if (con_is_present())
1479 return 0;
1480
1481 for (i = 0; i < UART_NR; i++) {
1482 int this_minor = sunsu_reg.minor + i;
1483
1484 if ((this_minor - 64) == (serial_console - 1))
1485 break;
1486 }
1487 if (i == UART_NR)
1488 return 0;
1489 if (sunsu_ports[i].port_node == 0)
1490 return 0;
1491
1492 sunsu_cons.index = i;
1493 register_console(&sunsu_cons);
1494 return 0;
1495 }
1496 #else
1497 #define SUNSU_CONSOLE (NULL)
1498 #define sunsu_serial_console_init() do { } while (0)
1499 #endif
1500
1501 static int __init sunsu_serial_init(void)
1502 {
1503 int instance, ret, i;
1504
1505 /* How many instances do we need? */
1506 instance = 0;
1507 for (i = 0; i < UART_NR; i++) {
1508 struct uart_sunsu_port *up = &sunsu_ports[i];
1509
1510 if (up->su_type == SU_PORT_MS ||
1511 up->su_type == SU_PORT_KBD)
1512 continue;
1513
1514 up->port.flags |= ASYNC_BOOT_AUTOCONF;
1515 up->port.type = PORT_UNKNOWN;
1516 up->port.uartclk = (SU_BASE_BAUD * 16);
1517
1518 sunsu_autoconfig(up);
1519 if (up->port.type == PORT_UNKNOWN)
1520 continue;
1521
1522 up->port.line = instance++;
1523 up->port.ops = &sunsu_pops;
1524 }
1525
1526 sunsu_reg.minor = sunserial_current_minor;
1527 sunserial_current_minor += instance;
1528
1529 sunsu_reg.nr = instance;
1530 sunsu_reg.cons = SUNSU_CONSOLE;
1531
1532 ret = uart_register_driver(&sunsu_reg);
1533 if (ret < 0)
1534 return ret;
1535
1536 for (i = 0; i < UART_NR; i++) {
1537 struct uart_sunsu_port *up = &sunsu_ports[i];
1538
1539 /* Do not register Keyboard/Mouse lines with UART
1540 * layer.
1541 */
1542 if (up->su_type == SU_PORT_MS ||
1543 up->su_type == SU_PORT_KBD)
1544 continue;
1545
1546 if (up->port.type == PORT_UNKNOWN)
1547 continue;
1548
1549 uart_add_one_port(&sunsu_reg, &up->port);
1550 }
1551
1552 return 0;
1553 }
1554
1555 static int su_node_ok(int node, char *name, int namelen)
1556 {
1557 if (strncmp(name, "su", namelen) == 0 ||
1558 strncmp(name, "su_pnp", namelen) == 0)
1559 return 1;
1560
1561 if (strncmp(name, "serial", namelen) == 0) {
1562 char compat[32];
1563 int clen;
1564
1565 /* Is it _really_ a 'su' device? */
1566 clen = prom_getproperty(node, "compatible", compat, sizeof(compat));
1567 if (clen > 0) {
1568 if (strncmp(compat, "sab82532", 8) == 0) {
1569 /* Nope, Siemens serial, not for us. */
1570 return 0;
1571 }
1572 }
1573 return 1;
1574 }
1575
1576 return 0;
1577 }
1578
1579 #define SU_PROPSIZE 128
1580
1581 /*
1582 * Scan status structure.
1583 * "prop" is a local variable but it eats stack to keep it in each
1584 * stack frame of a recursive procedure.
1585 */
1586 struct su_probe_scan {
1587 int msnode, kbnode; /* PROM nodes for mouse and keyboard */
1588 int msx, kbx; /* minors for mouse and keyboard */
1589 int devices; /* scan index */
1590 char prop[SU_PROPSIZE];
1591 };
1592
1593 /*
1594 * We have several platforms which present 'su' in different parts
1595 * of the device tree. 'su' may be found under obio, ebus, isa and pci.
1596 * We walk over the tree and find them wherever PROM hides them.
1597 */
1598 static void __init su_probe_any(struct su_probe_scan *t, int sunode)
1599 {
1600 struct uart_sunsu_port *up;
1601 int len;
1602
1603 if (t->devices >= UART_NR)
1604 return;
1605
1606 for (; sunode != 0; sunode = prom_getsibling(sunode)) {
1607 len = prom_getproperty(sunode, "name", t->prop, SU_PROPSIZE);
1608 if (len <= 1)
1609 continue; /* Broken PROM node */
1610
1611 if (su_node_ok(sunode, t->prop, len)) {
1612 up = &sunsu_ports[t->devices];
1613 if (t->kbnode != 0 && sunode == t->kbnode) {
1614 t->kbx = t->devices;
1615 up->su_type = SU_PORT_KBD;
1616 } else if (t->msnode != 0 && sunode == t->msnode) {
1617 t->msx = t->devices;
1618 up->su_type = SU_PORT_MS;
1619 } else {
1620 #ifdef CONFIG_SPARC64
1621 /*
1622 * Do not attempt to use the truncated
1623 * keyboard/mouse ports as serial ports
1624 * on Ultras with PC keyboard attached.
1625 */
1626 if (prom_getbool(sunode, "mouse"))
1627 continue;
1628 if (prom_getbool(sunode, "keyboard"))
1629 continue;
1630 #endif
1631 up->su_type = SU_PORT_PORT;
1632 }
1633 up->port_node = sunode;
1634 ++t->devices;
1635 } else {
1636 su_probe_any(t, prom_getchild(sunode));
1637 }
1638 }
1639 }
1640
1641 static int __init sunsu_probe(void)
1642 {
1643 int node;
1644 int len;
1645 struct su_probe_scan scan;
1646
1647 /*
1648 * First, we scan the tree.
1649 */
1650 scan.devices = 0;
1651 scan.msx = -1;
1652 scan.kbx = -1;
1653 scan.kbnode = 0;
1654 scan.msnode = 0;
1655
1656 /*
1657 * Get the nodes for keyboard and mouse from 'aliases'...
1658 */
1659 node = prom_getchild(prom_root_node);
1660 node = prom_searchsiblings(node, "aliases");
1661 if (node != 0) {
1662 len = prom_getproperty(node, "keyboard", scan.prop, SU_PROPSIZE);
1663 if (len > 0) {
1664 scan.prop[len] = 0;
1665 scan.kbnode = prom_finddevice(scan.prop);
1666 }
1667
1668 len = prom_getproperty(node, "mouse", scan.prop, SU_PROPSIZE);
1669 if (len > 0) {
1670 scan.prop[len] = 0;
1671 scan.msnode = prom_finddevice(scan.prop);
1672 }
1673 }
1674
1675 su_probe_any(&scan, prom_getchild(prom_root_node));
1676
1677 /*
1678 * Second, we process the special case of keyboard and mouse.
1679 *
1680 * Currently if we got keyboard and mouse hooked to "su" ports
1681 * we do not use any possible remaining "su" as a serial port.
1682 * Thus, we ignore values of .msx and .kbx, then compact ports.
1683 */
1684 if (scan.msx != -1 && scan.kbx != -1) {
1685 sunsu_ports[0].su_type = SU_PORT_MS;
1686 sunsu_ports[0].port_node = scan.msnode;
1687 sunsu_kbd_ms_init(&sunsu_ports[0], 0);
1688
1689 sunsu_ports[1].su_type = SU_PORT_KBD;
1690 sunsu_ports[1].port_node = scan.kbnode;
1691 sunsu_kbd_ms_init(&sunsu_ports[1], 1);
1692
1693 return 0;
1694 }
1695
1696 if (scan.msx != -1 || scan.kbx != -1) {
1697 printk("sunsu_probe: cannot match keyboard and mouse, confused\n");
1698 return -ENODEV;
1699 }
1700
1701 if (scan.devices == 0)
1702 return -ENODEV;
1703
1704 /*
1705 * Console must be initiated after the generic initialization.
1706 */
1707 sunsu_serial_init();
1708 sunsu_serial_console_init();
1709
1710 return 0;
1711 }
1712
1713 static void __exit sunsu_exit(void)
1714 {
1715 int i, saw_uart;
1716
1717 saw_uart = 0;
1718 for (i = 0; i < UART_NR; i++) {
1719 struct uart_sunsu_port *up = &sunsu_ports[i];
1720
1721 if (up->su_type == SU_PORT_MS ||
1722 up->su_type == SU_PORT_KBD) {
1723 #ifdef CONFIG_SERIO
1724 if (up->serio) {
1725 serio_unregister_port(up->serio);
1726 up->serio = NULL;
1727 }
1728 #endif
1729 } else if (up->port.type != PORT_UNKNOWN) {
1730 uart_remove_one_port(&sunsu_reg, &up->port);
1731 saw_uart++;
1732 }
1733 }
1734
1735 if (saw_uart)
1736 uart_unregister_driver(&sunsu_reg);
1737 }
1738
1739 module_init(sunsu_probe);
1740 module_exit(sunsu_exit);
MOXA 2.6.9 from sdlinux-moxaart.tgz