drivers/serial/mpc52xx_uart.c

   1 /*
   2  * drivers/serial/mpc52xx_uart.c
   3  *
   4  * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
   5  *
   6  * FIXME According to the usermanual the status bits in the status register
   7  * are only updated when the peripherals access the FIFO and not when the
   8  * CPU access them. So since we use this bits to know when we stop writing
   9  * and reading, they may not be updated in-time and a race condition may
  10  * exists. But I haven't be able to prove this and I don't care. But if
  11  * any problem arises, it might worth checking. The TX/RX FIFO Stats
  12  * registers should be used in addition.
  13  * Update: Actually, they seem updated ... At least the bits we use.
  14  *
  15  *
  16  * Maintainer : Sylvain Munaut <tnt@246tNt.com>
  17  *
  18  * Some of the code has been inspired/copied from the 2.4 code written
  19  * by Dale Farnsworth <dfarnsworth@mvista.com>.
  20  *
  21  * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
  22  * Copyright (C) 2003 MontaVista, Software, Inc.
  23  *
  24  * This file is licensed under the terms of the GNU General Public License
  25  * version 2. This program is licensed "as is" without any warranty of any
  26  * kind, whether express or implied.
  27  */
  28
  29 /* OCP Usage :
  30  *
  31  * This drivers uses the OCP model. To load the serial driver for one of the
  32  * PSCs, just add this to the core_ocp table :
  33  *
  34  * {
  35  *      .vendor         = OCP_VENDOR_FREESCALE,
  36  *      .function       = OCP_FUNC_PSC_UART,
  37  *      .index          = 0,
  38  *      .paddr          = MPC52xx_PSC1,
  39  *      .irq            = MPC52xx_PSC1_IRQ,
  40  *      .pm             = OCP_CPM_NA,
  41  * },
  42  *
  43  * This is for PSC1, replace the paddr and irq according to the PSC you want to
  44  * use. The driver all necessary registers to place the PSC in uart mode without
  45  * DCD. However, the pin multiplexing aren't changed and should be set either
  46  * by the bootloader or in the platform init code.
  47  * The index field must be equal to the PSC index ( e.g. 0 for PSC1, 1 for PSC2,
  48  * and so on). So the PSC1 is mapped to /dev/ttyS0, PSC2 to /dev/ttyS1 and so
  49  * on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly for
  50  * the console code : without this 1:1 mapping, at early boot time, when we are
  51  * parsing the kernel args console=ttyS?, we wouldn't know wich PSC it will be
  52  * mapped to because OCP stuff is not yet initialized.
  53  */
  54
  55 #include <linux/config.h>
  56 #include <linux/module.h>
  57 #include <linux/tty.h>
  58 #include <linux/serial.h>
  59 #include <linux/sysrq.h>
  60 #include <linux/console.h>
  61
  62 #include <asm/delay.h>
  63 #include <asm/io.h>
  64 #include <asm/ocp.h>
  65
  66 #include <asm/mpc52xx.h>
  67 #include <asm/mpc52xx_psc.h>
  68
  69 #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  70 #define SUPPORT_SYSRQ
  71 #endif
  72
  73 #include <linux/serial_core.h>
  74
  75
  76
  77 #define ISR_PASS_LIMIT 256      /* Max number of iteration in the interrupt */
  78
  79
  80 static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
  81         /* Rem: - We use the read_status_mask as a shadow of
  82          *        psc->mpc52xx_psc_imr
  83          *      - It's important that is array is all zero on start as we
  84          *        use it to know if it's initialized or not ! If it's not sure
  85          *        it's cleared, then a memset(...,0,...) should be added to
  86          *        the console_init
  87          */
  88
  89 #define PSC(port) ((struct mpc52xx_psc *)((port)->membase))
  90
  91
  92 /* Forward declaration of the interruption handling routine */
  93 static irqreturn_t mpc52xx_uart_int(int irq,void *dev_id,struct pt_regs *regs);
  94
  95
  96 /* Simple macro to test if a port is console or not. This one is taken
  97  * for serial_core.c and maybe should be moved to serial_core.h ? */
  98 #ifdef CONFIG_SERIAL_CORE_CONSOLE
  99 #define uart_console(port)      ((port)->cons && (port)->cons->index == (port)->line)
 100 #else
 101 #define uart_console(port)      (0)
 102 #endif
 103
 104
 105 /* ======================================================================== */
 106 /* UART operations                                                          */
 107 /* ======================================================================== */
 108
 109 static unsigned int
 110 mpc52xx_uart_tx_empty(struct uart_port *port)
 111 {
 112         int status = in_be16(&PSC(port)->mpc52xx_psc_status);
 113         return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0;
 114 }
 115
 116 static void
 117 mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
 118 {
 119         /* Not implemented */
 120 }
 121
 122 static unsigned int
 123 mpc52xx_uart_get_mctrl(struct uart_port *port)
 124 {
 125         /* Not implemented */
 126         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 127 }
 128
 129 static void
 130 mpc52xx_uart_stop_tx(struct uart_port *port, unsigned int tty_stop)
 131 {
 132         /* port->lock taken by caller */
 133         port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
 134         out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
 135 }
 136
 137 static void
 138 mpc52xx_uart_start_tx(struct uart_port *port, unsigned int tty_start)
 139 {
 140         /* port->lock taken by caller */
 141         port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
 142         out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
 143 }
 144
 145 static void
 146 mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
 147 {
 148         unsigned long flags;
 149         spin_lock_irqsave(&port->lock, flags);
 150
 151         port->x_char = ch;
 152         if (ch) {
 153                 /* Make sure tx interrupts are on */
 154                 /* Truly necessary ??? They should be anyway */
 155                 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
 156                 out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
 157         }
 158
 159         spin_unlock_irqrestore(&port->lock, flags);
 160 }
 161
 162 static void
 163 mpc52xx_uart_stop_rx(struct uart_port *port)
 164 {
 165         /* port->lock taken by caller */
 166         port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
 167         out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
 168 }
 169
 170 static void
 171 mpc52xx_uart_enable_ms(struct uart_port *port)
 172 {
 173         /* Not implemented */
 174 }
 175
 176 static void
 177 mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
 178 {
 179         unsigned long flags;
 180         spin_lock_irqsave(&port->lock, flags);
 181
 182         if ( ctl == -1 )
 183                 out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK);
 184         else
 185                 out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK);
 186
 187         spin_unlock_irqrestore(&port->lock, flags);
 188 }
 189
 190 static int
 191 mpc52xx_uart_startup(struct uart_port *port)
 192 {
 193         struct mpc52xx_psc *psc = PSC(port);
 194
 195         /* Reset/activate the port, clear and enable interrupts */
 196         out_8(&psc->command,MPC52xx_PSC_RST_RX);
 197         out_8(&psc->command,MPC52xx_PSC_RST_TX);
 198
 199         out_be32(&psc->sicr,0); /* UART mode DCD ignored */
 200
 201         out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
 202
 203         out_8(&psc->rfcntl, 0x00);
 204         out_be16(&psc->rfalarm, 0x1ff);
 205         out_8(&psc->tfcntl, 0x07);
 206         out_be16(&psc->tfalarm, 0x80);
 207
 208         port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
 209         out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
 210
 211         out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
 212         out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
 213
 214         return 0;
 215 }
 216
 217 static void
 218 mpc52xx_uart_shutdown(struct uart_port *port)
 219 {
 220         struct mpc52xx_psc *psc = PSC(port);
 221
 222         /* Shut down the port, interrupt and all */
 223         out_8(&psc->command,MPC52xx_PSC_RST_RX);
 224         out_8(&psc->command,MPC52xx_PSC_RST_TX);
 225
 226         port->read_status_mask = 0;
 227         out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
 228 }
 229
 230 static void
 231 mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new,
 232                          struct termios *old)
 233 {
 234         struct mpc52xx_psc *psc = PSC(port);
 235         unsigned long flags;
 236         unsigned char mr1, mr2;
 237         unsigned short ctr;
 238         unsigned int j, baud, quot;
 239
 240         /* Prepare what we're gonna write */
 241         mr1 = 0;
 242
 243         switch (new->c_cflag & CSIZE) {
 244                 case CS5:       mr1 |= MPC52xx_PSC_MODE_5_BITS;
 245                                 break;
 246                 case CS6:       mr1 |= MPC52xx_PSC_MODE_6_BITS;
 247                                 break;
 248                 case CS7:       mr1 |= MPC52xx_PSC_MODE_7_BITS;
 249                                 break;
 250                 case CS8:
 251                 default:        mr1 |= MPC52xx_PSC_MODE_8_BITS;
 252         }
 253
 254         if (new->c_cflag & PARENB) {
 255                 mr1 |= (new->c_cflag & PARODD) ?
 256                         MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
 257         } else
 258                 mr1 |= MPC52xx_PSC_MODE_PARNONE;
 259
 260
 261         mr2 = 0;
 262
 263         if (new->c_cflag & CSTOPB)
 264                 mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
 265         else
 266                 mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
 267                         MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
 268                         MPC52xx_PSC_MODE_ONE_STOP;
 269
 270
 271         baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
 272         quot = uart_get_divisor(port, baud);
 273         ctr = quot & 0xffff;
 274
 275         /* Get the lock */
 276         spin_lock_irqsave(&port->lock, flags);
 277
 278         /* Update the per-port timeout */
 279         uart_update_timeout(port, new->c_cflag, baud);
 280
 281         /* Do our best to flush TX & RX, so we don't loose anything */
 282         /* But we don't wait indefinitly ! */
 283         j = 5000000;    /* Maximum wait */
 284         /* FIXME Can't receive chars since set_termios might be called at early
 285          * boot for the console, all stuff is not yet ready to receive at that
 286          * time and that just makes the kernel oops */
 287         /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
 288         while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
 289                --j)
 290                 udelay(1);
 291
 292         if (!j)
 293                 printk( KERN_ERR "mpc52xx_uart.c: "
 294                         "Unable to flush RX & TX fifos in-time in set_termios."
 295                         "Some chars may have been lost.\n" );
 296
 297         /* Reset the TX & RX */
 298         out_8(&psc->command,MPC52xx_PSC_RST_RX);
 299         out_8(&psc->command,MPC52xx_PSC_RST_TX);
 300
 301         /* Send new mode settings */
 302         out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
 303         out_8(&psc->mode,mr1);
 304         out_8(&psc->mode,mr2);
 305         out_8(&psc->ctur,ctr >> 8);
 306         out_8(&psc->ctlr,ctr & 0xff);
 307
 308         /* Reenable TX & RX */
 309         out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
 310         out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
 311
 312         /* We're all set, release the lock */
 313         spin_unlock_irqrestore(&port->lock, flags);
 314 }
 315
 316 static const char *
 317 mpc52xx_uart_type(struct uart_port *port)
 318 {
 319         return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
 320 }
 321
 322 static void
 323 mpc52xx_uart_release_port(struct uart_port *port)
 324 {
 325         if (port->flags & UPF_IOREMAP) { /* remapped by us ? */
 326                 iounmap(port->membase);
 327                 port->membase = NULL;
 328         }
 329 }
 330
 331 static int
 332 mpc52xx_uart_request_port(struct uart_port *port)
 333 {
 334         if (port->flags & UPF_IOREMAP) /* Need to remap ? */
 335                 port->membase = ioremap(port->mapbase, sizeof(struct mpc52xx_psc));
 336
 337         return port->membase != NULL ? 0 : -EBUSY;
 338 }
 339
 340 static void
 341 mpc52xx_uart_config_port(struct uart_port *port, int flags)
 342 {
 343         if ( (flags & UART_CONFIG_TYPE) &&
 344              (mpc52xx_uart_request_port(port) == 0) )
 345                 port->type = PORT_MPC52xx;
 346 }
 347
 348 static int
 349 mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
 350 {
 351         if ( ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx )
 352                 return -EINVAL;
 353
 354         if ( (ser->irq != port->irq) ||
 355              (ser->io_type != SERIAL_IO_MEM) ||
 356              (ser->baud_base != port->uartclk)  ||
 357              // FIXME Should check addresses/irq as well ?
 358              (ser->hub6 != 0 ) )
 359                 return -EINVAL;
 360
 361         return 0;
 362 }
 363
 364
 365 static struct uart_ops mpc52xx_uart_ops = {
 366         .tx_empty       = mpc52xx_uart_tx_empty,
 367         .set_mctrl      = mpc52xx_uart_set_mctrl,
 368         .get_mctrl      = mpc52xx_uart_get_mctrl,
 369         .stop_tx        = mpc52xx_uart_stop_tx,
 370         .start_tx       = mpc52xx_uart_start_tx,
 371         .send_xchar     = mpc52xx_uart_send_xchar,
 372         .stop_rx        = mpc52xx_uart_stop_rx,
 373         .enable_ms      = mpc52xx_uart_enable_ms,
 374         .break_ctl      = mpc52xx_uart_break_ctl,
 375         .startup        = mpc52xx_uart_startup,
 376         .shutdown       = mpc52xx_uart_shutdown,
 377         .set_termios    = mpc52xx_uart_set_termios,
 378 /*      .pm             = mpc52xx_uart_pm,              Not supported yet */
 379 /*      .set_wake       = mpc52xx_uart_set_wake,        Not supported yet */
 380         .type           = mpc52xx_uart_type,
 381         .release_port   = mpc52xx_uart_release_port,
 382         .request_port   = mpc52xx_uart_request_port,
 383         .config_port    = mpc52xx_uart_config_port,
 384         .verify_port    = mpc52xx_uart_verify_port
 385 };
 386
 387
 388 /* ======================================================================== */
 389 /* Interrupt handling                                                       */
 390 /* ======================================================================== */
 391
 392 static inline int
 393 mpc52xx_uart_int_rx_chars(struct uart_port *port, struct pt_regs *regs)
 394 {
 395         struct tty_struct *tty = port->info->tty;
 396         unsigned char ch;
 397         unsigned short status;
 398
 399         /* While we can read, do so ! */
 400         while ( (status = in_be16(&PSC(port)->mpc52xx_psc_status)) &
 401                 MPC52xx_PSC_SR_RXRDY) {
 402
 403                 /* If we are full, just stop reading */
 404                 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
 405                         break;
 406
 407                 /* Get the char */
 408                 ch = in_8(&PSC(port)->mpc52xx_psc_buffer_8);
 409
 410                 /* Handle sysreq char */
 411 #ifdef SUPPORT_SYSRQ
 412                 if (uart_handle_sysrq_char(port, ch, regs)) {
 413                         port->sysrq = 0;
 414                         continue;
 415                 }
 416 #endif
 417
 418                 /* Store it */
 419                 *tty->flip.char_buf_ptr = ch;
 420                 *tty->flip.flag_buf_ptr = 0;
 421                 port->icount.rx++;
 422
 423                 if ( status & (MPC52xx_PSC_SR_PE |
 424                                MPC52xx_PSC_SR_FE |
 425                                MPC52xx_PSC_SR_RB |
 426                                MPC52xx_PSC_SR_OE) ) {
 427
 428                         if (status & MPC52xx_PSC_SR_RB) {
 429                                 *tty->flip.flag_buf_ptr = TTY_BREAK;
 430                                 uart_handle_break(port);
 431                         } else if (status & MPC52xx_PSC_SR_PE)
 432                                 *tty->flip.flag_buf_ptr = TTY_PARITY;
 433                         else if (status & MPC52xx_PSC_SR_FE)
 434                                 *tty->flip.flag_buf_ptr = TTY_FRAME;
 435                         if (status & MPC52xx_PSC_SR_OE) {
 436                                 /*
 437                                  * Overrun is special, since it's
 438                                  * reported immediately, and doesn't
 439                                  * affect the current character
 440                                  */
 441                                 if (tty->flip.count < (TTY_FLIPBUF_SIZE-1)) {
 442                                         tty->flip.flag_buf_ptr++;
 443                                         tty->flip.char_buf_ptr++;
 444                                         tty->flip.count++;
 445                                 }
 446                                 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
 447                         }
 448
 449                         /* Clear error condition */
 450                         out_8(&PSC(port)->command,MPC52xx_PSC_RST_ERR_STAT);
 451
 452                 }
 453
 454                 tty->flip.char_buf_ptr++;
 455                 tty->flip.flag_buf_ptr++;
 456                 tty->flip.count++;
 457
 458         }
 459
 460         tty_flip_buffer_push(tty);
 461
 462         return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY;
 463 }
 464
 465 static inline int
 466 mpc52xx_uart_int_tx_chars(struct uart_port *port)
 467 {
 468         struct circ_buf *xmit = &port->info->xmit;
 469
 470         /* Process out of band chars */
 471         if (port->x_char) {
 472                 out_8(&PSC(port)->mpc52xx_psc_buffer_8, port->x_char);
 473                 port->icount.tx++;
 474                 port->x_char = 0;
 475                 return 1;
 476         }
 477
 478         /* Nothing to do ? */
 479         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 480                 mpc52xx_uart_stop_tx(port,0);
 481                 return 0;
 482         }
 483
 484         /* Send chars */
 485         while (in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXRDY) {
 486                 out_8(&PSC(port)->mpc52xx_psc_buffer_8, xmit->buf[xmit->tail]);
 487                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 488                 port->icount.tx++;
 489                 if (uart_circ_empty(xmit))
 490                         break;
 491         }
 492
 493         /* Wake up */
 494         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 495                 uart_write_wakeup(port);
 496
 497         /* Maybe we're done after all */
 498         if (uart_circ_empty(xmit)) {
 499                 mpc52xx_uart_stop_tx(port,0);
 500                 return 0;
 501         }
 502
 503         return 1;
 504 }
 505
 506 static irqreturn_t
 507 mpc52xx_uart_int(int irq, void *dev_id, struct pt_regs *regs)
 508 {
 509         struct uart_port *port = (struct uart_port *) dev_id;
 510         unsigned long pass = ISR_PASS_LIMIT;
 511         unsigned int keepgoing;
 512         unsigned short status;
 513
 514         if ( irq != port->irq ) {
 515                 printk( KERN_WARNING
 516                         "mpc52xx_uart_int : " \
 517                         "Received wrong int %d. Waiting for %d\n",
 518                        irq, port->irq);
 519                 return IRQ_NONE;
 520         }
 521
 522         spin_lock(&port->lock);
 523
 524         /* While we have stuff to do, we continue */
 525         do {
 526                 /* If we don't find anything to do, we stop */
 527                 keepgoing = 0;
 528
 529                 /* Read status */
 530                 status = in_be16(&PSC(port)->mpc52xx_psc_isr);
 531                 status &= port->read_status_mask;
 532
 533                 /* Do we need to receive chars ? */
 534                 /* For this RX interrupts must be on and some chars waiting */
 535                 if ( status & MPC52xx_PSC_IMR_RXRDY )
 536                         keepgoing |= mpc52xx_uart_int_rx_chars(port, regs);
 537
 538                 /* Do we need to send chars ? */
 539                 /* For this, TX must be ready and TX interrupt enabled */
 540                 if ( status & MPC52xx_PSC_IMR_TXRDY )
 541                         keepgoing |= mpc52xx_uart_int_tx_chars(port);
 542
 543                 /* Limit number of iteration */
 544                 if ( !(--pass) )
 545                         keepgoing = 0;
 546
 547         } while (keepgoing);
 548
 549         spin_unlock(&port->lock);
 550
 551         return IRQ_HANDLED;
 552 }
 553
 554
 555 /* ======================================================================== */
 556 /* Console ( if applicable )                                                */
 557 /* ======================================================================== */
 558
 559 #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
 560
 561 static void __init
 562 mpc52xx_console_get_options(struct uart_port *port,
 563                             int *baud, int *parity, int *bits, int *flow)
 564 {
 565         struct mpc52xx_psc *psc = PSC(port);
 566         unsigned char mr1;
 567
 568         /* Read the mode registers */
 569         out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
 570         mr1 = in_8(&psc->mode);
 571
 572         /* CT{U,L}R are write-only ! */
 573         *baud = __res.bi_baudrate ?
 574                 __res.bi_baudrate : CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
 575
 576         /* Parse them */
 577         switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
 578                 case MPC52xx_PSC_MODE_5_BITS:   *bits = 5; break;
 579                 case MPC52xx_PSC_MODE_6_BITS:   *bits = 6; break;
 580                 case MPC52xx_PSC_MODE_7_BITS:   *bits = 7; break;
 581                 case MPC52xx_PSC_MODE_8_BITS:
 582                 default:                        *bits = 8;
 583         }
 584
 585         if (mr1 & MPC52xx_PSC_MODE_PARNONE)
 586                 *parity = 'n';
 587         else
 588                 *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
 589 }
 590
 591 static void
 592 mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
 593 {
 594         struct uart_port *port = &mpc52xx_uart_ports[co->index];
 595         struct mpc52xx_psc *psc = PSC(port);
 596         unsigned int i, j;
 597
 598         /* Disable interrupts */
 599         out_be16(&psc->mpc52xx_psc_imr, 0);
 600
 601         /* Wait the TX buffer to be empty */
 602         j = 5000000;    /* Maximum wait */
 603         while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
 604                --j)
 605                 udelay(1);
 606
 607         /* Write all the chars */
 608         for ( i=0 ; i<count ; i++ ) {
 609
 610                 /* Send the char */
 611                 out_8(&psc->mpc52xx_psc_buffer_8, *s);
 612
 613                 /* Line return handling */
 614                 if ( *s++ == '\n' )
 615                         out_8(&psc->mpc52xx_psc_buffer_8, '\r');
 616
 617                 /* Wait the TX buffer to be empty */
 618                 j = 20000;      /* Maximum wait */
 619                 while (!(in_be16(&psc->mpc52xx_psc_status) &
 620                          MPC52xx_PSC_SR_TXEMP) && --j)
 621                         udelay(1);
 622         }
 623
 624         /* Restore interrupt state */
 625         out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
 626 }
 627
 628 static int __init
 629 mpc52xx_console_setup(struct console *co, char *options)
 630 {
 631         struct uart_port *port = &mpc52xx_uart_ports[co->index];
 632
 633         int baud = 9600;
 634         int bits = 8;
 635         int parity = 'n';
 636         int flow = 'n';
 637
 638         if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
 639                 return -EINVAL;
 640
 641         /* Basic port init. Needed since we use some uart_??? func before
 642          * real init for early access */
 643         port->lock      = SPIN_LOCK_UNLOCKED;
 644         port->uartclk   = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
 645         port->ops       = &mpc52xx_uart_ops;
 646         port->mapbase   = MPC52xx_PSCx(co->index);
 647
 648                 /* We ioremap ourself */
 649         port->membase = ioremap(port->mapbase, sizeof(struct mpc52xx_psc));
 650         if (port->membase == NULL) {
 651                 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
 652                 return -EBUSY;
 653         }
 654
 655         /* Setup the port parameters accoding to options */
 656         if (options)
 657                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 658         else
 659                 mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
 660
 661         return uart_set_options(port, co, baud, parity, bits, flow);
 662 }
 663
 664
 665 extern struct uart_driver mpc52xx_uart_driver;
 666
 667 static struct console mpc52xx_console = {
 668         .name   = "ttyS",
 669         .write  = mpc52xx_console_write,
 670         .device = uart_console_device,
 671         .setup  = mpc52xx_console_setup,
 672         .flags  = CON_PRINTBUFFER,
 673         .index  = -1,   /* Specified on the cmdline (e.g. console=ttyS0 ) */
 674         .data   = &mpc52xx_uart_driver,
 675 };
 676
 677
 678 static int __init
 679 mpc52xx_console_init(void)
 680 {
 681         register_console(&mpc52xx_console);
 682         return 0;
 683 }
 684
 685 console_initcall(mpc52xx_console_init);
 686
 687 #define MPC52xx_PSC_CONSOLE &mpc52xx_console
 688 #else
 689 #define MPC52xx_PSC_CONSOLE NULL
 690 #endif
 691
 692
 693 /* ======================================================================== */
 694 /* UART Driver                                                              */
 695 /* ======================================================================== */
 696
 697 static struct uart_driver mpc52xx_uart_driver = {
 698         .owner          = THIS_MODULE,
 699         .driver_name    = "mpc52xx_psc_uart",
 700         .dev_name       = "ttyS",
 701         .devfs_name     = "ttyS",
 702         .major          = TTY_MAJOR,
 703         .minor          = 64,
 704         .nr             = MPC52xx_PSC_MAXNUM,
 705         .cons           = MPC52xx_PSC_CONSOLE,
 706 };
 707
 708
 709 /* ======================================================================== */
 710 /* OCP Driver                                                               */
 711 /* ======================================================================== */
 712
 713 static int __devinit
 714 mpc52xx_uart_probe(struct ocp_device *ocp)
 715 {
 716         struct uart_port *port = NULL;
 717         int idx, ret;
 718
 719         /* Get the corresponding port struct */
 720         idx = ocp->def->index;
 721         if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
 722                 return -EINVAL;
 723
 724         port = &mpc52xx_uart_ports[idx];
 725
 726         /* Init the port structure */
 727         port->lock      = SPIN_LOCK_UNLOCKED;
 728         port->mapbase   = ocp->def->paddr;
 729         port->irq       = ocp->def->irq;
 730         port->uartclk   = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
 731         port->fifosize  = 255; /* Should be 512 ! But it can't be */
 732                                /* stored in a unsigned char       */
 733         port->iotype    = UPIO_MEM;
 734         port->flags     = UPF_BOOT_AUTOCONF |
 735                           ( uart_console(port) ? 0 : UPF_IOREMAP );
 736         port->line      = idx;
 737         port->ops       = &mpc52xx_uart_ops;
 738         port->read_status_mask = 0;
 739
 740         /* Requests the mem & irqs */
 741         /* Unlike other serial drivers, we reserve the resources here, so we
 742          * can detect early if multiple drivers uses the same PSC. Special
 743          * care must be taken with the console PSC
 744          */
 745         ret = request_irq(
 746                 port->irq, mpc52xx_uart_int,
 747                 SA_INTERRUPT | SA_SAMPLE_RANDOM, "mpc52xx_psc_uart", port);
 748         if (ret)
 749                 goto error;
 750
 751         ret = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
 752                                  "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
 753         if (ret)
 754                 goto free_irq;
 755
 756         /* Add the port to the uart sub-system */
 757         ret = uart_add_one_port(&mpc52xx_uart_driver, port);
 758         if (ret)
 759                 goto release_mem;
 760
 761         ocp_set_drvdata(ocp, (void*)port);
 762
 763         return 0;
 764
 765
 766 free_irq:
 767         free_irq(port->irq, mpc52xx_uart_int);
 768
 769 release_mem:
 770         release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
 771
 772 error:
 773         if (uart_console(port))
 774                 printk( "mpc52xx_uart.c: Error during resource alloction for "
 775                         "the console port !!! Check that the console PSC is "
 776                         "not used by another OCP driver !!!\n" );
 777
 778         return ret;
 779 }
 780
 781 static void
 782 mpc52xx_uart_remove(struct ocp_device *ocp)
 783 {
 784         struct uart_port *port = (struct uart_port *) ocp_get_drvdata(ocp);
 785
 786         ocp_set_drvdata(ocp, NULL);
 787
 788         if (port) {
 789                 uart_remove_one_port(&mpc52xx_uart_driver, port);
 790                 release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
 791                 free_irq(port->irq, mpc52xx_uart_int);
 792         }
 793 }
 794
 795 #ifdef CONFIG_PM
 796 static int
 797 mpc52xx_uart_suspend(struct ocp_device *ocp, u32 state)
 798 {
 799         struct uart_port *port = (struct uart_port *) ocp_get_drvdata(ocp);
 800
 801         uart_suspend_port(&mpc52xx_uart_driver, port);
 802
 803         return 0;
 804 }
 805
 806 static int
 807 mpc52xx_uart_resume(struct ocp_device *ocp)
 808 {
 809         struct uart_port *port = (struct uart_port *) ocp_get_drvdata(ocp);
 810
 811         uart_resume_port(&mpc52xx_uart_driver, port);
 812
 813         return 0;
 814 }
 815 #endif
 816
 817 static struct ocp_device_id mpc52xx_uart_ids[] __devinitdata = {
 818         { .vendor = OCP_VENDOR_FREESCALE, .function = OCP_FUNC_PSC_UART },
 819         { .vendor = OCP_VENDOR_INVALID /* Terminating entry */ }
 820 };
 821
 822 MODULE_DEVICE_TABLE(ocp, mpc52xx_uart_ids);
 823
 824 static struct ocp_driver mpc52xx_uart_ocp_driver = {
 825         .name           = "mpc52xx_psc_uart",
 826         .id_table       = mpc52xx_uart_ids,
 827         .probe          = mpc52xx_uart_probe,
 828         .remove         = mpc52xx_uart_remove,
 829 #ifdef CONFIG_PM
 830         .suspend        = mpc52xx_uart_suspend,
 831         .resume         = mpc52xx_uart_resume,
 832 #endif
 833 };
 834
 835
 836 /* ======================================================================== */
 837 /* Module                                                                   */
 838 /* ======================================================================== */
 839
 840 static int __init
 841 mpc52xx_uart_init(void)
 842 {
 843         int ret;
 844
 845         printk(KERN_INFO "Serial: MPC52xx PSC driver\n");
 846
 847         ret = uart_register_driver(&mpc52xx_uart_driver);
 848         if (ret)
 849                 return ret;
 850
 851         ret = ocp_register_driver(&mpc52xx_uart_ocp_driver);
 852
 853         return ret;
 854 }
 855
 856 static void __exit
 857 mpc52xx_uart_exit(void)
 858 {
 859         ocp_unregister_driver(&mpc52xx_uart_ocp_driver);
 860         uart_unregister_driver(&mpc52xx_uart_driver);
 861 }
 862
 863
 864 module_init(mpc52xx_uart_init);
 865 module_exit(mpc52xx_uart_exit);
 866
 867 MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
 868 MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
 869 MODULE_LICENSE("GPL");