2 * QLogic ISP1020 Intelligent SCSI Processor Driver (PCI)
3 * Written by Erik H. Moe, ehm@cris.com
4 * Copyright 1995, Erik H. Moe
5 * Copyright 1996, 1997 Michael A. Griffith <grif@acm.org>
6 * Copyright 2000, Jayson C. Vantuyl <vantuyl@csc.smsu.edu>
7 * and Bryon W. Roche <bryon@csc.smsu.edu>
9 * 64-bit addressing added by Kanoj Sarcar <kanoj@sgi.com>
10 * and Leo Dagum <dagum@sgi.com>
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2, or (at your option) any
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
23 #include <linux/blkdev.h>
24 #include <linux/config.h>
25 #include <linux/kernel.h>
26 #include <linux/string.h>
27 #include <linux/ioport.h>
28 #include <linux/sched.h>
29 #include <linux/types.h>
30 #include <linux/pci.h>
31 #include <linux/delay.h>
32 #include <linux/unistd.h>
33 #include <linux/spinlock.h>
34 #include <linux/interrupt.h>
37 #include <asm/byteorder.h>
39 #include <scsi/scsi_host.h>
40 #include "qlogicisp.h"
42 /* Configuration section *****************************************************/
44 /* Set the following macro to 1 to reload the ISP1020's firmware. This is
45 the latest firmware provided by QLogic. This may be an earlier/later
46 revision than supplied by your board. */
48 #define RELOAD_FIRMWARE 1
50 /* Set the following macro to 1 to reload the ISP1020's defaults from nvram.
51 If you are not sure of your settings, leave this alone, the driver will
52 use a set of 'safe' defaults */
54 #define USE_NVRAM_DEFAULTS 0
56 /* Macros used for debugging */
58 #define DEBUG_ISP1020 0
59 #define DEBUG_ISP1020_INTR 0
60 #define DEBUG_ISP1020_SETUP 0
63 #define DEFAULT_LOOP_COUNT 1000000
65 /* End Configuration section *************************************************/
67 #include <linux/module.h>
71 # define TRACE_BUF_LEN (32*1024)
83 #define TRACE(w, i, a) \
85 unsigned long flags; \
87 trace.buf[trace.next].name = (w); \
88 trace.buf[trace.next].time = jiffies; \
89 trace.buf[trace.next].index = (i); \
90 trace.buf[trace.next].addr = (long) (a); \
91 trace.next = (trace.next + 1) & (TRACE_BUF_LEN - 1); \
95 # define TRACE(w, i, a)
99 #define ENTER(x) printk("isp1020 : entering %s()\n", x);
100 #define LEAVE(x) printk("isp1020 : leaving %s()\n", x);
106 #endif /* DEBUG_ISP1020 */
108 #if DEBUG_ISP1020_INTR
109 #define ENTER_INTR(x) printk("isp1020 : entering %s()\n", x);
110 #define LEAVE_INTR(x) printk("isp1020 : leaving %s()\n", x);
111 #define DEBUG_INTR(x) x
113 #define ENTER_INTR(x)
114 #define LEAVE_INTR(x)
115 #define DEBUG_INTR(x)
116 #endif /* DEBUG ISP1020_INTR */
118 #define ISP1020_REV_ID 1
120 #define MAX_TARGETS 16
123 /* host configuration and control registers */
124 #define HOST_HCCR 0xc0 /* host command and control */
126 /* pci bus interface registers */
127 #define PCI_ID_LOW 0x00 /* vendor id */
128 #define PCI_ID_HIGH 0x02 /* device id */
129 #define ISP_CFG0 0x04 /* configuration register #0 */
130 #define ISP_CFG0_HWMSK 0x000f /* Hardware revision mask */
131 #define ISP_CFG0_1020 0x0001 /* ISP1020 */
132 #define ISP_CFG0_1020A 0x0002 /* ISP1020A */
133 #define ISP_CFG0_1040 0x0003 /* ISP1040 */
134 #define ISP_CFG0_1040A 0x0004 /* ISP1040A */
135 #define ISP_CFG0_1040B 0x0005 /* ISP1040B */
136 #define ISP_CFG0_1040C 0x0006 /* ISP1040C */
137 #define ISP_CFG1 0x06 /* configuration register #1 */
138 #define ISP_CFG1_F128 0x0040 /* 128-byte FIFO threshold */
139 #define ISP_CFG1_F64 0x0030 /* 128-byte FIFO threshold */
140 #define ISP_CFG1_F32 0x0020 /* 128-byte FIFO threshold */
141 #define ISP_CFG1_F16 0x0010 /* 128-byte FIFO threshold */
142 #define ISP_CFG1_BENAB 0x0004 /* Global Bus burst enable */
143 #define ISP_CFG1_SXP 0x0001 /* SXP register select */
144 #define PCI_INTF_CTL 0x08 /* pci interface control */
145 #define PCI_INTF_STS 0x0a /* pci interface status */
146 #define PCI_SEMAPHORE 0x0c /* pci semaphore */
147 #define PCI_NVRAM 0x0e /* pci nvram interface */
148 #define CDMA_CONF 0x20 /* Command DMA Config */
149 #define DDMA_CONF 0x40 /* Data DMA Config */
150 #define DMA_CONF_SENAB 0x0008 /* SXP to DMA Data enable */
151 #define DMA_CONF_RIRQ 0x0004 /* RISC interrupt enable */
152 #define DMA_CONF_BENAB 0x0002 /* Bus burst enable */
153 #define DMA_CONF_DIR 0x0001 /* DMA direction (0=fifo->host 1=host->fifo) */
155 /* mailbox registers */
156 #define MBOX0 0x70 /* mailbox 0 */
157 #define MBOX1 0x72 /* mailbox 1 */
158 #define MBOX2 0x74 /* mailbox 2 */
159 #define MBOX3 0x76 /* mailbox 3 */
160 #define MBOX4 0x78 /* mailbox 4 */
161 #define MBOX5 0x7a /* mailbox 5 */
162 #define MBOX6 0x7c /* mailbox 6 */
163 #define MBOX7 0x7e /* mailbox 7 */
165 /* mailbox command complete status codes */
166 #define MBOX_COMMAND_COMPLETE 0x4000
167 #define INVALID_COMMAND 0x4001
168 #define HOST_INTERFACE_ERROR 0x4002
169 #define TEST_FAILED 0x4003
170 #define COMMAND_ERROR 0x4005
171 #define COMMAND_PARAM_ERROR 0x4006
173 /* async event status codes */
174 #define ASYNC_SCSI_BUS_RESET 0x8001
175 #define SYSTEM_ERROR 0x8002
176 #define REQUEST_TRANSFER_ERROR 0x8003
177 #define RESPONSE_TRANSFER_ERROR 0x8004
178 #define REQUEST_QUEUE_WAKEUP 0x8005
179 #define EXECUTION_TIMEOUT_RESET 0x8006
181 #ifdef CONFIG_QL_ISP_A64
183 #define CONTINUATION_SEGS 5
184 #define MAX_CONTINUATION_ENTRIES 254
187 #define CONTINUATION_SEGS 7
188 #endif /* CONFIG_QL_ISP_A64 */
190 struct Entry_header
{
197 /* entry header type commands */
198 #ifdef CONFIG_QL_ISP_A64
199 #define ENTRY_COMMAND 9
200 #define ENTRY_CONTINUATION 0xa
202 #define ENTRY_COMMAND 1
203 #define ENTRY_CONTINUATION 2
204 #endif /* CONFIG_QL_ISP_A64 */
206 #define ENTRY_STATUS 3
207 #define ENTRY_MARKER 4
208 #define ENTRY_EXTENDED_COMMAND 5
210 /* entry header flag definitions */
211 #define EFLAG_CONTINUATION 1
213 #define EFLAG_BAD_HEADER 4
214 #define EFLAG_BAD_PAYLOAD 8
218 #ifdef CONFIG_QL_ISP_A64
224 struct Command_Entry
{
225 struct Entry_header hdr
;
230 u_short control_flags
;
235 #ifdef CONFIG_QL_ISP_A64
239 struct dataseg dataseg
[IOCB_SEGS
];
242 /* command entry control flag definitions */
243 #define CFLAG_NODISC 0x01
244 #define CFLAG_HEAD_TAG 0x02
245 #define CFLAG_ORDERED_TAG 0x04
246 #define CFLAG_SIMPLE_TAG 0x08
247 #define CFLAG_TAR_RTN 0x10
248 #define CFLAG_READ 0x20
249 #define CFLAG_WRITE 0x40
251 struct Ext_Command_Entry
{
252 struct Entry_header hdr
;
257 u_short control_flags
;
264 struct Continuation_Entry
{
265 struct Entry_header hdr
;
266 #ifndef CONFIG_QL_ISP_A64
269 struct dataseg dataseg
[CONTINUATION_SEGS
];
272 struct Marker_Entry
{
273 struct Entry_header hdr
;
282 /* marker entry modifier definitions */
283 #define SYNC_DEVICE 0
284 #define SYNC_TARGET 1
287 struct Status_Entry
{
288 struct Entry_header hdr
;
291 u_short completion_status
;
293 u_short status_flags
;
295 u_short req_sense_len
;
298 u_char req_sense_data
[32];
301 /* status entry completion status definitions */
302 #define CS_COMPLETE 0x0000
303 #define CS_INCOMPLETE 0x0001
304 #define CS_DMA_ERROR 0x0002
305 #define CS_TRANSPORT_ERROR 0x0003
306 #define CS_RESET_OCCURRED 0x0004
307 #define CS_ABORTED 0x0005
308 #define CS_TIMEOUT 0x0006
309 #define CS_DATA_OVERRUN 0x0007
310 #define CS_COMMAND_OVERRUN 0x0008
311 #define CS_STATUS_OVERRUN 0x0009
312 #define CS_BAD_MESSAGE 0x000a
313 #define CS_NO_MESSAGE_OUT 0x000b
314 #define CS_EXT_ID_FAILED 0x000c
315 #define CS_IDE_MSG_FAILED 0x000d
316 #define CS_ABORT_MSG_FAILED 0x000e
317 #define CS_REJECT_MSG_FAILED 0x000f
318 #define CS_NOP_MSG_FAILED 0x0010
319 #define CS_PARITY_ERROR_MSG_FAILED 0x0011
320 #define CS_DEVICE_RESET_MSG_FAILED 0x0012
321 #define CS_ID_MSG_FAILED 0x0013
322 #define CS_UNEXP_BUS_FREE 0x0014
323 #define CS_DATA_UNDERRUN 0x0015
325 /* status entry state flag definitions */
326 #define SF_GOT_BUS 0x0100
327 #define SF_GOT_TARGET 0x0200
328 #define SF_SENT_CDB 0x0400
329 #define SF_TRANSFERRED_DATA 0x0800
330 #define SF_GOT_STATUS 0x1000
331 #define SF_GOT_SENSE 0x2000
333 /* status entry status flag definitions */
334 #define STF_DISCONNECT 0x0001
335 #define STF_SYNCHRONOUS 0x0002
336 #define STF_PARITY_ERROR 0x0004
337 #define STF_BUS_RESET 0x0008
338 #define STF_DEVICE_RESET 0x0010
339 #define STF_ABORTED 0x0020
340 #define STF_TIMEOUT 0x0040
341 #define STF_NEGOTIATION 0x0080
343 /* interface control commands */
344 #define ISP_RESET 0x0001
345 #define ISP_EN_INT 0x0002
346 #define ISP_EN_RISC 0x0004
348 /* host control commands */
349 #define HCCR_NOP 0x0000
350 #define HCCR_RESET 0x1000
351 #define HCCR_PAUSE 0x2000
352 #define HCCR_RELEASE 0x3000
353 #define HCCR_SINGLE_STEP 0x4000
354 #define HCCR_SET_HOST_INTR 0x5000
355 #define HCCR_CLEAR_HOST_INTR 0x6000
356 #define HCCR_CLEAR_RISC_INTR 0x7000
357 #define HCCR_BP_ENABLE 0x8000
358 #define HCCR_BIOS_DISABLE 0x9000
359 #define HCCR_TEST_MODE 0xf000
361 #define RISC_BUSY 0x0004
363 /* mailbox commands */
364 #define MBOX_NO_OP 0x0000
365 #define MBOX_LOAD_RAM 0x0001
366 #define MBOX_EXEC_FIRMWARE 0x0002
367 #define MBOX_DUMP_RAM 0x0003
368 #define MBOX_WRITE_RAM_WORD 0x0004
369 #define MBOX_READ_RAM_WORD 0x0005
370 #define MBOX_MAILBOX_REG_TEST 0x0006
371 #define MBOX_VERIFY_CHECKSUM 0x0007
372 #define MBOX_ABOUT_FIRMWARE 0x0008
373 #define MBOX_CHECK_FIRMWARE 0x000e
374 #define MBOX_INIT_REQ_QUEUE 0x0010
375 #define MBOX_INIT_RES_QUEUE 0x0011
376 #define MBOX_EXECUTE_IOCB 0x0012
377 #define MBOX_WAKE_UP 0x0013
378 #define MBOX_STOP_FIRMWARE 0x0014
379 #define MBOX_ABORT 0x0015
380 #define MBOX_ABORT_DEVICE 0x0016
381 #define MBOX_ABORT_TARGET 0x0017
382 #define MBOX_BUS_RESET 0x0018
383 #define MBOX_STOP_QUEUE 0x0019
384 #define MBOX_START_QUEUE 0x001a
385 #define MBOX_SINGLE_STEP_QUEUE 0x001b
386 #define MBOX_ABORT_QUEUE 0x001c
387 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d
388 #define MBOX_GET_FIRMWARE_STATUS 0x001f
389 #define MBOX_GET_INIT_SCSI_ID 0x0020
390 #define MBOX_GET_SELECT_TIMEOUT 0x0021
391 #define MBOX_GET_RETRY_COUNT 0x0022
392 #define MBOX_GET_TAG_AGE_LIMIT 0x0023
393 #define MBOX_GET_CLOCK_RATE 0x0024
394 #define MBOX_GET_ACT_NEG_STATE 0x0025
395 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026
396 #define MBOX_GET_PCI_PARAMS 0x0027
397 #define MBOX_GET_TARGET_PARAMS 0x0028
398 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029
399 #define MBOX_SET_INIT_SCSI_ID 0x0030
400 #define MBOX_SET_SELECT_TIMEOUT 0x0031
401 #define MBOX_SET_RETRY_COUNT 0x0032
402 #define MBOX_SET_TAG_AGE_LIMIT 0x0033
403 #define MBOX_SET_CLOCK_RATE 0x0034
404 #define MBOX_SET_ACTIVE_NEG_STATE 0x0035
405 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036
406 #define MBOX_SET_PCI_CONTROL_PARAMS 0x0037
407 #define MBOX_SET_TARGET_PARAMS 0x0038
408 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039
409 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040
410 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041
411 #define MBOX_EXEC_BIOS_IOCB 0x0042
413 #ifdef CONFIG_QL_ISP_A64
414 #define MBOX_CMD_INIT_REQUEST_QUEUE_64 0x0052
415 #define MBOX_CMD_INIT_RESPONSE_QUEUE_64 0x0053
416 #endif /* CONFIG_QL_ISP_A64 */
418 #include "qlogicisp_asm.c"
420 #define PACKB(a, b) (((a)<<4)|(b))
422 static const u_char mbox_param
[] = {
423 PACKB(1, 1), /* MBOX_NO_OP */
424 PACKB(5, 5), /* MBOX_LOAD_RAM */
425 PACKB(2, 0), /* MBOX_EXEC_FIRMWARE */
426 PACKB(5, 5), /* MBOX_DUMP_RAM */
427 PACKB(3, 3), /* MBOX_WRITE_RAM_WORD */
428 PACKB(2, 3), /* MBOX_READ_RAM_WORD */
429 PACKB(6, 6), /* MBOX_MAILBOX_REG_TEST */
430 PACKB(2, 3), /* MBOX_VERIFY_CHECKSUM */
431 PACKB(1, 3), /* MBOX_ABOUT_FIRMWARE */
432 PACKB(0, 0), /* 0x0009 */
433 PACKB(0, 0), /* 0x000a */
434 PACKB(0, 0), /* 0x000b */
435 PACKB(0, 0), /* 0x000c */
436 PACKB(0, 0), /* 0x000d */
437 PACKB(1, 2), /* MBOX_CHECK_FIRMWARE */
438 PACKB(0, 0), /* 0x000f */
439 PACKB(5, 5), /* MBOX_INIT_REQ_QUEUE */
440 PACKB(6, 6), /* MBOX_INIT_RES_QUEUE */
441 PACKB(4, 4), /* MBOX_EXECUTE_IOCB */
442 PACKB(2, 2), /* MBOX_WAKE_UP */
443 PACKB(1, 6), /* MBOX_STOP_FIRMWARE */
444 PACKB(4, 4), /* MBOX_ABORT */
445 PACKB(2, 2), /* MBOX_ABORT_DEVICE */
446 PACKB(3, 3), /* MBOX_ABORT_TARGET */
447 PACKB(2, 2), /* MBOX_BUS_RESET */
448 PACKB(2, 3), /* MBOX_STOP_QUEUE */
449 PACKB(2, 3), /* MBOX_START_QUEUE */
450 PACKB(2, 3), /* MBOX_SINGLE_STEP_QUEUE */
451 PACKB(2, 3), /* MBOX_ABORT_QUEUE */
452 PACKB(2, 4), /* MBOX_GET_DEV_QUEUE_STATUS */
453 PACKB(0, 0), /* 0x001e */
454 PACKB(1, 3), /* MBOX_GET_FIRMWARE_STATUS */
455 PACKB(1, 2), /* MBOX_GET_INIT_SCSI_ID */
456 PACKB(1, 2), /* MBOX_GET_SELECT_TIMEOUT */
457 PACKB(1, 3), /* MBOX_GET_RETRY_COUNT */
458 PACKB(1, 2), /* MBOX_GET_TAG_AGE_LIMIT */
459 PACKB(1, 2), /* MBOX_GET_CLOCK_RATE */
460 PACKB(1, 2), /* MBOX_GET_ACT_NEG_STATE */
461 PACKB(1, 2), /* MBOX_GET_ASYNC_DATA_SETUP_TIME */
462 PACKB(1, 3), /* MBOX_GET_PCI_PARAMS */
463 PACKB(2, 4), /* MBOX_GET_TARGET_PARAMS */
464 PACKB(2, 4), /* MBOX_GET_DEV_QUEUE_PARAMS */
465 PACKB(0, 0), /* 0x002a */
466 PACKB(0, 0), /* 0x002b */
467 PACKB(0, 0), /* 0x002c */
468 PACKB(0, 0), /* 0x002d */
469 PACKB(0, 0), /* 0x002e */
470 PACKB(0, 0), /* 0x002f */
471 PACKB(2, 2), /* MBOX_SET_INIT_SCSI_ID */
472 PACKB(2, 2), /* MBOX_SET_SELECT_TIMEOUT */
473 PACKB(3, 3), /* MBOX_SET_RETRY_COUNT */
474 PACKB(2, 2), /* MBOX_SET_TAG_AGE_LIMIT */
475 PACKB(2, 2), /* MBOX_SET_CLOCK_RATE */
476 PACKB(2, 2), /* MBOX_SET_ACTIVE_NEG_STATE */
477 PACKB(2, 2), /* MBOX_SET_ASYNC_DATA_SETUP_TIME */
478 PACKB(3, 3), /* MBOX_SET_PCI_CONTROL_PARAMS */
479 PACKB(4, 4), /* MBOX_SET_TARGET_PARAMS */
480 PACKB(4, 4), /* MBOX_SET_DEV_QUEUE_PARAMS */
481 PACKB(0, 0), /* 0x003a */
482 PACKB(0, 0), /* 0x003b */
483 PACKB(0, 0), /* 0x003c */
484 PACKB(0, 0), /* 0x003d */
485 PACKB(0, 0), /* 0x003e */
486 PACKB(0, 0), /* 0x003f */
487 PACKB(1, 2), /* MBOX_RETURN_BIOS_BLOCK_ADDR */
488 PACKB(6, 1), /* MBOX_WRITE_FOUR_RAM_WORDS */
489 PACKB(2, 3) /* MBOX_EXEC_BIOS_IOCB */
490 #ifdef CONFIG_QL_ISP_A64
491 ,PACKB(0, 0), /* 0x0043 */
492 PACKB(0, 0), /* 0x0044 */
493 PACKB(0, 0), /* 0x0045 */
494 PACKB(0, 0), /* 0x0046 */
495 PACKB(0, 0), /* 0x0047 */
496 PACKB(0, 0), /* 0x0048 */
497 PACKB(0, 0), /* 0x0049 */
498 PACKB(0, 0), /* 0x004a */
499 PACKB(0, 0), /* 0x004b */
500 PACKB(0, 0), /* 0x004c */
501 PACKB(0, 0), /* 0x004d */
502 PACKB(0, 0), /* 0x004e */
503 PACKB(0, 0), /* 0x004f */
504 PACKB(0, 0), /* 0x0050 */
505 PACKB(0, 0), /* 0x0051 */
506 PACKB(8, 8), /* MBOX_CMD_INIT_REQUEST_QUEUE_64 (0x0052) */
507 PACKB(8, 8) /* MBOX_CMD_INIT_RESPONSE_QUEUE_64 (0x0053) */
508 #endif /* CONFIG_QL_ISP_A64 */
511 #define MAX_MBOX_COMMAND (sizeof(mbox_param)/sizeof(u_short))
514 u_short fifo_threshold
;
515 u_short host_adapter_enable
;
516 u_short initiator_scsi_id
;
517 u_short bus_reset_delay
;
520 u_short async_data_setup_time
;
521 u_short req_ack_active_negation
;
522 u_short data_line_active_negation
;
523 u_short data_dma_burst_enable
;
524 u_short command_dma_burst_enable
;
526 u_short selection_timeout
;
527 u_short max_queue_depth
;
535 * 7 Disconnect Privilege
537 * 5 Wide Data Transfers
538 * 4 Synchronous Data Transfers
540 * 2 Automatic Request Sense
541 * 1 Stop Queue on Check Condition
542 * 0 Renegotiate on Error
546 u_short device_flags
;
547 u_short execution_throttle
;
548 u_short synchronous_period
;
549 u_short synchronous_offset
;
550 u_short device_enable
;
551 u_short reserved
; /* pad */
555 * The result queue can be quite a bit smaller since continuation entries
556 * do not show up there:
558 #define RES_QUEUE_LEN ((QLOGICISP_REQ_QUEUE_LEN + 1) / 8 - 1)
559 #define QUEUE_ENTRY_LEN 64
560 #define QSIZE(entries) (((entries) + 1) * QUEUE_ENTRY_LEN)
562 struct isp_queue_entry
{
563 char __opaque
[QUEUE_ENTRY_LEN
];
566 struct isp1020_hostdata
{
569 struct host_param host_param
;
570 struct dev_param dev_param
[MAX_TARGETS
];
571 struct pci_dev
*pci_dev
;
573 struct isp_queue_entry
*res_cpu
; /* CPU-side address of response queue. */
574 struct isp_queue_entry
*req_cpu
; /* CPU-size address of request queue. */
576 /* result and request queues (shared with isp1020): */
577 u_int req_in_ptr
; /* index of next request slot */
578 u_int res_out_ptr
; /* index of next result slot */
580 /* this is here so the queues are nicely aligned */
581 long send_marker
; /* do we need to send a marker? */
583 /* The cmd->handle has a fixed size, and is only 32-bits. We
584 * need to take care to handle 64-bit systems correctly thus what
585 * we actually place in cmd->handle is an index to the following
586 * table. Kudos to Matt Jacob for the technique. -DaveM
588 Scsi_Cmnd
*cmd_slots
[QLOGICISP_REQ_QUEUE_LEN
+ 1];
590 dma_addr_t res_dma
; /* PCI side view of response queue */
591 dma_addr_t req_dma
; /* PCI side view of request queue */
594 /* queue length's _must_ be power of two: */
595 #define QUEUE_DEPTH(in, out, ql) ((in - out) & (ql))
596 #define REQ_QUEUE_DEPTH(in, out) QUEUE_DEPTH(in, out, \
597 QLOGICISP_REQ_QUEUE_LEN)
598 #define RES_QUEUE_DEPTH(in, out) QUEUE_DEPTH(in, out, RES_QUEUE_LEN)
600 static void isp1020_enable_irqs(struct Scsi_Host
*);
601 static void isp1020_disable_irqs(struct Scsi_Host
*);
602 static int isp1020_init(struct Scsi_Host
*);
603 static int isp1020_reset_hardware(struct Scsi_Host
*);
604 static int isp1020_set_defaults(struct Scsi_Host
*);
605 static int isp1020_load_parameters(struct Scsi_Host
*);
606 static int isp1020_mbox_command(struct Scsi_Host
*, u_short
[]);
607 static int isp1020_return_status(struct Status_Entry
*);
608 static void isp1020_intr_handler(int, void *, struct pt_regs
*);
609 static irqreturn_t
do_isp1020_intr_handler(int, void *, struct pt_regs
*);
611 #if USE_NVRAM_DEFAULTS
612 static int isp1020_get_defaults(struct Scsi_Host
*);
613 static int isp1020_verify_nvram(struct Scsi_Host
*);
614 static u_short
isp1020_read_nvram_word(struct Scsi_Host
*, u_short
);
618 static void isp1020_print_scsi_cmd(Scsi_Cmnd
*);
620 #if DEBUG_ISP1020_INTR
621 static void isp1020_print_status_entry(struct Status_Entry
*);
624 /* memaddr should be used to determine if memmapped port i/o is being used
625 * non-null memaddr == mmap'd
628 static inline u_short
isp_inw(struct Scsi_Host
*host
, long offset
)
630 struct isp1020_hostdata
*h
= (struct isp1020_hostdata
*)host
->hostdata
;
632 return readw(h
->memaddr
+ offset
);
634 return inw(host
->io_port
+ offset
);
637 static inline void isp_outw(u_short val
, struct Scsi_Host
*host
, long offset
)
639 struct isp1020_hostdata
*h
= (struct isp1020_hostdata
*)host
->hostdata
;
641 writew(val
, h
->memaddr
+ offset
);
643 outw(val
, host
->io_port
+ offset
);
646 static inline void isp1020_enable_irqs(struct Scsi_Host
*host
)
648 isp_outw(ISP_EN_INT
|ISP_EN_RISC
, host
, PCI_INTF_CTL
);
652 static inline void isp1020_disable_irqs(struct Scsi_Host
*host
)
654 isp_outw(0x0, host
, PCI_INTF_CTL
);
658 int isp1020_detect(Scsi_Host_Template
*tmpt
)
661 struct Scsi_Host
*host
;
662 struct isp1020_hostdata
*hostdata
;
663 struct pci_dev
*pdev
= NULL
;
665 ENTER("isp1020_detect");
667 tmpt
->proc_name
= "isp1020";
669 while ((pdev
= pci_find_device(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_ISP1020
, pdev
)))
671 if (pci_enable_device(pdev
))
674 host
= scsi_register(tmpt
, sizeof(struct isp1020_hostdata
));
678 hostdata
= (struct isp1020_hostdata
*) host
->hostdata
;
680 memset(hostdata
, 0, sizeof(struct isp1020_hostdata
));
682 hostdata
->pci_dev
= pdev
;
683 scsi_set_device(host
, &pdev
->dev
);
685 if (isp1020_init(host
))
686 goto fail_and_unregister
;
688 if (isp1020_reset_hardware(host
)
689 #if USE_NVRAM_DEFAULTS
690 || isp1020_get_defaults(host
)
692 || isp1020_set_defaults(host
)
693 #endif /* USE_NVRAM_DEFAULTS */
694 || isp1020_load_parameters(host
)) {
698 host
->this_id
= hostdata
->host_param
.initiator_scsi_id
;
699 host
->max_sectors
= 64;
701 if (request_irq(host
->irq
, do_isp1020_intr_handler
, SA_INTERRUPT
| SA_SHIRQ
,
704 printk("qlogicisp : interrupt %d already in use\n",
709 isp_outw(0x0, host
, PCI_SEMAPHORE
);
710 isp_outw(HCCR_CLEAR_RISC_INTR
, host
, HOST_HCCR
);
711 isp1020_enable_irqs(host
);
717 iounmap((void *)hostdata
->memaddr
);
718 release_region(host
->io_port
, 0xff);
720 if (hostdata
->res_cpu
)
721 pci_free_consistent(hostdata
->pci_dev
,
722 QSIZE(RES_QUEUE_LEN
),
725 if (hostdata
->req_cpu
)
726 pci_free_consistent(hostdata
->pci_dev
,
727 QSIZE(QLOGICISP_REQ_QUEUE_LEN
),
730 scsi_unregister(host
);
733 LEAVE("isp1020_detect");
739 int isp1020_release(struct Scsi_Host
*host
)
741 struct isp1020_hostdata
*hostdata
;
743 ENTER("isp1020_release");
745 hostdata
= (struct isp1020_hostdata
*) host
->hostdata
;
747 isp_outw(0x0, host
, PCI_INTF_CTL
);
748 free_irq(host
->irq
, host
);
750 iounmap((void *)hostdata
->memaddr
);
752 release_region(host
->io_port
, 0xff);
754 LEAVE("isp1020_release");
760 const char *isp1020_info(struct Scsi_Host
*host
)
763 struct isp1020_hostdata
*hostdata
;
765 ENTER("isp1020_info");
767 hostdata
= (struct isp1020_hostdata
*) host
->hostdata
;
769 "QLogic ISP1020 SCSI on PCI bus %02x device %02x irq %d %s base 0x%lx",
770 hostdata
->pci_dev
->bus
->number
, hostdata
->pci_dev
->devfn
, host
->irq
,
771 (hostdata
->memaddr
? "MEM" : "I/O"),
772 (hostdata
->memaddr
? hostdata
->memaddr
: host
->io_port
));
774 LEAVE("isp1020_info");
781 * The middle SCSI layer ensures that queuecommand never gets invoked
782 * concurrently with itself or the interrupt handler (though the
783 * interrupt handler may call this routine as part of
784 * request-completion handling).
786 int isp1020_queuecommand(Scsi_Cmnd
*Cmnd
, void (*done
)(Scsi_Cmnd
*))
789 u_int in_ptr
, out_ptr
;
791 struct scatterlist
*sg
;
792 struct Command_Entry
*cmd
;
793 struct Continuation_Entry
*cont
;
794 struct Scsi_Host
*host
;
795 struct isp1020_hostdata
*hostdata
;
798 ENTER("isp1020_queuecommand");
800 host
= Cmnd
->device
->host
;
801 hostdata
= (struct isp1020_hostdata
*) host
->hostdata
;
802 Cmnd
->scsi_done
= done
;
804 DEBUG(isp1020_print_scsi_cmd(Cmnd
));
806 out_ptr
= isp_inw(host
, + MBOX4
);
807 in_ptr
= hostdata
->req_in_ptr
;
809 DEBUG(printk("qlogicisp : request queue depth %d\n",
810 REQ_QUEUE_DEPTH(in_ptr
, out_ptr
)));
812 cmd
= (struct Command_Entry
*) &hostdata
->req_cpu
[in_ptr
];
813 in_ptr
= (in_ptr
+ 1) & QLOGICISP_REQ_QUEUE_LEN
;
814 if (in_ptr
== out_ptr
) {
815 printk("qlogicisp : request queue overflow\n");
819 if (hostdata
->send_marker
) {
820 struct Marker_Entry
*marker
;
822 TRACE("queue marker", in_ptr
, 0);
824 DEBUG(printk("qlogicisp : adding marker entry\n"));
825 marker
= (struct Marker_Entry
*) cmd
;
826 memset(marker
, 0, sizeof(struct Marker_Entry
));
828 marker
->hdr
.entry_type
= ENTRY_MARKER
;
829 marker
->hdr
.entry_cnt
= 1;
830 marker
->modifier
= SYNC_ALL
;
832 hostdata
->send_marker
= 0;
834 if (((in_ptr
+ 1) & QLOGICISP_REQ_QUEUE_LEN
) == out_ptr
) {
835 isp_outw(in_ptr
, host
, MBOX4
);
836 hostdata
->req_in_ptr
= in_ptr
;
837 printk("qlogicisp : request queue overflow\n");
840 cmd
= (struct Command_Entry
*) &hostdata
->req_cpu
[in_ptr
];
841 in_ptr
= (in_ptr
+ 1) & QLOGICISP_REQ_QUEUE_LEN
;
844 TRACE("queue command", in_ptr
, Cmnd
);
846 memset(cmd
, 0, sizeof(struct Command_Entry
));
848 cmd
->hdr
.entry_type
= ENTRY_COMMAND
;
849 cmd
->hdr
.entry_cnt
= 1;
851 cmd
->target_lun
= Cmnd
->device
->lun
;
852 cmd
->target_id
= Cmnd
->device
->id
;
853 cmd
->cdb_length
= cpu_to_le16(Cmnd
->cmd_len
);
854 cmd
->control_flags
= cpu_to_le16(CFLAG_READ
| CFLAG_WRITE
);
855 cmd
->time_out
= cpu_to_le16(30);
857 memcpy(cmd
->cdb
, Cmnd
->cmnd
, Cmnd
->cmd_len
);
862 sg
= (struct scatterlist
*) Cmnd
->request_buffer
;
865 sg_count
= pci_map_sg(hostdata
->pci_dev
, sg
, Cmnd
->use_sg
,
866 scsi_to_pci_dma_dir(Cmnd
->sc_data_direction
));
868 cmd
->segment_cnt
= cpu_to_le16(sg_count
);
870 /* fill in first four sg entries: */
874 for (i
= 0; i
< n
; i
++) {
875 dma_addr
= sg_dma_address(sg
);
876 ds
[i
].d_base
= cpu_to_le32((u32
) dma_addr
);
877 #ifdef CONFIG_QL_ISP_A64
878 ds
[i
].d_base_hi
= cpu_to_le32((u32
) (dma_addr
>>32));
879 #endif /* CONFIG_QL_ISP_A64 */
880 ds
[i
].d_count
= cpu_to_le32(sg_dma_len(sg
));
883 sg_count
-= IOCB_SEGS
;
885 while (sg_count
> 0) {
886 ++cmd
->hdr
.entry_cnt
;
887 cont
= (struct Continuation_Entry
*)
888 &hostdata
->req_cpu
[in_ptr
];
889 in_ptr
= (in_ptr
+ 1) & QLOGICISP_REQ_QUEUE_LEN
;
890 if (in_ptr
== out_ptr
) {
891 printk("isp1020: unexpected request queue "
895 TRACE("queue continuation", in_ptr
, 0);
896 cont
->hdr
.entry_type
= ENTRY_CONTINUATION
;
897 cont
->hdr
.entry_cnt
= 0;
898 cont
->hdr
.sys_def_1
= 0;
900 #ifndef CONFIG_QL_ISP_A64
905 if (n
> CONTINUATION_SEGS
)
906 n
= CONTINUATION_SEGS
;
907 for (i
= 0; i
< n
; ++i
) {
908 dma_addr
= sg_dma_address(sg
);
909 ds
[i
].d_base
= cpu_to_le32((u32
) dma_addr
);
910 #ifdef CONFIG_QL_ISP_A64
911 ds
[i
].d_base_hi
= cpu_to_le32((u32
)(dma_addr
>>32));
912 #endif /* CONFIG_QL_ISP_A64 */
913 ds
[i
].d_count
= cpu_to_le32(sg_dma_len(sg
));
918 } else if (Cmnd
->request_bufflen
) {
919 /*Cmnd->SCp.ptr = (char *)(unsigned long)*/
920 dma_addr
= pci_map_single(hostdata
->pci_dev
,
921 Cmnd
->request_buffer
,
922 Cmnd
->request_bufflen
,
923 scsi_to_pci_dma_dir(Cmnd
->sc_data_direction
));
924 Cmnd
->SCp
.ptr
= (char *)(unsigned long) dma_addr
;
926 cmd
->dataseg
[0].d_base
=
927 cpu_to_le32((u32
) dma_addr
);
928 #ifdef CONFIG_QL_ISP_A64
929 cmd
->dataseg
[0].d_base_hi
=
930 cpu_to_le32((u32
) (dma_addr
>>32));
931 #endif /* CONFIG_QL_ISP_A64 */
932 cmd
->dataseg
[0].d_count
=
933 cpu_to_le32((u32
)Cmnd
->request_bufflen
);
934 cmd
->segment_cnt
= cpu_to_le16(1);
936 cmd
->dataseg
[0].d_base
= 0;
937 #ifdef CONFIG_QL_ISP_A64
938 cmd
->dataseg
[0].d_base_hi
= 0;
939 #endif /* CONFIG_QL_ISP_A64 */
940 cmd
->dataseg
[0].d_count
= 0;
941 cmd
->segment_cnt
= cpu_to_le16(1); /* Shouldn't this be 0? */
944 /* Committed, record Scsi_Cmd so we can find it later. */
945 cmd
->handle
= in_ptr
;
946 hostdata
->cmd_slots
[in_ptr
] = Cmnd
;
948 isp_outw(in_ptr
, host
, MBOX4
);
949 hostdata
->req_in_ptr
= in_ptr
;
951 num_free
= QLOGICISP_REQ_QUEUE_LEN
- REQ_QUEUE_DEPTH(in_ptr
, out_ptr
);
952 host
->can_queue
= host
->host_busy
+ num_free
;
953 host
->sg_tablesize
= QLOGICISP_MAX_SG(num_free
);
955 LEAVE("isp1020_queuecommand");
961 #define ASYNC_EVENT_INTERRUPT 0x01
963 irqreturn_t
do_isp1020_intr_handler(int irq
, void *dev_id
, struct pt_regs
*regs
)
965 struct Scsi_Host
*host
= dev_id
;
968 spin_lock_irqsave(host
->host_lock
, flags
);
969 isp1020_intr_handler(irq
, dev_id
, regs
);
970 spin_unlock_irqrestore(host
->host_lock
, flags
);
975 void isp1020_intr_handler(int irq
, void *dev_id
, struct pt_regs
*regs
)
978 struct Status_Entry
*sts
;
979 struct Scsi_Host
*host
= dev_id
;
980 struct isp1020_hostdata
*hostdata
;
981 u_int in_ptr
, out_ptr
;
984 ENTER_INTR("isp1020_intr_handler");
986 hostdata
= (struct isp1020_hostdata
*) host
->hostdata
;
988 DEBUG_INTR(printk("qlogicisp : interrupt on line %d\n", irq
));
990 if (!(isp_inw(host
, PCI_INTF_STS
) & 0x04)) {
991 /* spurious interrupts can happen legally */
992 DEBUG_INTR(printk("qlogicisp: got spurious interrupt\n"));
995 in_ptr
= isp_inw(host
, MBOX5
);
996 isp_outw(HCCR_CLEAR_RISC_INTR
, host
, HOST_HCCR
);
998 if ((isp_inw(host
, PCI_SEMAPHORE
) & ASYNC_EVENT_INTERRUPT
)) {
999 status
= isp_inw(host
, MBOX0
);
1001 DEBUG_INTR(printk("qlogicisp : mbox completion status: %x\n",
1005 case ASYNC_SCSI_BUS_RESET
:
1006 case EXECUTION_TIMEOUT_RESET
:
1007 hostdata
->send_marker
= 1;
1009 case INVALID_COMMAND
:
1010 case HOST_INTERFACE_ERROR
:
1012 case COMMAND_PARAM_ERROR
:
1013 printk("qlogicisp : bad mailbox return status\n");
1016 isp_outw(0x0, host
, PCI_SEMAPHORE
);
1018 out_ptr
= hostdata
->res_out_ptr
;
1020 DEBUG_INTR(printk("qlogicisp : response queue update\n"));
1021 DEBUG_INTR(printk("qlogicisp : response queue depth %d\n",
1022 QUEUE_DEPTH(in_ptr
, out_ptr
, RES_QUEUE_LEN
)));
1024 while (out_ptr
!= in_ptr
) {
1027 sts
= (struct Status_Entry
*) &hostdata
->res_cpu
[out_ptr
];
1028 out_ptr
= (out_ptr
+ 1) & RES_QUEUE_LEN
;
1030 cmd_slot
= sts
->handle
;
1031 Cmnd
= hostdata
->cmd_slots
[cmd_slot
];
1032 hostdata
->cmd_slots
[cmd_slot
] = NULL
;
1034 TRACE("done", out_ptr
, Cmnd
);
1036 if (le16_to_cpu(sts
->completion_status
) == CS_RESET_OCCURRED
1037 || le16_to_cpu(sts
->completion_status
) == CS_ABORTED
1038 || (le16_to_cpu(sts
->status_flags
) & STF_BUS_RESET
))
1039 hostdata
->send_marker
= 1;
1041 if (le16_to_cpu(sts
->state_flags
) & SF_GOT_SENSE
)
1042 memcpy(Cmnd
->sense_buffer
, sts
->req_sense_data
,
1043 sizeof(Cmnd
->sense_buffer
));
1045 DEBUG_INTR(isp1020_print_status_entry(sts
));
1047 if (sts
->hdr
.entry_type
== ENTRY_STATUS
)
1048 Cmnd
->result
= isp1020_return_status(sts
);
1050 Cmnd
->result
= DID_ERROR
<< 16;
1053 pci_unmap_sg(hostdata
->pci_dev
,
1054 (struct scatterlist
*)Cmnd
->buffer
,
1056 scsi_to_pci_dma_dir(Cmnd
->sc_data_direction
));
1057 else if (Cmnd
->request_bufflen
)
1058 pci_unmap_single(hostdata
->pci_dev
,
1059 #ifdef CONFIG_QL_ISP_A64
1060 (dma_addr_t
)((long)Cmnd
->SCp
.ptr
),
1062 (u32
)((long)Cmnd
->SCp
.ptr
),
1064 Cmnd
->request_bufflen
,
1065 scsi_to_pci_dma_dir(Cmnd
->sc_data_direction
));
1067 isp_outw(out_ptr
, host
, MBOX5
);
1068 (*Cmnd
->scsi_done
)(Cmnd
);
1070 hostdata
->res_out_ptr
= out_ptr
;
1072 LEAVE_INTR("isp1020_intr_handler");
1076 static int isp1020_return_status(struct Status_Entry
*sts
)
1078 int host_status
= DID_ERROR
;
1079 #if DEBUG_ISP1020_INTR
1080 static char *reason
[] = {
1092 #endif /* DEBUG_ISP1020_INTR */
1094 ENTER("isp1020_return_status");
1096 DEBUG(printk("qlogicisp : completion status = 0x%04x\n",
1097 le16_to_cpu(sts
->completion_status
)));
1099 switch(le16_to_cpu(sts
->completion_status
)) {
1101 host_status
= DID_OK
;
1104 if (!(le16_to_cpu(sts
->state_flags
) & SF_GOT_BUS
))
1105 host_status
= DID_NO_CONNECT
;
1106 else if (!(le16_to_cpu(sts
->state_flags
) & SF_GOT_TARGET
))
1107 host_status
= DID_BAD_TARGET
;
1108 else if (!(le16_to_cpu(sts
->state_flags
) & SF_SENT_CDB
))
1109 host_status
= DID_ERROR
;
1110 else if (!(le16_to_cpu(sts
->state_flags
) & SF_TRANSFERRED_DATA
))
1111 host_status
= DID_ERROR
;
1112 else if (!(le16_to_cpu(sts
->state_flags
) & SF_GOT_STATUS
))
1113 host_status
= DID_ERROR
;
1114 else if (!(le16_to_cpu(sts
->state_flags
) & SF_GOT_SENSE
))
1115 host_status
= DID_ERROR
;
1118 case CS_TRANSPORT_ERROR
:
1119 host_status
= DID_ERROR
;
1121 case CS_RESET_OCCURRED
:
1122 host_status
= DID_RESET
;
1125 host_status
= DID_ABORT
;
1128 host_status
= DID_TIME_OUT
;
1130 case CS_DATA_OVERRUN
:
1131 case CS_COMMAND_OVERRUN
:
1132 case CS_STATUS_OVERRUN
:
1133 case CS_BAD_MESSAGE
:
1134 case CS_NO_MESSAGE_OUT
:
1135 case CS_EXT_ID_FAILED
:
1136 case CS_IDE_MSG_FAILED
:
1137 case CS_ABORT_MSG_FAILED
:
1138 case CS_NOP_MSG_FAILED
:
1139 case CS_PARITY_ERROR_MSG_FAILED
:
1140 case CS_DEVICE_RESET_MSG_FAILED
:
1141 case CS_ID_MSG_FAILED
:
1142 case CS_UNEXP_BUS_FREE
:
1143 host_status
= DID_ERROR
;
1145 case CS_DATA_UNDERRUN
:
1146 host_status
= DID_OK
;
1149 printk("qlogicisp : unknown completion status 0x%04x\n",
1150 le16_to_cpu(sts
->completion_status
));
1151 host_status
= DID_ERROR
;
1155 DEBUG_INTR(printk("qlogicisp : host status (%s) scsi status %x\n",
1156 reason
[host_status
], le16_to_cpu(sts
->scsi_status
)));
1158 LEAVE("isp1020_return_status");
1160 return (le16_to_cpu(sts
->scsi_status
) & STATUS_MASK
) | (host_status
<< 16);
1164 int isp1020_abort(Scsi_Cmnd
*Cmnd
)
1167 struct Scsi_Host
*host
;
1168 struct isp1020_hostdata
*hostdata
;
1169 int return_status
= SCSI_ABORT_SUCCESS
;
1173 ENTER("isp1020_abort");
1175 host
= Cmnd
->device
->host
;
1176 hostdata
= (struct isp1020_hostdata
*) host
->hostdata
;
1178 for (i
= 0; i
< QLOGICISP_REQ_QUEUE_LEN
+ 1; i
++)
1179 if (hostdata
->cmd_slots
[i
] == Cmnd
)
1183 isp1020_disable_irqs(host
);
1185 param
[0] = MBOX_ABORT
;
1186 param
[1] = (((u_short
) Cmnd
->device
->id
) << 8) | Cmnd
->device
->lun
;
1187 param
[2] = cmd_cookie
>> 16;
1188 param
[3] = cmd_cookie
& 0xffff;
1190 isp1020_mbox_command(host
, param
);
1192 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1193 printk("qlogicisp : scsi abort failure: %x\n", param
[0]);
1194 return_status
= SCSI_ABORT_ERROR
;
1197 isp1020_enable_irqs(host
);
1199 LEAVE("isp1020_abort");
1201 return return_status
;
1205 int isp1020_reset(Scsi_Cmnd
*Cmnd
, unsigned int reset_flags
)
1208 struct Scsi_Host
*host
;
1209 struct isp1020_hostdata
*hostdata
;
1210 int return_status
= SCSI_RESET_SUCCESS
;
1212 ENTER("isp1020_reset");
1214 host
= Cmnd
->device
->host
;
1215 hostdata
= (struct isp1020_hostdata
*) host
->hostdata
;
1217 param
[0] = MBOX_BUS_RESET
;
1218 param
[1] = hostdata
->host_param
.bus_reset_delay
;
1220 isp1020_disable_irqs(host
);
1222 isp1020_mbox_command(host
, param
);
1224 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1225 printk("qlogicisp : scsi bus reset failure: %x\n", param
[0]);
1226 return_status
= SCSI_RESET_ERROR
;
1229 isp1020_enable_irqs(host
);
1231 LEAVE("isp1020_reset");
1233 return return_status
;
1237 int isp1020_biosparam(struct scsi_device
*sdev
, struct block_device
*n
,
1238 sector_t capacity
, int ip
[])
1240 int size
= capacity
;
1242 ENTER("isp1020_biosparam");
1250 ip
[2] = size
/ (ip
[0] * ip
[1]);
1257 LEAVE("isp1020_biosparam");
1263 static int isp1020_reset_hardware(struct Scsi_Host
*host
)
1268 ENTER("isp1020_reset_hardware");
1270 isp_outw(ISP_RESET
, host
, PCI_INTF_CTL
);
1272 isp_outw(HCCR_RESET
, host
, HOST_HCCR
);
1274 isp_outw(HCCR_RELEASE
, host
, HOST_HCCR
);
1275 isp_outw(HCCR_BIOS_DISABLE
, host
, HOST_HCCR
);
1277 loop_count
= DEFAULT_LOOP_COUNT
;
1278 while (--loop_count
&& isp_inw(host
, HOST_HCCR
) == RISC_BUSY
) {
1283 printk("qlogicisp: reset_hardware loop timeout\n");
1285 isp_outw(0, host
, ISP_CFG1
);
1288 printk("qlogicisp : mbox 0 0x%04x \n", isp_inw(host
, MBOX0
));
1289 printk("qlogicisp : mbox 1 0x%04x \n", isp_inw(host
, MBOX1
));
1290 printk("qlogicisp : mbox 2 0x%04x \n", isp_inw(host
, MBOX2
));
1291 printk("qlogicisp : mbox 3 0x%04x \n", isp_inw(host
, MBOX3
));
1292 printk("qlogicisp : mbox 4 0x%04x \n", isp_inw(host
, MBOX4
));
1293 printk("qlogicisp : mbox 5 0x%04x \n", isp_inw(host
, MBOX5
));
1294 #endif /* DEBUG_ISP1020 */
1296 param
[0] = MBOX_NO_OP
;
1297 isp1020_mbox_command(host
, param
);
1298 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1299 printk("qlogicisp : NOP test failed\n");
1303 DEBUG(printk("qlogicisp : loading risc ram\n"));
1306 for (loop_count
= 0; loop_count
< risc_code_length01
; loop_count
++) {
1307 param
[0] = MBOX_WRITE_RAM_WORD
;
1308 param
[1] = risc_code_addr01
+ loop_count
;
1309 param
[2] = risc_code01
[loop_count
];
1310 isp1020_mbox_command(host
, param
);
1311 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1312 printk("qlogicisp : firmware load failure at %d\n",
1317 #endif /* RELOAD_FIRMWARE */
1319 DEBUG(printk("qlogicisp : verifying checksum\n"));
1321 param
[0] = MBOX_VERIFY_CHECKSUM
;
1322 param
[1] = risc_code_addr01
;
1324 isp1020_mbox_command(host
, param
);
1326 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1327 printk("qlogicisp : ram checksum failure\n");
1331 DEBUG(printk("qlogicisp : executing firmware\n"));
1333 param
[0] = MBOX_EXEC_FIRMWARE
;
1334 param
[1] = risc_code_addr01
;
1336 isp1020_mbox_command(host
, param
);
1338 param
[0] = MBOX_ABOUT_FIRMWARE
;
1340 isp1020_mbox_command(host
, param
);
1342 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1343 printk("qlogicisp : about firmware failure\n");
1347 DEBUG(printk("qlogicisp : firmware major revision %d\n", param
[1]));
1348 DEBUG(printk("qlogicisp : firmware minor revision %d\n", param
[2]));
1350 LEAVE("isp1020_reset_hardware");
1356 static int isp1020_init(struct Scsi_Host
*sh
)
1358 u_long io_base
, mem_base
, io_flags
, mem_flags
;
1359 struct isp1020_hostdata
*hostdata
;
1363 struct pci_dev
*pdev
;
1365 ENTER("isp1020_init");
1367 hostdata
= (struct isp1020_hostdata
*) sh
->hostdata
;
1368 pdev
= hostdata
->pci_dev
;
1370 if (pci_read_config_word(pdev
, PCI_COMMAND
, &command
)
1371 || pci_read_config_byte(pdev
, PCI_CLASS_REVISION
, &revision
))
1373 printk("qlogicisp : error reading PCI configuration\n");
1377 io_base
= pci_resource_start(pdev
, 0);
1378 mem_base
= pci_resource_start(pdev
, 1);
1379 io_flags
= pci_resource_flags(pdev
, 0);
1380 mem_flags
= pci_resource_flags(pdev
, 1);
1383 if (pdev
->vendor
!= PCI_VENDOR_ID_QLOGIC
) {
1384 printk("qlogicisp : 0x%04x is not QLogic vendor ID\n",
1389 if (pdev
->device
!= PCI_DEVICE_ID_QLOGIC_ISP1020
) {
1390 printk("qlogicisp : 0x%04x does not match ISP1020 device id\n",
1396 /* Force ALPHA to use bus I/O and not bus MEM.
1397 This is to avoid having to use HAE_MEM registers,
1398 which is broken on some platforms and with SMP. */
1399 command
&= ~PCI_COMMAND_MEMORY
;
1402 sh
->io_port
= io_base
;
1404 if (!request_region(sh
->io_port
, 0xff, "qlogicisp")) {
1405 printk("qlogicisp : i/o region 0x%lx-0x%lx already "
1407 sh
->io_port
, sh
->io_port
+ 0xff);
1411 if ((command
& PCI_COMMAND_MEMORY
) &&
1412 ((mem_flags
& 1) == 0)) {
1413 mem_base
= (u_long
) ioremap(mem_base
, PAGE_SIZE
);
1415 printk("qlogicisp : i/o remapping failed.\n");
1418 hostdata
->memaddr
= mem_base
;
1420 if (command
& PCI_COMMAND_IO
&& (io_flags
& 3) != 1) {
1421 printk("qlogicisp : i/o mapping is disabled\n");
1424 hostdata
->memaddr
= 0; /* zero to signify no i/o mapping */
1428 if (revision
!= ISP1020_REV_ID
)
1429 printk("qlogicisp : new isp1020 revision ID (%d)\n", revision
);
1431 if (isp_inw(sh
, PCI_ID_LOW
) != PCI_VENDOR_ID_QLOGIC
1432 || isp_inw(sh
, PCI_ID_HIGH
) != PCI_DEVICE_ID_QLOGIC_ISP1020
)
1434 printk("qlogicisp : can't decode %s address space 0x%lx\n",
1435 (io_base
? "I/O" : "MEM"),
1436 (io_base
? io_base
: mem_base
));
1440 hostdata
->revision
= revision
;
1443 sh
->max_id
= MAX_TARGETS
;
1444 sh
->max_lun
= MAX_LUNS
;
1446 hostdata
->res_cpu
= pci_alloc_consistent(hostdata
->pci_dev
,
1447 QSIZE(RES_QUEUE_LEN
),
1448 &hostdata
->res_dma
);
1449 if (hostdata
->res_cpu
== NULL
) {
1450 printk("qlogicisp : can't allocate response queue\n");
1454 hostdata
->req_cpu
= pci_alloc_consistent(hostdata
->pci_dev
,
1455 QSIZE(QLOGICISP_REQ_QUEUE_LEN
),
1456 &hostdata
->req_dma
);
1457 if (hostdata
->req_cpu
== NULL
) {
1458 pci_free_consistent(hostdata
->pci_dev
,
1459 QSIZE(RES_QUEUE_LEN
),
1462 printk("qlogicisp : can't allocate request queue\n");
1466 pci_set_master(pdev
);
1468 LEAVE("isp1020_init");
1473 iounmap((void *)hostdata
->memaddr
);
1475 release_region(sh
->io_port
, 0xff);
1480 #if USE_NVRAM_DEFAULTS
1482 static int isp1020_get_defaults(struct Scsi_Host
*host
)
1486 struct isp1020_hostdata
*hostdata
=
1487 (struct isp1020_hostdata
*) host
->hostdata
;
1489 ENTER("isp1020_get_defaults");
1491 if (!isp1020_verify_nvram(host
)) {
1492 printk("qlogicisp : nvram checksum failure\n");
1493 printk("qlogicisp : attempting to use default parameters\n");
1494 return isp1020_set_defaults(host
);
1497 value
= isp1020_read_nvram_word(host
, 2);
1498 hostdata
->host_param
.fifo_threshold
= (value
>> 8) & 0x03;
1499 hostdata
->host_param
.host_adapter_enable
= (value
>> 11) & 0x01;
1500 hostdata
->host_param
.initiator_scsi_id
= (value
>> 12) & 0x0f;
1502 value
= isp1020_read_nvram_word(host
, 3);
1503 hostdata
->host_param
.bus_reset_delay
= value
& 0xff;
1504 hostdata
->host_param
.retry_count
= value
>> 8;
1506 value
= isp1020_read_nvram_word(host
, 4);
1507 hostdata
->host_param
.retry_delay
= value
& 0xff;
1508 hostdata
->host_param
.async_data_setup_time
= (value
>> 8) & 0x0f;
1509 hostdata
->host_param
.req_ack_active_negation
= (value
>> 12) & 0x01;
1510 hostdata
->host_param
.data_line_active_negation
= (value
>> 13) & 0x01;
1511 hostdata
->host_param
.data_dma_burst_enable
= (value
>> 14) & 0x01;
1512 hostdata
->host_param
.command_dma_burst_enable
= (value
>> 15);
1514 value
= isp1020_read_nvram_word(host
, 5);
1515 hostdata
->host_param
.tag_aging
= value
& 0xff;
1517 value
= isp1020_read_nvram_word(host
, 6);
1518 hostdata
->host_param
.selection_timeout
= value
& 0xffff;
1520 value
= isp1020_read_nvram_word(host
, 7);
1521 hostdata
->host_param
.max_queue_depth
= value
& 0xffff;
1523 #if DEBUG_ISP1020_SETUP
1524 printk("qlogicisp : fifo threshold=%d\n",
1525 hostdata
->host_param
.fifo_threshold
);
1526 printk("qlogicisp : initiator scsi id=%d\n",
1527 hostdata
->host_param
.initiator_scsi_id
);
1528 printk("qlogicisp : bus reset delay=%d\n",
1529 hostdata
->host_param
.bus_reset_delay
);
1530 printk("qlogicisp : retry count=%d\n",
1531 hostdata
->host_param
.retry_count
);
1532 printk("qlogicisp : retry delay=%d\n",
1533 hostdata
->host_param
.retry_delay
);
1534 printk("qlogicisp : async data setup time=%d\n",
1535 hostdata
->host_param
.async_data_setup_time
);
1536 printk("qlogicisp : req/ack active negation=%d\n",
1537 hostdata
->host_param
.req_ack_active_negation
);
1538 printk("qlogicisp : data line active negation=%d\n",
1539 hostdata
->host_param
.data_line_active_negation
);
1540 printk("qlogicisp : data DMA burst enable=%d\n",
1541 hostdata
->host_param
.data_dma_burst_enable
);
1542 printk("qlogicisp : command DMA burst enable=%d\n",
1543 hostdata
->host_param
.command_dma_burst_enable
);
1544 printk("qlogicisp : tag age limit=%d\n",
1545 hostdata
->host_param
.tag_aging
);
1546 printk("qlogicisp : selection timeout limit=%d\n",
1547 hostdata
->host_param
.selection_timeout
);
1548 printk("qlogicisp : max queue depth=%d\n",
1549 hostdata
->host_param
.max_queue_depth
);
1550 #endif /* DEBUG_ISP1020_SETUP */
1552 for (i
= 0; i
< MAX_TARGETS
; i
++) {
1554 value
= isp1020_read_nvram_word(host
, 14 + i
* 3);
1555 hostdata
->dev_param
[i
].device_flags
= value
& 0xff;
1556 hostdata
->dev_param
[i
].execution_throttle
= value
>> 8;
1558 value
= isp1020_read_nvram_word(host
, 15 + i
* 3);
1559 hostdata
->dev_param
[i
].synchronous_period
= value
& 0xff;
1560 hostdata
->dev_param
[i
].synchronous_offset
= (value
>> 8) & 0x0f;
1561 hostdata
->dev_param
[i
].device_enable
= (value
>> 12) & 0x01;
1563 #if DEBUG_ISP1020_SETUP
1564 printk("qlogicisp : target 0x%02x\n", i
);
1565 printk("qlogicisp : device flags=0x%02x\n",
1566 hostdata
->dev_param
[i
].device_flags
);
1567 printk("qlogicisp : execution throttle=%d\n",
1568 hostdata
->dev_param
[i
].execution_throttle
);
1569 printk("qlogicisp : synchronous period=%d\n",
1570 hostdata
->dev_param
[i
].synchronous_period
);
1571 printk("qlogicisp : synchronous offset=%d\n",
1572 hostdata
->dev_param
[i
].synchronous_offset
);
1573 printk("qlogicisp : device enable=%d\n",
1574 hostdata
->dev_param
[i
].device_enable
);
1575 #endif /* DEBUG_ISP1020_SETUP */
1578 LEAVE("isp1020_get_defaults");
1584 #define ISP1020_NVRAM_LEN 0x40
1585 #define ISP1020_NVRAM_SIG1 0x5349
1586 #define ISP1020_NVRAM_SIG2 0x2050
1588 static int isp1020_verify_nvram(struct Scsi_Host
*host
)
1592 u_char checksum
= 0;
1594 for (i
= 0; i
< ISP1020_NVRAM_LEN
; i
++) {
1595 value
= isp1020_read_nvram_word(host
, i
);
1599 if (value
!= ISP1020_NVRAM_SIG1
) return 0;
1602 if (value
!= ISP1020_NVRAM_SIG2
) return 0;
1605 if ((value
& 0xff) != 0x02) return 0;
1608 checksum
+= value
& 0xff;
1609 checksum
+= value
>> 8;
1612 return (checksum
== 0);
1615 #define NVRAM_DELAY() udelay(2) /* 2 microsecond delay */
1618 u_short
isp1020_read_nvram_word(struct Scsi_Host
*host
, u_short byte
)
1621 u_short value
, output
, input
;
1623 byte
&= 0x3f; byte
|= 0x0180;
1625 for (i
= 8; i
>= 0; i
--) {
1626 output
= ((byte
>> i
) & 0x1) ? 0x4 : 0x0;
1627 isp_outw(output
| 0x2, host
, PCI_NVRAM
); NVRAM_DELAY();
1628 isp_outw(output
| 0x3, host
, PCI_NVRAM
); NVRAM_DELAY();
1629 isp_outw(output
| 0x2, host
, PCI_NVRAM
); NVRAM_DELAY();
1632 for (i
= 0xf, value
= 0; i
>= 0; i
--) {
1634 isp_outw(0x3, host
, PCI_NVRAM
); NVRAM_DELAY();
1635 input
= isp_inw(host
, PCI_NVRAM
); NVRAM_DELAY();
1636 isp_outw(0x2, host
, PCI_NVRAM
); NVRAM_DELAY();
1637 if (input
& 0x8) value
|= 1;
1640 isp_outw(0x0, host
, PCI_NVRAM
); NVRAM_DELAY();
1645 #endif /* USE_NVRAM_DEFAULTS */
1648 static int isp1020_set_defaults(struct Scsi_Host
*host
)
1650 struct isp1020_hostdata
*hostdata
=
1651 (struct isp1020_hostdata
*) host
->hostdata
;
1654 ENTER("isp1020_set_defaults");
1656 hostdata
->host_param
.fifo_threshold
= 2;
1657 hostdata
->host_param
.host_adapter_enable
= 1;
1658 hostdata
->host_param
.initiator_scsi_id
= 7;
1659 hostdata
->host_param
.bus_reset_delay
= 3;
1660 hostdata
->host_param
.retry_count
= 0;
1661 hostdata
->host_param
.retry_delay
= 1;
1662 hostdata
->host_param
.async_data_setup_time
= 6;
1663 hostdata
->host_param
.req_ack_active_negation
= 1;
1664 hostdata
->host_param
.data_line_active_negation
= 1;
1665 hostdata
->host_param
.data_dma_burst_enable
= 1;
1666 hostdata
->host_param
.command_dma_burst_enable
= 1;
1667 hostdata
->host_param
.tag_aging
= 8;
1668 hostdata
->host_param
.selection_timeout
= 250;
1669 hostdata
->host_param
.max_queue_depth
= 256;
1671 for (i
= 0; i
< MAX_TARGETS
; i
++) {
1672 hostdata
->dev_param
[i
].device_flags
= 0xfd;
1673 hostdata
->dev_param
[i
].execution_throttle
= 16;
1674 hostdata
->dev_param
[i
].synchronous_period
= 25;
1675 hostdata
->dev_param
[i
].synchronous_offset
= 12;
1676 hostdata
->dev_param
[i
].device_enable
= 1;
1679 LEAVE("isp1020_set_defaults");
1685 static int isp1020_load_parameters(struct Scsi_Host
*host
)
1688 #ifdef CONFIG_QL_ISP_A64
1695 u_short isp_cfg1
, hwrev
;
1696 struct isp1020_hostdata
*hostdata
=
1697 (struct isp1020_hostdata
*) host
->hostdata
;
1699 ENTER("isp1020_load_parameters");
1701 hwrev
= isp_inw(host
, ISP_CFG0
) & ISP_CFG0_HWMSK
;
1702 isp_cfg1
= ISP_CFG1_F64
| ISP_CFG1_BENAB
;
1703 if (hwrev
== ISP_CFG0_1040A
) {
1704 /* Busted fifo, says mjacob. */
1705 isp_cfg1
&= ISP_CFG1_BENAB
;
1708 isp_outw(isp_inw(host
, ISP_CFG1
) | isp_cfg1
, host
, ISP_CFG1
);
1709 isp_outw(isp_inw(host
, CDMA_CONF
) | DMA_CONF_BENAB
, host
, CDMA_CONF
);
1710 isp_outw(isp_inw(host
, DDMA_CONF
) | DMA_CONF_BENAB
, host
, DDMA_CONF
);
1712 param
[0] = MBOX_SET_INIT_SCSI_ID
;
1713 param
[1] = hostdata
->host_param
.initiator_scsi_id
;
1715 isp1020_mbox_command(host
, param
);
1717 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1718 printk("qlogicisp : set initiator id failure\n");
1722 param
[0] = MBOX_SET_RETRY_COUNT
;
1723 param
[1] = hostdata
->host_param
.retry_count
;
1724 param
[2] = hostdata
->host_param
.retry_delay
;
1726 isp1020_mbox_command(host
, param
);
1728 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1729 printk("qlogicisp : set retry count failure\n");
1733 param
[0] = MBOX_SET_ASYNC_DATA_SETUP_TIME
;
1734 param
[1] = hostdata
->host_param
.async_data_setup_time
;
1736 isp1020_mbox_command(host
, param
);
1738 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1739 printk("qlogicisp : async data setup time failure\n");
1743 param
[0] = MBOX_SET_ACTIVE_NEG_STATE
;
1744 param
[1] = (hostdata
->host_param
.req_ack_active_negation
<< 4)
1745 | (hostdata
->host_param
.data_line_active_negation
<< 5);
1747 isp1020_mbox_command(host
, param
);
1749 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1750 printk("qlogicisp : set active negation state failure\n");
1754 param
[0] = MBOX_SET_PCI_CONTROL_PARAMS
;
1755 param
[1] = hostdata
->host_param
.data_dma_burst_enable
<< 1;
1756 param
[2] = hostdata
->host_param
.command_dma_burst_enable
<< 1;
1758 isp1020_mbox_command(host
, param
);
1760 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1761 printk("qlogicisp : set pci control parameter failure\n");
1765 param
[0] = MBOX_SET_TAG_AGE_LIMIT
;
1766 param
[1] = hostdata
->host_param
.tag_aging
;
1768 isp1020_mbox_command(host
, param
);
1770 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1771 printk("qlogicisp : set tag age limit failure\n");
1775 param
[0] = MBOX_SET_SELECT_TIMEOUT
;
1776 param
[1] = hostdata
->host_param
.selection_timeout
;
1778 isp1020_mbox_command(host
, param
);
1780 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1781 printk("qlogicisp : set selection timeout failure\n");
1785 for (i
= 0; i
< MAX_TARGETS
; i
++) {
1787 if (!hostdata
->dev_param
[i
].device_enable
)
1790 param
[0] = MBOX_SET_TARGET_PARAMS
;
1792 param
[2] = hostdata
->dev_param
[i
].device_flags
<< 8;
1793 param
[3] = (hostdata
->dev_param
[i
].synchronous_offset
<< 8)
1794 | hostdata
->dev_param
[i
].synchronous_period
;
1796 isp1020_mbox_command(host
, param
);
1798 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1799 printk("qlogicisp : set target parameter failure\n");
1803 for (k
= 0; k
< MAX_LUNS
; k
++) {
1805 param
[0] = MBOX_SET_DEV_QUEUE_PARAMS
;
1806 param
[1] = (i
<< 8) | k
;
1807 param
[2] = hostdata
->host_param
.max_queue_depth
;
1808 param
[3] = hostdata
->dev_param
[i
].execution_throttle
;
1810 isp1020_mbox_command(host
, param
);
1812 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1813 printk("qlogicisp : set device queue "
1814 "parameter failure\n");
1820 queue_addr
= hostdata
->res_dma
;
1821 #ifdef CONFIG_QL_ISP_A64
1822 param
[0] = MBOX_CMD_INIT_RESPONSE_QUEUE_64
;
1824 param
[0] = MBOX_INIT_RES_QUEUE
;
1826 param
[1] = RES_QUEUE_LEN
+ 1;
1827 param
[2] = (u_short
) (queue_addr
>> 16);
1828 param
[3] = (u_short
) (queue_addr
& 0xffff);
1831 #ifdef CONFIG_QL_ISP_A64
1832 param
[6] = (u_short
) (queue_addr
>> 48);
1833 param
[7] = (u_short
) (queue_addr
>> 32);
1836 isp1020_mbox_command(host
, param
);
1838 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1839 printk("qlogicisp : set response queue failure\n");
1843 queue_addr
= hostdata
->req_dma
;
1844 #ifdef CONFIG_QL_ISP_A64
1845 param
[0] = MBOX_CMD_INIT_REQUEST_QUEUE_64
;
1847 param
[0] = MBOX_INIT_REQ_QUEUE
;
1849 param
[1] = QLOGICISP_REQ_QUEUE_LEN
+ 1;
1850 param
[2] = (u_short
) (queue_addr
>> 16);
1851 param
[3] = (u_short
) (queue_addr
& 0xffff);
1854 #ifdef CONFIG_QL_ISP_A64
1856 param
[6] = (u_short
) (queue_addr
>> 48);
1857 param
[7] = (u_short
) (queue_addr
>> 32);
1860 isp1020_mbox_command(host
, param
);
1862 if (param
[0] != MBOX_COMMAND_COMPLETE
) {
1863 printk("qlogicisp : set request queue failure\n");
1867 LEAVE("isp1020_load_parameters");
1874 * currently, this is only called during initialization or abort/reset,
1875 * at which times interrupts are disabled, so polling is OK, I guess...
1877 static int isp1020_mbox_command(struct Scsi_Host
*host
, u_short param
[])
1881 if (mbox_param
[param
[0]] == 0)
1884 loop_count
= DEFAULT_LOOP_COUNT
;
1885 while (--loop_count
&& isp_inw(host
, HOST_HCCR
) & 0x0080) {
1890 printk("qlogicisp: mbox_command loop timeout #1\n");
1892 switch(mbox_param
[param
[0]] >> 4) {
1893 case 8: isp_outw(param
[7], host
, MBOX7
);
1894 case 7: isp_outw(param
[6], host
, MBOX6
);
1895 case 6: isp_outw(param
[5], host
, MBOX5
);
1896 case 5: isp_outw(param
[4], host
, MBOX4
);
1897 case 4: isp_outw(param
[3], host
, MBOX3
);
1898 case 3: isp_outw(param
[2], host
, MBOX2
);
1899 case 2: isp_outw(param
[1], host
, MBOX1
);
1900 case 1: isp_outw(param
[0], host
, MBOX0
);
1903 isp_outw(0x0, host
, PCI_SEMAPHORE
);
1904 isp_outw(HCCR_CLEAR_RISC_INTR
, host
, HOST_HCCR
);
1905 isp_outw(HCCR_SET_HOST_INTR
, host
, HOST_HCCR
);
1907 loop_count
= DEFAULT_LOOP_COUNT
;
1908 while (--loop_count
&& !(isp_inw(host
, PCI_INTF_STS
) & 0x04)) {
1913 printk("qlogicisp: mbox_command loop timeout #2\n");
1915 loop_count
= DEFAULT_LOOP_COUNT
;
1916 while (--loop_count
&& isp_inw(host
, MBOX0
) == 0x04) {
1921 printk("qlogicisp: mbox_command loop timeout #3\n");
1923 switch(mbox_param
[param
[0]] & 0xf) {
1924 case 8: param
[7] = isp_inw(host
, MBOX7
);
1925 case 7: param
[6] = isp_inw(host
, MBOX6
);
1926 case 6: param
[5] = isp_inw(host
, MBOX5
);
1927 case 5: param
[4] = isp_inw(host
, MBOX4
);
1928 case 4: param
[3] = isp_inw(host
, MBOX3
);
1929 case 3: param
[2] = isp_inw(host
, MBOX2
);
1930 case 2: param
[1] = isp_inw(host
, MBOX1
);
1931 case 1: param
[0] = isp_inw(host
, MBOX0
);
1934 isp_outw(0x0, host
, PCI_SEMAPHORE
);
1935 isp_outw(HCCR_CLEAR_RISC_INTR
, host
, HOST_HCCR
);
1941 #if DEBUG_ISP1020_INTR
1943 void isp1020_print_status_entry(struct Status_Entry
*status
)
1947 printk("qlogicisp : entry count = 0x%02x, type = 0x%02x, flags = 0x%02x\n",
1948 status
->hdr
.entry_cnt
, status
->hdr
.entry_type
, status
->hdr
.flags
);
1949 printk("qlogicisp : scsi status = 0x%04x, completion status = 0x%04x\n",
1950 le16_to_cpu(status
->scsi_status
), le16_to_cpu(status
->completion_status
));
1951 printk("qlogicisp : state flags = 0x%04x, status flags = 0x%04x\n",
1952 le16_to_cpu(status
->state_flags
), le16_to_cpu(status
->status_flags
));
1953 printk("qlogicisp : time = 0x%04x, request sense length = 0x%04x\n",
1954 le16_to_cpu(status
->time
), le16_to_cpu(status
->req_sense_len
));
1955 printk("qlogicisp : residual transfer length = 0x%08x\n",
1956 le32_to_cpu(status
->residual
));
1958 for (i
= 0; i
< le16_to_cpu(status
->req_sense_len
); i
++)
1959 printk("qlogicisp : sense data = 0x%02x\n", status
->req_sense_data
[i
]);
1962 #endif /* DEBUG_ISP1020_INTR */
1967 void isp1020_print_scsi_cmd(Scsi_Cmnd
*cmd
)
1971 printk("qlogicisp : target = 0x%02x, lun = 0x%02x, cmd_len = 0x%02x\n",
1972 cmd
->target
, cmd
->lun
, cmd
->cmd_len
);
1973 printk("qlogicisp : command = ");
1974 for (i
= 0; i
< cmd
->cmd_len
; i
++)
1975 printk("0x%02x ", cmd
->cmnd
[i
]);
1979 #endif /* DEBUG_ISP1020 */
1981 MODULE_LICENSE("GPL");
1983 static Scsi_Host_Template driver_template
= {
1984 .detect
= isp1020_detect
,
1985 .release
= isp1020_release
,
1986 .info
= isp1020_info
,
1987 .queuecommand
= isp1020_queuecommand
,
1988 .bios_param
= isp1020_biosparam
,
1989 .can_queue
= QLOGICISP_REQ_QUEUE_LEN
,
1991 .sg_tablesize
= QLOGICISP_MAX_SG(QLOGICISP_REQ_QUEUE_LEN
),
1993 .use_clustering
= DISABLE_CLUSTERING
,
1995 #include "scsi_module.c"