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initial commit with v2.6.9
[linux-2.6.9-moxart.git] / drivers / scsi / aacraid / aacraid.h
blob20302a3e89fc683978b3d689788680760e066c88
1 #if (!defined(dprintk))
2 # define dprintk(x)
3 #endif
4
5 /*------------------------------------------------------------------------------
6 * D E F I N E S
7 *----------------------------------------------------------------------------*/
8
9 #define MAXIMUM_NUM_CONTAINERS 32
10 #define MAXIMUM_NUM_ADAPTERS 8
11
12 #define AAC_NUM_FIB (256 + 64)
13 #define AAC_NUM_IO_FIB 100
14
15 #define AAC_MAX_LUN (8)
16
17 #define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff)
18
19 /*
20 * These macros convert from physical channels to virtual channels
21 */
22 #define CONTAINER_CHANNEL (0)
23 #define ID_LUN_TO_CONTAINER(id, lun) (id)
24 #define CONTAINER_TO_CHANNEL(cont) (CONTAINER_CHANNEL)
25 #define CONTAINER_TO_ID(cont) (cont)
26 #define CONTAINER_TO_LUN(cont) (0)
27
28 #define aac_phys_to_logical(x) (x+1)
29 #define aac_logical_to_phys(x) (x?x-1:0)
30
31 /* #define AAC_DETAILED_STATUS_INFO */
32
33 struct diskparm
34 {
35 int heads;
36 int sectors;
37 int cylinders;
38 };
39
40
41 /*
42 * DON'T CHANGE THE ORDER, this is set by the firmware
43 */
44
45 #define CT_NONE 0
46 #define CT_VOLUME 1
47 #define CT_MIRROR 2
48 #define CT_STRIPE 3
49 #define CT_RAID5 4
50 #define CT_SSRW 5
51 #define CT_SSRO 6
52 #define CT_MORPH 7
53 #define CT_PASSTHRU 8
54 #define CT_RAID4 9
55 #define CT_RAID10 10 /* stripe of mirror */
56 #define CT_RAID00 11 /* stripe of stripe */
57 #define CT_VOLUME_OF_MIRRORS 12 /* volume of mirror */
58 #define CT_PSEUDO_RAID 13 /* really raid4 */
59 #define CT_LAST_VOLUME_TYPE 14
60
61 /*
62 * Types of objects addressable in some fashion by the client.
63 * This is a superset of those objects handled just by the filesystem
64 * and includes "raw" objects that an administrator would use to
65 * configure containers and filesystems.
66 */
67
68 #define FT_REG 1 /* regular file */
69 #define FT_DIR 2 /* directory */
70 #define FT_BLK 3 /* "block" device - reserved */
71 #define FT_CHR 4 /* "character special" device - reserved */
72 #define FT_LNK 5 /* symbolic link */
73 #define FT_SOCK 6 /* socket */
74 #define FT_FIFO 7 /* fifo */
75 #define FT_FILESYS 8 /* ADAPTEC's "FSA"(tm) filesystem */
76 #define FT_DRIVE 9 /* physical disk - addressable in scsi by bus/id/lun */
77 #define FT_SLICE 10 /* virtual disk - raw volume - slice */
78 #define FT_PARTITION 11 /* FSA partition - carved out of a slice - building block for containers */
79 #define FT_VOLUME 12 /* Container - Volume Set */
80 #define FT_STRIPE 13 /* Container - Stripe Set */
81 #define FT_MIRROR 14 /* Container - Mirror Set */
82 #define FT_RAID5 15 /* Container - Raid 5 Set */
83 #define FT_DATABASE 16 /* Storage object with "foreign" content manager */
84
85 /*
86 * Host side memory scatter gather list
87 * Used by the adapter for read, write, and readdirplus operations
88 * We have separate 32 and 64 bit version because even
89 * on 64 bit systems not all cards support the 64 bit version
90 */
91 struct sgentry {
92 u32 addr; /* 32-bit address. */
93 u32 count; /* Length. */
94 };
95
96 struct sgentry64 {
97 u32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */
98 u32 count; /* Length. */
99 };
100
101 /*
102 * SGMAP
103 *
104 * This is the SGMAP structure for all commands that use
105 * 32-bit addressing.
106 */
107
108 struct sgmap {
109 u32 count;
110 struct sgentry sg[1];
111 };
112
113 struct sgmap64 {
114 u32 count;
115 struct sgentry64 sg[1];
116 };
117
118 struct creation_info
119 {
120 u8 buildnum; /* e.g., 588 */
121 u8 usec; /* e.g., 588 */
122 u8 via; /* e.g., 1 = FSU,
123 * 2 = API
124 */
125 u8 year; /* e.g., 1997 = 97 */
126 u32 date; /*
127 * unsigned Month :4; // 1 - 12
128 * unsigned Day :6; // 1 - 32
129 * unsigned Hour :6; // 0 - 23
130 * unsigned Minute :6; // 0 - 60
131 * unsigned Second :6; // 0 - 60
132 */
133 u32 serial[2]; /* e.g., 0x1DEADB0BFAFAF001 */
134 };
135
136
137 /*
138 * Define all the constants needed for the communication interface
139 */
140
141 /*
142 * Define how many queue entries each queue will have and the total
143 * number of entries for the entire communication interface. Also define
144 * how many queues we support.
145 *
146 * This has to match the controller
147 */
148
149 #define NUMBER_OF_COMM_QUEUES 8 // 4 command; 4 response
150 #define HOST_HIGH_CMD_ENTRIES 4
151 #define HOST_NORM_CMD_ENTRIES 8
152 #define ADAP_HIGH_CMD_ENTRIES 4
153 #define ADAP_NORM_CMD_ENTRIES 512
154 #define HOST_HIGH_RESP_ENTRIES 4
155 #define HOST_NORM_RESP_ENTRIES 512
156 #define ADAP_HIGH_RESP_ENTRIES 4
157 #define ADAP_NORM_RESP_ENTRIES 8
158
159 #define TOTAL_QUEUE_ENTRIES \
160 (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \
161 HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES)
162
163
164 /*
165 * Set the queues on a 16 byte alignment
166 */
167
168 #define QUEUE_ALIGNMENT 16
169
170 /*
171 * The queue headers define the Communication Region queues. These
172 * are physically contiguous and accessible by both the adapter and the
173 * host. Even though all queue headers are in the same contiguous block
174 * they will be represented as individual units in the data structures.
175 */
176
177 struct aac_entry {
178 u32 size; /* Size in bytes of Fib which this QE points to */
179 u32 addr; /* Receiver address of the FIB */
180 };
181
182 /*
183 * The adapter assumes the ProducerIndex and ConsumerIndex are grouped
184 * adjacently and in that order.
185 */
186
187 struct aac_qhdr {
188 u64 header_addr; /* Address to hand the adapter to access to this queue head */
189 u32 *producer; /* The producer index for this queue (host address) */
190 u32 *consumer; /* The consumer index for this queue (host address) */
191 };
192
193 /*
194 * Define all the events which the adapter would like to notify
195 * the host of.
196 */
197
198 #define HostNormCmdQue 1 /* Change in host normal priority command queue */
199 #define HostHighCmdQue 2 /* Change in host high priority command queue */
200 #define HostNormRespQue 3 /* Change in host normal priority response queue */
201 #define HostHighRespQue 4 /* Change in host high priority response queue */
202 #define AdapNormRespNotFull 5
203 #define AdapHighRespNotFull 6
204 #define AdapNormCmdNotFull 7
205 #define AdapHighCmdNotFull 8
206 #define SynchCommandComplete 9
207 #define AdapInternalError 0xfe /* The adapter detected an internal error shutting down */
208
209 /*
210 * Define all the events the host wishes to notify the
211 * adapter of. The first four values much match the Qid the
212 * corresponding queue.
213 */
214
215 #define AdapNormCmdQue 2
216 #define AdapHighCmdQue 3
217 #define AdapNormRespQue 6
218 #define AdapHighRespQue 7
219 #define HostShutdown 8
220 #define HostPowerFail 9
221 #define FatalCommError 10
222 #define HostNormRespNotFull 11
223 #define HostHighRespNotFull 12
224 #define HostNormCmdNotFull 13
225 #define HostHighCmdNotFull 14
226 #define FastIo 15
227 #define AdapPrintfDone 16
228
229 /*
230 * Define all the queues that the adapter and host use to communicate
231 * Number them to match the physical queue layout.
232 */
233
234 enum aac_queue_types {
235 HostNormCmdQueue = 0, /* Adapter to host normal priority command traffic */
236 HostHighCmdQueue, /* Adapter to host high priority command traffic */
237 AdapNormCmdQueue, /* Host to adapter normal priority command traffic */
238 AdapHighCmdQueue, /* Host to adapter high priority command traffic */
239 HostNormRespQueue, /* Adapter to host normal priority response traffic */
240 HostHighRespQueue, /* Adapter to host high priority response traffic */
241 AdapNormRespQueue, /* Host to adapter normal priority response traffic */
242 AdapHighRespQueue /* Host to adapter high priority response traffic */
243 };
244
245 /*
246 * Assign type values to the FSA communication data structures
247 */
248
249 #define FIB_MAGIC 0x0001
250
251 /*
252 * Define the priority levels the FSA communication routines support.
253 */
254
255 #define FsaNormal 1
256 #define FsaHigh 2
257
258 /*
259 * Define the FIB. The FIB is the where all the requested data and
260 * command information are put to the application on the FSA adapter.
261 */
262
263 struct aac_fibhdr {
264 u32 XferState; // Current transfer state for this CCB
265 u16 Command; // Routing information for the destination
266 u8 StructType; // Type FIB
267 u8 Flags; // Flags for FIB
268 u16 Size; // Size of this FIB in bytes
269 u16 SenderSize; // Size of the FIB in the sender (for response sizing)
270 u32 SenderFibAddress; // Host defined data in the FIB
271 u32 ReceiverFibAddress; // Logical address of this FIB for the adapter
272 u32 SenderData; // Place holder for the sender to store data
273 union {
274 struct {
275 u32 _ReceiverTimeStart; // Timestamp for receipt of fib
276 u32 _ReceiverTimeDone; // Timestamp for completion of fib
277 } _s;
278 } _u;
279 };
280
281 #define FIB_DATA_SIZE_IN_BYTES (512 - sizeof(struct aac_fibhdr))
282
283
284 struct hw_fib {
285 struct aac_fibhdr header;
286 u8 data[FIB_DATA_SIZE_IN_BYTES]; // Command specific data
287 };
288
289 /*
290 * FIB commands
291 */
292
293 #define TestCommandResponse 1
294 #define TestAdapterCommand 2
295 /*
296 * Lowlevel and comm commands
297 */
298 #define LastTestCommand 100
299 #define ReinitHostNormCommandQueue 101
300 #define ReinitHostHighCommandQueue 102
301 #define ReinitHostHighRespQueue 103
302 #define ReinitHostNormRespQueue 104
303 #define ReinitAdapNormCommandQueue 105
304 #define ReinitAdapHighCommandQueue 107
305 #define ReinitAdapHighRespQueue 108
306 #define ReinitAdapNormRespQueue 109
307 #define InterfaceShutdown 110
308 #define DmaCommandFib 120
309 #define StartProfile 121
310 #define TermProfile 122
311 #define SpeedTest 123
312 #define TakeABreakPt 124
313 #define RequestPerfData 125
314 #define SetInterruptDefTimer 126
315 #define SetInterruptDefCount 127
316 #define GetInterruptDefStatus 128
317 #define LastCommCommand 129
318 /*
319 * Filesystem commands
320 */
321 #define NuFileSystem 300
322 #define UFS 301
323 #define HostFileSystem 302
324 #define LastFileSystemCommand 303
325 /*
326 * Container Commands
327 */
328 #define ContainerCommand 500
329 #define ContainerCommand64 501
330 /*
331 * Cluster Commands
332 */
333 #define ClusterCommand 550
334 /*
335 * Scsi Port commands (scsi passthrough)
336 */
337 #define ScsiPortCommand 600
338 #define ScsiPortCommand64 601
339 /*
340 * Misc house keeping and generic adapter initiated commands
341 */
342 #define AifRequest 700
343 #define CheckRevision 701
344 #define FsaHostShutdown 702
345 #define RequestAdapterInfo 703
346 #define IsAdapterPaused 704
347 #define SendHostTime 705
348 #define LastMiscCommand 706
349
350 //
351 // Commands that will target the failover level on the FSA adapter
352 //
353
354 enum fib_xfer_state {
355 HostOwned = (1<<0),
356 AdapterOwned = (1<<1),
357 FibInitialized = (1<<2),
358 FibEmpty = (1<<3),
359 AllocatedFromPool = (1<<4),
360 SentFromHost = (1<<5),
361 SentFromAdapter = (1<<6),
362 ResponseExpected = (1<<7),
363 NoResponseExpected = (1<<8),
364 AdapterProcessed = (1<<9),
365 HostProcessed = (1<<10),
366 HighPriority = (1<<11),
367 NormalPriority = (1<<12),
368 Async = (1<<13),
369 AsyncIo = (1<<13), // rpbfix: remove with new regime
370 PageFileIo = (1<<14), // rpbfix: remove with new regime
371 ShutdownRequest = (1<<15),
372 LazyWrite = (1<<16), // rpbfix: remove with new regime
373 AdapterMicroFib = (1<<17),
374 BIOSFibPath = (1<<18),
375 FastResponseCapable = (1<<19),
376 ApiFib = (1<<20) // Its an API Fib.
377 };
378
379 /*
380 * The following defines needs to be updated any time there is an
381 * incompatible change made to the aac_init structure.
382 */
383
384 #define ADAPTER_INIT_STRUCT_REVISION 3
385
386 struct aac_init
387 {
388 u32 InitStructRevision;
389 u32 MiniPortRevision;
390 u32 fsrev;
391 u32 CommHeaderAddress;
392 u32 FastIoCommAreaAddress;
393 u32 AdapterFibsPhysicalAddress;
394 u32 AdapterFibsVirtualAddress;
395 u32 AdapterFibsSize;
396 u32 AdapterFibAlign;
397 u32 printfbuf;
398 u32 printfbufsiz;
399 u32 HostPhysMemPages; // number of 4k pages of host physical memory
400 u32 HostElapsedSeconds; // number of seconds since 1970.
401 };
402
403 enum aac_log_level {
404 LOG_AAC_INIT = 10,
405 LOG_AAC_INFORMATIONAL = 20,
406 LOG_AAC_WARNING = 30,
407 LOG_AAC_LOW_ERROR = 40,
408 LOG_AAC_MEDIUM_ERROR = 50,
409 LOG_AAC_HIGH_ERROR = 60,
410 LOG_AAC_PANIC = 70,
411 LOG_AAC_DEBUG = 80,
412 LOG_AAC_WINDBG_PRINT = 90
413 };
414
415 #define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT 0x030b
416 #define FSAFS_NTC_FIB_CONTEXT 0x030c
417
418 struct aac_dev;
419
420 struct adapter_ops
421 {
422 void (*adapter_interrupt)(struct aac_dev *dev);
423 void (*adapter_notify)(struct aac_dev *dev, u32 event);
424 void (*adapter_enable_int)(struct aac_dev *dev, u32 event);
425 void (*adapter_disable_int)(struct aac_dev *dev, u32 event);
426 int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 *status);
427 int (*adapter_check_health)(struct aac_dev *dev);
428 };
429
430 /*
431 * Define which interrupt handler needs to be installed
432 */
433
434 struct aac_driver_ident
435 {
436 int (*init)(struct aac_dev *dev);
437 char * name;
438 char * vname;
439 char * model;
440 u16 channels;
441 int quirks;
442 };
443 /*
444 * Some adapter firmware needs communication memory
445 * below 2gig. This tells the init function to set the
446 * dma mask such that fib memory will be allocated where the
447 * adapter firmware can get to it.
448 */
449 #define AAC_QUIRK_31BIT 1
450
451 /*
452 * The adapter interface specs all queues to be located in the same
453 * physically contigous block. The host structure that defines the
454 * commuication queues will assume they are each a separate physically
455 * contigous memory region that will support them all being one big
456 * contigous block.
457 * There is a command and response queue for each level and direction of
458 * commuication. These regions are accessed by both the host and adapter.
459 */
460
461 struct aac_queue {
462 u64 logical; /*address we give the adapter */
463 struct aac_entry *base; /*system virtual address */
464 struct aac_qhdr headers; /*producer,consumer q headers*/
465 u32 entries; /*Number of queue entries */
466 wait_queue_head_t qfull; /*Event to wait on if q full */
467 wait_queue_head_t cmdready; /*Cmd ready from the adapter */
468 /* This is only valid for adapter to host command queues. */
469 spinlock_t *lock; /* Spinlock for this queue must take this lock before accessing the lock */
470 spinlock_t lockdata; /* Actual lock (used only on one side of the lock) */
471 unsigned long SavedIrql; /* Previous IRQL when the spin lock is taken */
472 u32 padding; /* Padding - FIXME - can remove I believe */
473 struct list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */
474 /* only valid for command queues which receive entries from the adapter. */
475 struct list_head pendingq; /* A queue of outstanding fib's to the adapter. */
476 u32 numpending; /* Number of entries on outstanding queue. */
477 struct aac_dev * dev; /* Back pointer to adapter structure */
478 };
479
480 /*
481 * Message queues. The order here is important, see also the
482 * queue type ordering
483 */
484
485 struct aac_queue_block
486 {
487 struct aac_queue queue[8];
488 };
489
490 /*
491 * SaP1 Message Unit Registers
492 */
493
494 struct sa_drawbridge_CSR {
495 // Offset | Name
496 u32 reserved[10]; // 00h-27h | Reserved
497 u8 LUT_Offset; // 28h | Looup Table Offset
498 u8 reserved1[3]; // 29h-2bh | Reserved
499 u32 LUT_Data; // 2ch | Looup Table Data
500 u32 reserved2[26]; // 30h-97h | Reserved
501 u16 PRICLEARIRQ; // 98h | Primary Clear Irq
502 u16 SECCLEARIRQ; // 9ah | Secondary Clear Irq
503 u16 PRISETIRQ; // 9ch | Primary Set Irq
504 u16 SECSETIRQ; // 9eh | Secondary Set Irq
505 u16 PRICLEARIRQMASK; // a0h | Primary Clear Irq Mask
506 u16 SECCLEARIRQMASK; // a2h | Secondary Clear Irq Mask
507 u16 PRISETIRQMASK; // a4h | Primary Set Irq Mask
508 u16 SECSETIRQMASK; // a6h | Secondary Set Irq Mask
509 u32 MAILBOX0; // a8h | Scratchpad 0
510 u32 MAILBOX1; // ach | Scratchpad 1
511 u32 MAILBOX2; // b0h | Scratchpad 2
512 u32 MAILBOX3; // b4h | Scratchpad 3
513 u32 MAILBOX4; // b8h | Scratchpad 4
514 u32 MAILBOX5; // bch | Scratchpad 5
515 u32 MAILBOX6; // c0h | Scratchpad 6
516 u32 MAILBOX7; // c4h | Scratchpad 7
517
518 u32 ROM_Setup_Data; // c8h | Rom Setup and Data
519 u32 ROM_Control_Addr; // cch | Rom Control and Address
520
521 u32 reserved3[12]; // d0h-ffh | reserved
522 u32 LUT[64]; // 100h-1ffh| Lookup Table Entries
523
524 //
525 // TO DO
526 // need to add DMA, I2O, UART, etc registers form 80h to 364h
527 //
528
529 };
530
531 #define Mailbox0 SaDbCSR.MAILBOX0
532 #define Mailbox1 SaDbCSR.MAILBOX1
533 #define Mailbox2 SaDbCSR.MAILBOX2
534 #define Mailbox3 SaDbCSR.MAILBOX3
535 #define Mailbox4 SaDbCSR.MAILBOX4
536 #define Mailbox5 SaDbCSR.MAILBOX5
537 #define Mailbox7 SaDbCSR.MAILBOX7
538
539 #define DoorbellReg_p SaDbCSR.PRISETIRQ
540 #define DoorbellReg_s SaDbCSR.SECSETIRQ
541 #define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ
542
543
544 #define DOORBELL_0 cpu_to_le16(0x0001)
545 #define DOORBELL_1 cpu_to_le16(0x0002)
546 #define DOORBELL_2 cpu_to_le16(0x0004)
547 #define DOORBELL_3 cpu_to_le16(0x0008)
548 #define DOORBELL_4 cpu_to_le16(0x0010)
549 #define DOORBELL_5 cpu_to_le16(0x0020)
550 #define DOORBELL_6 cpu_to_le16(0x0040)
551
552
553 #define PrintfReady DOORBELL_5
554 #define PrintfDone DOORBELL_5
555
556 struct sa_registers {
557 struct sa_drawbridge_CSR SaDbCSR; /* 98h - c4h */
558 };
559
560
561 #define Sa_MINIPORT_REVISION 1
562
563 #define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
564 #define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
565 #define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR))
566 #define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR))
567
568 /*
569 * Rx Message Unit Registers
570 */
571
572 struct rx_mu_registers {
573 // Local | PCI* | Name
574 // | |
575 u32 ARSR; // 1300h | 00h | APIC Register Select Register
576 u32 reserved0; // 1304h | 04h | Reserved
577 u32 AWR; // 1308h | 08h | APIC Window Register
578 u32 reserved1; // 130Ch | 0Ch | Reserved
579 u32 IMRx[2]; // 1310h | 10h | Inbound Message Registers
580 u32 OMRx[2]; // 1318h | 18h | Outbound Message Registers
581 u32 IDR; // 1320h | 20h | Inbound Doorbell Register
582 u32 IISR; // 1324h | 24h | Inbound Interrupt Status Register
583 u32 IIMR; // 1328h | 28h | Inbound Interrupt Mask Register
584 u32 ODR; // 132Ch | 2Ch | Outbound Doorbell Register
585 u32 OISR; // 1330h | 30h | Outbound Interrupt Status Register
586 u32 OIMR; // 1334h | 34h | Outbound Interrupt Mask Register
587 // * Must access through ATU Inbound Translation Window
588 };
589
590 struct rx_inbound {
591 u32 Mailbox[8];
592 };
593
594 #define InboundMailbox0 IndexRegs.Mailbox[0]
595 #define InboundMailbox1 IndexRegs.Mailbox[1]
596 #define InboundMailbox2 IndexRegs.Mailbox[2]
597 #define InboundMailbox3 IndexRegs.Mailbox[3]
598 #define InboundMailbox4 IndexRegs.Mailbox[4]
599 #define InboundMailbox5 IndexRegs.Mailbox[5]
600 #define InboundMailbox6 IndexRegs.Mailbox[6]
601 #define InboundMailbox7 IndexRegs.Mailbox[7]
602
603 #define INBOUNDDOORBELL_0 cpu_to_le32(0x00000001)
604 #define INBOUNDDOORBELL_1 cpu_to_le32(0x00000002)
605 #define INBOUNDDOORBELL_2 cpu_to_le32(0x00000004)
606 #define INBOUNDDOORBELL_3 cpu_to_le32(0x00000008)
607 #define INBOUNDDOORBELL_4 cpu_to_le32(0x00000010)
608 #define INBOUNDDOORBELL_5 cpu_to_le32(0x00000020)
609 #define INBOUNDDOORBELL_6 cpu_to_le32(0x00000040)
610
611 #define OUTBOUNDDOORBELL_0 cpu_to_le32(0x00000001)
612 #define OUTBOUNDDOORBELL_1 cpu_to_le32(0x00000002)
613 #define OUTBOUNDDOORBELL_2 cpu_to_le32(0x00000004)
614 #define OUTBOUNDDOORBELL_3 cpu_to_le32(0x00000008)
615 #define OUTBOUNDDOORBELL_4 cpu_to_le32(0x00000010)
616
617 #define InboundDoorbellReg MUnit.IDR
618 #define OutboundDoorbellReg MUnit.ODR
619
620 struct rx_registers {
621 struct rx_mu_registers MUnit; // 1300h - 1334h
622 u32 reserved1[6]; // 1338h - 134ch
623 struct rx_inbound IndexRegs;
624 };
625
626 #define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR))
627 #define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR))
628 #define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR))
629 #define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR))
630
631 /*
632 * Rkt Message Unit Registers (same as Rx, except a larger reserve region)
633 */
634
635 #define rkt_mu_registers rx_mu_registers
636 #define rkt_inbound rx_inbound
637
638 struct rkt_registers {
639 struct rkt_mu_registers MUnit; /* 1300h - 1334h */
640 u32 reserved1[1010]; /* 1338h - 22fch */
641 struct rkt_inbound IndexRegs; /* 2300h - */
642 };
643
644 #define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR))
645 #define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR))
646 #define rkt_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rkt->CSR))
647 #define rkt_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rkt->CSR))
648
649 struct fib;
650
651 typedef void (*fib_callback)(void *ctxt, struct fib *fibctx);
652
653 struct aac_fib_context {
654 s16 type; // used for verification of structure
655 s16 size;
656 u32 unique; // unique value representing this context
657 ulong jiffies; // used for cleanup - dmb changed to ulong
658 struct list_head next; // used to link context's into a linked list
659 struct semaphore wait_sem; // this is used to wait for the next fib to arrive.
660 int wait; // Set to true when thread is in WaitForSingleObject
661 unsigned long count; // total number of FIBs on FibList
662 struct list_head fib_list; // this holds fibs and their attachd hw_fibs
663 };
664
665 struct fsa_scsi_hba {
666 u32 size[MAXIMUM_NUM_CONTAINERS];
667 u32 type[MAXIMUM_NUM_CONTAINERS];
668 u8 valid[MAXIMUM_NUM_CONTAINERS];
669 u8 ro[MAXIMUM_NUM_CONTAINERS];
670 u8 locked[MAXIMUM_NUM_CONTAINERS];
671 u8 deleted[MAXIMUM_NUM_CONTAINERS];
672 char devname[MAXIMUM_NUM_CONTAINERS][8];
673 };
674
675 struct fib {
676 void *next; /* this is used by the allocator */
677 s16 type;
678 s16 size;
679 /*
680 * The Adapter that this I/O is destined for.
681 */
682 struct aac_dev *dev;
683 /*
684 * This is the event the sendfib routine will wait on if the
685 * caller did not pass one and this is synch io.
686 */
687 struct semaphore event_wait;
688 spinlock_t event_lock;
689
690 u32 done; /* gets set to 1 when fib is complete */
691 fib_callback callback;
692 void *callback_data;
693 u32 flags; // u32 dmb was ulong
694 /*
695 * The following is used to put this fib context onto the
696 * Outstanding I/O queue.
697 */
698 struct list_head queue;
699 /*
700 * And for the internal issue/reply queues (we may be able
701 * to merge these two)
702 */
703 struct list_head fiblink;
704 void *data;
705 struct hw_fib *hw_fib; /* Actual shared object */
706 dma_addr_t hw_fib_pa; /* physical address of hw_fib*/
707 };
708
709 /*
710 * Adapter Information Block
711 *
712 * This is returned by the RequestAdapterInfo block
713 */
714
715 struct aac_adapter_info
716 {
717 u32 platform;
718 u32 cpu;
719 u32 subcpu;
720 u32 clock;
721 u32 execmem;
722 u32 buffermem;
723 u32 totalmem;
724 u32 kernelrev;
725 u32 kernelbuild;
726 u32 monitorrev;
727 u32 monitorbuild;
728 u32 hwrev;
729 u32 hwbuild;
730 u32 biosrev;
731 u32 biosbuild;
732 u32 cluster;
733 u32 clusterchannelmask;
734 u32 serial[2];
735 u32 battery;
736 u32 options;
737 u32 OEM;
738 };
739
740 /*
741 * Battery platforms
742 */
743 #define AAC_BAT_REQ_PRESENT (1)
744 #define AAC_BAT_REQ_NOTPRESENT (2)
745 #define AAC_BAT_OPT_PRESENT (3)
746 #define AAC_BAT_OPT_NOTPRESENT (4)
747 #define AAC_BAT_NOT_SUPPORTED (5)
748 /*
749 * cpu types
750 */
751 #define AAC_CPU_SIMULATOR (1)
752 #define AAC_CPU_I960 (2)
753 #define AAC_CPU_STRONGARM (3)
754
755 /*
756 * Supported Options
757 */
758 #define AAC_OPT_SNAPSHOT cpu_to_le32(1)
759 #define AAC_OPT_CLUSTERS cpu_to_le32(1<<1)
760 #define AAC_OPT_WRITE_CACHE cpu_to_le32(1<<2)
761 #define AAC_OPT_64BIT_DATA cpu_to_le32(1<<3)
762 #define AAC_OPT_HOST_TIME_FIB cpu_to_le32(1<<4)
763 #define AAC_OPT_RAID50 cpu_to_le32(1<<5)
764 #define AAC_OPT_4GB_WINDOW cpu_to_le32(1<<6)
765 #define AAC_OPT_SCSI_UPGRADEABLE cpu_to_le32(1<<7)
766 #define AAC_OPT_SOFT_ERR_REPORT cpu_to_le32(1<<8)
767 #define AAC_OPT_SUPPORTED_RECONDITION cpu_to_le32(1<<9)
768 #define AAC_OPT_SGMAP_HOST64 cpu_to_le32(1<<10)
769 #define AAC_OPT_ALARM cpu_to_le32(1<<11)
770 #define AAC_OPT_NONDASD cpu_to_le32(1<<12)
771
772 struct aac_dev
773 {
774 struct aac_dev *next;
775 const char *name;
776 int id;
777
778 u16 irq_mask;
779 /*
780 * Map for 128 fib objects (64k)
781 */
782 dma_addr_t hw_fib_pa;
783 struct hw_fib *hw_fib_va;
784 struct hw_fib *aif_base_va;
785 /*
786 * Fib Headers
787 */
788 struct fib *fibs;
789
790 struct fib *free_fib;
791 struct fib *timeout_fib;
792 spinlock_t fib_lock;
793
794 struct aac_queue_block *queues;
795 /*
796 * The user API will use an IOCTL to register itself to receive
797 * FIBs from the adapter. The following list is used to keep
798 * track of all the threads that have requested these FIBs. The
799 * mutex is used to synchronize access to all data associated
800 * with the adapter fibs.
801 */
802 struct list_head fib_list;
803
804 struct adapter_ops a_ops;
805 unsigned long fsrev; /* Main driver's revision number */
806
807 struct aac_init *init; /* Holds initialization info to communicate with adapter */
808 dma_addr_t init_pa; /* Holds physical address of the init struct */
809
810 struct pci_dev *pdev; /* Our PCI interface */
811 void * printfbuf; /* pointer to buffer used for printf's from the adapter */
812 void * comm_addr; /* Base address of Comm area */
813 dma_addr_t comm_phys; /* Physical Address of Comm area */
814 size_t comm_size;
815
816 struct Scsi_Host *scsi_host_ptr;
817 struct fsa_scsi_hba fsa_dev;
818 pid_t thread_pid;
819 int cardtype;
820
821 /*
822 * The following is the device specific extension.
823 */
824 union
825 {
826 struct sa_registers *sa;
827 struct rx_registers *rx;
828 struct rkt_registers *rkt;
829 } regs;
830 u32 OIMR; /* Mask Register Cache */
831 /*
832 * AIF thread states
833 */
834 u32 aif_thread;
835 struct completion aif_completion;
836 struct aac_adapter_info adapter_info;
837 /* These are in adapter info but they are in the io flow so
838 * lets break them out so we don't have to do an AND to check them
839 */
840 u8 nondasd_support;
841 u8 dac_support;
842 };
843
844 #define AllocateAndMapFibSpace(dev, MapFibContext) \
845 (dev)->a_ops.AllocateAndMapFibSpace(dev, MapFibContext)
846
847 #define UnmapAndFreeFibSpace(dev, MapFibContext) \
848 (dev)->a_ops.UnmapAndFreeFibSpace(dev, MapFibContext)
849
850 #define aac_adapter_interrupt(dev) \
851 (dev)->a_ops.adapter_interrupt(dev)
852
853 #define aac_adapter_notify(dev, event) \
854 (dev)->a_ops.adapter_notify(dev, event)
855
856 #define aac_adapter_enable_int(dev, event) \
857 (dev)->a_ops.adapter_enable_int(dev, event)
858
859 #define aac_adapter_disable_int(dev, event) \
860 dev->a_ops.adapter_disable_int(dev, event)
861
862 #define aac_adapter_check_health(dev) \
863 (dev)->a_ops.adapter_check_health(dev)
864
865
866 #define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001)
867
868 /*
869 * Define the command values
870 */
871
872 #define Null 0
873 #define GetAttributes 1
874 #define SetAttributes 2
875 #define Lookup 3
876 #define ReadLink 4
877 #define Read 5
878 #define Write 6
879 #define Create 7
880 #define MakeDirectory 8
881 #define SymbolicLink 9
882 #define MakeNode 10
883 #define Removex 11
884 #define RemoveDirectoryx 12
885 #define Rename 13
886 #define Link 14
887 #define ReadDirectory 15
888 #define ReadDirectoryPlus 16
889 #define FileSystemStatus 17
890 #define FileSystemInfo 18
891 #define PathConfigure 19
892 #define Commit 20
893 #define Mount 21
894 #define UnMount 22
895 #define Newfs 23
896 #define FsCheck 24
897 #define FsSync 25
898 #define SimReadWrite 26
899 #define SetFileSystemStatus 27
900 #define BlockRead 28
901 #define BlockWrite 29
902 #define NvramIoctl 30
903 #define FsSyncWait 31
904 #define ClearArchiveBit 32
905 #define SetAcl 33
906 #define GetAcl 34
907 #define AssignAcl 35
908 #define FaultInsertion 36 /* Fault Insertion Command */
909 #define CrazyCache 37 /* Crazycache */
910
911 #define MAX_FSACOMMAND_NUM 38
912
913
914 /*
915 * Define the status returns. These are very unixlike although
916 * most are not in fact used
917 */
918
919 #define ST_OK 0
920 #define ST_PERM 1
921 #define ST_NOENT 2
922 #define ST_IO 5
923 #define ST_NXIO 6
924 #define ST_E2BIG 7
925 #define ST_ACCES 13
926 #define ST_EXIST 17
927 #define ST_XDEV 18
928 #define ST_NODEV 19
929 #define ST_NOTDIR 20
930 #define ST_ISDIR 21
931 #define ST_INVAL 22
932 #define ST_FBIG 27
933 #define ST_NOSPC 28
934 #define ST_ROFS 30
935 #define ST_MLINK 31
936 #define ST_WOULDBLOCK 35
937 #define ST_NAMETOOLONG 63
938 #define ST_NOTEMPTY 66
939 #define ST_DQUOT 69
940 #define ST_STALE 70
941 #define ST_REMOTE 71
942 #define ST_BADHANDLE 10001
943 #define ST_NOT_SYNC 10002
944 #define ST_BAD_COOKIE 10003
945 #define ST_NOTSUPP 10004
946 #define ST_TOOSMALL 10005
947 #define ST_SERVERFAULT 10006
948 #define ST_BADTYPE 10007
949 #define ST_JUKEBOX 10008
950 #define ST_NOTMOUNTED 10009
951 #define ST_MAINTMODE 10010
952 #define ST_STALEACL 10011
953
954 /*
955 * On writes how does the client want the data written.
956 */
957
958 #define CACHE_CSTABLE 1
959 #define CACHE_UNSTABLE 2
960
961 /*
962 * Lets the client know at which level the data was commited on
963 * a write request
964 */
965
966 #define CMFILE_SYNCH_NVRAM 1
967 #define CMDATA_SYNCH_NVRAM 2
968 #define CMFILE_SYNCH 3
969 #define CMDATA_SYNCH 4
970 #define CMUNSTABLE 5
971
972 struct aac_read
973 {
974 u32 command;
975 u32 cid;
976 u32 block;
977 u32 count;
978 struct sgmap sg; // Must be last in struct because it is variable
979 };
980
981 struct aac_read64
982 {
983 u32 command;
984 u16 cid;
985 u16 sector_count;
986 u32 block;
987 u16 pad;
988 u16 flags;
989 struct sgmap64 sg; // Must be last in struct because it is variable
990 };
991
992 struct aac_read_reply
993 {
994 u32 status;
995 u32 count;
996 };
997
998 struct aac_write
999 {
1000 u32 command;
1001 u32 cid;
1002 u32 block;
1003 u32 count;
1004 u32 stable; // Not used
1005 struct sgmap sg; // Must be last in struct because it is variable
1006 };
1007
1008 struct aac_write64
1009 {
1010 u32 command;
1011 u16 cid;
1012 u16 sector_count;
1013 u32 block;
1014 u16 pad;
1015 u16 flags;
1016 struct sgmap64 sg; // Must be last in struct because it is variable
1017 };
1018 struct aac_write_reply
1019 {
1020 u32 status;
1021 u32 count;
1022 u32 committed;
1023 };
1024
1025 struct aac_srb
1026 {
1027 u32 function;
1028 u32 channel;
1029 u32 id;
1030 u32 lun;
1031 u32 timeout;
1032 u32 flags;
1033 u32 count; // Data xfer size
1034 u32 retry_limit;
1035 u32 cdb_size;
1036 u8 cdb[16];
1037 struct sgmap sg;
1038 };
1039
1040
1041
1042 #define AAC_SENSE_BUFFERSIZE 30
1043
1044 struct aac_srb_reply
1045 {
1046 u32 status;
1047 u32 srb_status;
1048 u32 scsi_status;
1049 u32 data_xfer_length;
1050 u32 sense_data_size;
1051 u8 sense_data[AAC_SENSE_BUFFERSIZE]; // Can this be SCSI_SENSE_BUFFERSIZE
1052 };
1053 /*
1054 * SRB Flags
1055 */
1056 #define SRB_NoDataXfer 0x0000
1057 #define SRB_DisableDisconnect 0x0004
1058 #define SRB_DisableSynchTransfer 0x0008
1059 #define SRB_BypassFrozenQueue 0x0010
1060 #define SRB_DisableAutosense 0x0020
1061 #define SRB_DataIn 0x0040
1062 #define SRB_DataOut 0x0080
1063
1064 /*
1065 * SRB Functions - set in aac_srb->function
1066 */
1067 #define SRBF_ExecuteScsi 0x0000
1068 #define SRBF_ClaimDevice 0x0001
1069 #define SRBF_IO_Control 0x0002
1070 #define SRBF_ReceiveEvent 0x0003
1071 #define SRBF_ReleaseQueue 0x0004
1072 #define SRBF_AttachDevice 0x0005
1073 #define SRBF_ReleaseDevice 0x0006
1074 #define SRBF_Shutdown 0x0007
1075 #define SRBF_Flush 0x0008
1076 #define SRBF_AbortCommand 0x0010
1077 #define SRBF_ReleaseRecovery 0x0011
1078 #define SRBF_ResetBus 0x0012
1079 #define SRBF_ResetDevice 0x0013
1080 #define SRBF_TerminateIO 0x0014
1081 #define SRBF_FlushQueue 0x0015
1082 #define SRBF_RemoveDevice 0x0016
1083 #define SRBF_DomainValidation 0x0017
1084
1085 /*
1086 * SRB SCSI Status - set in aac_srb->scsi_status
1087 */
1088 #define SRB_STATUS_PENDING 0x00
1089 #define SRB_STATUS_SUCCESS 0x01
1090 #define SRB_STATUS_ABORTED 0x02
1091 #define SRB_STATUS_ABORT_FAILED 0x03
1092 #define SRB_STATUS_ERROR 0x04
1093 #define SRB_STATUS_BUSY 0x05
1094 #define SRB_STATUS_INVALID_REQUEST 0x06
1095 #define SRB_STATUS_INVALID_PATH_ID 0x07
1096 #define SRB_STATUS_NO_DEVICE 0x08
1097 #define SRB_STATUS_TIMEOUT 0x09
1098 #define SRB_STATUS_SELECTION_TIMEOUT 0x0A
1099 #define SRB_STATUS_COMMAND_TIMEOUT 0x0B
1100 #define SRB_STATUS_MESSAGE_REJECTED 0x0D
1101 #define SRB_STATUS_BUS_RESET 0x0E
1102 #define SRB_STATUS_PARITY_ERROR 0x0F
1103 #define SRB_STATUS_REQUEST_SENSE_FAILED 0x10
1104 #define SRB_STATUS_NO_HBA 0x11
1105 #define SRB_STATUS_DATA_OVERRUN 0x12
1106 #define SRB_STATUS_UNEXPECTED_BUS_FREE 0x13
1107 #define SRB_STATUS_PHASE_SEQUENCE_FAILURE 0x14
1108 #define SRB_STATUS_BAD_SRB_BLOCK_LENGTH 0x15
1109 #define SRB_STATUS_REQUEST_FLUSHED 0x16
1110 #define SRB_STATUS_DELAYED_RETRY 0x17
1111 #define SRB_STATUS_INVALID_LUN 0x20
1112 #define SRB_STATUS_INVALID_TARGET_ID 0x21
1113 #define SRB_STATUS_BAD_FUNCTION 0x22
1114 #define SRB_STATUS_ERROR_RECOVERY 0x23
1115 #define SRB_STATUS_NOT_STARTED 0x24
1116 #define SRB_STATUS_NOT_IN_USE 0x30
1117 #define SRB_STATUS_FORCE_ABORT 0x31
1118 #define SRB_STATUS_DOMAIN_VALIDATION_FAIL 0x32
1119
1120 /*
1121 * Object-Server / Volume-Manager Dispatch Classes
1122 */
1123
1124 #define VM_Null 0
1125 #define VM_NameServe 1
1126 #define VM_ContainerConfig 2
1127 #define VM_Ioctl 3
1128 #define VM_FilesystemIoctl 4
1129 #define VM_CloseAll 5
1130 #define VM_CtBlockRead 6
1131 #define VM_CtBlockWrite 7
1132 #define VM_SliceBlockRead 8 /* raw access to configured "storage objects" */
1133 #define VM_SliceBlockWrite 9
1134 #define VM_DriveBlockRead 10 /* raw access to physical devices */
1135 #define VM_DriveBlockWrite 11
1136 #define VM_EnclosureMgt 12 /* enclosure management */
1137 #define VM_Unused 13 /* used to be diskset management */
1138 #define VM_CtBlockVerify 14
1139 #define VM_CtPerf 15 /* performance test */
1140 #define VM_CtBlockRead64 16
1141 #define VM_CtBlockWrite64 17
1142 #define VM_CtBlockVerify64 18
1143 #define VM_CtHostRead64 19
1144 #define VM_CtHostWrite64 20
1145
1146 #define MAX_VMCOMMAND_NUM 21 /* used for sizing stats array - leave last */
1147
1148 /*
1149 * Descriptive information (eg, vital stats)
1150 * that a content manager might report. The
1151 * FileArray filesystem component is one example
1152 * of a content manager. Raw mode might be
1153 * another.
1154 */
1155
1156 struct aac_fsinfo {
1157 u32 fsTotalSize; /* Consumed by fs, incl. metadata */
1158 u32 fsBlockSize;
1159 u32 fsFragSize;
1160 u32 fsMaxExtendSize;
1161 u32 fsSpaceUnits;
1162 u32 fsMaxNumFiles;
1163 u32 fsNumFreeFiles;
1164 u32 fsInodeDensity;
1165 }; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */
1166
1167 union aac_contentinfo {
1168 struct aac_fsinfo filesys; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */
1169 };
1170
1171 /*
1172 * Query for "mountable" objects, ie, objects that are typically
1173 * associated with a drive letter on the client (host) side.
1174 */
1175
1176 struct aac_mntent {
1177 u32 oid;
1178 u8 name[16]; // if applicable
1179 struct creation_info create_info; // if applicable
1180 u32 capacity;
1181 u32 vol; // substrate structure
1182 u32 obj; // FT_FILESYS, FT_DATABASE, etc.
1183 u32 state; // unready for mounting, readonly, etc.
1184 union aac_contentinfo fileinfo; // Info specific to content manager (eg, filesystem)
1185 u32 altoid; // != oid <==> snapshot or broken mirror exists
1186 };
1187
1188 #define FSCS_NOTCLEAN 0x0001 /* fsck is neccessary before mounting */
1189 #define FSCS_READONLY 0x0002 /* possible result of broken mirror */
1190 #define FSCS_HIDDEN 0x0004 /* should be ignored - set during a clear */
1191
1192 struct aac_query_mount {
1193 u32 command;
1194 u32 type;
1195 u32 count;
1196 };
1197
1198 struct aac_mount {
1199 u32 status;
1200 u32 type; /* should be same as that requested */
1201 u32 count;
1202 struct aac_mntent mnt[1];
1203 };
1204
1205 /*
1206 * The following command is sent to shut down each container.
1207 */
1208
1209 struct aac_close {
1210 u32 command;
1211 u32 cid;
1212 };
1213
1214 struct aac_query_disk
1215 {
1216 s32 cnum;
1217 s32 bus;
1218 s32 id;
1219 s32 lun;
1220 u32 valid;
1221 u32 locked;
1222 u32 deleted;
1223 s32 instance;
1224 s8 name[10];
1225 u32 unmapped;
1226 };
1227
1228 struct aac_delete_disk {
1229 u32 disknum;
1230 u32 cnum;
1231 };
1232
1233 struct fib_ioctl
1234 {
1235 u32 fibctx;
1236 s32 wait;
1237 char __user *fib;
1238 };
1239
1240 struct revision
1241 {
1242 u32 compat;
1243 u32 version;
1244 u32 build;
1245 };
1246
1247 /*
1248 * Ugly - non Linux like ioctl coding for back compat.
1249 */
1250
1251 #define CTL_CODE(function, method) ( \
1252 (4<< 16) | ((function) << 2) | (method) \
1253 )
1254
1255 /*
1256 * Define the method codes for how buffers are passed for I/O and FS
1257 * controls
1258 */
1259
1260 #define METHOD_BUFFERED 0
1261 #define METHOD_NEITHER 3
1262
1263 /*
1264 * Filesystem ioctls
1265 */
1266
1267 #define FSACTL_SENDFIB CTL_CODE(2050, METHOD_BUFFERED)
1268 #define FSACTL_SEND_RAW_SRB CTL_CODE(2067, METHOD_BUFFERED)
1269 #define FSACTL_DELETE_DISK 0x163
1270 #define FSACTL_QUERY_DISK 0x173
1271 #define FSACTL_OPEN_GET_ADAPTER_FIB CTL_CODE(2100, METHOD_BUFFERED)
1272 #define FSACTL_GET_NEXT_ADAPTER_FIB CTL_CODE(2101, METHOD_BUFFERED)
1273 #define FSACTL_CLOSE_GET_ADAPTER_FIB CTL_CODE(2102, METHOD_BUFFERED)
1274 #define FSACTL_MINIPORT_REV_CHECK CTL_CODE(2107, METHOD_BUFFERED)
1275 #define FSACTL_GET_PCI_INFO CTL_CODE(2119, METHOD_BUFFERED)
1276 #define FSACTL_FORCE_DELETE_DISK CTL_CODE(2120, METHOD_NEITHER)
1277 #define FSACTL_GET_CONTAINERS 2131
1278
1279
1280 struct aac_common
1281 {
1282 /*
1283 * If this value is set to 1 then interrupt moderation will occur
1284 * in the base commuication support.
1285 */
1286 u32 irq_mod;
1287 u32 peak_fibs;
1288 u32 zero_fibs;
1289 u32 fib_timeouts;
1290 /*
1291 * Statistical counters in debug mode
1292 */
1293 #ifdef DBG
1294 u32 FibsSent;
1295 u32 FibRecved;
1296 u32 NoResponseSent;
1297 u32 NoResponseRecved;
1298 u32 AsyncSent;
1299 u32 AsyncRecved;
1300 u32 NormalSent;
1301 u32 NormalRecved;
1302 #endif
1303 };
1304
1305 extern struct aac_common aac_config;
1306
1307
1308 /*
1309 * The following macro is used when sending and receiving FIBs. It is
1310 * only used for debugging.
1311 */
1312
1313 #ifdef DBG
1314 #define FIB_COUNTER_INCREMENT(counter) (counter)++
1315 #else
1316 #define FIB_COUNTER_INCREMENT(counter)
1317 #endif
1318
1319 /*
1320 * Adapter direct commands
1321 * Monitor/Kernel API
1322 */
1323
1324 #define BREAKPOINT_REQUEST cpu_to_le32(0x00000004)
1325 #define INIT_STRUCT_BASE_ADDRESS cpu_to_le32(0x00000005)
1326 #define READ_PERMANENT_PARAMETERS cpu_to_le32(0x0000000a)
1327 #define WRITE_PERMANENT_PARAMETERS cpu_to_le32(0x0000000b)
1328 #define HOST_CRASHING cpu_to_le32(0x0000000d)
1329 #define SEND_SYNCHRONOUS_FIB cpu_to_le32(0x0000000c)
1330 #define COMMAND_POST_RESULTS cpu_to_le32(0x00000014)
1331 #define GET_ADAPTER_PROPERTIES cpu_to_le32(0x00000019)
1332 #define RE_INIT_ADAPTER cpu_to_le32(0x000000ee)
1333
1334 /*
1335 * Adapter Status Register
1336 *
1337 * Phase Staus mailbox is 32bits:
1338 * <31:16> = Phase Status
1339 * <15:0> = Phase
1340 *
1341 * The adapter reports is present state through the phase. Only
1342 * a single phase should be ever be set. Each phase can have multiple
1343 * phase status bits to provide more detailed information about the
1344 * state of the board. Care should be taken to ensure that any phase
1345 * status bits that are set when changing the phase are also valid
1346 * for the new phase or be cleared out. Adapter software (monitor,
1347 * iflash, kernel) is responsible for properly maintining the phase
1348 * status mailbox when it is running.
1349 *
1350 * MONKER_API Phases
1351 *
1352 * Phases are bit oriented. It is NOT valid to have multiple bits set
1353 */
1354
1355 #define SELF_TEST_FAILED (cpu_to_le32(0x00000004))
1356 #define MONITOR_PANIC (cpu_to_le32(0x00000020))
1357 #define KERNEL_UP_AND_RUNNING (cpu_to_le32(0x00000080))
1358 #define KERNEL_PANIC (cpu_to_le32(0x00000100))
1359
1360 /*
1361 * Doorbell bit defines
1362 */
1363
1364 #define DoorBellSyncCmdAvailable cpu_to_le32(1<<0) // Host -> Adapter
1365 #define DoorBellPrintfDone cpu_to_le32(1<<5) // Host -> Adapter
1366 #define DoorBellAdapterNormCmdReady cpu_to_le32(1<<1) // Adapter -> Host
1367 #define DoorBellAdapterNormRespReady cpu_to_le32(1<<2) // Adapter -> Host
1368 #define DoorBellAdapterNormCmdNotFull cpu_to_le32(1<<3) // Adapter -> Host
1369 #define DoorBellAdapterNormRespNotFull cpu_to_le32(1<<4) // Adapter -> Host
1370 #define DoorBellPrintfReady cpu_to_le32(1<<5) // Adapter -> Host
1371
1372 /*
1373 * For FIB communication, we need all of the following things
1374 * to send back to the user.
1375 */
1376
1377 #define AifCmdEventNotify 1 /* Notify of event */
1378 #define AifEnConfigChange 3 /* Adapter configuration change */
1379 #define AifEnContainerChange 4 /* Container configuration change */
1380 #define AifEnDeviceFailure 5 /* SCSI device failed */
1381 #define AifEnAddContainer 15 /* A new array was created */
1382 #define AifEnDeleteContainer 16 /* A container was deleted */
1383 #define AifEnExpEvent 23 /* Firmware Event Log */
1384 #define AifExeFirmwarePanic 3 /* Firmware Event Panic */
1385 #define AifHighPriority 3 /* Highest Priority Event */
1386
1387 #define AifCmdJobProgress 2 /* Progress report */
1388 #define AifJobCtrZero 101 /* Array Zero progress */
1389 #define AifJobStsSuccess 1 /* Job completes */
1390 #define AifCmdAPIReport 3 /* Report from other user of API */
1391 #define AifCmdDriverNotify 4 /* Notify host driver of event */
1392 #define AifDenMorphComplete 200 /* A morph operation completed */
1393 #define AifDenVolumeExtendComplete 201 /* A volume extend completed */
1394 #define AifReqJobList 100 /* Gets back complete job list */
1395 #define AifReqJobsForCtr 101 /* Gets back jobs for specific container */
1396 #define AifReqJobsForScsi 102 /* Gets back jobs for specific SCSI device */
1397 #define AifReqJobReport 103 /* Gets back a specific job report or list of them */
1398 #define AifReqTerminateJob 104 /* Terminates job */
1399 #define AifReqSuspendJob 105 /* Suspends a job */
1400 #define AifReqResumeJob 106 /* Resumes a job */
1401 #define AifReqSendAPIReport 107 /* API generic report requests */
1402 #define AifReqAPIJobStart 108 /* Start a job from the API */
1403 #define AifReqAPIJobUpdate 109 /* Update a job report from the API */
1404 #define AifReqAPIJobFinish 110 /* Finish a job from the API */
1405
1406 /*
1407 * Adapter Initiated FIB command structures. Start with the adapter
1408 * initiated FIBs that really come from the adapter, and get responded
1409 * to by the host.
1410 */
1411
1412 struct aac_aifcmd {
1413 u32 command; /* Tell host what type of notify this is */
1414 u32 seqnum; /* To allow ordering of reports (if necessary) */
1415 u8 data[1]; /* Undefined length (from kernel viewpoint) */
1416 };
1417
1418 /**
1419 * Convert capacity to cylinders
1420 * accounting for the fact capacity could be a 64 bit value
1421 *
1422 */
1423 static inline u32 cap_to_cyls(sector_t capacity, u32 divisor)
1424 {
1425 sector_div(capacity, divisor);
1426 return (u32)capacity;
1427 }
1428
1429 struct scsi_cmnd;
1430
1431 const char *aac_driverinfo(struct Scsi_Host *);
1432 struct fib *fib_alloc(struct aac_dev *dev);
1433 int fib_setup(struct aac_dev *dev);
1434 void fib_map_free(struct aac_dev *dev);
1435 void fib_free(struct fib * context);
1436 void fib_init(struct fib * context);
1437 void fib_dealloc(struct fib * context);
1438 void aac_printf(struct aac_dev *dev, u32 val);
1439 int fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt);
1440 int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry);
1441 int aac_consumer_avail(struct aac_dev * dev, struct aac_queue * q);
1442 void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum);
1443 int fib_complete(struct fib * context);
1444 #define fib_data(fibctx) ((void *)(fibctx)->hw_fib->data)
1445 struct aac_dev *aac_init_adapter(struct aac_dev *dev);
1446 int aac_get_containers(struct aac_dev *dev);
1447 int aac_scsi_cmd(struct scsi_cmnd *cmd);
1448 int aac_dev_ioctl(struct aac_dev *dev, int cmd, void __user *arg);
1449 int aac_do_ioctl(struct aac_dev * dev, int cmd, void __user *arg);
1450 int aac_rx_init(struct aac_dev *dev);
1451 int aac_rkt_init(struct aac_dev *dev);
1452 int aac_sa_init(struct aac_dev *dev);
1453 unsigned int aac_response_normal(struct aac_queue * q);
1454 unsigned int aac_command_normal(struct aac_queue * q);
1455 int aac_command_thread(struct aac_dev * dev);
1456 int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx);
1457 int fib_adapter_complete(struct fib * fibptr, unsigned short size);
1458 struct aac_driver_ident* aac_get_driver_ident(int devtype);
1459 int aac_get_adapter_info(struct aac_dev* dev);
1460 int aac_send_shutdown(struct aac_dev *dev);
MOXA 2.6.9 from sdlinux-moxaart.tgz