?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
initial commit with v2.6.9
[linux-2.6.9-moxart.git] / drivers / pci / hotplug / cpqphp_core.c
blob13d147989bf7a8bfe3c9893d9e43f9c93b4a3b2a
1 /*
2 * Compaq Hot Plug Controller Driver
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
6 * Copyright (C) 2001 IBM Corp.
7 *
8 * All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
19 * details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Send feedback to <greg@kroah.com>
26 *
27 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
28 * Torben Mathiasen <torben.mathiasen@hp.com>
29 *
30 */
31
32 #include <linux/config.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/kernel.h>
36 #include <linux/types.h>
37 #include <linux/proc_fs.h>
38 #include <linux/slab.h>
39 #include <linux/workqueue.h>
40 #include <linux/pci.h>
41 #include <linux/init.h>
42 #include <linux/interrupt.h>
43
44 #include <asm/uaccess.h>
45
46 #include "cpqphp.h"
47 #include "cpqphp_nvram.h"
48 #include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */
49
50
51 /* Global variables */
52 int cpqhp_debug;
53 int cpqhp_legacy_mode;
54 struct controller *cpqhp_ctrl_list; /* = NULL */
55 struct pci_func *cpqhp_slot_list[256];
56
57 /* local variables */
58 static void *smbios_table;
59 static void *smbios_start;
60 static void *cpqhp_rom_start;
61 static int power_mode;
62 static int debug;
63
64 #define DRIVER_VERSION "0.9.8"
65 #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
66 #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
67
68 MODULE_AUTHOR(DRIVER_AUTHOR);
69 MODULE_DESCRIPTION(DRIVER_DESC);
70 MODULE_LICENSE("GPL");
71
72 module_param(power_mode, bool, 0644);
73 MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
74
75 module_param(debug, bool, 0644);
76 MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
77
78 #define CPQHPC_MODULE_MINOR 208
79
80 static int one_time_init (void);
81 static int set_attention_status (struct hotplug_slot *slot, u8 value);
82 static int process_SI (struct hotplug_slot *slot);
83 static int process_SS (struct hotplug_slot *slot);
84 static int hardware_test (struct hotplug_slot *slot, u32 value);
85 static int get_power_status (struct hotplug_slot *slot, u8 *value);
86 static int get_attention_status (struct hotplug_slot *slot, u8 *value);
87 static int get_latch_status (struct hotplug_slot *slot, u8 *value);
88 static int get_adapter_status (struct hotplug_slot *slot, u8 *value);
89 static int get_max_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
90 static int get_cur_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
91
92 static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
93 .owner = THIS_MODULE,
94 .set_attention_status = set_attention_status,
95 .enable_slot = process_SI,
96 .disable_slot = process_SS,
97 .hardware_test = hardware_test,
98 .get_power_status = get_power_status,
99 .get_attention_status = get_attention_status,
100 .get_latch_status = get_latch_status,
101 .get_adapter_status = get_adapter_status,
102 .get_max_bus_speed = get_max_bus_speed,
103 .get_cur_bus_speed = get_cur_bus_speed,
104 };
105
106
107 static inline int is_slot64bit(struct slot *slot)
108 {
109 return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
110 }
111
112 static inline int is_slot66mhz(struct slot *slot)
113 {
114 return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
115 }
116
117 /**
118 * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
119 *
120 * @begin: begin pointer for region to be scanned.
121 * @end: end pointer for region to be scanned.
122 *
123 * Returns pointer to the head of the SMBIOS tables (or NULL)
124 *
125 */
126 static void * detect_SMBIOS_pointer(void *begin, void *end)
127 {
128 void *fp;
129 void *endp;
130 u8 temp1, temp2, temp3, temp4;
131 int status = 0;
132
133 endp = (end - sizeof(u32) + 1);
134
135 for (fp = begin; fp <= endp; fp += 16) {
136 temp1 = readb(fp);
137 temp2 = readb(fp+1);
138 temp3 = readb(fp+2);
139 temp4 = readb(fp+3);
140 if (temp1 == '_' &&
141 temp2 == 'S' &&
142 temp3 == 'M' &&
143 temp4 == '_') {
144 status = 1;
145 break;
146 }
147 }
148
149 if (!status)
150 fp = NULL;
151
152 dbg("Discovered SMBIOS Entry point at %p\n", fp);
153
154 return fp;
155 }
156
157 /**
158 * init_SERR - Initializes the per slot SERR generation.
159 *
160 * For unexpected switch opens
161 *
162 */
163 static int init_SERR(struct controller * ctrl)
164 {
165 u32 tempdword;
166 u32 number_of_slots;
167 u8 physical_slot;
168
169 if (!ctrl)
170 return 1;
171
172 tempdword = ctrl->first_slot;
173
174 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
175 // Loop through slots
176 while (number_of_slots) {
177 physical_slot = tempdword;
178 writeb(0, ctrl->hpc_reg + SLOT_SERR);
179 tempdword++;
180 number_of_slots--;
181 }
182
183 return 0;
184 }
185
186
187 /* nice debugging output */
188 static int pci_print_IRQ_route (void)
189 {
190 struct irq_routing_table *routing_table;
191 int len;
192 int loop;
193
194 u8 tbus, tdevice, tslot;
195
196 routing_table = pcibios_get_irq_routing_table();
197 if (routing_table == NULL) {
198 err("No BIOS Routing Table??? Not good\n");
199 return -ENOMEM;
200 }
201
202 len = (routing_table->size - sizeof(struct irq_routing_table)) /
203 sizeof(struct irq_info);
204 // Make sure I got at least one entry
205 if (len == 0) {
206 kfree(routing_table);
207 return -1;
208 }
209
210 dbg("bus dev func slot\n");
211
212 for (loop = 0; loop < len; ++loop) {
213 tbus = routing_table->slots[loop].bus;
214 tdevice = routing_table->slots[loop].devfn;
215 tslot = routing_table->slots[loop].slot;
216 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
217
218 }
219 kfree(routing_table);
220 return 0;
221 }
222
223
224 /**
225 * get_subsequent_smbios_entry: get the next entry from bios table.
226 *
227 * Gets the first entry if previous == NULL
228 * Otherwise, returns the next entry
229 * Uses global SMBIOS Table pointer
230 *
231 * @curr: %NULL or pointer to previously returned structure
232 *
233 * returns a pointer to an SMBIOS structure or NULL if none found
234 */
235 static void *get_subsequent_smbios_entry(void *smbios_start,
236 void *smbios_table, void *curr)
237 {
238 u8 bail = 0;
239 u8 previous_byte = 1;
240 void *p_temp;
241 void *p_max;
242
243 if (!smbios_table || !curr)
244 return(NULL);
245
246 // set p_max to the end of the table
247 p_max = smbios_start + readw(smbios_table + ST_LENGTH);
248
249 p_temp = curr;
250 p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
251
252 while ((p_temp < p_max) && !bail) {
253 /* Look for the double NULL terminator
254 * The first condition is the previous byte
255 * and the second is the curr */
256 if (!previous_byte && !(readb(p_temp))) {
257 bail = 1;
258 }
259
260 previous_byte = readb(p_temp);
261 p_temp++;
262 }
263
264 if (p_temp < p_max) {
265 return p_temp;
266 } else {
267 return NULL;
268 }
269 }
270
271
272 /**
273 * get_SMBIOS_entry
274 *
275 * @type:SMBIOS structure type to be returned
276 * @previous: %NULL or pointer to previously returned structure
277 *
278 * Gets the first entry of the specified type if previous == NULL
279 * Otherwise, returns the next entry of the given type.
280 * Uses global SMBIOS Table pointer
281 * Uses get_subsequent_smbios_entry
282 *
283 * returns a pointer to an SMBIOS structure or %NULL if none found
284 */
285 static void *get_SMBIOS_entry(void *smbios_start, void *smbios_table, u8 type,
286 void * previous)
287 {
288 if (!smbios_table)
289 return NULL;
290
291 if (!previous) {
292 previous = smbios_start;
293 } else {
294 previous = get_subsequent_smbios_entry(smbios_start,
295 smbios_table, previous);
296 }
297
298 while (previous) {
299 if (readb(previous + SMBIOS_GENERIC_TYPE) != type) {
300 previous = get_subsequent_smbios_entry(smbios_start,
301 smbios_table, previous);
302 } else {
303 break;
304 }
305 }
306
307 return previous;
308 }
309
310 static void release_slot(struct hotplug_slot *hotplug_slot)
311 {
312 struct slot *slot = hotplug_slot->private;
313
314 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
315
316 kfree(slot->hotplug_slot->info);
317 kfree(slot->hotplug_slot->name);
318 kfree(slot->hotplug_slot);
319 kfree(slot);
320 }
321
322 static int ctrl_slot_setup(struct controller * ctrl, void *smbios_start,
323 void *smbios_table)
324 {
325 struct slot *new_slot;
326 u8 number_of_slots;
327 u8 slot_device;
328 u8 slot_number;
329 u8 ctrl_slot;
330 u32 tempdword;
331 void *slot_entry= NULL;
332 int result = -ENOMEM;
333
334 dbg("%s\n", __FUNCTION__);
335
336 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
337
338 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
339 slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
340 slot_number = ctrl->first_slot;
341
342 while (number_of_slots) {
343 new_slot = kmalloc(sizeof(*new_slot), GFP_KERNEL);
344 if (!new_slot)
345 goto error;
346
347 memset(new_slot, 0, sizeof(struct slot));
348 new_slot->hotplug_slot = kmalloc(sizeof(*(new_slot->hotplug_slot)),
349 GFP_KERNEL);
350 if (!new_slot->hotplug_slot)
351 goto error_slot;
352 memset(new_slot->hotplug_slot, 0, sizeof(struct hotplug_slot));
353
354 new_slot->hotplug_slot->info =
355 kmalloc(sizeof(*(new_slot->hotplug_slot->info)),
356 GFP_KERNEL);
357 if (!new_slot->hotplug_slot->info)
358 goto error_hpslot;
359 memset(new_slot->hotplug_slot->info, 0,
360 sizeof(struct hotplug_slot_info));
361 new_slot->hotplug_slot->name = kmalloc(SLOT_NAME_SIZE, GFP_KERNEL);
362 if (!new_slot->hotplug_slot->name)
363 goto error_info;
364
365 new_slot->ctrl = ctrl;
366 new_slot->bus = ctrl->bus;
367 new_slot->device = slot_device;
368 new_slot->number = slot_number;
369 dbg("slot->number = %d\n",new_slot->number);
370
371 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
372 slot_entry);
373
374 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) != new_slot->number)) {
375 slot_entry = get_SMBIOS_entry(smbios_start,
376 smbios_table, 9, slot_entry);
377 }
378
379 new_slot->p_sm_slot = slot_entry;
380
381 init_timer(&new_slot->task_event);
382 new_slot->task_event.expires = jiffies + 5 * HZ;
383 new_slot->task_event.function = cpqhp_pushbutton_thread;
384
385 //FIXME: these capabilities aren't used but if they are
386 // they need to be correctly implemented
387 new_slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
388 new_slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
389
390 if (is_slot64bit(new_slot))
391 new_slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
392 if (is_slot66mhz(new_slot))
393 new_slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
394 if (ctrl->speed == PCI_SPEED_66MHz)
395 new_slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
396
397 ctrl_slot = slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
398
399 // Check presence
400 new_slot->capabilities |= ((((~tempdword) >> 23) | ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
401 // Check the switch state
402 new_slot->capabilities |= ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
403 // Check the slot enable
404 new_slot->capabilities |= ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
405
406 /* register this slot with the hotplug pci core */
407 new_slot->hotplug_slot->release = &release_slot;
408 new_slot->hotplug_slot->private = new_slot;
409 make_slot_name(new_slot->hotplug_slot->name, SLOT_NAME_SIZE, new_slot);
410 new_slot->hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
411
412 new_slot->hotplug_slot->info->power_status = get_slot_enabled(ctrl, new_slot);
413 new_slot->hotplug_slot->info->attention_status = cpq_get_attention_status(ctrl, new_slot);
414 new_slot->hotplug_slot->info->latch_status = cpq_get_latch_status(ctrl, new_slot);
415 new_slot->hotplug_slot->info->adapter_status = get_presence_status(ctrl, new_slot);
416
417 dbg ("registering bus %d, dev %d, number %d, "
418 "ctrl->slot_device_offset %d, slot %d\n",
419 new_slot->bus, new_slot->device,
420 new_slot->number, ctrl->slot_device_offset,
421 slot_number);
422 result = pci_hp_register (new_slot->hotplug_slot);
423 if (result) {
424 err ("pci_hp_register failed with error %d\n", result);
425 goto error_name;
426 }
427
428 new_slot->next = ctrl->slot;
429 ctrl->slot = new_slot;
430
431 number_of_slots--;
432 slot_device++;
433 slot_number++;
434 }
435
436 return 0;
437
438 error_name:
439 kfree(new_slot->hotplug_slot->name);
440 error_info:
441 kfree(new_slot->hotplug_slot->info);
442 error_hpslot:
443 kfree(new_slot->hotplug_slot);
444 error_slot:
445 kfree(new_slot);
446 error:
447 return result;
448 }
449
450 static int ctrl_slot_cleanup (struct controller * ctrl)
451 {
452 struct slot *old_slot, *next_slot;
453
454 old_slot = ctrl->slot;
455 ctrl->slot = NULL;
456
457 while (old_slot) {
458 /* memory will be freed by the release_slot callback */
459 next_slot = old_slot->next;
460 pci_hp_deregister (old_slot->hotplug_slot);
461 old_slot = next_slot;
462 }
463
464 //Free IRQ associated with hot plug device
465 free_irq(ctrl->interrupt, ctrl);
466 //Unmap the memory
467 iounmap(ctrl->hpc_reg);
468 //Finally reclaim PCI mem
469 release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
470 pci_resource_len(ctrl->pci_dev, 0));
471
472 return(0);
473 }
474
475
476 //============================================================================
477 // function: get_slot_mapping
478 //
479 // Description: Attempts to determine a logical slot mapping for a PCI
480 // device. Won't work for more than one PCI-PCI bridge
481 // in a slot.
482 //
483 // Input: u8 bus_num - bus number of PCI device
484 // u8 dev_num - device number of PCI device
485 // u8 *slot - Pointer to u8 where slot number will
486 // be returned
487 //
488 // Output: SUCCESS or FAILURE
489 //=============================================================================
490 static int
491 get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
492 {
493 struct irq_routing_table *PCIIRQRoutingInfoLength;
494 u32 work;
495 long len;
496 long loop;
497
498 u8 tbus, tdevice, tslot, bridgeSlot;
499
500 dbg("%s: %p, %d, %d, %p\n", __FUNCTION__, bus, bus_num, dev_num, slot);
501
502 bridgeSlot = 0xFF;
503
504 PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
505 if (!PCIIRQRoutingInfoLength)
506 return -1;
507
508 len = (PCIIRQRoutingInfoLength->size -
509 sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
510 // Make sure I got at least one entry
511 if (len == 0) {
512 kfree(PCIIRQRoutingInfoLength);
513 return -1;
514 }
515
516 for (loop = 0; loop < len; ++loop) {
517 tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
518 tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3;
519 tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
520
521 if ((tbus == bus_num) && (tdevice == dev_num)) {
522 *slot = tslot;
523 kfree(PCIIRQRoutingInfoLength);
524 return 0;
525 } else {
526 /* Did not get a match on the target PCI device. Check
527 * if the current IRQ table entry is a PCI-to-PCI bridge
528 * device. If so, and it's secondary bus matches the
529 * bus number for the target device, I need to save the
530 * bridge's slot number. If I can not find an entry for
531 * the target device, I will have to assume it's on the
532 * other side of the bridge, and assign it the bridge's
533 * slot. */
534 bus->number = tbus;
535 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
536 PCI_REVISION_ID, &work);
537
538 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
539 pci_bus_read_config_dword(bus,
540 PCI_DEVFN(tdevice, 0),
541 PCI_PRIMARY_BUS, &work);
542 // See if bridge's secondary bus matches target bus.
543 if (((work >> 8) & 0x000000FF) == (long) bus_num) {
544 bridgeSlot = tslot;
545 }
546 }
547 }
548
549 }
550
551 // If we got here, we didn't find an entry in the IRQ mapping table
552 // for the target PCI device. If we did determine that the target
553 // device is on the other side of a PCI-to-PCI bridge, return the
554 // slot number for the bridge.
555 if (bridgeSlot != 0xFF) {
556 *slot = bridgeSlot;
557 kfree(PCIIRQRoutingInfoLength);
558 return 0;
559 }
560 kfree(PCIIRQRoutingInfoLength);
561 // Couldn't find an entry in the routing table for this PCI device
562 return -1;
563 }
564
565
566 /**
567 * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
568 *
569 */
570 static int
571 cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
572 u32 status)
573 {
574 u8 hp_slot;
575
576 hp_slot = func->device - ctrl->slot_device_offset;
577
578 if (func == NULL)
579 return(1);
580
581 // Wait for exclusive access to hardware
582 down(&ctrl->crit_sect);
583
584 if (status == 1) {
585 amber_LED_on (ctrl, hp_slot);
586 } else if (status == 0) {
587 amber_LED_off (ctrl, hp_slot);
588 } else {
589 // Done with exclusive hardware access
590 up(&ctrl->crit_sect);
591 return(1);
592 }
593
594 set_SOGO(ctrl);
595
596 // Wait for SOBS to be unset
597 wait_for_ctrl_irq (ctrl);
598
599 // Done with exclusive hardware access
600 up(&ctrl->crit_sect);
601
602 return(0);
603 }
604
605
606 /**
607 * set_attention_status - Turns the Amber LED for a slot on or off
608 *
609 */
610 static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
611 {
612 struct pci_func *slot_func;
613 struct slot *slot = hotplug_slot->private;
614 struct controller *ctrl = slot->ctrl;
615 u8 bus;
616 u8 devfn;
617 u8 device;
618 u8 function;
619
620 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
621
622 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
623 return -ENODEV;
624
625 device = devfn >> 3;
626 function = devfn & 0x7;
627 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
628
629 slot_func = cpqhp_slot_find(bus, device, function);
630 if (!slot_func)
631 return -ENODEV;
632
633 return cpqhp_set_attention_status(ctrl, slot_func, status);
634 }
635
636
637 static int process_SI(struct hotplug_slot *hotplug_slot)
638 {
639 struct pci_func *slot_func;
640 struct slot *slot = hotplug_slot->private;
641 struct controller *ctrl = slot->ctrl;
642 u8 bus;
643 u8 devfn;
644 u8 device;
645 u8 function;
646
647 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
648
649 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
650 return -ENODEV;
651
652 device = devfn >> 3;
653 function = devfn & 0x7;
654 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
655
656 slot_func = cpqhp_slot_find(bus, device, function);
657 if (!slot_func)
658 return -ENODEV;
659
660 slot_func->bus = bus;
661 slot_func->device = device;
662 slot_func->function = function;
663 slot_func->configured = 0;
664 dbg("board_added(%p, %p)\n", slot_func, ctrl);
665 return cpqhp_process_SI(ctrl, slot_func);
666 }
667
668
669 static int process_SS(struct hotplug_slot *hotplug_slot)
670 {
671 struct pci_func *slot_func;
672 struct slot *slot = hotplug_slot->private;
673 struct controller *ctrl = slot->ctrl;
674 u8 bus;
675 u8 devfn;
676 u8 device;
677 u8 function;
678
679 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
680
681 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
682 return -ENODEV;
683
684 device = devfn >> 3;
685 function = devfn & 0x7;
686 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
687
688 slot_func = cpqhp_slot_find(bus, device, function);
689 if (!slot_func)
690 return -ENODEV;
691
692 dbg("In %s, slot_func = %p, ctrl = %p\n", __FUNCTION__, slot_func, ctrl);
693 return cpqhp_process_SS(ctrl, slot_func);
694 }
695
696
697 static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
698 {
699 struct slot *slot = hotplug_slot->private;
700 struct controller *ctrl = slot->ctrl;
701
702 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
703
704 return cpqhp_hardware_test(ctrl, value);
705 }
706
707
708 static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
709 {
710 struct slot *slot = hotplug_slot->private;
711 struct controller *ctrl = slot->ctrl;
712
713 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
714
715 *value = get_slot_enabled(ctrl, slot);
716 return 0;
717 }
718
719 static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
720 {
721 struct slot *slot = hotplug_slot->private;
722 struct controller *ctrl = slot->ctrl;
723
724 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
725
726 *value = cpq_get_attention_status(ctrl, slot);
727 return 0;
728 }
729
730 static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
731 {
732 struct slot *slot = hotplug_slot->private;
733 struct controller *ctrl = slot->ctrl;
734
735 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
736
737 *value = cpq_get_latch_status(ctrl, slot);
738
739 return 0;
740 }
741
742 static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
743 {
744 struct slot *slot = hotplug_slot->private;
745 struct controller *ctrl = slot->ctrl;
746
747 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
748
749 *value = get_presence_status(ctrl, slot);
750
751 return 0;
752 }
753
754 static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
755 {
756 struct slot *slot = hotplug_slot->private;
757 struct controller *ctrl = slot->ctrl;
758
759 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
760
761 *value = ctrl->speed_capability;
762
763 return 0;
764 }
765
766 static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
767 {
768 struct slot *slot = hotplug_slot->private;
769 struct controller *ctrl = slot->ctrl;
770
771 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
772
773 *value = ctrl->speed;
774
775 return 0;
776 }
777
778 static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
779 {
780 u8 num_of_slots = 0;
781 u8 hp_slot = 0;
782 u8 device;
783 u8 rev;
784 u8 bus_cap;
785 u16 temp_word;
786 u16 vendor_id;
787 u16 subsystem_vid;
788 u16 subsystem_deviceid;
789 u32 rc;
790 struct controller *ctrl;
791 struct pci_func *func;
792
793 // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery
794 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
795 if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
796 err(msg_HPC_non_compaq_or_intel);
797 return -ENODEV;
798 }
799 dbg("Vendor ID: %x\n", vendor_id);
800
801 rc = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
802 dbg("revision: %d\n", rev);
803 if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) {
804 err(msg_HPC_rev_error);
805 return -ENODEV;
806 }
807
808 /* Check for the proper subsytem ID's
809 * Intel uses a different SSID programming model than Compaq.
810 * For Intel, each SSID bit identifies a PHP capability.
811 * Also Intel HPC's may have RID=0.
812 */
813 if ((rev > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
814 // TODO: This code can be made to support non-Compaq or Intel subsystem IDs
815 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
816 if (rc) {
817 err("%s : pci_read_config_word failed\n", __FUNCTION__);
818 return rc;
819 }
820 dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
821 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
822 err(msg_HPC_non_compaq_or_intel);
823 return -ENODEV;
824 }
825
826 ctrl = (struct controller *) kmalloc(sizeof(struct controller), GFP_KERNEL);
827 if (!ctrl) {
828 err("%s : out of memory\n", __FUNCTION__);
829 return -ENOMEM;
830 }
831 memset(ctrl, 0, sizeof(struct controller));
832
833 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
834 if (rc) {
835 err("%s : pci_read_config_word failed\n", __FUNCTION__);
836 goto err_free_ctrl;
837 }
838
839 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
840
841 /* Set Vendor ID, so it can be accessed later from other functions */
842 ctrl->vendor_id = vendor_id;
843
844 switch (subsystem_vid) {
845 case PCI_VENDOR_ID_COMPAQ:
846 if (rev >= 0x13) { /* CIOBX */
847 ctrl->push_flag = 1;
848 ctrl->slot_switch_type = 1;
849 ctrl->push_button = 1;
850 ctrl->pci_config_space = 1;
851 ctrl->defeature_PHP = 1;
852 ctrl->pcix_support = 1;
853 ctrl->pcix_speed_capability = 1;
854 pci_read_config_byte(pdev, 0x41, &bus_cap);
855 if (bus_cap & 0x80) {
856 dbg("bus max supports 133MHz PCI-X\n");
857 ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
858 break;
859 }
860 if (bus_cap & 0x40) {
861 dbg("bus max supports 100MHz PCI-X\n");
862 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
863 break;
864 }
865 if (bus_cap & 20) {
866 dbg("bus max supports 66MHz PCI-X\n");
867 ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
868 break;
869 }
870 if (bus_cap & 10) {
871 dbg("bus max supports 66MHz PCI\n");
872 ctrl->speed_capability = PCI_SPEED_66MHz;
873 break;
874 }
875
876 break;
877 }
878
879 switch (subsystem_deviceid) {
880 case PCI_SUB_HPC_ID:
881 /* Original 6500/7000 implementation */
882 ctrl->slot_switch_type = 1;
883 ctrl->speed_capability = PCI_SPEED_33MHz;
884 ctrl->push_button = 0;
885 ctrl->pci_config_space = 1;
886 ctrl->defeature_PHP = 1;
887 ctrl->pcix_support = 0;
888 ctrl->pcix_speed_capability = 0;
889 break;
890 case PCI_SUB_HPC_ID2:
891 /* First Pushbutton implementation */
892 ctrl->push_flag = 1;
893 ctrl->slot_switch_type = 1;
894 ctrl->speed_capability = PCI_SPEED_33MHz;
895 ctrl->push_button = 1;
896 ctrl->pci_config_space = 1;
897 ctrl->defeature_PHP = 1;
898 ctrl->pcix_support = 0;
899 ctrl->pcix_speed_capability = 0;
900 break;
901 case PCI_SUB_HPC_ID_INTC:
902 /* Third party (6500/7000) */
903 ctrl->slot_switch_type = 1;
904 ctrl->speed_capability = PCI_SPEED_33MHz;
905 ctrl->push_button = 0;
906 ctrl->pci_config_space = 1;
907 ctrl->defeature_PHP = 1;
908 ctrl->pcix_support = 0;
909 ctrl->pcix_speed_capability = 0;
910 break;
911 case PCI_SUB_HPC_ID3:
912 /* First 66 Mhz implementation */
913 ctrl->push_flag = 1;
914 ctrl->slot_switch_type = 1;
915 ctrl->speed_capability = PCI_SPEED_66MHz;
916 ctrl->push_button = 1;
917 ctrl->pci_config_space = 1;
918 ctrl->defeature_PHP = 1;
919 ctrl->pcix_support = 0;
920 ctrl->pcix_speed_capability = 0;
921 break;
922 case PCI_SUB_HPC_ID4:
923 /* First PCI-X implementation, 100MHz */
924 ctrl->push_flag = 1;
925 ctrl->slot_switch_type = 1;
926 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
927 ctrl->push_button = 1;
928 ctrl->pci_config_space = 1;
929 ctrl->defeature_PHP = 1;
930 ctrl->pcix_support = 1;
931 ctrl->pcix_speed_capability = 0;
932 break;
933 default:
934 err(msg_HPC_not_supported);
935 rc = -ENODEV;
936 goto err_free_ctrl;
937 }
938 break;
939
940 case PCI_VENDOR_ID_INTEL:
941 /* Check for speed capability (0=33, 1=66) */
942 if (subsystem_deviceid & 0x0001) {
943 ctrl->speed_capability = PCI_SPEED_66MHz;
944 } else {
945 ctrl->speed_capability = PCI_SPEED_33MHz;
946 }
947
948 /* Check for push button */
949 if (subsystem_deviceid & 0x0002) {
950 /* no push button */
951 ctrl->push_button = 0;
952 } else {
953 /* push button supported */
954 ctrl->push_button = 1;
955 }
956
957 /* Check for slot switch type (0=mechanical, 1=not mechanical) */
958 if (subsystem_deviceid & 0x0004) {
959 /* no switch */
960 ctrl->slot_switch_type = 0;
961 } else {
962 /* switch */
963 ctrl->slot_switch_type = 1;
964 }
965
966 /* PHP Status (0=De-feature PHP, 1=Normal operation) */
967 if (subsystem_deviceid & 0x0008) {
968 ctrl->defeature_PHP = 1; // PHP supported
969 } else {
970 ctrl->defeature_PHP = 0; // PHP not supported
971 }
972
973 /* Alternate Base Address Register Interface (0=not supported, 1=supported) */
974 if (subsystem_deviceid & 0x0010) {
975 ctrl->alternate_base_address = 1; // supported
976 } else {
977 ctrl->alternate_base_address = 0; // not supported
978 }
979
980 /* PCI Config Space Index (0=not supported, 1=supported) */
981 if (subsystem_deviceid & 0x0020) {
982 ctrl->pci_config_space = 1; // supported
983 } else {
984 ctrl->pci_config_space = 0; // not supported
985 }
986
987 /* PCI-X support */
988 if (subsystem_deviceid & 0x0080) {
989 /* PCI-X capable */
990 ctrl->pcix_support = 1;
991 /* Frequency of operation in PCI-X mode */
992 if (subsystem_deviceid & 0x0040) {
993 /* 133MHz PCI-X if bit 7 is 1 */
994 ctrl->pcix_speed_capability = 1;
995 } else {
996 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
997 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
998 ctrl->pcix_speed_capability = 0;
999 }
1000 } else {
1001 /* Conventional PCI */
1002 ctrl->pcix_support = 0;
1003 ctrl->pcix_speed_capability = 0;
1004 }
1005 break;
1006
1007 default:
1008 err(msg_HPC_not_supported);
1009 rc = -ENODEV;
1010 goto err_free_ctrl;
1011 }
1012
1013 } else {
1014 err(msg_HPC_not_supported);
1015 return -ENODEV;
1016 }
1017
1018 // Tell the user that we found one.
1019 info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
1020 pdev->bus->number);
1021
1022 dbg("Hotplug controller capabilities:\n");
1023 dbg(" speed_capability %d\n", ctrl->speed_capability);
1024 dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
1025 "switch present" : "no switch");
1026 dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
1027 "PHP supported" : "PHP not supported");
1028 dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
1029 "supported" : "not supported");
1030 dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
1031 "supported" : "not supported");
1032 dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
1033 "supported" : "not supported");
1034 dbg(" pcix_support %s\n", ctrl->pcix_support ?
1035 "supported" : "not supported");
1036
1037 ctrl->pci_dev = pdev;
1038 pci_set_drvdata(pdev, ctrl);
1039
1040 /* make our own copy of the pci bus structure,
1041 * as we like tweaking it a lot */
1042 ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
1043 if (!ctrl->pci_bus) {
1044 err("out of memory\n");
1045 rc = -ENOMEM;
1046 goto err_free_ctrl;
1047 }
1048 memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
1049
1050 ctrl->bus = pdev->bus->number;
1051 ctrl->rev = rev;
1052 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1053 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1054
1055 init_MUTEX(&ctrl->crit_sect);
1056 init_waitqueue_head(&ctrl->queue);
1057
1058 /* initialize our threads if they haven't already been started up */
1059 rc = one_time_init();
1060 if (rc) {
1061 goto err_free_bus;
1062 }
1063
1064 dbg("pdev = %p\n", pdev);
1065 dbg("pci resource start %lx\n", pci_resource_start(pdev, 0));
1066 dbg("pci resource len %lx\n", pci_resource_len(pdev, 0));
1067
1068 if (!request_mem_region(pci_resource_start(pdev, 0),
1069 pci_resource_len(pdev, 0), MY_NAME)) {
1070 err("cannot reserve MMIO region\n");
1071 rc = -ENOMEM;
1072 goto err_free_bus;
1073 }
1074
1075 ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
1076 pci_resource_len(pdev, 0));
1077 if (!ctrl->hpc_reg) {
1078 err("cannot remap MMIO region %lx @ %lx\n",
1079 pci_resource_len(pdev, 0),
1080 pci_resource_start(pdev, 0));
1081 rc = -ENODEV;
1082 goto err_free_mem_region;
1083 }
1084
1085 // Check for 66Mhz operation
1086 ctrl->speed = get_controller_speed(ctrl);
1087
1088
1089 /********************************************************
1090 *
1091 * Save configuration headers for this and
1092 * subordinate PCI buses
1093 *
1094 ********************************************************/
1095
1096 // find the physical slot number of the first hot plug slot
1097
1098 /* Get slot won't work for devices behind bridges, but
1099 * in this case it will always be called for the "base"
1100 * bus/dev/func of a slot.
1101 * CS: this is leveraging the PCIIRQ routing code from the kernel
1102 * (pci-pc.c: get_irq_routing_table) */
1103 rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
1104 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
1105 &(ctrl->first_slot));
1106 dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
1107 ctrl->first_slot, rc);
1108 if (rc) {
1109 err(msg_initialization_err, rc);
1110 goto err_iounmap;
1111 }
1112
1113 // Store PCI Config Space for all devices on this bus
1114 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1115 if (rc) {
1116 err("%s: unable to save PCI configuration data, error %d\n",
1117 __FUNCTION__, rc);
1118 goto err_iounmap;
1119 }
1120
1121 /*
1122 * Get IO, memory, and IRQ resources for new devices
1123 */
1124 // The next line is required for cpqhp_find_available_resources
1125 ctrl->interrupt = pdev->irq;
1126 if (ctrl->interrupt < 0x10) {
1127 cpqhp_legacy_mode = 1;
1128 dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1129 }
1130
1131 ctrl->cfgspc_irq = 0;
1132 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1133
1134 rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1135 ctrl->add_support = !rc;
1136 if (rc) {
1137 dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1138 err("unable to locate PCI configuration resources for hot plug add.\n");
1139 goto err_iounmap;
1140 }
1141
1142 /*
1143 * Finish setting up the hot plug ctrl device
1144 */
1145 ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1146 dbg("NumSlots %d \n", ctrl->slot_device_offset);
1147
1148 ctrl->next_event = 0;
1149
1150 /* Setup the slot information structures */
1151 rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1152 if (rc) {
1153 err(msg_initialization_err, 6);
1154 err("%s: unable to save PCI configuration data, error %d\n",
1155 __FUNCTION__, rc);
1156 goto err_iounmap;
1157 }
1158
1159 /* Mask all general input interrupts */
1160 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1161
1162 /* set up the interrupt */
1163 dbg("HPC interrupt = %d \n", ctrl->interrupt);
1164 if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
1165 SA_SHIRQ, MY_NAME, ctrl)) {
1166 err("Can't get irq %d for the hotplug pci controller\n",
1167 ctrl->interrupt);
1168 rc = -ENODEV;
1169 goto err_iounmap;
1170 }
1171
1172 /* Enable Shift Out interrupt and clear it, also enable SERR on power fault */
1173 temp_word = readw(ctrl->hpc_reg + MISC);
1174 temp_word |= 0x4006;
1175 writew(temp_word, ctrl->hpc_reg + MISC);
1176
1177 // Changed 05/05/97 to clear all interrupts at start
1178 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1179
1180 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1181
1182 writel(0x0L, ctrl->hpc_reg + INT_MASK);
1183
1184 if (!cpqhp_ctrl_list) {
1185 cpqhp_ctrl_list = ctrl;
1186 ctrl->next = NULL;
1187 } else {
1188 ctrl->next = cpqhp_ctrl_list;
1189 cpqhp_ctrl_list = ctrl;
1190 }
1191
1192 // turn off empty slots here unless command line option "ON" set
1193 // Wait for exclusive access to hardware
1194 down(&ctrl->crit_sect);
1195
1196 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1197
1198 // find first device number for the ctrl
1199 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1200
1201 while (num_of_slots) {
1202 dbg("num_of_slots: %d\n", num_of_slots);
1203 func = cpqhp_slot_find(ctrl->bus, device, 0);
1204 if (!func)
1205 break;
1206
1207 hp_slot = func->device - ctrl->slot_device_offset;
1208 dbg("hp_slot: %d\n", hp_slot);
1209
1210 // We have to save the presence info for these slots
1211 temp_word = ctrl->ctrl_int_comp >> 16;
1212 func->presence_save = (temp_word >> hp_slot) & 0x01;
1213 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1214
1215 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
1216 func->switch_save = 0;
1217 } else {
1218 func->switch_save = 0x10;
1219 }
1220
1221 if (!power_mode) {
1222 if (!func->is_a_board) {
1223 green_LED_off(ctrl, hp_slot);
1224 slot_disable(ctrl, hp_slot);
1225 }
1226 }
1227
1228 device++;
1229 num_of_slots--;
1230 }
1231
1232 if (!power_mode) {
1233 set_SOGO(ctrl);
1234 // Wait for SOBS to be unset
1235 wait_for_ctrl_irq(ctrl);
1236 }
1237
1238 rc = init_SERR(ctrl);
1239 if (rc) {
1240 err("init_SERR failed\n");
1241 up(&ctrl->crit_sect);
1242 goto err_free_irq;
1243 }
1244
1245 // Done with exclusive hardware access
1246 up(&ctrl->crit_sect);
1247
1248 cpqhp_create_ctrl_files(ctrl);
1249
1250 return 0;
1251
1252 err_free_irq:
1253 free_irq(ctrl->interrupt, ctrl);
1254 err_iounmap:
1255 iounmap(ctrl->hpc_reg);
1256 err_free_mem_region:
1257 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1258 err_free_bus:
1259 kfree(ctrl->pci_bus);
1260 err_free_ctrl:
1261 kfree(ctrl);
1262 return rc;
1263 }
1264
1265
1266 static int one_time_init(void)
1267 {
1268 int loop;
1269 int retval = 0;
1270 static int initialized = 0;
1271
1272 if (initialized)
1273 return 0;
1274
1275 power_mode = 0;
1276
1277 retval = pci_print_IRQ_route();
1278 if (retval)
1279 goto error;
1280
1281 dbg("Initialize + Start the notification mechanism \n");
1282
1283 retval = cpqhp_event_start_thread();
1284 if (retval)
1285 goto error;
1286
1287 dbg("Initialize slot lists\n");
1288 for (loop = 0; loop < 256; loop++) {
1289 cpqhp_slot_list[loop] = NULL;
1290 }
1291
1292 // FIXME: We also need to hook the NMI handler eventually.
1293 // this also needs to be worked with Christoph
1294 // register_NMI_handler();
1295
1296 // Map rom address
1297 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
1298 if (!cpqhp_rom_start) {
1299 err ("Could not ioremap memory region for ROM\n");
1300 retval = -EIO;
1301 goto error;
1302 }
1303
1304 /* Now, map the int15 entry point if we are on compaq specific hardware */
1305 compaq_nvram_init(cpqhp_rom_start);
1306
1307 /* Map smbios table entry point structure */
1308 smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
1309 cpqhp_rom_start + ROM_PHY_LEN);
1310 if (!smbios_table) {
1311 err ("Could not find the SMBIOS pointer in memory\n");
1312 retval = -EIO;
1313 goto error_rom_start;
1314 }
1315
1316 smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
1317 readw(smbios_table + ST_LENGTH));
1318 if (!smbios_start) {
1319 err ("Could not ioremap memory region taken from SMBIOS values\n");
1320 retval = -EIO;
1321 goto error_smbios_start;
1322 }
1323
1324 initialized = 1;
1325
1326 return retval;
1327
1328 error_smbios_start:
1329 iounmap(smbios_start);
1330 error_rom_start:
1331 iounmap(cpqhp_rom_start);
1332 error:
1333 return retval;
1334 }
1335
1336
1337 static void __exit unload_cpqphpd(void)
1338 {
1339 struct pci_func *next;
1340 struct pci_func *TempSlot;
1341 int loop;
1342 u32 rc;
1343 struct controller *ctrl;
1344 struct controller *tctrl;
1345 struct pci_resource *res;
1346 struct pci_resource *tres;
1347
1348 rc = compaq_nvram_store(cpqhp_rom_start);
1349
1350 ctrl = cpqhp_ctrl_list;
1351
1352 while (ctrl) {
1353 if (ctrl->hpc_reg) {
1354 u16 misc;
1355 rc = read_slot_enable (ctrl);
1356
1357 writeb(0, ctrl->hpc_reg + SLOT_SERR);
1358 writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
1359
1360 misc = readw(ctrl->hpc_reg + MISC);
1361 misc &= 0xFFFD;
1362 writew(misc, ctrl->hpc_reg + MISC);
1363 }
1364
1365 ctrl_slot_cleanup(ctrl);
1366
1367 res = ctrl->io_head;
1368 while (res) {
1369 tres = res;
1370 res = res->next;
1371 kfree(tres);
1372 }
1373
1374 res = ctrl->mem_head;
1375 while (res) {
1376 tres = res;
1377 res = res->next;
1378 kfree(tres);
1379 }
1380
1381 res = ctrl->p_mem_head;
1382 while (res) {
1383 tres = res;
1384 res = res->next;
1385 kfree(tres);
1386 }
1387
1388 res = ctrl->bus_head;
1389 while (res) {
1390 tres = res;
1391 res = res->next;
1392 kfree(tres);
1393 }
1394
1395 kfree (ctrl->pci_bus);
1396
1397 tctrl = ctrl;
1398 ctrl = ctrl->next;
1399 kfree(tctrl);
1400 }
1401
1402 for (loop = 0; loop < 256; loop++) {
1403 next = cpqhp_slot_list[loop];
1404 while (next != NULL) {
1405 res = next->io_head;
1406 while (res) {
1407 tres = res;
1408 res = res->next;
1409 kfree(tres);
1410 }
1411
1412 res = next->mem_head;
1413 while (res) {
1414 tres = res;
1415 res = res->next;
1416 kfree(tres);
1417 }
1418
1419 res = next->p_mem_head;
1420 while (res) {
1421 tres = res;
1422 res = res->next;
1423 kfree(tres);
1424 }
1425
1426 res = next->bus_head;
1427 while (res) {
1428 tres = res;
1429 res = res->next;
1430 kfree(tres);
1431 }
1432
1433 TempSlot = next;
1434 next = next->next;
1435 kfree(TempSlot);
1436 }
1437 }
1438
1439 // Stop the notification mechanism
1440 cpqhp_event_stop_thread();
1441
1442 //unmap the rom address
1443 if (cpqhp_rom_start)
1444 iounmap(cpqhp_rom_start);
1445 if (smbios_start)
1446 iounmap(smbios_start);
1447 }
1448
1449
1450
1451 static struct pci_device_id hpcd_pci_tbl[] = {
1452 {
1453 /* handle any PCI Hotplug controller */
1454 .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1455 .class_mask = ~0,
1456
1457 /* no matter who makes it */
1458 .vendor = PCI_ANY_ID,
1459 .device = PCI_ANY_ID,
1460 .subvendor = PCI_ANY_ID,
1461 .subdevice = PCI_ANY_ID,
1462
1463 }, { /* end: all zeroes */ }
1464 };
1465
1466 MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1467
1468
1469
1470 static struct pci_driver cpqhpc_driver = {
1471 .name = "compaq_pci_hotplug",
1472 .id_table = hpcd_pci_tbl,
1473 .probe = cpqhpc_probe,
1474 /* remove: cpqhpc_remove_one, */
1475 };
1476
1477
1478
1479 static int __init cpqhpc_init(void)
1480 {
1481 int result;
1482
1483 cpqhp_debug = debug;
1484
1485 info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
1486 result = pci_module_init(&cpqhpc_driver);
1487 dbg("pci_module_init = %d\n", result);
1488 return result;
1489 }
1490
1491
1492 static void __exit cpqhpc_cleanup(void)
1493 {
1494 dbg("unload_cpqphpd()\n");
1495 unload_cpqphpd();
1496
1497 dbg("pci_unregister_driver\n");
1498 pci_unregister_driver(&cpqhpc_driver);
1499 }
1500
1501
1502 module_init(cpqhpc_init);
1503 module_exit(cpqhpc_cleanup);
1504
1505
MOXA 2.6.9 from sdlinux-moxaart.tgz