drivers/media/dvb/frontends/alps_tdmb7.c

   1 /*
   2     Alps TDMB7 DVB OFDM frontend driver
   3
   4     Copyright (C) 2001-2002 Convergence Integrated Media GmbH
   5         Holger Waechtler <holger@convergence.de>
   6
   7     This program is free software; you can redistribute it and/or modify
   8     it under the terms of the GNU General Public License as published by
   9     the Free Software Foundation; either version 2 of the License, or
  10     (at your option) any later version.
  11
  12     This program is distributed in the hope that it will be useful,
  13     but WITHOUT ANY WARRANTY; without even the implied warranty of
  14     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15     GNU General Public License for more details.
  16
  17     You should have received a copy of the GNU General Public License
  18     along with this program; if not, write to the Free Software
  19     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20
  21 */
  22
  23 #include <linux/kernel.h>
  24 #include <linux/init.h>
  25 #include <linux/module.h>
  26 #include <linux/string.h>
  27 #include <linux/slab.h>
  28
  29 #include "dvb_frontend.h"
  30 #include "dvb_functions.h"
  31
  32
  33 static int debug = 0;
  34 #define dprintk if (debug) printk
  35
  36
  37 static struct dvb_frontend_info tdmb7_info = {
  38         .name                   = "Alps TDMB7",
  39         .type                   = FE_OFDM,
  40         .frequency_min          = 470000000,
  41         .frequency_max          = 860000000,
  42         .frequency_stepsize     = 166667,
  43 #if 0
  44         .frequency_tolerance    = ???,
  45         .symbol_rate_min        = ???,
  46         .symbol_rate_max        = ???,
  47         .symbol_rate_tolerance  = 500,  /* ppm */
  48         .notifier_delay         = 0,
  49 #endif
  50         .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  51               FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  52               FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
  53               FE_CAN_RECOVER
  54 };
  55
  56
  57 static u8 init_tab [] = {
  58         0x04, 0x10,
  59         0x05, 0x09,
  60         0x06, 0x00,
  61         0x08, 0x04,
  62         0x09, 0x00,
  63         0x0a, 0x01,
  64         0x15, 0x40,
  65         0x16, 0x10,
  66         0x17, 0x87,
  67         0x18, 0x17,
  68         0x1a, 0x10,
  69         0x25, 0x04,
  70         0x2e, 0x00,
  71         0x39, 0x00,
  72         0x3a, 0x04,
  73         0x45, 0x08,
  74         0x46, 0x02,
  75         0x47, 0x05,
  76 };
  77
  78
  79 static int cx22700_writereg (struct dvb_i2c_bus *i2c, u8 reg, u8 data)
  80 {
  81         int ret;
  82         u8 buf [] = { reg, data };
  83         struct i2c_msg msg = { .addr = 0x43, .flags = 0, .buf = buf, .len = 2 };
  84
  85         dprintk ("%s\n", __FUNCTION__);
  86
  87         ret = i2c->xfer (i2c, &msg, 1);
  88
  89         if (ret != 1)
  90                 printk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
  91                         __FUNCTION__, reg, data, ret);
  92
  93         return (ret != 1) ? -1 : 0;
  94 }
  95
  96
  97 static u8 cx22700_readreg (struct dvb_i2c_bus *i2c, u8 reg)
  98 {
  99         int ret;
 100         u8 b0 [] = { reg };
 101         u8 b1 [] = { 0 };
 102         struct i2c_msg msg [] = { { .addr = 0x43, .flags = 0, .buf = b0, .len = 1 },
 103                            { .addr = 0x43, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
 104
 105         dprintk ("%s\n", __FUNCTION__);
 106
 107         ret = i2c->xfer (i2c, msg, 2);
 108
 109         if (ret != 2)
 110                 printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
 111
 112         return b1[0];
 113 }
 114
 115
 116 static int pll_write (struct dvb_i2c_bus *i2c, u8 data [4])
 117 {
 118         struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = 4 };
 119         int ret;
 120
 121         cx22700_writereg (i2c, 0x0a, 0x00);  /* open i2c bus switch */
 122         ret = i2c->xfer (i2c, &msg, 1);
 123         cx22700_writereg (i2c, 0x0a, 0x01);  /* close i2c bus switch */
 124
 125         if (ret != 1)
 126                 printk("%s: i/o error (addr == 0x%02x, ret == %i)\n", __FUNCTION__, msg.addr, ret);
 127
 128         return (ret != 1) ? -1 : 0;
 129 }
 130
 131
 132 /**
 133  *   set up the downconverter frequency divisor for a
 134  *   reference clock comparision frequency of 125 kHz.
 135  */
 136 static int pll_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq)
 137 {
 138         u32 div = (freq + 36166667) / 166667;
 139 #if 1 //ALPS_SETTINGS
 140         u8 buf [4] = { (div >> 8) & 0x7f, div & 0xff, ((div >> 10) & 0x60) | 0x85,
 141                        freq < 592000000 ? 0x40 : 0x80 };
 142 #else
 143         u8 buf [4] = { (div >> 8) & 0x7f, div & 0xff, ((div >> 10) & 0x60) | 0x85,
 144                        freq < 470000000 ? 0x42 : freq < 862000000 ? 0x41 : 0x81 };
 145 #endif
 146
 147         dprintk ("%s: freq == %i, div == %i\n", __FUNCTION__, (int) freq, (int) div);
 148
 149         return pll_write (i2c, buf);
 150 }
 151
 152
 153 static int cx22700_init (struct dvb_i2c_bus *i2c)
 154 {
 155         int i;
 156
 157         dprintk("cx22700_init: init chip\n");
 158
 159         cx22700_writereg (i2c, 0x00, 0x02);   /*  soft reset */
 160         cx22700_writereg (i2c, 0x00, 0x00);
 161
 162         dvb_delay(10);
 163
 164         for (i=0; i<sizeof(init_tab); i+=2)
 165                 cx22700_writereg (i2c, init_tab[i], init_tab[i+1]);
 166
 167         cx22700_writereg (i2c, 0x00, 0x01);
 168
 169         return 0;
 170 }
 171
 172
 173 static int cx22700_set_inversion (struct dvb_i2c_bus *i2c, int inversion)
 174 {
 175         u8 val;
 176
 177         dprintk ("%s\n", __FUNCTION__);
 178
 179         switch (inversion) {
 180         case INVERSION_AUTO:
 181                 return -EOPNOTSUPP;
 182         case INVERSION_ON:
 183                 val = cx22700_readreg (i2c, 0x09);
 184                 return cx22700_writereg (i2c, 0x09, val | 0x01);
 185         case INVERSION_OFF:
 186                 val = cx22700_readreg (i2c, 0x09);
 187                 return cx22700_writereg (i2c, 0x09, val & 0xfe);
 188         default:
 189                 return -EINVAL;
 190         }
 191 }
 192
 193
 194 static int cx22700_set_tps (struct dvb_i2c_bus *i2c, struct dvb_ofdm_parameters *p)
 195 {
 196         static const u8 qam_tab [4] = { 0, 1, 0, 2 };
 197         static const u8 fec_tab [6] = { 0, 1, 2, 0, 3, 4 };
 198         u8 val;
 199
 200         dprintk ("%s\n", __FUNCTION__);
 201
 202         if (p->code_rate_HP < FEC_1_2 || p->code_rate_HP > FEC_7_8)
 203                 return -EINVAL;
 204
 205         if (p->code_rate_LP < FEC_1_2 || p->code_rate_LP > FEC_7_8)
 206
 207         if (p->code_rate_HP == FEC_4_5 || p->code_rate_LP == FEC_4_5)
 208                 return -EINVAL;
 209
 210         if (p->guard_interval < GUARD_INTERVAL_1_32 ||
 211             p->guard_interval > GUARD_INTERVAL_1_4)
 212                 return -EINVAL;
 213
 214         if (p->transmission_mode != TRANSMISSION_MODE_2K &&
 215             p->transmission_mode != TRANSMISSION_MODE_8K)
 216                 return -EINVAL;
 217
 218         if (p->constellation != QPSK &&
 219             p->constellation != QAM_16 &&
 220             p->constellation != QAM_64)
 221                 return -EINVAL;
 222
 223         if (p->hierarchy_information < HIERARCHY_NONE ||
 224             p->hierarchy_information > HIERARCHY_4)
 225                 return -EINVAL;
 226
 227         if (p->bandwidth < BANDWIDTH_8_MHZ && p->bandwidth > BANDWIDTH_6_MHZ)
 228                 return -EINVAL;
 229
 230         if (p->bandwidth == BANDWIDTH_7_MHZ)
 231                 cx22700_writereg (i2c, 0x09, cx22700_readreg (i2c, 0x09 | 0x10));
 232         else
 233                 cx22700_writereg (i2c, 0x09, cx22700_readreg (i2c, 0x09 & ~0x10));
 234
 235         val = qam_tab[p->constellation - QPSK];
 236         val |= p->hierarchy_information - HIERARCHY_NONE;
 237
 238         cx22700_writereg (i2c, 0x04, val);
 239
 240         val = fec_tab[p->code_rate_HP - FEC_1_2] << 3;
 241         val |= fec_tab[p->code_rate_LP - FEC_1_2];
 242
 243         cx22700_writereg (i2c, 0x05, val);
 244
 245         val = (p->guard_interval - GUARD_INTERVAL_1_32) << 2;
 246         val |= p->transmission_mode - TRANSMISSION_MODE_2K;
 247
 248         cx22700_writereg (i2c, 0x06, val);
 249
 250         cx22700_writereg (i2c, 0x08, 0x04 | 0x02);  /* use user tps parameters */
 251         cx22700_writereg (i2c, 0x08, 0x04);         /* restart aquisition */
 252
 253         return 0;
 254 }
 255
 256
 257 static int cx22700_get_tps (struct dvb_i2c_bus *i2c, struct dvb_ofdm_parameters *p)
 258 {
 259         static const fe_modulation_t qam_tab [3] = { QPSK, QAM_16, QAM_64 };
 260         static const fe_code_rate_t fec_tab [5] = { FEC_1_2, FEC_2_3, FEC_3_4,
 261                                                     FEC_5_6, FEC_7_8 };
 262         u8 val;
 263
 264         dprintk ("%s\n", __FUNCTION__);
 265
 266         if (!(cx22700_readreg(i2c, 0x07) & 0x20))  /*  tps valid? */
 267                 return -EAGAIN;
 268
 269         val = cx22700_readreg (i2c, 0x01);
 270
 271         if ((val & 0x7) > 4)
 272                 p->hierarchy_information = HIERARCHY_AUTO;
 273         else
 274                 p->hierarchy_information = HIERARCHY_NONE + (val & 0x7);
 275
 276         if (((val >> 3) & 0x3) > 2)
 277                 p->constellation = QAM_AUTO;
 278         else
 279                 p->constellation = qam_tab[(val >> 3) & 0x3];
 280
 281
 282         val = cx22700_readreg (i2c, 0x02);
 283
 284         if (((val >> 3) & 0x07) > 4)
 285                 p->code_rate_HP = FEC_AUTO;
 286         else
 287                 p->code_rate_HP = fec_tab[(val >> 3) & 0x07];
 288
 289         if ((val & 0x07) > 4)
 290                 p->code_rate_LP = FEC_AUTO;
 291         else
 292                 p->code_rate_LP = fec_tab[val & 0x07];
 293
 294
 295         val = cx22700_readreg (i2c, 0x03);
 296
 297         p->guard_interval = GUARD_INTERVAL_1_32 + ((val >> 6) & 0x3);
 298         p->transmission_mode = TRANSMISSION_MODE_2K + ((val >> 5) & 0x1);
 299
 300         return 0;
 301 }
 302
 303
 304 static int tdmb7_ioctl (struct dvb_frontend *fe, unsigned int cmd, void *arg)
 305 {
 306         struct dvb_i2c_bus *i2c = fe->i2c;
 307
 308         dprintk ("%s\n", __FUNCTION__);
 309
 310         switch (cmd) {
 311         case FE_GET_INFO:
 312                 memcpy (arg, &tdmb7_info, sizeof(struct dvb_frontend_info));
 313                 break;
 314
 315         case FE_READ_STATUS:
 316         {
 317                 fe_status_t *status = (fe_status_t *) arg;
 318                 u16 rs_ber = (cx22700_readreg (i2c, 0x0d) << 9)
 319                            | (cx22700_readreg (i2c, 0x0e) << 1);
 320                 u8 sync = cx22700_readreg (i2c, 0x07);
 321
 322                 *status = 0;
 323
 324                 if (rs_ber < 0xff00)
 325                         *status |= FE_HAS_SIGNAL;
 326
 327                 if (sync & 0x20)
 328                         *status |= FE_HAS_CARRIER;
 329
 330                 if (sync & 0x10)
 331                         *status |= FE_HAS_VITERBI;
 332
 333                 if (sync & 0x10)
 334                         *status |= FE_HAS_SYNC;
 335
 336                 if (*status == 0x0f)
 337                         *status |= FE_HAS_LOCK;
 338
 339                 break;
 340         }
 341
 342         case FE_READ_BER:
 343                 *((u32*) arg) = cx22700_readreg (i2c, 0x0c) & 0x7f;
 344                 cx22700_writereg (i2c, 0x0c, 0x00);
 345                 break;
 346
 347         case FE_READ_SIGNAL_STRENGTH:
 348         {
 349                 u16 rs_ber = (cx22700_readreg (i2c, 0x0d) << 9)
 350                            | (cx22700_readreg (i2c, 0x0e) << 1);
 351                 *((u16*) arg) = ~rs_ber;
 352                 break;
 353         }
 354         case FE_READ_SNR:
 355         {
 356                 u16 rs_ber = (cx22700_readreg (i2c, 0x0d) << 9)
 357                            | (cx22700_readreg (i2c, 0x0e) << 1);
 358                 *((u16*) arg) = ~rs_ber;
 359                 break;
 360         }
 361         case FE_READ_UNCORRECTED_BLOCKS:
 362                 *((u32*) arg) = cx22700_readreg (i2c, 0x0f);
 363                 cx22700_writereg (i2c, 0x0f, 0x00);
 364                 break;
 365
 366         case FE_SET_FRONTEND:
 367         {
 368                 struct dvb_frontend_parameters *p = arg;
 369
 370                 cx22700_writereg (i2c, 0x00, 0x02); /* XXX CHECKME: soft reset*/
 371                 cx22700_writereg (i2c, 0x00, 0x00);
 372
 373                 pll_set_tv_freq (i2c, p->frequency);
 374                 cx22700_set_inversion (i2c, p->inversion);
 375                 cx22700_set_tps (i2c, &p->u.ofdm);
 376                 cx22700_writereg (i2c, 0x37, 0x01);  /* PAL loop filter off */
 377                 cx22700_writereg (i2c, 0x00, 0x01);  /* restart acquire */
 378                 break;
 379         }
 380
 381         case FE_GET_FRONTEND:
 382         {
 383                 struct dvb_frontend_parameters *p = arg;
 384                 u8 reg09 = cx22700_readreg (i2c, 0x09);
 385
 386                 p->inversion = reg09 & 0x1 ? INVERSION_ON : INVERSION_OFF;
 387                 return cx22700_get_tps (i2c, &p->u.ofdm);
 388         }
 389
 390         case FE_INIT:
 391                 return cx22700_init (i2c);
 392
 393         case FE_GET_TUNE_SETTINGS:
 394         {
 395                 struct dvb_frontend_tune_settings* fesettings = (struct dvb_frontend_tune_settings*) arg;
 396                 fesettings->min_delay_ms = 150;
 397                 fesettings->step_size = 166667;
 398                 fesettings->max_drift = 166667*2;
 399                 return 0;
 400         }
 401
 402         default:
 403                 return -EOPNOTSUPP;
 404         };
 405
 406         return 0;
 407 }
 408
 409
 410
 411 static int tdmb7_attach (struct dvb_i2c_bus *i2c, void **data)
 412 {
 413         u8 b0 [] = { 0x7 };
 414         u8 b1 [] = { 0 };
 415         struct i2c_msg msg [] = { { .addr = 0x43, .flags = 0, .buf = b0, .len = 1 },
 416                                   { .addr = 0x43, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
 417
 418         dprintk ("%s\n", __FUNCTION__);
 419
 420         if (i2c->xfer (i2c, msg, 2) != 2)
 421                 return -ENODEV;
 422
 423         return dvb_register_frontend (tdmb7_ioctl, i2c, NULL, &tdmb7_info);
 424 }
 425
 426
 427 static void tdmb7_detach (struct dvb_i2c_bus *i2c, void *data)
 428 {
 429         dprintk ("%s\n", __FUNCTION__);
 430
 431         dvb_unregister_frontend (tdmb7_ioctl, i2c);
 432 }
 433
 434
 435 static int __init init_tdmb7 (void)
 436 {
 437         dprintk ("%s\n", __FUNCTION__);
 438
 439         return dvb_register_i2c_device (THIS_MODULE, tdmb7_attach, tdmb7_detach);
 440 }
 441
 442
 443 static void __exit exit_tdmb7 (void)
 444 {
 445         dprintk ("%s\n", __FUNCTION__);
 446
 447         dvb_unregister_i2c_device (tdmb7_attach);
 448 }
 449
 450 module_init (init_tdmb7);
 451 module_exit (exit_tdmb7);
 452
 453 MODULE_PARM(debug,"i");
 454 MODULE_PARM_DESC(debug, "enable verbose debug messages");
 455 MODULE_DESCRIPTION("TDMB7 DVB Frontend driver");
 456 MODULE_AUTHOR("Holger Waechtler");
 457 MODULE_LICENSE("GPL");
 458