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initial commit with v2.6.9
[linux-2.6.9-moxart.git] / drivers / i2c / busses / i2c-keywest.c
bloba5a8c1e7987ce58ce21b513b2880285ad20d1351
1 /*
2 i2c Support for Apple Keywest I2C Bus Controller
3
4 Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
5
6 Original work by
7
8 Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23
24 Changes:
25
26 2001/12/13 BenH New implementation
27 2001/12/15 BenH Add support for "byte" and "quick"
28 transfers. Add i2c_xfer routine.
29 2003/09/21 BenH Rework state machine with Paulus help
30 2004/01/21 BenH Merge in Greg KH changes, polled mode is back
31 2004/02/05 BenH Merge 64 bits fixes from the g5 ppc64 tree
32
33 My understanding of the various modes supported by keywest are:
34
35 - Dumb mode : not implemented, probably direct tweaking of lines
36 - Standard mode : simple i2c transaction of type
37 S Addr R/W A Data A Data ... T
38 - Standard sub mode : combined 8 bit subaddr write with data read
39 S Addr R/W A SubAddr A Data A Data ... T
40 - Combined mode : Subaddress and Data sequences appended with no stop
41 S Addr R/W A SubAddr S Addr R/W A Data A Data ... T
42
43 Currently, this driver uses only Standard mode for i2c xfer, and
44 smbus byte & quick transfers ; and uses StandardSub mode for
45 other smbus transfers instead of combined as we need that for the
46 sound driver to be happy
47 */
48
49 #include <linux/config.h>
50 #include <linux/module.h>
51 #include <linux/kernel.h>
52 #include <linux/ioport.h>
53 #include <linux/pci.h>
54 #include <linux/types.h>
55 #include <linux/delay.h>
56 #include <linux/i2c.h>
57 #include <linux/init.h>
58 #include <linux/mm.h>
59 #include <linux/timer.h>
60 #include <linux/spinlock.h>
61 #include <linux/completion.h>
62 #include <linux/interrupt.h>
63
64 #include <asm/io.h>
65 #include <asm/prom.h>
66 #include <asm/machdep.h>
67 #include <asm/pmac_feature.h>
68 #include <asm/pmac_low_i2c.h>
69
70 #include "i2c-keywest.h"
71
72 #undef POLLED_MODE
73
74 /* Some debug macros */
75 #define WRONG_STATE(name) do {\
76 pr_debug("KW: wrong state. Got %s, state: %s (isr: %02x)\n", \
77 name, __kw_state_names[iface->state], isr); \
78 } while(0)
79
80 #ifdef DEBUG
81 static const char *__kw_state_names[] = {
82 "state_idle",
83 "state_addr",
84 "state_read",
85 "state_write",
86 "state_stop",
87 "state_dead"
88 };
89 #endif /* DEBUG */
90
91 static int probe;
92
93 MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
94 MODULE_DESCRIPTION("I2C driver for Apple's Keywest");
95 MODULE_LICENSE("GPL");
96 module_param(probe, bool, 0);
97
98 #ifdef POLLED_MODE
99 /* Don't schedule, the g5 fan controller is too
100 * timing sensitive
101 */
102 static u8
103 wait_interrupt(struct keywest_iface* iface)
104 {
105 int i;
106 u8 isr;
107
108 for (i = 0; i < 200000; i++) {
109 isr = read_reg(reg_isr) & KW_I2C_IRQ_MASK;
110 if (isr != 0)
111 return isr;
112 udelay(10);
113 }
114 return isr;
115 }
116 #endif /* POLLED_MODE */
117
118 static void
119 do_stop(struct keywest_iface* iface, int result)
120 {
121 write_reg(reg_control, KW_I2C_CTL_STOP);
122 iface->state = state_stop;
123 iface->result = result;
124 }
125
126 /* Main state machine for standard & standard sub mode */
127 static void
128 handle_interrupt(struct keywest_iface *iface, u8 isr)
129 {
130 int ack;
131
132 if (isr == 0) {
133 if (iface->state != state_stop) {
134 pr_debug("KW: Timeout !\n");
135 do_stop(iface, -EIO);
136 }
137 if (iface->state == state_stop) {
138 ack = read_reg(reg_status);
139 if (!(ack & KW_I2C_STAT_BUSY)) {
140 iface->state = state_idle;
141 write_reg(reg_ier, 0x00);
142 #ifndef POLLED_MODE
143 complete(&iface->complete);
144 #endif /* POLLED_MODE */
145 }
146 }
147 return;
148 }
149
150 if (isr & KW_I2C_IRQ_ADDR) {
151 ack = read_reg(reg_status);
152 if (iface->state != state_addr) {
153 write_reg(reg_isr, KW_I2C_IRQ_ADDR);
154 WRONG_STATE("KW_I2C_IRQ_ADDR");
155 do_stop(iface, -EIO);
156 return;
157 }
158 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
159 iface->state = state_stop;
160 iface->result = -ENODEV;
161 pr_debug("KW: NAK on address\n");
162 } else {
163 /* Handle rw "quick" mode */
164 if (iface->datalen == 0) {
165 do_stop(iface, 0);
166 } else if (iface->read_write == I2C_SMBUS_READ) {
167 iface->state = state_read;
168 if (iface->datalen > 1)
169 write_reg(reg_control, KW_I2C_CTL_AAK);
170 } else {
171 iface->state = state_write;
172 write_reg(reg_data, *(iface->data++));
173 iface->datalen--;
174 }
175 }
176 write_reg(reg_isr, KW_I2C_IRQ_ADDR);
177 }
178
179 if (isr & KW_I2C_IRQ_DATA) {
180 if (iface->state == state_read) {
181 *(iface->data++) = read_reg(reg_data);
182 write_reg(reg_isr, KW_I2C_IRQ_DATA);
183 iface->datalen--;
184 if (iface->datalen == 0)
185 iface->state = state_stop;
186 else if (iface->datalen == 1)
187 write_reg(reg_control, 0);
188 } else if (iface->state == state_write) {
189 /* Check ack status */
190 ack = read_reg(reg_status);
191 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
192 pr_debug("KW: nack on data write (%x): %x\n",
193 iface->data[-1], ack);
194 do_stop(iface, -EIO);
195 } else if (iface->datalen) {
196 write_reg(reg_data, *(iface->data++));
197 iface->datalen--;
198 } else {
199 write_reg(reg_control, KW_I2C_CTL_STOP);
200 iface->state = state_stop;
201 iface->result = 0;
202 }
203 write_reg(reg_isr, KW_I2C_IRQ_DATA);
204 } else {
205 write_reg(reg_isr, KW_I2C_IRQ_DATA);
206 WRONG_STATE("KW_I2C_IRQ_DATA");
207 if (iface->state != state_stop)
208 do_stop(iface, -EIO);
209 }
210 }
211
212 if (isr & KW_I2C_IRQ_STOP) {
213 write_reg(reg_isr, KW_I2C_IRQ_STOP);
214 if (iface->state != state_stop) {
215 WRONG_STATE("KW_I2C_IRQ_STOP");
216 iface->result = -EIO;
217 }
218 iface->state = state_idle;
219 write_reg(reg_ier, 0x00);
220 #ifndef POLLED_MODE
221 complete(&iface->complete);
222 #endif /* POLLED_MODE */
223 }
224
225 if (isr & KW_I2C_IRQ_START)
226 write_reg(reg_isr, KW_I2C_IRQ_START);
227 }
228
229 #ifndef POLLED_MODE
230
231 /* Interrupt handler */
232 static irqreturn_t
233 keywest_irq(int irq, void *dev_id, struct pt_regs *regs)
234 {
235 struct keywest_iface *iface = (struct keywest_iface *)dev_id;
236 unsigned long flags;
237
238 spin_lock_irqsave(&iface->lock, flags);
239 del_timer(&iface->timeout_timer);
240 handle_interrupt(iface, read_reg(reg_isr));
241 if (iface->state != state_idle) {
242 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
243 add_timer(&iface->timeout_timer);
244 }
245 spin_unlock_irqrestore(&iface->lock, flags);
246 return IRQ_HANDLED;
247 }
248
249 static void
250 keywest_timeout(unsigned long data)
251 {
252 struct keywest_iface *iface = (struct keywest_iface *)data;
253 unsigned long flags;
254
255 pr_debug("timeout !\n");
256 spin_lock_irqsave(&iface->lock, flags);
257 handle_interrupt(iface, read_reg(reg_isr));
258 if (iface->state != state_idle) {
259 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
260 add_timer(&iface->timeout_timer);
261 }
262 spin_unlock_irqrestore(&iface->lock, flags);
263 }
264
265 #endif /* POLLED_MODE */
266
267 /*
268 * SMBUS-type transfer entrypoint
269 */
270 static s32
271 keywest_smbus_xfer( struct i2c_adapter* adap,
272 u16 addr,
273 unsigned short flags,
274 char read_write,
275 u8 command,
276 int size,
277 union i2c_smbus_data* data)
278 {
279 struct keywest_chan* chan = i2c_get_adapdata(adap);
280 struct keywest_iface* iface = chan->iface;
281 int len;
282 u8* buffer;
283 u16 cur_word;
284 int rc = 0;
285
286 if (iface->state == state_dead)
287 return -ENXIO;
288
289 /* Prepare datas & select mode */
290 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
291 switch (size) {
292 case I2C_SMBUS_QUICK:
293 len = 0;
294 buffer = NULL;
295 iface->cur_mode |= KW_I2C_MODE_STANDARD;
296 break;
297 case I2C_SMBUS_BYTE:
298 len = 1;
299 buffer = &data->byte;
300 iface->cur_mode |= KW_I2C_MODE_STANDARD;
301 break;
302 case I2C_SMBUS_BYTE_DATA:
303 len = 1;
304 buffer = &data->byte;
305 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
306 break;
307 case I2C_SMBUS_WORD_DATA:
308 len = 2;
309 cur_word = cpu_to_le16(data->word);
310 buffer = (u8 *)&cur_word;
311 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
312 break;
313 case I2C_SMBUS_BLOCK_DATA:
314 len = data->block[0];
315 buffer = &data->block[1];
316 iface->cur_mode |= KW_I2C_MODE_STANDARDSUB;
317 break;
318 default:
319 return -1;
320 }
321
322 /* Turn a standardsub read into a combined mode access */
323 if (read_write == I2C_SMBUS_READ
324 && (iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB) {
325 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
326 iface->cur_mode |= KW_I2C_MODE_COMBINED;
327 }
328
329 /* Original driver had this limitation */
330 if (len > 32)
331 len = 32;
332
333 if (pmac_low_i2c_lock(iface->node))
334 return -ENXIO;
335
336 pr_debug("chan: %d, addr: 0x%x, transfer len: %d, read: %d\n",
337 chan->chan_no, addr, len, read_write == I2C_SMBUS_READ);
338
339 iface->data = buffer;
340 iface->datalen = len;
341 iface->state = state_addr;
342 iface->result = 0;
343 iface->read_write = read_write;
344
345 /* Setup channel & clear pending irqs */
346 write_reg(reg_isr, read_reg(reg_isr));
347 write_reg(reg_mode, iface->cur_mode | (chan->chan_no << 4));
348 write_reg(reg_status, 0);
349
350 /* Set up address and r/w bit */
351 write_reg(reg_addr,
352 (addr << 1) | ((read_write == I2C_SMBUS_READ) ? 0x01 : 0x00));
353
354 /* Set up the sub address */
355 if ((iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
356 || (iface->cur_mode & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
357 write_reg(reg_subaddr, command);
358
359 #ifndef POLLED_MODE
360 /* Arm timeout */
361 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
362 add_timer(&iface->timeout_timer);
363 #endif
364
365 /* Start sending address & enable interrupt*/
366 write_reg(reg_control, KW_I2C_CTL_XADDR);
367 write_reg(reg_ier, KW_I2C_IRQ_MASK);
368
369 #ifdef POLLED_MODE
370 pr_debug("using polled mode...\n");
371 /* State machine, to turn into an interrupt handler */
372 while(iface->state != state_idle) {
373 unsigned long flags;
374
375 u8 isr = wait_interrupt(iface);
376 spin_lock_irqsave(&iface->lock, flags);
377 handle_interrupt(iface, isr);
378 spin_unlock_irqrestore(&iface->lock, flags);
379 }
380 #else /* POLLED_MODE */
381 pr_debug("using interrupt mode...\n");
382 wait_for_completion(&iface->complete);
383 #endif /* POLLED_MODE */
384
385 rc = iface->result;
386 pr_debug("transfer done, result: %d\n", rc);
387
388 if (rc == 0 && size == I2C_SMBUS_WORD_DATA && read_write == I2C_SMBUS_READ)
389 data->word = le16_to_cpu(cur_word);
390
391 /* Release sem */
392 pmac_low_i2c_unlock(iface->node);
393
394 return rc;
395 }
396
397 /*
398 * Generic i2c master transfer entrypoint
399 */
400 static int
401 keywest_xfer( struct i2c_adapter *adap,
402 struct i2c_msg msgs[],
403 int num)
404 {
405 struct keywest_chan* chan = i2c_get_adapdata(adap);
406 struct keywest_iface* iface = chan->iface;
407 struct i2c_msg *pmsg;
408 int i, completed;
409 int rc = 0;
410
411 if (iface->state == state_dead)
412 return -ENXIO;
413
414 if (pmac_low_i2c_lock(iface->node))
415 return -ENXIO;
416
417 /* Set adapter to standard mode */
418 iface->cur_mode &= ~KW_I2C_MODE_MODE_MASK;
419 iface->cur_mode |= KW_I2C_MODE_STANDARD;
420
421 completed = 0;
422 for (i = 0; rc >= 0 && i < num;) {
423 u8 addr;
424
425 pmsg = &msgs[i++];
426 addr = pmsg->addr;
427 if (pmsg->flags & I2C_M_TEN) {
428 printk(KERN_ERR "i2c-keywest: 10 bits addr not supported !\n");
429 rc = -EINVAL;
430 break;
431 }
432 pr_debug("xfer: chan: %d, doing %s %d bytes to 0x%02x - %d of %d messages\n",
433 chan->chan_no,
434 pmsg->flags & I2C_M_RD ? "read" : "write",
435 pmsg->len, addr, i, num);
436
437 /* Setup channel & clear pending irqs */
438 write_reg(reg_mode, iface->cur_mode | (chan->chan_no << 4));
439 write_reg(reg_isr, read_reg(reg_isr));
440 write_reg(reg_status, 0);
441
442 iface->data = pmsg->buf;
443 iface->datalen = pmsg->len;
444 iface->state = state_addr;
445 iface->result = 0;
446 if (pmsg->flags & I2C_M_RD)
447 iface->read_write = I2C_SMBUS_READ;
448 else
449 iface->read_write = I2C_SMBUS_WRITE;
450
451 /* Set up address and r/w bit */
452 if (pmsg->flags & I2C_M_REV_DIR_ADDR)
453 addr ^= 1;
454 write_reg(reg_addr,
455 (addr << 1) |
456 ((iface->read_write == I2C_SMBUS_READ) ? 0x01 : 0x00));
457
458 #ifndef POLLED_MODE
459 /* Arm timeout */
460 iface->timeout_timer.expires = jiffies + POLL_TIMEOUT;
461 add_timer(&iface->timeout_timer);
462 #endif
463
464 /* Start sending address & enable interrupt*/
465 write_reg(reg_ier, KW_I2C_IRQ_MASK);
466 write_reg(reg_control, KW_I2C_CTL_XADDR);
467
468 #ifdef POLLED_MODE
469 pr_debug("using polled mode...\n");
470 /* State machine, to turn into an interrupt handler */
471 while(iface->state != state_idle) {
472 u8 isr = wait_interrupt(iface);
473 handle_interrupt(iface, isr);
474 }
475 #else /* POLLED_MODE */
476 pr_debug("using interrupt mode...\n");
477 wait_for_completion(&iface->complete);
478 #endif /* POLLED_MODE */
479
480 rc = iface->result;
481 if (rc == 0)
482 completed++;
483 pr_debug("transfer done, result: %d\n", rc);
484 }
485
486 /* Release sem */
487 pmac_low_i2c_unlock(iface->node);
488
489 return completed;
490 }
491
492 static u32
493 keywest_func(struct i2c_adapter * adapter)
494 {
495 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
496 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
497 I2C_FUNC_SMBUS_BLOCK_DATA;
498 }
499
500 /* For now, we only handle combined mode (smbus) */
501 static struct i2c_algorithm keywest_algorithm = {
502 .name = "Keywest i2c",
503 .id = I2C_ALGO_SMBUS,
504 .smbus_xfer = keywest_smbus_xfer,
505 .master_xfer = keywest_xfer,
506 .functionality = keywest_func,
507 };
508
509
510 static int
511 create_iface(struct device_node *np, struct device *dev)
512 {
513 unsigned long steps;
514 unsigned bsteps, tsize, i, nchan, addroffset;
515 struct keywest_iface* iface;
516 u32 *psteps, *prate;
517 int rc;
518
519 if (pmac_low_i2c_lock(np))
520 return -ENODEV;
521
522 psteps = (u32 *)get_property(np, "AAPL,address-step", NULL);
523 steps = psteps ? (*psteps) : 0x10;
524
525 /* Hrm... maybe we can be smarter here */
526 for (bsteps = 0; (steps & 0x01) == 0; bsteps++)
527 steps >>= 1;
528
529 if (np->parent->name[0] == 'u') {
530 nchan = 2;
531 addroffset = 3;
532 } else {
533 addroffset = 0;
534 nchan = 1;
535 }
536
537 tsize = sizeof(struct keywest_iface) +
538 (sizeof(struct keywest_chan) + 4) * nchan;
539 iface = (struct keywest_iface *) kmalloc(tsize, GFP_KERNEL);
540 if (iface == NULL) {
541 printk(KERN_ERR "i2c-keywest: can't allocate inteface !\n");
542 pmac_low_i2c_unlock(np);
543 return -ENOMEM;
544 }
545 memset(iface, 0, tsize);
546 spin_lock_init(&iface->lock);
547 init_completion(&iface->complete);
548 iface->node = of_node_get(np);
549 iface->bsteps = bsteps;
550 iface->chan_count = nchan;
551 iface->state = state_idle;
552 iface->irq = np->intrs[0].line;
553 iface->channels = (struct keywest_chan *)
554 (((unsigned long)(iface + 1) + 3UL) & ~3UL);
555 iface->base = (unsigned long)ioremap(np->addrs[0].address + addroffset,
556 np->addrs[0].size);
557 if (iface->base == 0) {
558 printk(KERN_ERR "i2c-keywest: can't map inteface !\n");
559 kfree(iface);
560 pmac_low_i2c_unlock(np);
561 return -ENOMEM;
562 }
563
564 #ifndef POLLED_MODE
565 init_timer(&iface->timeout_timer);
566 iface->timeout_timer.function = keywest_timeout;
567 iface->timeout_timer.data = (unsigned long)iface;
568 #endif
569
570 /* Select interface rate */
571 iface->cur_mode = KW_I2C_MODE_100KHZ;
572 prate = (u32 *)get_property(np, "AAPL,i2c-rate", NULL);
573 if (prate) switch(*prate) {
574 case 100:
575 iface->cur_mode = KW_I2C_MODE_100KHZ;
576 break;
577 case 50:
578 iface->cur_mode = KW_I2C_MODE_50KHZ;
579 break;
580 case 25:
581 iface->cur_mode = KW_I2C_MODE_25KHZ;
582 break;
583 default:
584 printk(KERN_WARNING "i2c-keywest: unknown rate %ldKhz, using 100KHz\n",
585 (long)*prate);
586 }
587
588 /* Select standard mode by default */
589 iface->cur_mode |= KW_I2C_MODE_STANDARD;
590
591 /* Write mode */
592 write_reg(reg_mode, iface->cur_mode);
593
594 /* Switch interrupts off & clear them*/
595 write_reg(reg_ier, 0x00);
596 write_reg(reg_isr, KW_I2C_IRQ_MASK);
597
598 #ifndef POLLED_MODE
599 /* Request chip interrupt */
600 rc = request_irq(iface->irq, keywest_irq, SA_INTERRUPT, "keywest i2c", iface);
601 if (rc) {
602 printk(KERN_ERR "i2c-keywest: can't get IRQ %d !\n", iface->irq);
603 iounmap((void *)iface->base);
604 kfree(iface);
605 pmac_low_i2c_unlock(np);
606 return -ENODEV;
607 }
608 #endif /* POLLED_MODE */
609
610 pmac_low_i2c_unlock(np);
611 dev_set_drvdata(dev, iface);
612
613 for (i=0; i<nchan; i++) {
614 struct keywest_chan* chan = &iface->channels[i];
615 u8 addr;
616
617 sprintf(chan->adapter.name, "%s %d", np->parent->name, i);
618 chan->iface = iface;
619 chan->chan_no = i;
620 chan->adapter.id = I2C_ALGO_SMBUS;
621 chan->adapter.algo = &keywest_algorithm;
622 chan->adapter.algo_data = NULL;
623 chan->adapter.client_register = NULL;
624 chan->adapter.client_unregister = NULL;
625 i2c_set_adapdata(&chan->adapter, chan);
626 chan->adapter.dev.parent = dev;
627
628 rc = i2c_add_adapter(&chan->adapter);
629 if (rc) {
630 printk("i2c-keywest.c: Adapter %s registration failed\n",
631 chan->adapter.name);
632 i2c_set_adapdata(&chan->adapter, NULL);
633 }
634 if (probe) {
635 printk("Probe: ");
636 for (addr = 0x00; addr <= 0x7f; addr++) {
637 if (i2c_smbus_xfer(&chan->adapter,addr,
638 0,0,0,I2C_SMBUS_QUICK,NULL) >= 0)
639 printk("%02x ", addr);
640 }
641 printk("\n");
642 }
643 }
644
645 printk(KERN_INFO "Found KeyWest i2c on \"%s\", %d channel%s, stepping: %d bits\n",
646 np->parent->name, nchan, nchan > 1 ? "s" : "", bsteps);
647
648 return 0;
649 }
650
651 static int
652 dispose_iface(struct device *dev)
653 {
654 struct keywest_iface *iface = dev_get_drvdata(dev);
655 int i, rc;
656
657 /* Make sure we stop all activity */
658 if (pmac_low_i2c_lock(iface->node))
659 return -ENODEV;
660
661 #ifndef POLLED_MODE
662 spin_lock_irq(&iface->lock);
663 while (iface->state != state_idle) {
664 spin_unlock_irq(&iface->lock);
665 msleep(100);
666 spin_lock_irq(&iface->lock);
667 }
668 #endif /* POLLED_MODE */
669 iface->state = state_dead;
670 #ifndef POLLED_MODE
671 spin_unlock_irq(&iface->lock);
672 free_irq(iface->irq, iface);
673 #endif /* POLLED_MODE */
674
675 pmac_low_i2c_unlock(iface->node);
676
677 /* Release all channels */
678 for (i=0; i<iface->chan_count; i++) {
679 struct keywest_chan* chan = &iface->channels[i];
680 if (i2c_get_adapdata(&chan->adapter) == NULL)
681 continue;
682 rc = i2c_del_adapter(&chan->adapter);
683 i2c_set_adapdata(&chan->adapter, NULL);
684 /* We aren't that prepared to deal with this... */
685 if (rc)
686 printk("i2c-keywest.c: i2c_del_adapter failed, that's bad !\n");
687 }
688 iounmap((void *)iface->base);
689 dev_set_drvdata(dev, NULL);
690 of_node_put(iface->node);
691 kfree(iface);
692
693 return 0;
694 }
695
696 static int
697 create_iface_macio(struct macio_dev* dev, const struct of_match *match)
698 {
699 return create_iface(dev->ofdev.node, &dev->ofdev.dev);
700 }
701
702 static int
703 dispose_iface_macio(struct macio_dev* dev)
704 {
705 return dispose_iface(&dev->ofdev.dev);
706 }
707
708 static int
709 create_iface_of_platform(struct of_device* dev, const struct of_match *match)
710 {
711 return create_iface(dev->node, &dev->dev);
712 }
713
714 static int
715 dispose_iface_of_platform(struct of_device* dev)
716 {
717 return dispose_iface(&dev->dev);
718 }
719
720 static struct of_match i2c_keywest_match[] =
721 {
722 {
723 .name = OF_ANY_MATCH,
724 .type = "i2c",
725 .compatible = "keywest"
726 },
727 {},
728 };
729
730 static struct macio_driver i2c_keywest_macio_driver =
731 {
732 .name = "i2c-keywest",
733 .match_table = i2c_keywest_match,
734 .probe = create_iface_macio,
735 .remove = dispose_iface_macio
736 };
737
738 static struct of_platform_driver i2c_keywest_of_platform_driver =
739 {
740 .name = "i2c-keywest",
741 .match_table = i2c_keywest_match,
742 .probe = create_iface_of_platform,
743 .remove = dispose_iface_of_platform
744 };
745
746 static int __init
747 i2c_keywest_init(void)
748 {
749 of_register_driver(&i2c_keywest_of_platform_driver);
750 macio_register_driver(&i2c_keywest_macio_driver);
751
752 return 0;
753 }
754
755 static void __exit
756 i2c_keywest_cleanup(void)
757 {
758 of_unregister_driver(&i2c_keywest_of_platform_driver);
759 macio_unregister_driver(&i2c_keywest_macio_driver);
760 }
761
762 module_init(i2c_keywest_init);
763 module_exit(i2c_keywest_cleanup);
MOXA 2.6.9 from sdlinux-moxaart.tgz